[LLVMbugs] [Bug 18497] New: Self hosting broken with -enable-aa-sched-mi

bugzilla-daemon at llvm.org bugzilla-daemon at llvm.org
Wed Jan 15 16:58:02 PST 2014


            Bug ID: 18497
           Summary: Self hosting broken with -enable-aa-sched-mi
           Product: libraries
           Version: trunk
          Hardware: PC
                OS: Linux
            Status: NEW
          Severity: normal
          Priority: P
         Component: Common Code Generator Code
          Assignee: unassignedbugs at nondot.org
          Reporter: hfinkel at anl.gov
                CC: llvmbugs at cs.uiuc.edu
    Classification: Unclassified

Created attachment 11877
  --> http://llvm.org/bugs/attachment.cgi?id=11877&action=edit
The miscompiled function

Self hosting is currently broken when the -enable-aa-sched-mi feature is used.
This is true on both x86_64 and PPC64 (at least).

Here I've isolated one particular problem spot (using r198803 on x86_64): The
function _ZN4llvm16DAGTypeLegalizer18WidenVecRes_BinaryEPNS_6SDNodeE in
lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp is being miscompiled. I've
extracted that function in the attached file.

More specifically:

llc -enable-misched -misched-bottomup=0 -misched-topdown=0 -misched=shuffle
-enable-aa-sched-mi -misched-only-block=6 -misched-cutoff=7

Will give correct code, while:

llc -enable-misched -misched-bottomup=0 -misched-topdown=0 -misched=shuffle
-enable-aa-sched-mi -misched-only-block=6 -misched-cutoff=8

will give incorrect code.

The difference in output is:

--- /tmp/good_func.s    2014-01-15 18:48:27.254951945 -0600
+++ /tmp/bad_func.s     2014-01-15 18:48:35.335177403 -0600
@@ -59,15 +59,15 @@
        cmpw    $0, 56(%rbx)
        je      .LBB0_9
 # BB#3:                                 # %_ZNK4llvm6SDNode10getOperandEj.exit
-       movl    88(%rsp), %r12d
-       movq    96(%rsp), %rax
-       movq    %rax, 40(%rsp)          # 8-byte Spill
+       movq    96(%rsp), %r12
        movq    32(%rbx), %rax
        movq    (%rax), %rcx
        movl    8(%rax), %eax
        movq    %rcx, 80(%rsp)
        movl    %eax, 88(%rsp)
        leaq    2048(%r14), %r13
+       movl    88(%rsp), %eax
+       movl    %eax, 44(%rsp)          # 4-byte Spill
        movq    %r13, %rdi
        leaq    80(%rsp), %rsi

(and a couple of changes later because the spill changed from an 8-byte spill
to a 4-byte one).

The miscompiled version will cause an anomalous assertion failure when llc is
run on test/CodeGen/X86/vec_ext_inreg.ll

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