[LLVMbugs] [Bug 15901] New: TableGen miscompilation/crash in stage 2 [powerpc-darwin8]
bugzilla-daemon at llvm.org
bugzilla-daemon at llvm.org
Thu May 2 13:48:44 PDT 2013
http://llvm.org/bugs/show_bug.cgi?id=15901
Bug ID: 15901
Summary: TableGen miscompilation/crash in stage 2
[powerpc-darwin8]
Product: new-bugs
Version: trunk
Hardware: Macintosh
OS: MacOS X
Status: NEW
Severity: normal
Priority: P
Component: new bugs
Assignee: unassignedbugs at nondot.org
Reporter: fang at csl.cornell.edu
CC: llvmbugs at cs.uiuc.edu
Classification: Unclassified
On powerpc-darwin8, my next issue during stage-2 compilation (stage-1 built
with gcc-4.0) happens in llvm-tblgen:
[ 21%] Building ARMGenRegisterInfo.inc...
cd /Users/fang/local/src/LLVM-svn/gcc40-stage2-build/lib/Target/ARM &&
../../../bin/llvm-tblgen -gen-register-info -I
/Users/fang/local/src/LLVM-svn/llvm/lib/Target/ARM -I
/Users/fang/local/src/LLVM-
svn/llvm/lib/Target -I /Users/fang/local/src/LLVM-svn/llvm/include
/Users/fang/local/src/LLVM-svn/llvm/lib/Target/ARM/ARM.td -o
/Users/fang/local/src/LLVM-svn/gcc40-stage2-build/lib/Target/ARM/ARMGenR
egisterInfo.inc.tmp
/Users/fang/local/src/LLVM-svn/llvm/include/llvm/ADT/DenseMap.h:289: failed
asse
rtion `!FoundVal && "Key already in new map?"'
Stack dump:
0. Program arguments: ../../../bin/llvm-tblgen -gen-register-info -I
/Users
/fang/local/src/LLVM-svn/llvm/lib/Target/ARM -I
/Users/fang/local/src/LLVM-svn/l
lvm/lib/Target -I /Users/fang/local/src/LLVM-svn/llvm/include
/Users/fang/local/
src/LLVM-svn/llvm/lib/Target/ARM/ARM.td -o
/Users/fang/local/src/LLVM-svn/gcc40-
stage2-build/lib/Target/ARM/ARMGenRegisterInfo.inc.tmp
make[2]: *** [lib/Target/ARM/ARMGenRegisterInfo.inc.tmp] Error 134
make[2]: Leaving directory `/Volumes/Isolde/builds/LLVM/gcc40-stage2-build'
make[1]: *** [lib/Target/ARM/CMakeFiles/ARMCommonTableGen.dir/all] Error 2
make[1]: Leaving directory `/Volumes/Isolde/builds/LLVM/gcc40-stage2-build'
make: *** [all] Error 2
I've added some call tracing and compared stage 1 vs. stage 2:
--- gcc40-cmake-build/lib/Target/ARM/tblgen.err.head 2013-05-02
13:33:53.000000000 -0700
+++ gcc40-stage2-build/lib/Target/ARM/tblgen.err 2013-05-02
13:23:22.000000000 -0700
@@ -1,4 +1,6 @@
-\-{ int llvm::TableGenMain(char*, bool (*)(llvm::raw_ostream&,
llvm::RecordKeeper&))
+[ 21%] Building ARMGenRegisterInfo.inc...
+cd /Users/fang/local/src/LLVM-svn/gcc40-stage2-build/lib/Target/ARM &&
../../../bin/llvm-tblgen -gen-register-info -I
/Users/fang/local/src/LLVM-svn/llvm/lib/Target/ARM -I
/Users/fang/local/src/LLVM-
svn/llvm/lib/Target -I /Users/fang/local/src/LLVM-svn/llvm/include
/Users/fang/local/src/LLVM-svn/llvm/lib/Target/ARM/ARM.td -o
/Users/fang/local/src/LLVM-svn/gcc40-stage2-build/lib/Target/ARM/ARMGenR
egisterInfo.inc.tmp
+\-{ int llvm::TableGenMain(char *, TableGenMainFn *)
| : Parsing input file.
| : Tell SrcMgr about buffer for TGParser.
| : Record location of include dir.
... <snip> ...
@@ -380644,27 +380646,23 @@
| | | | | | | | \-{ llvm::Init*
llvm::TGParser::ParseSimpleValue(llvm::Record*, llvm::RecTy*,
llvm::TGParser::IDParseMode)
| | | | | | | | /-} llvm::Init*
llvm::TGParser::ParseSimpleValue(llvm::Record*, llvm::RecTy*,
llvm::TGParser::IDParseMode)
| | | | | | | /-} llvm::Init* llvm::TGParser::ParseValue(llvm::Record*,
llvm::RecTy*, llvm::TGParser::IDParseMode)
-| | | | | | /-} std::vector<llvm::Init*, std::allocator<llvm::Init*> >
llvm::TGParser::ParseValueList(llvm::Record*, llvm::Record*, llvm::RecTy*)
+| | | | | | /-} std::vector<Init *>
llvm::TGParser::ParseValueList(llvm::Record *, llvm::Record *, llvm::RecTy *)
| | | | | | \-{ llvm::Record* llvm::TGParser::ParseClassID()
| | | | | | /-} llvm::Record* llvm::TGParser::ParseClassID()
-| | | | | | \-{ std::vector<llvm::Init*, std::allocator<llvm::Init*> >
llvm::TGParser::ParseValueList(llvm::Record*, llvm::Record*, llvm::RecTy*)
+| | | | | | \-{ std::vector<Init *>
llvm::TGParser::ParseValueList(llvm::Record *, llvm::Record *, llvm::RecTy *)
| | | | | | | \-{ llvm::Init* llvm::TGParser::ParseValue(llvm::Record*,
llvm::RecTy*, llvm::TGParser::IDParseMode)
| | | | | | | | \-{ llvm::Init*
llvm::TGParser::ParseSimpleValue(llvm::Record*, llvm::RecTy*,
llvm::TGParser::IDParseMode)
-| | | | | | | | | \-{ std::vector<llvm::Init*, std::allocator<llvm::Init*> >
llvm::TGParser::ParseValueList(llvm::Record*, llvm::Record*, llvm::RecTy*)
+| | | | | | | | | \-{ std::vector<Init *>
llvm::TGParser::ParseValueList(llvm::Record *, llvm::Record *, llvm::RecTy *)
| | | | | | | | | | \-{ llvm::Init* llvm::TGParser::ParseValue(llvm::Record*,
llvm::RecTy*, llvm::TGParser::IDParseMode)
| | | | | | | | | | | \-{ llvm::Init*
llvm::TGParser::ParseSimpleValue(llvm::Record*, llvm::RecTy*,
llvm::TGParser::IDParseMode)
| | | | | | | | | | | | : IntVal
| | | | | | | | | | | | \-{ static llvm::IntInit* llvm::IntInit::get(int64_t)
| | | | | | | | | | | | | : V = 277
-| | | | | | | | | | | | /-} static llvm::IntInit* llvm::IntInit::get(int64_t)
-| | | | | | | | | | | /-} llvm::Init*
llvm::TGParser::ParseSimpleValue(llvm::Record*, llvm::RecTy*,
llvm::TGParser::IDParseMode)
-| | | | | | | | | | /-} llvm::Init* llvm::TGParser::ParseValue(llvm::Record*,
llvm::RecTy*, llvm::TGParser::IDParseMode)
-| | | | | | | | | /-} std::vector<llvm::Init*, std::allocator<llvm::Init*> >
llvm::TGParser::ParseValueList(llvm::Record*, llvm::Record*, llvm::RecTy*)
-| | | | | | | | /-} llvm::Init*
llvm::TGParser::ParseSimpleValue(llvm::Record*, llvm::RecTy*,
llvm::TGParser::IDParseMode)
-| | | | | | | /-} llvm::Init* llvm::TGParser::ParseValue(llvm::Record*,
llvm::RecTy*, llvm::TGParser::IDParseMode)
-| | | | | | /-} std::vector<llvm::Init*, std::allocator<llvm::Init*> >
llvm::TGParser::ParseValueList(llvm::Record*, llvm::Record*, llvm::RecTy*)
-| | | | | | \-{ bool llvm::TGParser::ParseBody(llvm::Record*)
-| | | | | | /-} bool llvm::TGParser::ParseBody(llvm::Record*)
-| | | | | /-} bool llvm::TGParser::ParseObjectBody(llvm::Record*)
-| | | | /-} bool llvm::TGParser::ParseDef(llvm::MultiClass*)
-| | | /-} bool llvm::TGParser::ParseObject(llvm::MultiClass*)
+/Users/fang/local/src/LLVM-svn/llvm/include/llvm/ADT/DenseMap.h:289: failed
assertion `!FoundVal && "Key already in new map?"'
+Stack dump:
+0. Program arguments: ../../../bin/llvm-tblgen -gen-register-info -I
/Users/fang/local/src/LLVM-svn/llvm/lib/Target/ARM -I
/Users/fang/local/src/LLVM-svn/llvm/lib/Target -I /Users/fang/local/src/
LLVM-svn/llvm/include /Users/fang/local/src/LLVM-svn/llvm/lib/Target/ARM/ARM.td
-o
/Users/fang/local/src/LLVM-svn/gcc40-stage2-build/lib/Target/ARM/ARMGenRegisterInfo.inc.tmp
+make[2]: *** [lib/Target/ARM/ARMGenRegisterInfo.inc.tmp] Error 134
+make[2]: Leaving directory `/Volumes/Isolde/builds/LLVM/gcc40-stage2-build'
+make[1]: *** [lib/Target/ARM/CMakeFiles/ARMCommonTableGen.dir/all] Error 2
+make[1]: Leaving directory `/Volumes/Isolde/builds/LLVM/gcc40-stage2-build'
+make: *** [all] Error 2
Ignore the std::vector __PRETTY_FUNCTION__ differences.
Stage-2's tblgen just suddenly assert-fails at V = 277 in InitInit::get().
Suggestions for debugging this?
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