[LLVMbugs] [Bug 14868] New: Inefficient wide mask handling on ARM.

[bugzilla-daemon at llvm.org]

http://llvm.org/bugs/show_bug.cgi?id=14868

             Bug #: 14868
           Summary: Inefficient wide mask handling on ARM.
           Product: libraries
           Version: trunk
          Platform: PC
        OS/Version: All
            Status: NEW
          Severity: enhancement
          Priority: P
         Component: Backend: ARM
        AssignedTo: unassignedbugs at nondot.org
        ReportedBy: nrotem at apple.com
                CC: llvmbugs at cs.uiuc.edu
    Classification: Unclassified


The following code gets scalarized when compiled to thumb/swift. The
type-legalizer legalized 8xi1 into a single Q register, while the two operands
are legalized into two Q registers. On AVX we mitigated this problem with a few
DAGCombine opts.  

%T0_63 = type <8 x i32>
%T1_63 = type <8 x i1>
define void @func63() {
   %v0 = load %T0_63* undef
   %v1 = load %T0_63* undef
   %c = load %T1_63* undef
   %r = select %T1_63 %c, %T0_63 %v0, %T0_63 %v1
   store %T0_63 %r, %T0_63* undef
   ret void
}

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