[LLVMbugs] [Bug 13951] New: Assert for cpu with FeatureCMOV but without SSE2 (?): "lib/Target/X86/X86FloatingPoint.cpp:332: unsigned int getFPReg(const llvm::MachineOperand&): Assertion `Reg >= X86::FP0 && Reg <= X86::FP6 && "Expected FP register!"' failed."

[bugzilla-daemon at llvm.org]

http://llvm.org/bugs/show_bug.cgi?id=13951

             Bug #: 13951
           Summary: Assert for cpu with FeatureCMOV but without SSE2 (?):
                    "lib/Target/X86/X86FloatingPoint.cpp:332: unsigned int
                    getFPReg(const llvm::MachineOperand&): Assertion `Reg
                    >= X86::FP0 && Reg <= X86::FP6 && "Expected FP
                    register!"' failed."
           Product: tools
           Version: trunk
          Platform: PC
        OS/Version: Linux
            Status: NEW
          Severity: enhancement
          Priority: P
         Component: llc
        AssignedTo: unassignedbugs at nondot.org
        ReportedBy: jvoung at google.com
                CC: llvmbugs at cs.uiuc.edu
    Classification: Unclassified


Created attachment 9274
  --> http://llvm.org/bugs/attachment.cgi?id=9274
bugpointed bitcode

The following bitcode will trigger the assert

"lib/Target/X86/X86FloatingPoint.cpp:332: unsigned int getFPReg(const
llvm::MachineOperand&): Assertion `Reg >= X86::FP0 && Reg <= X86::FP6 &&
"Expected FP register!"' failed."

The bitcode is attached but also pasted here:

=========

; ModuleID = 'bugpoint-reduced-simplified.bc'

define double @pow(double %x, double %y) nounwind {
entry:
  br i1 undef, label %if.then.i, label %exit

if.then.i:                                      ; preds = %entry
  %cmp.i = icmp sgt i32 undef, -1
  %cond.i = select i1 %cmp.i, double %y, double 0.000000e+00
  br label %exit

exit:                               ; preds = %if.then.i, %entry
  %r = phi double [ %cond.i, %if.then.i ], [ 1.000000e+00, %entry ]
  ret double %r
}


=========

The llc commandline is:

llc -mcpu=pentium2 -march=x86 bugpoint-reduced-simplified.ll -o temp.s

You can also trigger the assert with -mcpu=pentiumpro, pentium2, athlon-4, or
c3-2.  If you add -mattr=+sse2 there is no assertion.


-debug shows this as the last gasp:

=========

BB#1: derived from LLVM BB %if.then.i
    Live Ins: %FP1 %ST1 %ST0
    Predecessors according to CFG: BB#0
        ST_FPrr %ST1, %FPSW<imp-def>
        %FP0<def> = LD_Fp064 %FPSW<imp-def,dead>
        TEST32rr %EAX<undef>, %EAX<undef>, %EFLAGS<imp-def>
        %XMM0<def> = COPY %FP1<kill>
        JNS_4 <BB#3>, %EFLAGS<imp-use,kill>
    Successors according to CFG: BB#2 BB#3

FPInst: %FP0<def> = LD_Fp064 %FPSW<imp-def,dead>
Inserted instructions:
        LD_F0 %FPSW<imp-def,dead>
Stack contents: FP1 FP0

FPInst: %XMM0<def> = COPY %FP1<kill>


=========


Is this just bad bitcode, or this a combination of features that isn't handled?

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