[LLVMbugs] [Bug 13781] New: [Hexagon] LLVM should use combine with immediate for zero extension when -mcpu=v4 and above.

[bugzilla-daemon at llvm.org]

http://llvm.org/bugs/show_bug.cgi?id=13781

             Bug #: 13781
           Summary: [Hexagon] LLVM should use combine with immediate for
                    zero extension when -mcpu=v4 and above.
           Product: tools
           Version: trunk
          Platform: PC
        OS/Version: Windows NT
            Status: NEW
          Severity: enhancement
          Priority: P
         Component: llc
        AssignedTo: unassignedbugs at nondot.org
        ReportedBy: pranavb at codeaurora.org
                CC: llvmbugs at cs.uiuc.edu
    Classification: Unclassified


Created attachment 9170
  --> http://llvm.org/bugs/attachment.cgi?id=9170
Testcase to reproduce this problem.

For zero extending to an i64 value on v4 (and above), we can use the combine
with immediate instruction instead of a combination of transfer immediate and
combine register-register.

For instance, on v4 and higher, we can do zero extends in one instruction by
doing
r1:0 = combine(#0, r5)  <-- zero extend the value in r5.

instead of 

r2 = #0
r1:r0 = combine (r2, r5).

See attached testcase.
$> llc -march=hexagon -mcpu=hexagonv4 < combine_ir.ll
....
....
word:                                   // @word
// BB#0:                                // %entry
      {
        r2 = #0
        r1 = add(r0, #4)
        r0 = memw(r0 + #0)
      }
      {
        r3 = memw(r1 + #0)
        r1:0 = combine(r2, r0) <-- combine (register, register).
      }
....
....

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