[LLVMbugs] [Bug 13111] New: Invalid bitcast optimization for pointer to vector

bugzilla-daemon at llvm.org bugzilla-daemon at llvm.org
Thu Jun 14 05:41:07 PDT 2012


http://llvm.org/bugs/show_bug.cgi?id=13111

             Bug #: 13111
           Summary: Invalid bitcast optimization for pointer to vector
           Product: tools
           Version: 3.0
          Platform: PC
        OS/Version: Linux
            Status: NEW
          Severity: normal
          Priority: P
         Component: opt
        AssignedTo: unassignedbugs at nondot.org
        ReportedBy: babslachem at gmail.com
                CC: llvmbugs at cs.uiuc.edu
    Classification: Unclassified


Hi all,

For folling .ll code:

; ModuleID = 'vect31.ll'
target datalayout =
"e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-n32"
target triple = "armv7-none-linux-gnueabi"

define arm_aapcscc void @test_hi_char8(i8* %.T0351, <8 x i8>* nocapture %srcA,
<4 x i8>* nocapture %dst) noinline {
L.entry:
  %0 = tail call arm_aapcscc  i32 (...)* @get_global_id(i8* %.T0351, i32 0)
  %1 = bitcast <8 x i8>* %srcA to i8*
  %2 = getelementptr i8* %1, i32 4
  %3 = mul i32 %0, 8
  %4 = getelementptr i8* %2, i32 %3
  %5 = bitcast i8* %4 to <4 x i8>*
  %6 = load <4 x i8>* %5, align 1
  %7 = getelementptr <4 x i8>* %dst, i32 %0
  store <4 x i8> %6, <4 x i8>* %7, align 4
  ret void
}

declare arm_aapcscc i32 @get_global_id(...) readonly

Using opt (both 3.0 and 3.1) produce the following optimized ll:

; ModuleID = 'vect31.ll'
target datalayout =
"e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-n32"
target triple = "armv7-none-linux-gnueabi"

define arm_aapcscc void @test_hi_char8(i8* %.T0351, <8 x i8>* nocapture %srcA,
<4 x i8>* nocapture %dst) noinline {
L.entry:
  %0 = tail call arm_aapcscc  i32 (...)* @get_global_id(i8* %.T0351, i32 0)
  %1 = shl i32 %0, 3
  %.sum1 = or i32 %1, 4
  %2 = getelementptr <8 x i8>* %srcA, i32 0, i32 %.sum1
  %3 = bitcast i8* %2 to <4 x i8>*
  %4 = load <4 x i8>* %3, align 1
  %5 = getelementptr <4 x i8>* %dst, i32 %0
  store <4 x i8> %4, <4 x i8>* %5, align 4
  ret void
}

declare arm_aapcscc i32 @get_global_id(...) readonly

as you can see statement %3 is not correct since statement %2 is of type <8 x
i8>. This was however accepted by llc 3.0 and now with llc 3.1 is just fails
with an assert !

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