[LLVMbugs] [Bug 13038] New: VST1.16 instuctions with 16-bit alignment re-encode as unaligned

[bugzilla-daemon at llvm.org]

http://llvm.org/bugs/show_bug.cgi?id=13038

             Bug #: 13038
           Summary: VST1.16 instuctions with 16-bit alignment re-encode as
                    unaligned
           Product: libraries
           Version: trunk
          Platform: All
        OS/Version: All
            Status: NEW
          Severity: normal
          Priority: P
         Component: Backend: ARM
        AssignedTo: unassignedbugs at nondot.org
        ReportedBy: richard.barton at arm.com
                CC: llvmbugs at cs.uiuc.edu
    Classification: Unclassified


The NEON VST1.16 instruction with a 16-bit alignment is being encoded
incorrectly for Thumb.

Reproduce with: echo 0x80 0xf9 0x10 0x04 |
/work/ricbar01/llvm-oss/build/bin/llvm-mc -triple thumbv7 -show-encoding
-disassemble -show-inst

        .section        __TEXT,__text,regular,pure_instructions
        vst1.16 {d0[0]}, [r0, :16], r0  @ encoding: [0x80,0xf9,0x00,0x04]
                                        @ <MCInst #1780 VST1LNd16_UPD
                                        @  <MCOperand Reg:60>
                                        @  <MCOperand Reg:60>
                                        @  <MCOperand Imm:2>
                                        @  <MCOperand Reg:60>
                                        @  <MCOperand Reg:3>
                                        @  <MCOperand Imm:0>
                                        @  <MCOperand Imm:14>
                                        @  <MCOperand Reg:0>>

Note bit 4 of the bottom half word is flipped, so the instruction incorrectly
re-encodes to:  vst1.16 {d0[0]}, [r0], r0

Note this is an internal consistency problem, not a bug in the encoder per-se,
i.e. the following assembles this instruction correctly:

 echo 0x80 0xf9 0x10 0x04 | /work/ricbar01/llvm-oss/build/bin/llvm-mc -triple
thumbv7 -show-encoding -disassemble -show-inst
        .section        __TEXT,__text,regular,pure_instructions
        vst1.16 {d0[0]}, [r0, :16], r0  @ encoding: [0x80,0xf9,0x00,0x04]
                                        @ <MCInst #1780 VST1LNd16_UPD
                                        @  <MCOperand Reg:60>
                                        @  <MCOperand Reg:60>
                                        @  <MCOperand Imm:2>
                                        @  <MCOperand Reg:60>
                                        @  <MCOperand Reg:3>
                                        @  <MCOperand Imm:0>
                                        @  <MCOperand Imm:14>
                                        @  <MCOperand Reg:0>>

You can see the immediate value of the 3rd operand is different from the result
of the decode. The disassembler gets it right, so the assembler and encoder
have a different contract to the disassembler and decoder.

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