[LLVMbugs] [Bug 10003] New: SelectionDAG instruction selection performs CSE on nodes with debug information

bugzilla-daemon at llvm.org bugzilla-daemon at llvm.org
Tue May 24 06:15:27 PDT 2011


           Summary: SelectionDAG instruction selection performs CSE on
                    nodes with debug information
           Product: libraries
           Version: trunk
          Platform: PC
        OS/Version: Windows NT
            Status: NEW
          Severity: normal
          Priority: P
         Component: Common Code Generator Code
        AssignedTo: unassignedbugs at nondot.org
        ReportedBy: micah.villmow at amd.com
                CC: llvmbugs at cs.uiuc.edu

Created an attachment (id=6640)
 --> (http://llvm.org/bugs/attachment.cgi?id=6640)
test case that shows problem

If SelectionDAG is generating code when debug information exists and there
exists two sections of code that has the same expression but come from
different source line numbers, SelectionDAG does CSE when generating
MachineNodes. The problem is that two source line numbers might have the same
expression but when CSE is performed, only one of the debug loc values is
saved. Since the SelectionDAG does bottom-up instruction selection, the debug
loc with the line number later in the source program wins generating
non-sequential debug_loc debug information. I have attached a test case that
shows this problem.

Here is the line of code:

MachineSDNode *
SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc DL, SDVTList VTs,
                             const SDValue *Ops, unsigned NumOps) {
  bool DoCSE = VTs.VTs[VTs.NumVTs-1] != MVT::Glue;
  MachineSDNode *N;
  void *IP = 0;

Adding this,  && !hasDebugValues(), to the DoCSE boolean check fixes the

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