[LLVMbugs] [Bug 9410] New: Bad live intervals after SimpleRegisterCoalescing remat

[bugzilla-daemon at llvm.org]

http://llvm.org/bugs/show_bug.cgi?id=9410

           Summary: Bad live intervals after SimpleRegisterCoalescing
                    remat
           Product: libraries
           Version: trunk
          Platform: PC
        OS/Version: All
            Status: NEW
          Severity: normal
          Priority: P
         Component: Register Allocator
        AssignedTo: unassignedbugs at nondot.org
        ReportedBy: stoklund at 2pi.dk
                CC: llvmbugs at cs.uiuc.edu


SimpleRegisterCoalescing can rematerialize isAsCheapAsAMove instructions
instead of coalescing a copy which causes the source live interval to shrink.

In rare cases, the live interval doesn't shrink enough because previously
coalesced copies are still around and look like legitimate uses to
LiveIntervals::shrinkToUses.

llc bugpoint-reduced-simplified.bc -disable-fp-elim -relocation-model=pic
-debug
...
if.then1043:
1728L   %vreg43<def> = COPY %vreg34; GR32:%vreg43,%vreg34
        Considering merging %vreg34 with %vreg43 to GR32
                RHS = %vreg34 = [1392d,1760d:0)  0 at 1392d
                LHS = %vreg43 = [1728d,1744d:0)  0 at 1728d
                updated: 1392L  %vreg43<def> = MOV32r0 %EFLAGS<imp-def,dead>;
GR32:%vreg43
                updated: 1760L  %vreg63<def> = COPY %vreg43<kill>;
GR32:%vreg63,%vreg43
                updated: 1568L  %vreg38<def> = CMOVNE32rr %vreg38, %vreg43,
%EFLAGS<imp-use,kill>; GR32:%vreg38,%vreg43
        Joined. Result = %vreg43 = [1392d,1760d:0)  0 at 1392d
...

1760L   %vreg63<def> = COPY %vreg43<kill>; GR32:%vreg63,%vreg43
        Considering merging %vreg43 with %vreg63 to GR32                RHS =
%vreg43 = [1392d,1760d:0)  0 at 1392d
                LHS = %vreg63 =
[624d,672L:4)[704d,720L:5)[720L,944L:0)[1040d,1088L:2)[1120L,1200L:0)[1216L,1712L:0)[1760d,1792L:3)[1792L,2160L:0)[2160L,2320L:1)[2336L,2448d:1)
 0 at 720L-
phidef-phikill 1 at 2160L-phidef 2 at 1040d-phikill 3 at 1760d-phikill 4 at 624d-phikill
5 at 704d-phikill
Remat: %vreg63<def> = MOV32r0 %EFLAGS<imp-def,dead>; GR32:%vreg63
Shrink: %vreg43 = [1392d,1760d:0)  0 at 1392d
 live-in at 1712L
Shrink: %vreg43 = [1392d,1728d:0)  0 at 1392d

Notice how %vreg43 is shrunk to end at 1728d which is a COPY instruction that
was coalesced above.

This is not a big problem for linear scan - the range is longer, but it is
trivially rematerializable, so it shouldn't degrade code quality much. I don't
want to mess with this so close to the 2.9 release branch.


The greedy register allocator doesn't like this at all because %vreg43
seemingly ends in the middle of a basic block where it has no uses. That's
impossible, and confuses the live range splitting.

r127096 temporarily fixes the problem by recomputing incomsistent live
intervals. It should be reverted after the real problem is fixed.

*** Fixing inconsistent live interval! ***
Shrink: %vreg43,1.371047e-02 = [1392d,1728d:0)  0 at 1392d
Shrink: %vreg43,1.371047e-02 = [1392d,1568d:0)  0 at 1392d

-- 
Configure bugmail: http://llvm.org/bugs/userprefs.cgi?tab=email
------- You are receiving this mail because: -------
You are on the CC list for the bug.