[LLVMbugs] [Bug 8862] ashr, lshr, shl, udiv should have an 'isexact' bit indicating it is known to only shift out zeros

bugzilla-daemon at llvm.org bugzilla-daemon at llvm.org
Wed Feb 9 21:39:34 PST 2011


Chris Lattner <clattner at apple.com> changed:

           What    |Removed                     |Added
             Status|NEW                         |RESOLVED
         Resolution|                            |FIXED

--- Comment #5 from Chris Lattner <clattner at apple.com> 2011-02-09 23:39:33 CST ---
This is now implemented in a series of patches leading up to r125267.

We now have get:

$ opt -instcombine -S 
define i32 @test(i32 %X) {
  %A = sdiv exact i32 %X, 4
  %B = mul i32 %A, 4
  ret i32 %B
; ModuleID = '<stdin>'

define i32 @test(i32 %X) {
  ret i32 %X

Configure bugmail: http://llvm.org/bugs/userprefs.cgi?tab=email
------- You are receiving this mail because: -------
You are on the CC list for the bug.

More information about the llvm-bugs mailing list