[LLVMbugs] [Bug 9158] New: Assertion failed in codegen

[bugzilla-daemon at llvm.org]

http://llvm.org/bugs/show_bug.cgi?id=9158

           Summary: Assertion failed in codegen
           Product: libraries
           Version: trunk
          Platform: PC
        OS/Version: All
            Status: NEW
          Severity: normal
          Priority: P
         Component: Common Code Generator Code
        AssignedTo: unassignedbugs at nondot.org
        ReportedBy: nadav.rotem at intel.com
                CC: llvmbugs at cs.uiuc.edu


; ModuleID = 'bugpoint-reduced-simplified.bc'
target triple = "x86_64-unknown-linux-gnu"

define fastcc void @m_387() nounwind {
entry:
  %0 = load <4 x float>* undef
  %1 = load <4 x float>* null
  %merge68 = select <4 x i1> undef, <4 x float> %0, <4 x float> %1
  store <4 x float> %merge68, <4 x float> addrspace(1)* undef
  ret void
}


The codegen has the following optimization: If we select between the result of
two loads, then we can select between their pointers. However, this fails in
the case of vector select (where the selector is a vector). 

Index: DAGCombiner.cpp
===================================================================
--- DAGCombiner.cpp    (revision 2788)
+++ DAGCombiner.cpp (working copy)
@@ -6581,6 +6581,9 @@
bool DAGCombiner::SimplifySelectOps(SDNode *TheSelect, SDValue LHS,
                                     SDValue RHS) {

+  // Cannot simplify select with vector condition
+  if (TheSelect->getOperand(0).getValueType().isVector()) return false;
+
   // If this is a select from two identical things, try to pull the operation
   // through the select.
   if (LHS.getOpcode() == RHS.getOpcode() && LHS.hasOneUse() &&
RHS.hasOneUse()){

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