[LLVMbugs] [Bug 7504] New: sxtb and sxth not generated for cortex-m3

[bugzilla-daemon at llvm.org]

http://llvm.org/bugs/show_bug.cgi?id=7504

           Summary: sxtb and sxth not generated for cortex-m3
           Product: libraries
           Version: trunk
          Platform: PC
        OS/Version: Linux
            Status: NEW
          Severity: normal
          Priority: P
         Component: Backend: ARM
        AssignedTo: unassignedbugs at nondot.org
        ReportedBy: bagel99 at gmail.com
                CC: llvmbugs at cs.uiuc.edu


Created an attachment (id=5117)
 --> (http://llvm.org/bugs/attachment.cgi?id=5117)
test case

In ARMISelLowering.cpp around line 460, use of sign extension is predicated on
hasT2ExtractPack.  But all cortex-m processors, even cortex-m0, have the 16-bit
versions of SXTB and SXTH.  The following patch is suggested:

--- ARMISelLowering.cpp    (revision 106880)
+++ ARMISelLowering.cpp    (working copy)
@@ -458,7 +458,7 @@
   // needs to be expanded. Extract is available in ARM mode on v6 and up,
   // and on most Thumb2 implementations.
   if (!Subtarget->hasV6Ops()
-      || (Subtarget->isThumb2() && !Subtarget->hasT2ExtractPack())) {
+      || (!Subtarget->isThumb2())) {
     setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::i16, Expand);
     setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::i8,  Expand);
   }

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