[LLVMbugs] [Bug 7652] New: llc -O0 infinite loop on atomic operations

bugzilla-daemon at llvm.org bugzilla-daemon at llvm.org
Thu Jul 15 07:40:43 PDT 2010


http://llvm.org/bugs/show_bug.cgi?id=7652

           Summary: llc -O0 infinite loop on atomic operations
           Product: new-bugs
           Version: trunk
          Platform: PC
        OS/Version: Linux
            Status: NEW
          Severity: normal
          Priority: P
         Component: new bugs
        AssignedTo: unassignedbugs at nondot.org
        ReportedBy: baldrick at free.fr
                CC: llvmbugs at cs.uiuc.edu


$ llc -O0 atomic.ll -debug
...
*** Scheduling [0]: SU(0): 0x2d03b50: i8,i32,ch = ATOMXOR8 0x2d03c50,
0x2d03550, 0x2d03750, 0x2d03850, 0x2d03950, 0x2d03d50, 0x2ce94f8<Mem:Volatile
LDST1[@uc]> [ORD=2] [ID=0]
*** Scheduling [1]: SU(1): 0x2d03d50: i8 = IMPLICIT_DEF [ORD=2] [ID=1]
*** Final schedule ***
SU(1): 0x2d03d50: i8 = IMPLICIT_DEF [ORD=2] [ID=1]
SU(0): 0x2d03b50: i8,i32,ch = ATOMXOR8 0x2d03c50, 0x2d03550, 0x2d03750,
0x2d03850, 0x2d03950, 0x2d03d50, 0x2ce94f8<Mem:Volatile LDST1[@uc]> [ORD=2]
[ID=0]

^ gets stuck here in an apparent infinite loop


Backtrace while it is stuck:

#0  llvm::ilist_traits<llvm::MachineInstr>::transferNodesFromList
(this=0x11b0870, fromList=<value optimised out>, first=<value optimised out>,
last=...)
    at /home/duncan/LLVM/llvm.top/llvm/lib/CodeGen/MachineBasicBlock.cpp:133
#1  0x00000000007eb1a3 in llvm::iplist<llvm::MachineInstr,
llvm::ilist_traits<llvm::MachineInstr> >::transfer (this=<value optimised out>,
bInstr=<value optimised out>, 
    MBB=0x11b04a8, regOpc=<value optimised out>, immOpc=<value optimised out>,
LoadOpc=<value optimised out>, CXchgOpc=1033, copyOpc=1401, notOpc=1593,
EAXreg=2, 
    RC=0x1155b60, invSrc=false) at
/home/duncan/LLVM/llvm.top/llvm/include/llvm/ADT/ilist.h:506
#2  llvm::iplist<llvm::MachineInstr, llvm::ilist_traits<llvm::MachineInstr>
>::splice (this=<value optimised out>, bInstr=<value optimised out>,
MBB=0x11b04a8, 
    regOpc=<value optimised out>, immOpc=<value optimised out>, LoadOpc=<value
optimised out>, CXchgOpc=1033, copyOpc=1401, notOpc=1593, EAXreg=2,
RC=0x1155b60, invSrc=false)
    at /home/duncan/LLVM/llvm.top/llvm/include/llvm/ADT/ilist.h:561
#3  llvm::MachineBasicBlock::splice (this=<value optimised out>, bInstr=<value
optimised out>, MBB=0x11b04a8, regOpc=<value optimised out>, immOpc=<value
optimised out>, 
    LoadOpc=<value optimised out>, CXchgOpc=1033, copyOpc=1401, notOpc=1593,
EAXreg=2, RC=0x1155b60, invSrc=false)
    at
/home/duncan/LLVM/llvm.top/llvm/include/llvm/CodeGen/MachineBasicBlock.h:330
#4  llvm::X86TargetLowering::EmitAtomicBitwiseWithCustomInserter (this=<value
optimised out>, bInstr=<value optimised out>, MBB=0x11b04a8, regOpc=<value
optimised out>, 
    immOpc=<value optimised out>, LoadOpc=<value optimised out>, CXchgOpc=1033,
copyOpc=1401, notOpc=1593, EAXreg=2, RC=0x1155b60, invSrc=false)
    at /home/duncan/LLVM/llvm.top/llvm/lib/Target/X86/X86ISelLowering.cpp:8032
#5  0x00000000007ec7b9 in llvm::X86TargetLowering::EmitInstrWithCustomInserter
(this=0x11b0870, MI=0x11b04a8, BB=0x11b04a8)
    at /home/duncan/LLVM/llvm.top/llvm/lib/Target/X86/X86ISelLowering.cpp:8824
#6  0x0000000000929a6b in llvm::InstrEmitter::EmitMachineNode
(this=0x7fffffffd3e0, Node=<value optimised out>, IsClone=<value optimised
out>, IsCloned=<value optimised out>, 
    VRBaseMap=...) at
/home/duncan/LLVM/llvm.top/llvm/lib/CodeGen/SelectionDAG/InstrEmitter.cpp:728
#7  0x0000000000891fa9 in llvm::InstrEmitter::EmitNode (this=0x11b5ae0) at
/home/duncan/LLVM/llvm.top/llvm/lib/CodeGen/SelectionDAG/InstrEmitter.h:118
#8  llvm::ScheduleDAGSDNodes::EmitSchedule (this=0x11b5ae0) at
/home/duncan/LLVM/llvm.top/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp:601
#9  0x00000000009046e3 in llvm::SelectionDAGISel::CodeGenAndEmitDAG
(this=0x11983f0) at
/home/duncan/LLVM/llvm.top/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:577
#10 0x0000000000906be6 in llvm::SelectionDAGISel::SelectBasicBlock
(this=0x11983f0, Begin=<value optimised out>, End=<value optimised out>,
HadTailCall=@0x7fffffffd8af)
    at
/home/duncan/LLVM/llvm.top/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:362
#11 0x00000000009070cd in llvm::SelectionDAGISel::SelectAllBasicBlocks
(this=<value optimised out>, Fn=<value optimised out>)
    at
/home/duncan/LLVM/llvm.top/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:774
#12 0x0000000000907cfd in llvm::SelectionDAGISel::runOnMachineFunction
(this=0x11983f0, mf=...)
    at
/home/duncan/LLVM/llvm.top/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:250
#13 0x0000000000cb48dd in llvm::FPPassManager::runOnFunction (this=0x1188700,
F=...) at /home/duncan/LLVM/llvm.top/llvm/lib/VMCore/PassManager.cpp:1433
#14 0x0000000000cb49db in llvm::FPPassManager::runOnModule (this=0x1188700,
M=...) at /home/duncan/LLVM/llvm.top/llvm/lib/VMCore/PassManager.cpp:1453
---Type <return> to continue, or q <return> to quit---
#15 0x0000000000cb43e1 in llvm::MPPassManager::runOnModule (this=0x117d1e0,
M=...) at /home/duncan/LLVM/llvm.top/llvm/lib/VMCore/PassManager.cpp:1507
#16 0x0000000000cb4557 in llvm::PassManagerImpl::run (this=0x117cc40, M=...) at
/home/duncan/LLVM/llvm.top/llvm/lib/VMCore/PassManager.cpp:1588
#17 0x000000000052c5b8 in main (argc=<value optimised out>,
argv=0x7fffffffe008) at /home/duncan/LLVM/llvm.top/llvm/tools/llc/llc.cpp:343


Testcase atomic.ll:

target datalayout =
"e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
target triple = "x86_64-unknown-linux-gnu"

@uc = external global i8                          ; <i8*> [#uses=1]
@si = external global i32                         ; <i32*> [#uses=1]
@sll = external global i64                        ; <i64*> [#uses=1]

declare i8 @llvm.atomic.load.xor.i8.p0i8(i8* nocapture, i8) nounwind

declare i64 @llvm.atomic.load.and.i64.p0i64(i64* nocapture, i64) nounwind

define void @test_op_and_fetch() nounwind {
entry:
  %0 = call i8 @llvm.atomic.load.xor.i8.p0i8(i8* @uc, i8 undef) ; <i8>
[#uses=0]
  %1 = call i64 @llvm.atomic.load.and.i64.p0i64(i64* @sll, i64 undef) ; <i64>
[#uses=0]
  store i32 undef, i32* @si, align 4
  ret void
}

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