[LLVMbugs] [Bug 8863] New: Confused MachineVerifier with StrongPHIElimination
bugzilla-daemon at llvm.org
bugzilla-daemon at llvm.org
Sun Dec 26 20:07:33 PST 2010
http://llvm.org/bugs/show_bug.cgi?id=8863
Summary: Confused MachineVerifier with StrongPHIElimination
Product: libraries
Version: trunk
Platform: PC
OS/Version: All
Status: NEW
Severity: normal
Priority: P
Component: Common Code Generator Code
AssignedTo: unassignedbugs at nondot.org
ReportedBy: zwarich at apple.com
CC: llvmbugs at cs.uiuc.edu
This is from CodeGen/X86/2010-03-17-ISelBug.ll.
********** INTERVALS **********
%reg16384,0.000000e+00 = [12d,20d:1)[20d,56L:0) 0 at 20d 1 at 12d
%reg16391,0.000000e+00 EMPTY
CX,inf = [0L,4d:0) 0 at 0L-phidef
CH,inf = [0L,4d:0) 0 at 0L-phidef
%reg16393,0.000000e+00 = [68d,76d:0) 0 at 68d
%reg16400,0.000000e+00 EMPTY
%reg16388,0.000000e+00 = [172d,180d:1)[180d,200L:0) 0 at 180d 1 at 172d
%reg16395,0.000000e+00 = [84d,92d:0) 0 at 84d
%reg16397,0.000000e+00 = [36d,200L:0) 0 at 36d
ECX,inf = [0L,4d:0) 0 at 0L-phidef
%reg16392,0.000000e+00 = [60d,84d:0) 0 at 60d
%reg16399,0.000000e+00 = [28d,200L:0) 0 at 28d
%reg16387,0.000000e+00 = [56L,128L:0)[132d,172d:0) 0 at 132d
CL,inf = [0L,4d:0) 0 at 0L-phidef
%reg16401,0.000000e+00 EMPTY
%reg16389,0.000000e+00 = [4d,12d:0) 0 at 4d
********** MACHINEINSTRS **********
# Machine code for function printSwipe:
Function Live Ins: %ECX in reg%16389
0L BB#0: derived from LLVM BB %entry
Live Ins: %ECX
4L %reg16389<def> = COPY %ECX<kill>; GR32:%reg16389
12L %reg16384<def> = COPY %reg16389<kill>; GR32:%reg16384,16389
20L %reg16384<def> = ADD32ri8 %reg16384, 4, %EFLAGS<imp-def,dead>;
GR32:%reg16384
28L %reg16399<def> = MOV8r0 %EFLAGS<imp-def,dead>; GR8:%reg16399
36L %reg16397<def> = MOV8ri 1; GR8:%reg16397
44L JMP_4 <BB#2>
Successors according to CFG: BB#2
56L BB#1: derived from LLVM BB %for.body261.i
Predecessors according to CFG: BB#1 BB#2
60L %reg16392<def> = MOVZX32rr8 %reg16391<kill,undef>; GR32:%reg16392
GR8_ABCD_L:%reg16391
68L %reg16393<def> = COPY %reg16392; GR32_NOSP:%reg16393 GR32:%reg16392
76L MOV32mr %reg16387, 8, %reg16393<kill>, -4, %reg0,
%reg16400<kill,undef>; mem:ST4[%sunkaddr16] GR32:%reg16387,16400
GR32_NOSP:%reg16393
84L %reg16395<def> = COPY %reg16392<kill>; GR32_NOSP:%reg16395
GR32:%reg16392
92L MOV8mr %reg16387, 8, %reg16395<kill>, 0, %reg0,
%reg16401<kill,undef>; mem:ST1[%sunkaddr19] GR32:%reg16387 GR32_NOSP:%reg16395
GR8:%reg16401
100L TEST8rr %reg16397, %reg16397, %EFLAGS<imp-def>; GR8:%reg16397
108L JNE_4 <BB#3>, %EFLAGS<imp-use,kill>
116L JMP_4 <BB#1>
Successors according to CFG: BB#3 BB#1
128L BB#2: derived from LLVM BB %for.body190
Predecessors according to CFG: BB#0 BB#3
132L %reg16387<def> = PHI %reg16384, <BB#0>, %reg16388, <BB#3>;
GR32:%reg16387,16384,16388
140L TEST8rr %reg16399, %reg16399, %EFLAGS<imp-def>; GR8:%reg16399
148L JNE_4 <BB#1>, %EFLAGS<imp-use,kill>
156L JMP_4 <BB#3>
Successors according to CFG: BB#3 BB#1
168L BB#3: derived from LLVM BB %for.body190.backedge
Predecessors according to CFG: BB#1 BB#2
172L %reg16388<def> = COPY %reg16387<kill>; GR32:%reg16388,16387
180L %reg16388<def> = ADD32ri %reg16388, 2048, %EFLAGS<imp-def,dead>;
GR32:%reg16388
188L JMP_4 <BB#2>
Successors according to CFG: BB#2
# End machine code for function printSwipe.
This interval is the one of interest later:
%reg16387,0.000000e+00 = [56L,128L:0)[132d,172d:0) 0 at 132d
If I run StrongPHIElimination, I get this:
# Machine code for function printSwipe:
Function Live Ins: %ECX in reg%16389
0L BB#0: derived from LLVM BB %entry
Live Ins: %ECX
4L %reg16389<def> = COPY %ECX<kill>; GR32:%reg16389
12L %reg16384<def> = COPY %reg16389<kill>; GR32:%reg16384,16389
20L %reg16384<def> = ADD32ri8 %reg16384, 4, %EFLAGS<imp-def,dead>;
GR32:%reg16384
28L %reg16399<def> = MOV8r0 %EFLAGS<imp-def,dead>; GR8:%reg16399
36L %reg16397<def> = MOV8ri 1; GR8:%reg16397
44L JMP_4 <BB#2>
Successors according to CFG: BB#2
56L BB#1: derived from LLVM BB %for.body261.i
Predecessors according to CFG: BB#1 BB#2
60L %reg16392<def> = MOVZX32rr8 %reg16391<kill,undef>; GR32:%reg16392
GR8_ABCD_L:%reg16391
68L %reg16393<def> = COPY %reg16392; GR32_NOSP:%reg16393 GR32:%reg16392
76L MOV32mr %reg16384, 8, %reg16393<kill>, -4, %reg0,
%reg16400<kill,undef>; mem:ST4[%sunkaddr16] GR32:%reg16384,16400
GR32_NOSP:%reg16393
84L %reg16395<def> = COPY %reg16392<kill>; GR32_NOSP:%reg16395
GR32:%reg16392
92L MOV8mr %reg16384, 8, %reg16395<kill>, 0, %reg0,
%reg16401<kill,undef>; mem:ST1[%sunkaddr19] GR32:%reg16384 GR32_NOSP:%reg16395
GR8:%reg16401
100L TEST8rr %reg16397, %reg16397, %EFLAGS<imp-def>; GR8:%reg16397
108L JNE_4 <BB#3>, %EFLAGS<imp-use,kill>
116L JMP_4 <BB#1>
Successors according to CFG: BB#3 BB#1
128L BB#2: derived from LLVM BB %for.body190
Predecessors according to CFG: BB#0 BB#3
136L TEST8rr %reg16399, %reg16399, %EFLAGS<imp-def>; GR8:%reg16399
144L JNE_4 <BB#1>, %EFLAGS<imp-use,kill>
152L JMP_4 <BB#3>
Successors according to CFG: BB#3 BB#1
164L BB#3: derived from LLVM BB %for.body190.backedge
Predecessors according to CFG: BB#1 BB#2
168L %reg16388<def> = COPY %reg16384<kill>; GR32:%reg16388,16384
176L %reg16388<def> = ADD32ri %reg16388, 2048, %EFLAGS<imp-def,dead>;
GR32:%reg16388
184L %reg16384<def> = COPY %reg16388<kill>; GR32:%reg16384,16388
192L JMP_4 <BB#2>
Successors according to CFG: BB#2
# End machine code for function printSwipe.
*** Bad machine code: Different value live out of predecessor ***
- function: printSwipe
- basic block: entry 0x103046798 (BB#0) [0L;56L)
Valno #0 live out of BB#0 at 52S
Valno #2 live into BB#2 at 128L in %reg16384,0.000000e+00 =
[12d,20d:1)[20d,56L:0)[56L,168d:2)[184d,204L:3) 0 at 20d-phikill 1 at 12d
2 at 128L-phidef 3 at 184d-phikill
*** Bad machine code: Different value live out of predecessor ***
- function: printSwipe
- basic block: for.body190.backedge 0x1030469f8 (BB#3) [164L;204L)
Valno #3 live out of BB#3 at 200S
Valno #2 live into BB#2 at 128L in %reg16384,0.000000e+00 =
[12d,20d:1)[20d,56L:0)[56L,168d:2)[184d,204L:3) 0 at 20d-phikill 1 at 12d
2 at 128L-phidef 3 at 184d-phikill
It seems that the right way to fix this is to check for phi-def VNs at this
point in the verifier, since the phi-def flag means that the def really begins
on the incoming edge.
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