[LLVMbugs] [Bug 3999] New: CodeGen/PowerPC/vec_splat. ll fails when legalize types is turned on

[bugzilla-daemon at cs.uiuc.edu]

http://llvm.org/bugs/show_bug.cgi?id=3999

           Summary: CodeGen/PowerPC/vec_splat.ll fails when legalize types
                    is turned on
           Product: new-bugs
           Version: unspecified
          Platform: Other
        OS/Version: Linux
            Status: NEW
          Severity: normal
          Priority: P2
         Component: new bugs
        AssignedTo: unassignedbugs at nondot.org
        ReportedBy: baldrick at free.fr
                CC: llvmbugs at cs.uiuc.edu


I need some help with this one.  It is blocking the removal of
the old type legalization code.  I think it needs to be fixed
in the ppc backend.  Here's the relevant part of the test:

define void @splat_h(i16 %tmp, <16 x i8>* %dst) nounwind {
        %tmp.upgrd.1 = insertelement <8 x i16> undef, i16 %tmp, i32 0
        %tmp72 = insertelement <8 x i16> %tmp.upgrd.1, i16 %tmp, i32 1
        %tmp73 = insertelement <8 x i16> %tmp72, i16 %tmp, i32 2
        %tmp74 = insertelement <8 x i16> %tmp73, i16 %tmp, i32 3
        %tmp75 = insertelement <8 x i16> %tmp74, i16 %tmp, i32 4
        %tmp76 = insertelement <8 x i16> %tmp75, i16 %tmp, i32 5
        %tmp77 = insertelement <8 x i16> %tmp76, i16 %tmp, i32 6
        %tmp78 = insertelement <8 x i16> %tmp77, i16 %tmp, i32 7
        %tmp78.upgrd.2 = bitcast <8 x i16> %tmp78 to <16 x i8>
        store <16 x i8> %tmp78.upgrd.2, <16 x i8>* %dst
        ret void
}

Here's a diff between compiling with
 llc -march=ppc32 -mcpu=g5 vec_splat.bc -disable-legalize-types
and
 llc -march=ppc32 -mcpu=g5 vec_splat.bc

<       sth 3, -16(1)
<       addi 3, 1, -16
<       lvx 2, 0, 3
<       vsplth 2, 2, 0
---
>       rlwimi 3, 3, 16, 0, 15
>       addi 6, 1, -16
>       stw 3, -16(1)
>       lvx 2, 0, 6
>       vspltw 2, 2, 0

The DAG coming out of legalize types is now very reasonable after
Bob's BUILD_VECTOR changes (note that the vector of v8i16 is being
built from i32 operands):

Optimized type-legalized selection DAG:
SelectionDAG has 9 nodes:
  0x1970718: ch = EntryToken
    0x1970718: <multiple use>
    0x1970cb8: i32 = Register  #1024
  0x1970db0: i32,ch = CopyFromReg 0x1970718, 0x1970cb8
      0x1970718: <multiple use>
        0x1970db0: <multiple use>
        0x1970db0: <multiple use>
        0x1970db0: <multiple use>
        0x1970db0: <multiple use>
        0x1970db0: <multiple use>
        0x1970db0: <multiple use>
        0x1970db0: <multiple use>
        0x1970db0: <multiple use>
      0x1970ac8: v8i16 = BUILD_VECTOR 0x1970db0, 0x1970db0, 0x1970db0,
0x1970db0, 0x1970db0, 0x1970db0, 0x1970db0, 0x1970db0
        0x1970718: <multiple use>
        0x1970ea8: i32 = Register  #1025
      0x1970fa0: i32,ch = CopyFromReg 0x1970718, 0x1970ea8
      0x19957c0: i32 = undef
    0x1995aa8: ch = store 0x1970718, 0x1970ac8, 0x1970fa0, 0x19957c0
<0x1961520:0> alignment=16
  0x19959b0: ch = ret 0x1995aa8

This then gets turned into something horrible by operand legalization.


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