[LLVMbugs] [Bug 3266] New: Missed optimization xor (or (icmp sgt, icmp sgt), true) -> and(icmp slt, icmp slt)

bugzilla-daemon at cs.uiuc.edu bugzilla-daemon at cs.uiuc.edu
Sun Dec 28 06:46:34 PST 2008


http://llvm.org/bugs/show_bug.cgi?id=3266

           Summary: Missed optimization xor (or (icmp sgt, icmp sgt), true)
                    -> and(icmp slt, icmp slt)
           Product: new-bugs
           Version: unspecified
          Platform: All
        OS/Version: All
            Status: NEW
          Severity: enhancement
          Priority: P2
         Component: new bugs
        AssignedTo: unassignedbugs at nondot.org
        ReportedBy: edwintorok at gmail.com
                CC: llvmbugs at cs.uiuc.edu


This is the testcase, it is not optimizable by -O3:

define i1 @foo(i32 %x, i32 %y) nounwind {
.summary:
        %0 = icmp sgt i32 %x, 4         ; <i1> [#uses=1]
        %1 = icmp sgt i32 %y, 0         ; <i1> [#uses=1]
        %.demorgan = or i1 %1, %0               ; <i1> [#uses=1]
        %2 = xor i1 %.demorgan, true            ; <i1> [#uses=1]
        ret i1 %2
}

It could be written as:
define i1 @foo(i32 %x, i32 %y) nounwind {
.summary:
        %0 = icmp slt i32 %x, 5         ; <i1> [#uses=1]
        %1 = icmp slt i32 %y, 1         ; <i1> [#uses=1]
        %2 = and i1 %0, %1              ; <i1> [#uses=1]
}


Using llc produces same .s on both (it makes the sgt -> slt transform), however
I think it would be better to also make the transform at IR level.

Interestingly the first testcase was created by running on x.bc
opt -gvn -instcombine x.bc

And the 2nd (optimal) form was produced by running on x.bc
'opt -instcombine | opt -O1' (or simply opt -O1)

x.bc is here:
define i1 @foo(i32 %x, i32 %y) nounwind {
.summary:
        %0 = icmp sgt i32 %x, 4         ; <i1> [#uses=2]
        %1 = and i1 %0, true            ; <i1> [#uses=1]
        %2 = or i1 false, %1            ; <i1> [#uses=0]
        %3 = xor i1 %0, true            ; <i1> [#uses=1]
        %4 = and i1 %3, true            ; <i1> [#uses=1]
        %5 = or i1 false, %4            ; <i1> [#uses=2]
        %6 = icmp sgt i32 %y, -7                ; <i1> [#uses=2]
        %7 = and i1 %6, %5              ; <i1> [#uses=1]
        %8 = or i1 false, %7            ; <i1> [#uses=2]
        %9 = icmp sgt i32 %y, 0         ; <i1> [#uses=4]
        %10 = and i1 %9, %8             ; <i1> [#uses=1]
        %11 = or i1 true, %10           ; <i1> [#uses=0]
        %12 = xor i1 %6, true           ; <i1> [#uses=1]
        %13 = and i1 %12, %5            ; <i1> [#uses=1]
        %14 = or i1 false, %13          ; <i1> [#uses=2]
        %15 = and i1 %9, %14            ; <i1> [#uses=1]
        %16 = or i1 false, %15          ; <i1> [#uses=0]
        %17 = xor i1 %9, true           ; <i1> [#uses=1]
        %18 = and i1 %17, %14           ; <i1> [#uses=1]
        %19 = or i1 false, %18          ; <i1> [#uses=1]
        %20 = xor i1 %9, true           ; <i1> [#uses=1]
        %21 = and i1 %20, %8            ; <i1> [#uses=1]
        %22 = or i1 %19, %21            ; <i1> [#uses=1]
        ret i1 %22
}


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