[llvm-branch-commits] [llvm-branch] r366693 - [SystemZ] Add release notes on the LLVM 9 branch

[Hans Wennborg via llvm-branch-commits]

Excellent! Many thanks.

 - Hans

On Mon, Jul 22, 2019 at 7:38 AM Ulrich Weigand via llvm-branch-commits
<llvm-branch-commits at lists.llvm.org> wrote:
>
> Author: uweigand
> Date: Mon Jul 22 07:39:02 2019
> New Revision: 366693
>
> URL: http://llvm.org/viewvc/llvm-project?rev=366693&view=rev
> Log:
> [SystemZ] Add release notes on the LLVM 9 branch
>
> Modified:
>     llvm/branches/release_90/docs/ReleaseNotes.rst
>
> Modified: llvm/branches/release_90/docs/ReleaseNotes.rst
> URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_90/docs/ReleaseNotes.rst?rev=366693&r1=366692&r2=366693&view=diff
> ==============================================================================
> --- llvm/branches/release_90/docs/ReleaseNotes.rst (original)
> +++ llvm/branches/release_90/docs/ReleaseNotes.rst Mon Jul 22 07:39:02 2019
> @@ -103,6 +103,27 @@ Changes to the PowerPC Target
>
>   During this release ...
>
> +Changes to the SystemZ Target
> +-----------------------------
> +
> +* Support for the arch13 architecture has been added.  When using the
> +  ``-march=arch13`` option, the compiler will generate code making use of
> +  new instructions introduced with the vector enhancement facility 2
> +  and the miscellaneous instruction extension facility 2.
> +  The ``-mtune=arch13`` option enables arch13 specific instruction
> +  scheduling and tuning without making use of new instructions.
> +
> +* Builtins for the new vector instructions have been added and can be
> +  enabled using the ``-mzvector`` option.  Support for these builtins
> +  is indicated by the compiler predefining the ``__VEC__`` macro to
> +  the value ``10303``.
> +
> +* The compiler now supports and automatically generates alignment hints
> +  on vector load and store instructions.
> +
> +* Various code-gen improvements, in particular related to improved
> +  instruction selection and register allocation.
> +
>  Changes to the X86 Target
>  -------------------------
>
>
>
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