[llvm-branch-commits] [llvm-branch] r351451 - Merging r351370:

Hans Wennborg via llvm-branch-commits llvm-branch-commits at lists.llvm.org
Thu Jan 17 07:37:17 PST 2019


Author: hans
Date: Thu Jan 17 07:37:17 2019
New Revision: 351451

URL: http://llvm.org/viewvc/llvm-project?rev=351451&view=rev
Log:
Merging r351370:
------------------------------------------------------------------------
r351370 | mgrang | 2019-01-16 20:52:59 +0100 (Wed, 16 Jan 2019) | 14 lines

[COFF, ARM64] Implement support for SEH extensions __try/__except/__finally

Summary:
This patch supports MS SEH extensions __try/__except/__finally. The intrinsics localescape and localrecover are responsible for communicating escaped static allocas from the try block to the handler.

We need to preserve frame pointers for SEH. So we create a new function/property HasLocalEscape.

Reviewers: rnk, compnerd, mstorsjo, TomTan, efriedma, ssijaric

Reviewed By: rnk, efriedma

Subscribers: smeenai, jrmuizel, alex, majnemer, ssijaric, ehsan, dmajor, kristina, javed.absar, kristof.beyls, chrib, llvm-commits

Differential Revision: https://reviews.llvm.org/D53540
------------------------------------------------------------------------

Added:
    llvm/branches/release_80/test/CodeGen/AArch64/seh-finally.ll
      - copied unchanged from r351370, llvm/trunk/test/CodeGen/AArch64/seh-finally.ll
    llvm/branches/release_80/test/CodeGen/AArch64/seh-localescape.ll
      - copied unchanged from r351370, llvm/trunk/test/CodeGen/AArch64/seh-localescape.ll
Modified:
    llvm/branches/release_80/   (props changed)
    llvm/branches/release_80/include/llvm/CodeGen/MachineFunction.h
    llvm/branches/release_80/lib/CodeGen/AsmPrinter/WinException.cpp
    llvm/branches/release_80/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
    llvm/branches/release_80/lib/Target/AArch64/AArch64AsmPrinter.cpp
    llvm/branches/release_80/lib/Target/AArch64/AArch64FrameLowering.cpp
    llvm/branches/release_80/lib/Target/AArch64/AArch64ISelLowering.cpp
    llvm/branches/release_80/lib/Target/AArch64/AArch64InstrInfo.td
    llvm/branches/release_80/lib/Target/AArch64/AArch64RegisterInfo.cpp

Propchange: llvm/branches/release_80/
------------------------------------------------------------------------------
--- svn:mergeinfo (original)
+++ svn:mergeinfo Thu Jan 17 07:37:17 2019
@@ -1,3 +1,3 @@
 /llvm/branches/Apple/Pertwee:110850,110961
 /llvm/branches/type-system-rewrite:133420-134817
-/llvm/trunk:155241,351344-351345,351349,351351,351381,351436
+/llvm/trunk:155241,351344-351345,351349,351351,351370,351381,351436

Modified: llvm/branches/release_80/include/llvm/CodeGen/MachineFunction.h
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_80/include/llvm/CodeGen/MachineFunction.h?rev=351451&r1=351450&r2=351451&view=diff
==============================================================================
--- llvm/branches/release_80/include/llvm/CodeGen/MachineFunction.h (original)
+++ llvm/branches/release_80/include/llvm/CodeGen/MachineFunction.h Thu Jan 17 07:37:17 2019
@@ -329,6 +329,7 @@ class MachineFunction {
   bool CallsUnwindInit = false;
   bool HasEHScopes = false;
   bool HasEHFunclets = false;
+  bool HasLocalEscape = false;
 
   /// List of C++ TypeInfo used.
   std::vector<const GlobalValue *> TypeInfos;
@@ -811,6 +812,9 @@ public:
   bool hasEHFunclets() const { return HasEHFunclets; }
   void setHasEHFunclets(bool V) { HasEHFunclets = V; }
 
+  bool hasLocalEscape() const { return HasLocalEscape; }
+  void setHasLocalEscape(bool V) { HasLocalEscape = V; }
+
   /// Find or create an LandingPadInfo for the specified MachineBasicBlock.
   LandingPadInfo &getOrCreateLandingPadInfo(MachineBasicBlock *LandingPad);
 

Modified: llvm/branches/release_80/lib/CodeGen/AsmPrinter/WinException.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_80/lib/CodeGen/AsmPrinter/WinException.cpp?rev=351451&r1=351450&r2=351451&view=diff
==============================================================================
--- llvm/branches/release_80/lib/CodeGen/AsmPrinter/WinException.cpp (original)
+++ llvm/branches/release_80/lib/CodeGen/AsmPrinter/WinException.cpp Thu Jan 17 07:37:17 2019
@@ -545,15 +545,17 @@ void WinException::emitCSpecificHandlerT
       OS.AddComment(Comment);
   };
 
-  // Emit a label assignment with the SEH frame offset so we can use it for
-  // llvm.eh.recoverfp.
-  StringRef FLinkageName =
-      GlobalValue::dropLLVMManglingEscape(MF->getFunction().getName());
-  MCSymbol *ParentFrameOffset =
-      Ctx.getOrCreateParentFrameOffsetSymbol(FLinkageName);
-  const MCExpr *MCOffset =
-      MCConstantExpr::create(FuncInfo.SEHSetFrameOffset, Ctx);
-  Asm->OutStreamer->EmitAssignment(ParentFrameOffset, MCOffset);
+  if (!isAArch64) {
+    // Emit a label assignment with the SEH frame offset so we can use it for
+    // llvm.eh.recoverfp.
+    StringRef FLinkageName =
+        GlobalValue::dropLLVMManglingEscape(MF->getFunction().getName());
+    MCSymbol *ParentFrameOffset =
+        Ctx.getOrCreateParentFrameOffsetSymbol(FLinkageName);
+    const MCExpr *MCOffset =
+        MCConstantExpr::create(FuncInfo.SEHSetFrameOffset, Ctx);
+    Asm->OutStreamer->EmitAssignment(ParentFrameOffset, MCOffset);
+  }
 
   // Use the assembler to compute the number of table entries through label
   // difference and division.
@@ -937,6 +939,9 @@ void WinException::emitEHRegistrationOff
   if (FI != INT_MAX) {
     const TargetFrameLowering *TFI = Asm->MF->getSubtarget().getFrameLowering();
     unsigned UnusedReg;
+    // FIXME: getFrameIndexReference needs to match the behavior of
+    // AArch64RegisterInfo::hasBasePointer in which one of the scenarios where
+    // SP is used is if frame size >= 256.
     Offset = TFI->getFrameIndexReference(*Asm->MF, FI, UnusedReg);
   }
 

Modified: llvm/branches/release_80/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_80/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp?rev=351451&r1=351450&r2=351451&view=diff
==============================================================================
--- llvm/branches/release_80/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp (original)
+++ llvm/branches/release_80/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp Thu Jan 17 07:37:17 2019
@@ -6182,6 +6182,8 @@ SelectionDAGBuilder::visitIntrinsicCall(
           .addFrameIndex(FI);
     }
 
+    MF.setHasLocalEscape(true);
+
     return nullptr;
   }
 

Modified: llvm/branches/release_80/lib/Target/AArch64/AArch64AsmPrinter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_80/lib/Target/AArch64/AArch64AsmPrinter.cpp?rev=351451&r1=351450&r2=351451&view=diff
==============================================================================
--- llvm/branches/release_80/lib/Target/AArch64/AArch64AsmPrinter.cpp (original)
+++ llvm/branches/release_80/lib/Target/AArch64/AArch64AsmPrinter.cpp Thu Jan 17 07:37:17 2019
@@ -694,6 +694,34 @@ void AArch64AsmPrinter::EmitInstruction(
   switch (MI->getOpcode()) {
   default:
     break;
+    case AArch64::MOVMCSym: {
+    unsigned DestReg = MI->getOperand(0).getReg();
+    const MachineOperand &MO_Sym = MI->getOperand(1);
+    MachineOperand Hi_MOSym(MO_Sym), Lo_MOSym(MO_Sym);
+    MCOperand Hi_MCSym, Lo_MCSym;
+
+    Hi_MOSym.setTargetFlags(AArch64II::MO_G1 | AArch64II::MO_S);
+    Lo_MOSym.setTargetFlags(AArch64II::MO_G0 | AArch64II::MO_NC);
+
+    MCInstLowering.lowerOperand(Hi_MOSym, Hi_MCSym);
+    MCInstLowering.lowerOperand(Lo_MOSym, Lo_MCSym);
+
+    MCInst MovZ;
+    MovZ.setOpcode(AArch64::MOVZXi);
+    MovZ.addOperand(MCOperand::createReg(DestReg));
+    MovZ.addOperand(Hi_MCSym);
+    MovZ.addOperand(MCOperand::createImm(16));
+    EmitToStreamer(*OutStreamer, MovZ);
+
+    MCInst MovK;
+    MovK.setOpcode(AArch64::MOVKXi);
+    MovK.addOperand(MCOperand::createReg(DestReg));
+    MovK.addOperand(MCOperand::createReg(DestReg));
+    MovK.addOperand(Lo_MCSym);
+    MovK.addOperand(MCOperand::createImm(0));
+    EmitToStreamer(*OutStreamer, MovK);
+    return;
+  }
   case AArch64::MOVIv2d_ns:
     // If the target has <rdar://problem/16473581>, lower this
     // instruction to movi.16b instead.

Modified: llvm/branches/release_80/lib/Target/AArch64/AArch64FrameLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_80/lib/Target/AArch64/AArch64FrameLowering.cpp?rev=351451&r1=351450&r2=351451&view=diff
==============================================================================
--- llvm/branches/release_80/lib/Target/AArch64/AArch64FrameLowering.cpp (original)
+++ llvm/branches/release_80/lib/Target/AArch64/AArch64FrameLowering.cpp Thu Jan 17 07:37:17 2019
@@ -228,6 +228,10 @@ bool AArch64FrameLowering::hasFP(const M
       MFI.getMaxCallFrameSize() > DefaultSafeSPDisplacement)
     return true;
 
+  // Win64 SEH requires frame pointer if funclets are present.
+  if (MF.hasLocalEscape())
+    return true;
+
   return false;
 }
 

Modified: llvm/branches/release_80/lib/Target/AArch64/AArch64ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_80/lib/Target/AArch64/AArch64ISelLowering.cpp?rev=351451&r1=351450&r2=351451&view=diff
==============================================================================
--- llvm/branches/release_80/lib/Target/AArch64/AArch64ISelLowering.cpp (original)
+++ llvm/branches/release_80/lib/Target/AArch64/AArch64ISelLowering.cpp Thu Jan 17 07:37:17 2019
@@ -2743,6 +2743,34 @@ SDValue AArch64TargetLowering::LowerINTR
   case Intrinsic::aarch64_neon_umin:
     return DAG.getNode(ISD::UMIN, dl, Op.getValueType(),
                        Op.getOperand(1), Op.getOperand(2));
+
+  case Intrinsic::localaddress: {
+    // Returns one of the stack, base, or frame pointer registers, depending on
+    // which is used to reference local variables.
+    MachineFunction &MF = DAG.getMachineFunction();
+    const AArch64RegisterInfo *RegInfo = Subtarget->getRegisterInfo();
+    unsigned Reg;
+    if (RegInfo->hasBasePointer(MF))
+      Reg = RegInfo->getBaseRegister();
+    else // This function handles the SP or FP case.
+      Reg = RegInfo->getFrameRegister(MF);
+    return DAG.getCopyFromReg(DAG.getEntryNode(), dl, Reg,
+                              Op.getSimpleValueType());
+  }
+
+  case Intrinsic::eh_recoverfp: {
+    // FIXME: This needs to be implemented to correctly handle highly aligned
+    // stack objects. For now we simply return the incoming FP. Refer D53541
+    // for more details.
+    SDValue FnOp = Op.getOperand(1);
+    SDValue IncomingFPOp = Op.getOperand(2);
+    GlobalAddressSDNode *GSD = dyn_cast<GlobalAddressSDNode>(FnOp);
+    auto *Fn = dyn_cast_or_null<Function>(GSD ? GSD->getGlobal() : nullptr);
+    if (!Fn)
+      report_fatal_error(
+          "llvm.eh.recoverfp must take a function as the first argument");
+    return IncomingFPOp;
+  }
   }
 }
 

Modified: llvm/branches/release_80/lib/Target/AArch64/AArch64InstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_80/lib/Target/AArch64/AArch64InstrInfo.td?rev=351451&r1=351450&r2=351451&view=diff
==============================================================================
--- llvm/branches/release_80/lib/Target/AArch64/AArch64InstrInfo.td (original)
+++ llvm/branches/release_80/lib/Target/AArch64/AArch64InstrInfo.td Thu Jan 17 07:37:17 2019
@@ -133,6 +133,10 @@ def UseNegativeImmediates
     : Predicate<"false">, AssemblerPredicate<"!FeatureNoNegativeImmediates",
                                              "NegativeImmediates">;
 
+def AArch64LocalRecover : SDNode<"ISD::LOCAL_RECOVER",
+                                  SDTypeProfile<1, 1, [SDTCisSameAs<0, 1>,
+                                                       SDTCisInt<1>]>>;
+
 
 //===----------------------------------------------------------------------===//
 // AArch64-specific DAG Nodes.
@@ -6801,5 +6805,8 @@ def : Pat<(AArch64tcret tglobaladdr:$dst
 def : Pat<(AArch64tcret texternalsym:$dst, (i32 timm:$FPDiff)),
           (TCRETURNdi texternalsym:$dst, imm:$FPDiff)>;
 
+def MOVMCSym : Pseudo<(outs GPR64:$dst), (ins i64imm:$sym), []>, Sched<[]>;
+def : Pat<(i64 (AArch64LocalRecover mcsym:$sym)), (MOVMCSym mcsym:$sym)>;
+
 include "AArch64InstrAtomics.td"
 include "AArch64SVEInstrInfo.td"

Modified: llvm/branches/release_80/lib/Target/AArch64/AArch64RegisterInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_80/lib/Target/AArch64/AArch64RegisterInfo.cpp?rev=351451&r1=351450&r2=351451&view=diff
==============================================================================
--- llvm/branches/release_80/lib/Target/AArch64/AArch64RegisterInfo.cpp (original)
+++ llvm/branches/release_80/lib/Target/AArch64/AArch64RegisterInfo.cpp Thu Jan 17 07:37:17 2019
@@ -466,6 +466,13 @@ void AArch64RegisterInfo::eliminateFrame
 
   // Modify MI as necessary to handle as much of 'Offset' as possible
   Offset = TFI->resolveFrameIndexReference(MF, FrameIndex, FrameReg);
+
+  if (MI.getOpcode() == TargetOpcode::LOCAL_ESCAPE) {
+    MachineOperand &FI = MI.getOperand(FIOperandNum);
+    FI.ChangeToImmediate(Offset);
+    return;
+  }
+
   if (rewriteAArch64FrameIndex(MI, FIOperandNum, FrameReg, Offset, TII))
     return;
 




More information about the llvm-branch-commits mailing list