[llvm-branch-commits] [llvm-branch] r271720 - Merging r262577:

Tom Stellard via llvm-branch-commits llvm-branch-commits at lists.llvm.org
Fri Jun 3 13:22:41 PDT 2016


Author: tstellar
Date: Fri Jun  3 15:22:40 2016
New Revision: 271720

URL: http://llvm.org/viewvc/llvm-project?rev=271720&view=rev
Log:
Merging r262577:

------------------------------------------------------------------------
r262577 | thomas.stellard | 2016-03-02 19:45:09 -0800 (Wed, 02 Mar 2016) | 12 lines

AMDGPU/SI: Don't try to move scratch wave offset when there are no free SGPRs

Summary:
When there were no free SGPRs, we were trying to move this value into
some of the reserved registers which was causing a segmentation fault.

Reviewers: arsenm

Subscribers: arsenm, llvm-commits

Differential Revision: http://reviews.llvm.org/D17590

------------------------------------------------------------------------

Modified:
    llvm/branches/release_38/lib/Target/AMDGPU/SIFrameLowering.cpp

Modified: llvm/branches/release_38/lib/Target/AMDGPU/SIFrameLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_38/lib/Target/AMDGPU/SIFrameLowering.cpp?rev=271720&r1=271719&r2=271720&view=diff
==============================================================================
--- llvm/branches/release_38/lib/Target/AMDGPU/SIFrameLowering.cpp (original)
+++ llvm/branches/release_38/lib/Target/AMDGPU/SIFrameLowering.cpp Fri Jun  3 15:22:40 2016
@@ -165,10 +165,22 @@ void SIFrameLowering::emitPrologue(Machi
 
     if (ScratchWaveOffsetReg == TRI->reservedPrivateSegmentWaveByteOffsetReg(MF)) {
       MachineRegisterInfo &MRI = MF.getRegInfo();
-      // Skip the last 2 elements because the last one is reserved for VCC, and
-      // this is the 2nd to last element already.
       unsigned NumPreloaded = MFI->getNumPreloadedSGPRs();
-      for (MCPhysReg Reg : getAllSGPRs().drop_back(6).slice(NumPreloaded)) {
+
+      // We need to drop register from the end of the list that we cannot use
+      // for the scratch wave offset.
+      // + 2 s102 and s103 do not exist on VI.
+      // + 2 for vcc
+      // + 2 for xnack_mask
+      // + 2 for flat_scratch
+      // + 4 for registers reserved for scratch resource register
+      // + 1 for register reserved for scratch wave offset.  (By exluding this
+      //     register from the list to consider, it means that when this
+      //     register is being used for the scratch wave offset and there
+      //     are no other free SGPRs, then the value will stay in this register.
+      // ----
+      //  13
+      for (MCPhysReg Reg : getAllSGPRs().drop_back(13).slice(NumPreloaded)) {
         // Pick the first unallocated SGPR. Be careful not to pick an alias of the
         // scratch descriptor, since we haven’t added its uses yet.
         if (!MRI.isPhysRegUsed(Reg)) {




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