[llvm-branch-commits] [llvm-branch] r271594 - Merging r259894:

[Tom Stellard via llvm-branch-commits]

Author: tstellar
Date: Thu Jun  2 16:01:47 2016
New Revision: 271594

URL: http://llvm.org/viewvc/llvm-project?rev=271594&view=rev
Log:
Merging r259894:

------------------------------------------------------------------------
r259894 | thomas.stellard | 2016-02-05 09:42:38 -0800 (Fri, 05 Feb 2016) | 8 lines

AMDGPU/SI: Correctly initialize SIInsertWaits pass

Reviewers: arsenm

Subscribers: arsenm, llvm-commits

Differential Revision: http://reviews.llvm.org/D16724

------------------------------------------------------------------------

Modified:
    llvm/branches/release_38/lib/Target/AMDGPU/AMDGPU.h
    llvm/branches/release_38/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
    llvm/branches/release_38/lib/Target/AMDGPU/SIInsertWaits.cpp

Modified: llvm/branches/release_38/lib/Target/AMDGPU/AMDGPU.h
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_38/lib/Target/AMDGPU/AMDGPU.h?rev=271594&r1=271593&r2=271594&view=diff
==============================================================================
--- llvm/branches/release_38/lib/Target/AMDGPU/AMDGPU.h (original)
+++ llvm/branches/release_38/lib/Target/AMDGPU/AMDGPU.h Thu Jun  2 16:01:47 2016
@@ -49,7 +49,7 @@ FunctionPass *createSIFixControlFlowLive
 FunctionPass *createSIFixSGPRCopiesPass();
 FunctionPass *createSIFixSGPRLiveRangesPass();
 FunctionPass *createSICodeEmitterPass(formatted_raw_ostream &OS);
-FunctionPass *createSIInsertWaits(TargetMachine &tm);
+FunctionPass *createSIInsertWaitsPass();
 
 ScheduleDAGInstrs *createSIMachineScheduler(MachineSchedContext *C);
 
@@ -92,6 +92,9 @@ extern char &AMDGPUAnnotateUniformValues
 void initializeSIAnnotateControlFlowPass(PassRegistry&);
 extern char &SIAnnotateControlFlowPassID;
 
+void initializeSIInsertWaitsPass(PassRegistry&);
+extern char &SIInsertWaitsID;
+
 extern Target TheAMDGPUTarget;
 extern Target TheGCNTarget;
 

Modified: llvm/branches/release_38/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_38/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp?rev=271594&r1=271593&r2=271594&view=diff
==============================================================================
--- llvm/branches/release_38/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp (original)
+++ llvm/branches/release_38/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp Thu Jun  2 16:01:47 2016
@@ -54,6 +54,7 @@ extern "C" void LLVMInitializeAMDGPUTarg
   initializeAMDGPUAnnotateUniformValuesPass(*PR);
   initializeAMDGPUPromoteAllocaPass(*PR);
   initializeSIAnnotateControlFlowPass(*PR);
+  initializeSIInsertWaitsPass(*PR);
 }
 
 static std::unique_ptr<TargetLoweringObjectFile> createTLOF(const Triple &TT) {
@@ -359,7 +360,7 @@ void GCNPassConfig::addPreSched2() {
 }
 
 void GCNPassConfig::addPreEmitPass() {
-  addPass(createSIInsertWaits(*TM), false);
+  addPass(createSIInsertWaitsPass(), false);
   addPass(createSILowerControlFlowPass(*TM), false);
 }
 

Modified: llvm/branches/release_38/lib/Target/AMDGPU/SIInsertWaits.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_38/lib/Target/AMDGPU/SIInsertWaits.cpp?rev=271594&r1=271593&r2=271594&view=diff
==============================================================================
--- llvm/branches/release_38/lib/Target/AMDGPU/SIInsertWaits.cpp (original)
+++ llvm/branches/release_38/lib/Target/AMDGPU/SIInsertWaits.cpp Thu Jun  2 16:01:47 2016
@@ -26,6 +26,8 @@
 #include "llvm/CodeGen/MachineInstrBuilder.h"
 #include "llvm/CodeGen/MachineRegisterInfo.h"
 
+#define DEBUG_TYPE "si-insert-waits"
+
 using namespace llvm;
 
 namespace {
@@ -53,7 +55,6 @@ typedef std::pair<unsigned, unsigned> Re
 class SIInsertWaits : public MachineFunctionPass {
 
 private:
-  static char ID;
   const SIInstrInfo *TII;
   const SIRegisterInfo *TRI;
   const MachineRegisterInfo *MRI;
@@ -116,7 +117,9 @@ private:
   void handleSendMsg(MachineBasicBlock &MBB, MachineBasicBlock::iterator I);
 
 public:
-  SIInsertWaits(TargetMachine &tm) :
+  static char ID;
+
+  SIInsertWaits() :
     MachineFunctionPass(ID),
     TII(nullptr),
     TRI(nullptr),
@@ -136,14 +139,22 @@ public:
 
 } // End anonymous namespace
 
+INITIALIZE_PASS_BEGIN(SIInsertWaits, DEBUG_TYPE,
+                      "SI Insert Waits", false, false)
+INITIALIZE_PASS_END(SIInsertWaits, DEBUG_TYPE,
+                    "SI Insert Waits", false, false)
+
 char SIInsertWaits::ID = 0;
 
+char &llvm::SIInsertWaitsID = SIInsertWaits::ID;
+
+FunctionPass *llvm::createSIInsertWaitsPass() {
+  return new SIInsertWaits();
+}
+
 const Counters SIInsertWaits::WaitCounts = { { 15, 7, 15 } };
 const Counters SIInsertWaits::ZeroCounts = { { 0, 0, 0 } };
 
-FunctionPass *llvm::createSIInsertWaits(TargetMachine &tm) {
-  return new SIInsertWaits(tm);
-}
 
 Counters SIInsertWaits::getHwCounts(MachineInstr &MI) {
   uint64_t TSFlags = MI.getDesc().TSFlags;