[llvm-branch-commits] [llvm-branch] r271588 - Merging r258901:

Tom Stellard via llvm-branch-commits llvm-branch-commits at lists.llvm.org
Thu Jun 2 14:01:38 PDT 2016


Author: tstellar
Date: Thu Jun  2 16:01:38 2016
New Revision: 271588

URL: http://llvm.org/viewvc/llvm-project?rev=271588&view=rev
Log:
Merging r258901:

------------------------------------------------------------------------
r258901 | Matthew.Arsenault | 2016-01-26 18:17:49 -0800 (Tue, 26 Jan 2016) | 17 lines

AMDGPU: Fix default device handling

When no device name is specified, default to kaveri
for HSA since SI is not supported and it woud fail.

Default to "tahiti" instead of "SI" since these are
effectively the same, and tahiti is an actual device.

Move default device handling to the TargetMachine
rather than the AMDGPUSubtarget. The module ISA version
is computed from the device name provided with the target
machine, so the attributes printed by the AsmPrinter were
inconsistent with those computed in the subtarget.

Also remove DevName field from subtarget since it's redundant
with getCPU() in the superclass.

------------------------------------------------------------------------

Added:
    llvm/branches/release_38/test/CodeGen/AMDGPU/hsa-default-device.ll
Modified:
    llvm/branches/release_38/lib/Target/AMDGPU/AMDGPUSubtarget.cpp
    llvm/branches/release_38/lib/Target/AMDGPU/AMDGPUSubtarget.h
    llvm/branches/release_38/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp

Modified: llvm/branches/release_38/lib/Target/AMDGPU/AMDGPUSubtarget.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_38/lib/Target/AMDGPU/AMDGPUSubtarget.cpp?rev=271588&r1=271587&r2=271588&view=diff
==============================================================================
--- llvm/branches/release_38/lib/Target/AMDGPU/AMDGPUSubtarget.cpp (original)
+++ llvm/branches/release_38/lib/Target/AMDGPU/AMDGPUSubtarget.cpp Thu Jun  2 16:01:38 2016
@@ -49,9 +49,6 @@ AMDGPUSubtarget::initializeSubtargetDepe
     FullFS += "+flat-for-global,";
   FullFS += FS;
 
-  if (GPU == "" && TT.getArch() == Triple::amdgcn)
-    GPU = "SI";
-
   ParseSubtargetFeatures(GPU, FullFS);
 
   // FIXME: I don't think think Evergreen has any useful support for
@@ -66,7 +63,7 @@ AMDGPUSubtarget::initializeSubtargetDepe
 
 AMDGPUSubtarget::AMDGPUSubtarget(const Triple &TT, StringRef GPU, StringRef FS,
                                  TargetMachine &TM)
-    : AMDGPUGenSubtargetInfo(TT, GPU, FS), DevName(GPU),
+    : AMDGPUGenSubtargetInfo(TT, GPU, FS),
       DumpCode(false), R600ALUInst(false), HasVertexCache(false),
       TexVTXClauseSize(0), Gen(AMDGPUSubtarget::R600), FP64(false),
       FP64Denormals(false), FP32Denormals(false), FastFMAF32(false),

Modified: llvm/branches/release_38/lib/Target/AMDGPU/AMDGPUSubtarget.h
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_38/lib/Target/AMDGPU/AMDGPUSubtarget.h?rev=271588&r1=271587&r2=271588&view=diff
==============================================================================
--- llvm/branches/release_38/lib/Target/AMDGPU/AMDGPUSubtarget.h (original)
+++ llvm/branches/release_38/lib/Target/AMDGPU/AMDGPUSubtarget.h Thu Jun  2 16:01:38 2016
@@ -58,7 +58,6 @@ public:
   };
 
 private:
-  std::string DevName;
   bool DumpCode;
   bool R600ALUInst;
   bool HasVertexCache;
@@ -269,10 +268,6 @@ public:
     return false;
   }
 
-  StringRef getDeviceName() const {
-    return DevName;
-  }
-
   bool enableHugeScratchBuffer() const {
     return EnableHugeScratchBuffer;
   }

Modified: llvm/branches/release_38/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_38/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp?rev=271588&r1=271587&r2=271588&view=diff
==============================================================================
--- llvm/branches/release_38/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp (original)
+++ llvm/branches/release_38/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp Thu Jun  2 16:01:38 2016
@@ -88,14 +88,28 @@ static std::string computeDataLayout(con
   return Ret;
 }
 
+LLVM_READNONE
+static StringRef getGPUOrDefault(const Triple &TT, StringRef GPU) {
+  if (!GPU.empty())
+    return GPU;
+
+  // HSA only supports CI+, so change the default GPU to a CI for HSA.
+  if (TT.getArch() == Triple::amdgcn)
+    return (TT.getOS() == Triple::AMDHSA) ? "kaveri" : "tahiti";
+
+  return "";
+}
+
 AMDGPUTargetMachine::AMDGPUTargetMachine(const Target &T, const Triple &TT,
                                          StringRef CPU, StringRef FS,
                                          TargetOptions Options, Reloc::Model RM,
                                          CodeModel::Model CM,
                                          CodeGenOpt::Level OptLevel)
-    : LLVMTargetMachine(T, computeDataLayout(TT), TT, CPU, FS, Options, RM, CM,
+    : LLVMTargetMachine(T, computeDataLayout(TT), TT,
+                        getGPUOrDefault(TT, CPU), FS, Options, RM, CM,
                         OptLevel),
-      TLOF(createTLOF(getTargetTriple())), Subtarget(TT, CPU, FS, *this),
+      TLOF(createTLOF(getTargetTriple())),
+      Subtarget(TT, getTargetCPU(), FS, *this),
       IntrinsicInfo() {
   setRequiresStructuredCFG(true);
   initAsmInfo();

Added: llvm/branches/release_38/test/CodeGen/AMDGPU/hsa-default-device.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_38/test/CodeGen/AMDGPU/hsa-default-device.ll?rev=271588&view=auto
==============================================================================
--- llvm/branches/release_38/test/CodeGen/AMDGPU/hsa-default-device.ll (added)
+++ llvm/branches/release_38/test/CodeGen/AMDGPU/hsa-default-device.ll Thu Jun  2 16:01:38 2016
@@ -0,0 +1,11 @@
+; RUN: llc -march=amdgcn -mtriple=amdgcn-unknown-amdhsa < %s | FileCheck %s
+
+; Make sure that with an HSA triple, we don't default to an
+; unsupported device.
+
+; CHECK: .hsa_code_object_isa 7,0,0,"AMD","AMDGPU"
+define void @test_kernel(float addrspace(1)* %out0, double addrspace(1)* %out1) nounwind {
+  store float 0.0, float addrspace(1)* %out0
+  ret void
+}
+




More information about the llvm-branch-commits mailing list