[llvm-branch-commits] [llvm-branch] r245386 - Merging r245119:

[Hans Wennborg via llvm-branch-commits]

Author: hans
Date: Tue Aug 18 18:02:42 2015
New Revision: 245386

URL: http://llvm.org/viewvc/llvm-project?rev=245386&view=rev
Log:
Merging r245119:
------------------------------------------------------------------------
r245119 | nicholas | 2015-08-14 15:46:49 -0700 (Fri, 14 Aug 2015) | 2 lines

Fix a crash where a utility function wasn't aware of fcmp vectors and created a value with the wrong type. Fixes PR24458!

------------------------------------------------------------------------

Modified:
    llvm/branches/release_37/   (props changed)
    llvm/branches/release_37/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
    llvm/branches/release_37/test/Transforms/InstCombine/vector-casts.ll

Propchange: llvm/branches/release_37/
------------------------------------------------------------------------------
--- svn:mergeinfo (original)
+++ svn:mergeinfo Tue Aug 18 18:02:42 2015
@@ -1,3 +1,3 @@
 /llvm/branches/Apple/Pertwee:110850,110961
 /llvm/branches/type-system-rewrite:133420-134817
-/llvm/trunk:155241,242236,242239,242281,242288,242296,242331,242341,242410,242412,242433-242434,242442,242543,242673,242680,242706,242721-242722,242733-242735,242742,242869,242919,242993,243001,243057,243116,243263,243294,243361,243469,243485,243500,243519,243531,243589,243609,243636,243638-243640,243745,243891,243898,243927,243932,243934,243984,243986,243999,244058,244123,244232,244332,244418,244554,244644,244659,244676,244789,244889,245064,245105,245256,245355
+/llvm/trunk:155241,242236,242239,242281,242288,242296,242331,242341,242410,242412,242433-242434,242442,242543,242673,242680,242706,242721-242722,242733-242735,242742,242869,242919,242993,243001,243057,243116,243263,243294,243361,243469,243485,243500,243519,243531,243589,243609,243636,243638-243640,243745,243891,243898,243927,243932,243934,243984,243986,243999,244058,244123,244232,244332,244418,244554,244644,244659,244676,244789,244889,245064,245105,245119,245256,245355

Modified: llvm/branches/release_37/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_37/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp?rev=245386&r1=245385&r2=245386&view=diff
==============================================================================
--- llvm/branches/release_37/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp (original)
+++ llvm/branches/release_37/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp Tue Aug 18 18:02:42 2015
@@ -93,7 +93,8 @@ static Value *getFCmpValue(bool isordere
   case 5: Pred = isordered ? FCmpInst::FCMP_ONE : FCmpInst::FCMP_UNE; break;
   case 6: Pred = isordered ? FCmpInst::FCMP_OLE : FCmpInst::FCMP_ULE; break;
   case 7:
-    if (!isordered) return ConstantInt::getTrue(LHS->getContext());
+    if (!isordered)
+      return ConstantInt::get(CmpInst::makeCmpResultType(LHS->getType()), 1);
     Pred = FCmpInst::FCMP_ORD; break;
   }
   return Builder->CreateFCmp(Pred, LHS, RHS);

Modified: llvm/branches/release_37/test/Transforms/InstCombine/vector-casts.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_37/test/Transforms/InstCombine/vector-casts.ll?rev=245386&r1=245385&r2=245386&view=diff
==============================================================================
--- llvm/branches/release_37/test/Transforms/InstCombine/vector-casts.ll (original)
+++ llvm/branches/release_37/test/Transforms/InstCombine/vector-casts.ll Tue Aug 18 18:02:42 2015
@@ -150,3 +150,14 @@ entry:
   ret <4 x float> undef
 }
 
+define <8 x i32> @pr24458(<8 x float> %n) {
+; CHECK-LABEL: @pr24458
+  %notequal_b_load_.i = fcmp une <8 x float> %n, zeroinitializer
+  %equal_a_load72_.i = fcmp ueq <8 x float> %n, zeroinitializer
+  %notequal_b_load__to_boolvec.i = sext <8 x i1> %notequal_b_load_.i to <8 x i32>
+  %equal_a_load72__to_boolvec.i = sext <8 x i1> %equal_a_load72_.i to <8 x i32>
+  %wrong = or <8 x i32> %notequal_b_load__to_boolvec.i, %equal_a_load72__to_boolvec.i
+  ret <8 x i32> %wrong
+; CHECK-NEXT: ret <8 x i32> <i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1>
+}
+