[llvm-branch-commits] [llvm-branch] r223748 - Merging r223708:

[Hal Finkel]

Author: hfinkel
Date: Mon Dec  8 20:37:53 2014
New Revision: 223748

URL: http://llvm.org/viewvc/llvm-project?rev=223748&view=rev
Log:
Merging r223708:
------------------------------------------------------------------------
r223708 | hfinkel | 2014-12-08 22:54:22 +0000 (Mon, 08 Dec 2014) | 13 lines

[PowerPC] Don't use a non-allocatable register to implement the 'cc' alias

GCC accepts 'cc' as an alias for 'cr0', and we need to do the same when
processing inline asm constraints. This had previously been implemented using a
non-allocatable register, named 'cc', that was listed as an alias of 'cr0', but
the infrastructure does not seem to support this properly (neither the register
allocator nor the scheduler properly accounts for the alias). Instead, we can
just process this as a naming alias inside of the inline asm
constraint-processing code, so we'll do that instead.

There are two regression tests, one where the post-RA scheduler did the wrong
thing with the non-allocatable alias, and one where the register allocator did
the wrong thing. Fixes PR21742.
------------------------------------------------------------------------

Added:
    llvm/branches/release_35/test/CodeGen/PowerPC/subreg-postra-2.ll
      - copied unchanged from r223708, llvm/trunk/test/CodeGen/PowerPC/subreg-postra-2.ll
    llvm/branches/release_35/test/CodeGen/PowerPC/subreg-postra.ll
      - copied unchanged from r223708, llvm/trunk/test/CodeGen/PowerPC/subreg-postra.ll
Modified:
    llvm/branches/release_35/   (props changed)
    llvm/branches/release_35/lib/Target/PowerPC/PPCISelLowering.cpp
    llvm/branches/release_35/lib/Target/PowerPC/PPCRegisterInfo.td

Propchange: llvm/branches/release_35/
------------------------------------------------------------------------------
--- svn:mergeinfo (original)
+++ svn:mergeinfo Mon Dec  8 20:37:53 2014
@@ -1,3 +1,3 @@
 /llvm/branches/Apple/Pertwee:110850,110961
 /llvm/branches/type-system-rewrite:133420-134817
-/llvm/trunk:155241,213653,213665,213726,213749,213773,213793,213798-213799,213815,213847,213880,213883-213884,213894-213896,213899,213915,213960,213966,213999,214060,214129,214180,214287,214331,214423,214429,214517,214519,214670,214674,214679,215685,215711,215793,215795,215806,216064,216262,216531,216891,216917,216920,217102,217115,217257,217993,218745,219441,220959,221009,221318,221408,221453,221501,221703,222338,222376,222500,222672,222996,223163,223170-223171,223220,223318,223328,223500
+/llvm/trunk:155241,213653,213665,213726,213749,213773,213793,213798-213799,213815,213847,213880,213883-213884,213894-213896,213899,213915,213960,213966,213999,214060,214129,214180,214287,214331,214423,214429,214517,214519,214670,214674,214679,215685,215711,215793,215795,215806,216064,216262,216531,216891,216917,216920,217102,217115,217257,217993,218745,219441,220959,221009,221318,221408,221453,221501,221703,222338,222376,222500,222672,222996,223163,223170-223171,223220,223318,223328,223500,223708

Modified: llvm/branches/release_35/lib/Target/PowerPC/PPCISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_35/lib/Target/PowerPC/PPCISelLowering.cpp?rev=223748&r1=223747&r2=223748&view=diff
==============================================================================
--- llvm/branches/release_35/lib/Target/PowerPC/PPCISelLowering.cpp (original)
+++ llvm/branches/release_35/lib/Target/PowerPC/PPCISelLowering.cpp Mon Dec  8 20:37:53 2014
@@ -8974,6 +8974,12 @@ PPCTargetLowering::getRegForInlineAsmCon
                           &PPC::G8RCRegClass);
   }
 
+  // GCC accepts 'cc' as an alias for 'cr0', and we need to do the same.
+  if (!R.second && StringRef("{cc}").equals_lower(Constraint)) {
+    R.first = PPC::CR0;
+    R.second = &PPC::CRRCRegClass;
+  }
+
   return R;
 }
 

Modified: llvm/branches/release_35/lib/Target/PowerPC/PPCRegisterInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_35/lib/Target/PowerPC/PPCRegisterInfo.td?rev=223748&r1=223747&r2=223748&view=diff
==============================================================================
--- llvm/branches/release_35/lib/Target/PowerPC/PPCRegisterInfo.td (original)
+++ llvm/branches/release_35/lib/Target/PowerPC/PPCRegisterInfo.td Mon Dec  8 20:37:53 2014
@@ -188,11 +188,6 @@ def CR6 : CR<6, "cr6", [CR6LT, CR6GT, CR
 def CR7 : CR<7, "cr7", [CR7LT, CR7GT, CR7EQ, CR7UN]>, DwarfRegNum<[75, 75]>;
 }
 
-// An alias for "cr0" used by GCC.
-def CC : PPCReg<"cc">, DwarfRegAlias<CR0> {
-  let Aliases = [CR0];
-}
-
 // Link register
 def LR  : SPR<8, "lr">, DwarfRegNum<[-2, 65]>;
 //let Aliases = [LR] in
@@ -306,7 +301,3 @@ def CARRYRC : RegisterClass<"PPC", [i32]
   let CopyCost = -1;
 }
 
-def CCRC : RegisterClass<"PPC", [i32], 32, (add CC)> {
-  let isAllocatable = 0;
-}
-