[llvm-branch-commits] [llvm-branch] r195428 - Merging r195421:

Bill Wendling isanbard at gmail.com
Fri Nov 22 01:11:48 PST 2013


Author: void
Date: Fri Nov 22 03:11:47 2013
New Revision: 195428

URL: http://llvm.org/viewvc/llvm-project?rev=195428&view=rev
Log:
Merging r195421:
------------------------------------------------------------------------
r195421 | haoliu | 2013-11-22 00:17:16 -0800 (Fri, 22 Nov 2013) | 5 lines

Fix a Cygwin build failure caused by enum values starting with '_', which is conflicted with some platform macros.
This solution only renames variables, no functional change.

NOTE: This is a candidate for the 3.4 branch.

------------------------------------------------------------------------

Modified:
    llvm/branches/release_34/   (props changed)
    llvm/branches/release_34/lib/Target/AArch64/AArch64RegisterInfo.td
    llvm/branches/release_34/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
    llvm/branches/release_34/lib/Target/AArch64/InstPrinter/AArch64InstPrinter.cpp
    llvm/branches/release_34/lib/Target/AArch64/Utils/AArch64BaseInfo.h

Propchange: llvm/branches/release_34/
------------------------------------------------------------------------------
--- svn:mergeinfo (original)
+++ svn:mergeinfo Fri Nov 22 03:11:47 2013
@@ -1,3 +1,3 @@
 /llvm/branches/Apple/Pertwee:110850,110961
 /llvm/branches/type-system-rewrite:133420-134817
-/llvm/trunk:155241,195092-195094,195100,195102-195103,195118,195129,195138,195152,195156-195157,195161-195162,195193,195272,195317-195318,195333,195339,195355,195397-195399
+/llvm/trunk:155241,195092-195094,195100,195102-195103,195118,195129,195138,195152,195156-195157,195161-195162,195193,195272,195317-195318,195333,195339,195355,195397-195399,195421

Modified: llvm/branches/release_34/lib/Target/AArch64/AArch64RegisterInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_34/lib/Target/AArch64/AArch64RegisterInfo.td?rev=195428&r1=195427&r2=195428&view=diff
==============================================================================
--- llvm/branches/release_34/lib/Target/AArch64/AArch64RegisterInfo.td (original)
+++ llvm/branches/release_34/lib/Target/AArch64/AArch64RegisterInfo.td Fri Nov 22 03:11:47 2013
@@ -261,12 +261,12 @@ multiclass VectorList_operands<string PR
     let Name = PREFIX # LAYOUT # Count;
     let RenderMethod = "addVectorListOperands";
     let PredicateMethod = 
-        "isVectorList<A64Layout::_" # LAYOUT # ", " # Count # ">";
+        "isVectorList<A64Layout::VL_" # LAYOUT # ", " # Count # ">";
     let ParserMethod = "ParseVectorList";
   }
 
   def _operand : RegisterOperand<RegList,
-        "printVectorList<A64Layout::_" # LAYOUT # ", " # Count # ">"> {
+        "printVectorList<A64Layout::VL_" # LAYOUT # ", " # Count # ">"> {
     let ParserMatchClass =
       !cast<AsmOperandClass>(PREFIX # LAYOUT # "_asmoperand");
   }

Modified: llvm/branches/release_34/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_34/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp?rev=195428&r1=195427&r2=195428&view=diff
==============================================================================
--- llvm/branches/release_34/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp (original)
+++ llvm/branches/release_34/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp Fri Nov 22 03:11:47 2013
@@ -2066,7 +2066,7 @@ AArch64AsmParser::OperandMatchResultTy A
 
   A64Layout::VectorLayout Layout = A64StringToVectorLayout(LayoutStr);
   if (Count > 1) { // If count > 1, create vector list using super register.
-    bool IsVec64 = (Layout < A64Layout::_16B);
+    bool IsVec64 = (Layout < A64Layout::VL_16B);
     static unsigned SupRegIDs[3][2] = {
       { AArch64::QPairRegClassID, AArch64::DPairRegClassID },
       { AArch64::QTripleRegClassID, AArch64::DTripleRegClassID },
@@ -2084,10 +2084,10 @@ AArch64AsmParser::OperandMatchResultTy A
   if (Parser.getTok().is(AsmToken::LBrac)) {
     uint32_t NumLanes = 0;
     switch(Layout) {
-    case A64Layout::_B : NumLanes = 16; break;
-    case A64Layout::_H : NumLanes = 8; break;
-    case A64Layout::_S : NumLanes = 4; break;
-    case A64Layout::_D : NumLanes = 2; break;
+    case A64Layout::VL_B : NumLanes = 16; break;
+    case A64Layout::VL_H : NumLanes = 8; break;
+    case A64Layout::VL_S : NumLanes = 4; break;
+    case A64Layout::VL_D : NumLanes = 2; break;
     default:
       SMLoc Loc = getLexer().getLoc();
       Error(Loc, "expected comma before next operand");

Modified: llvm/branches/release_34/lib/Target/AArch64/InstPrinter/AArch64InstPrinter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_34/lib/Target/AArch64/InstPrinter/AArch64InstPrinter.cpp?rev=195428&r1=195427&r2=195428&view=diff
==============================================================================
--- llvm/branches/release_34/lib/Target/AArch64/InstPrinter/AArch64InstPrinter.cpp (original)
+++ llvm/branches/release_34/lib/Target/AArch64/InstPrinter/AArch64InstPrinter.cpp Fri Nov 22 03:11:47 2013
@@ -521,7 +521,7 @@ void AArch64InstPrinter::printVectorList
   std::string LayoutStr = A64VectorLayoutToString(Layout);
   O << "{";
   if (Count > 1) { // Print sub registers separately
-    bool IsVec64 = (Layout < A64Layout::_16B);
+    bool IsVec64 = (Layout < A64Layout::VL_16B);
     unsigned SubRegIdx = IsVec64 ? AArch64::dsub_0 : AArch64::qsub_0;
     for (unsigned I = 0; I < Count; I++) {
       std::string Name = getRegisterName(MRI.getSubReg(Reg, SubRegIdx++));

Modified: llvm/branches/release_34/lib/Target/AArch64/Utils/AArch64BaseInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_34/lib/Target/AArch64/Utils/AArch64BaseInfo.h?rev=195428&r1=195427&r2=195428&view=diff
==============================================================================
--- llvm/branches/release_34/lib/Target/AArch64/Utils/AArch64BaseInfo.h (original)
+++ llvm/branches/release_34/lib/Target/AArch64/Utils/AArch64BaseInfo.h Fri Nov 22 03:11:47 2013
@@ -309,40 +309,40 @@ namespace A64SE {
 namespace A64Layout {
     enum VectorLayout {
         Invalid = -1,
-        _8B,
-        _4H,
-        _2S,
-        _1D,
+        VL_8B,
+        VL_4H,
+        VL_2S,
+        VL_1D,
 
-        _16B,
-        _8H,
-        _4S,
-        _2D,
+        VL_16B,
+        VL_8H,
+        VL_4S,
+        VL_2D,
 
         // Bare layout for the 128-bit vector
         // (only show ".b", ".h", ".s", ".d" without vector number)
-        _B,
-        _H,
-        _S,
-        _D
+        VL_B,
+        VL_H,
+        VL_S,
+        VL_D
     };
 }
 
 inline static const char *
 A64VectorLayoutToString(A64Layout::VectorLayout Layout) {
   switch (Layout) {
-  case A64Layout::_8B:  return ".8b";
-  case A64Layout::_4H:  return ".4h";
-  case A64Layout::_2S:  return ".2s";
-  case A64Layout::_1D:  return ".1d";
-  case A64Layout::_16B:  return ".16b";
-  case A64Layout::_8H:  return ".8h";
-  case A64Layout::_4S:  return ".4s";
-  case A64Layout::_2D:  return ".2d";
-  case A64Layout::_B:  return ".b";
-  case A64Layout::_H:  return ".h";
-  case A64Layout::_S:  return ".s";
-  case A64Layout::_D:  return ".d";
+  case A64Layout::VL_8B:  return ".8b";
+  case A64Layout::VL_4H:  return ".4h";
+  case A64Layout::VL_2S:  return ".2s";
+  case A64Layout::VL_1D:  return ".1d";
+  case A64Layout::VL_16B:  return ".16b";
+  case A64Layout::VL_8H:  return ".8h";
+  case A64Layout::VL_4S:  return ".4s";
+  case A64Layout::VL_2D:  return ".2d";
+  case A64Layout::VL_B:  return ".b";
+  case A64Layout::VL_H:  return ".h";
+  case A64Layout::VL_S:  return ".s";
+  case A64Layout::VL_D:  return ".d";
   default: llvm_unreachable("Unknown Vector Layout");
   }
 }
@@ -350,18 +350,18 @@ A64VectorLayoutToString(A64Layout::Vecto
 inline static A64Layout::VectorLayout
 A64StringToVectorLayout(StringRef LayoutStr) {
   return StringSwitch<A64Layout::VectorLayout>(LayoutStr)
-             .Case(".8b", A64Layout::_8B)
-             .Case(".4h", A64Layout::_4H)
-             .Case(".2s", A64Layout::_2S)
-             .Case(".1d", A64Layout::_1D)
-             .Case(".16b", A64Layout::_16B)
-             .Case(".8h", A64Layout::_8H)
-             .Case(".4s", A64Layout::_4S)
-             .Case(".2d", A64Layout::_2D)
-             .Case(".b", A64Layout::_B)
-             .Case(".h", A64Layout::_H)
-             .Case(".s", A64Layout::_S)
-             .Case(".d", A64Layout::_D)
+             .Case(".8b", A64Layout::VL_8B)
+             .Case(".4h", A64Layout::VL_4H)
+             .Case(".2s", A64Layout::VL_2S)
+             .Case(".1d", A64Layout::VL_1D)
+             .Case(".16b", A64Layout::VL_16B)
+             .Case(".8h", A64Layout::VL_8H)
+             .Case(".4s", A64Layout::VL_4S)
+             .Case(".2d", A64Layout::VL_2D)
+             .Case(".b", A64Layout::VL_B)
+             .Case(".h", A64Layout::VL_H)
+             .Case(".s", A64Layout::VL_S)
+             .Case(".d", A64Layout::VL_D)
              .Default(A64Layout::Invalid);
 }
 





More information about the llvm-branch-commits mailing list