[llvm-branch-commits] [llvm-branch] r182147 - Merging r181706:

Bill Wendling isanbard at gmail.com
Fri May 17 11:49:56 PDT 2013


Author: void
Date: Fri May 17 13:49:56 2013
New Revision: 182147

URL: http://llvm.org/viewvc/llvm-project?rev=182147&view=rev
Log:
Merging r181706:
------------------------------------------------------------------------
r181706 | rafael | 2013-05-13 07:34:48 -0700 (Mon, 13 May 2013) | 1 line

Remove unused fields and arguments.
------------------------------------------------------------------------

Modified:
    llvm/branches/release_33/   (props changed)
    llvm/branches/release_33/lib/Target/R600/MCTargetDesc/AMDGPUMCTargetDesc.cpp
    llvm/branches/release_33/lib/Target/R600/MCTargetDesc/AMDGPUMCTargetDesc.h
    llvm/branches/release_33/lib/Target/R600/MCTargetDesc/R600MCCodeEmitter.cpp

Propchange: llvm/branches/release_33/
------------------------------------------------------------------------------
--- svn:mergeinfo (original)
+++ svn:mergeinfo Fri May 17 13:49:56 2013
@@ -1,3 +1,3 @@
 /llvm/branches/Apple/Pertwee:110850,110961
 /llvm/branches/type-system-rewrite:133420-134817
-/llvm/trunk:155241,181286,181296,181313,181397,181423,181450,181524,181529,181540,181576-181580,181586,181600,181678,181792,181800,181842,182072
+/llvm/trunk:155241,181286,181296,181313,181397,181423,181450,181524,181529,181540,181576-181580,181586,181600,181678,181706,181792,181800,181842,182072

Modified: llvm/branches/release_33/lib/Target/R600/MCTargetDesc/AMDGPUMCTargetDesc.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_33/lib/Target/R600/MCTargetDesc/AMDGPUMCTargetDesc.cpp?rev=182147&r1=182146&r2=182147&view=diff
==============================================================================
--- llvm/branches/release_33/lib/Target/R600/MCTargetDesc/AMDGPUMCTargetDesc.cpp (original)
+++ llvm/branches/release_33/lib/Target/R600/MCTargetDesc/AMDGPUMCTargetDesc.cpp Fri May 17 13:49:56 2013
@@ -78,7 +78,7 @@ static MCCodeEmitter *createAMDGPUMCCode
   if (STI.getFeatureBits() & AMDGPU::Feature64BitPtr) {
     return createSIMCCodeEmitter(MCII, MRI, STI, Ctx);
   } else {
-    return createR600MCCodeEmitter(MCII, MRI, STI, Ctx);
+    return createR600MCCodeEmitter(MCII, MRI);
   }
 }
 

Modified: llvm/branches/release_33/lib/Target/R600/MCTargetDesc/AMDGPUMCTargetDesc.h
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_33/lib/Target/R600/MCTargetDesc/AMDGPUMCTargetDesc.h?rev=182147&r1=182146&r2=182147&view=diff
==============================================================================
--- llvm/branches/release_33/lib/Target/R600/MCTargetDesc/AMDGPUMCTargetDesc.h (original)
+++ llvm/branches/release_33/lib/Target/R600/MCTargetDesc/AMDGPUMCTargetDesc.h Fri May 17 13:49:56 2013
@@ -32,9 +32,7 @@ class raw_ostream;
 extern Target TheAMDGPUTarget;
 
 MCCodeEmitter *createR600MCCodeEmitter(const MCInstrInfo &MCII,
-                                       const MCRegisterInfo &MRI,
-                                       const MCSubtargetInfo &STI,
-                                       MCContext &Ctx);
+                                       const MCRegisterInfo &MRI);
 
 MCCodeEmitter *createSIMCCodeEmitter(const MCInstrInfo &MCII,
                                      const MCRegisterInfo &MRI,

Modified: llvm/branches/release_33/lib/Target/R600/MCTargetDesc/R600MCCodeEmitter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_33/lib/Target/R600/MCTargetDesc/R600MCCodeEmitter.cpp?rev=182147&r1=182146&r2=182147&view=diff
==============================================================================
--- llvm/branches/release_33/lib/Target/R600/MCTargetDesc/R600MCCodeEmitter.cpp (original)
+++ llvm/branches/release_33/lib/Target/R600/MCTargetDesc/R600MCCodeEmitter.cpp Fri May 17 13:49:56 2013
@@ -35,14 +35,11 @@ class R600MCCodeEmitter : public AMDGPUM
   void operator=(const R600MCCodeEmitter &) LLVM_DELETED_FUNCTION;
   const MCInstrInfo &MCII;
   const MCRegisterInfo &MRI;
-  const MCSubtargetInfo &STI;
-  MCContext &Ctx;
 
 public:
 
-  R600MCCodeEmitter(const MCInstrInfo &mcii, const MCRegisterInfo &mri,
-                    const MCSubtargetInfo &sti, MCContext &ctx)
-    : MCII(mcii), MRI(mri), STI(sti), Ctx(ctx) { }
+  R600MCCodeEmitter(const MCInstrInfo &mcii, const MCRegisterInfo &mri)
+    : MCII(mcii), MRI(mri) { }
 
   /// \brief Encode the instruction and write it to the OS.
   virtual void EncodeInstruction(const MCInst &MI, raw_ostream &OS,
@@ -98,10 +95,8 @@ enum TextureTypes {
 };
 
 MCCodeEmitter *llvm::createR600MCCodeEmitter(const MCInstrInfo &MCII,
-                                           const MCRegisterInfo &MRI,
-                                           const MCSubtargetInfo &STI,
-                                           MCContext &Ctx) {
-  return new R600MCCodeEmitter(MCII, MRI, STI, Ctx);
+                                           const MCRegisterInfo &MRI) {
+  return new R600MCCodeEmitter(MCII, MRI);
 }
 
 void R600MCCodeEmitter::EncodeInstruction(const MCInst &MI, raw_ostream &OS,





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