[llvm-branch-commits] [llvm-branch] r181952 - Merging r181578:

[Bill Wendling]

Author: void
Date: Wed May 15 19:27:29 2013
New Revision: 181952

URL: http://llvm.org/viewvc/llvm-project?rev=181952&view=rev
Log:
Merging r181578:
------------------------------------------------------------------------
r181578 | tstellar | 2013-05-09 19:09:34 -0700 (Thu, 09 May 2013) | 10 lines

R600: Expand MUL for v4i32/v2i32

Fixes piglit test for OpenCL builtin mul24, and allows mad24 to run.

Patch by: Aaron Watry

Reviewed-by: Tom Stellard <thomas.stellard at amd.com>
Signed-off-by: Aaron Watry <awatry at gmail.com>

NOTE: This is a candidate for the 3.3 branch.
------------------------------------------------------------------------

Added:
    llvm/branches/release_33/test/CodeGen/R600/mul.ll
      - copied unchanged from r181578, llvm/trunk/test/CodeGen/R600/mul.ll
Modified:
    llvm/branches/release_33/   (props changed)
    llvm/branches/release_33/lib/Target/R600/R600ISelLowering.cpp

Propchange: llvm/branches/release_33/
------------------------------------------------------------------------------
--- svn:mergeinfo (original)
+++ svn:mergeinfo Wed May 15 19:27:29 2013
@@ -1,3 +1,3 @@
 /llvm/branches/Apple/Pertwee:110850,110961
 /llvm/branches/type-system-rewrite:133420-134817
-/llvm/trunk:155241,181286,181296,181313,181397,181423,181450,181524,181576-181577,181586,181792,181800,181842
+/llvm/trunk:155241,181286,181296,181313,181397,181423,181450,181524,181576-181578,181586,181792,181800,181842

Modified: llvm/branches/release_33/lib/Target/R600/R600ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_33/lib/Target/R600/R600ISelLowering.cpp?rev=181952&r1=181951&r2=181952&view=diff
==============================================================================
--- llvm/branches/release_33/lib/Target/R600/R600ISelLowering.cpp (original)
+++ llvm/branches/release_33/lib/Target/R600/R600ISelLowering.cpp Wed May 15 19:27:29 2013
@@ -43,6 +43,8 @@ R600TargetLowering::R600TargetLowering(T
   setOperationAction(ISD::AND,  MVT::v4i32, Expand);
   setOperationAction(ISD::FP_TO_SINT, MVT::v4i32, Expand);
   setOperationAction(ISD::FP_TO_UINT, MVT::v4i32, Expand);
+  setOperationAction(ISD::MUL,  MVT::v2i32, Expand);
+  setOperationAction(ISD::MUL,  MVT::v4i32, Expand);
   setOperationAction(ISD::OR, MVT::v4i32, Expand);
   setOperationAction(ISD::OR, MVT::v2i32, Expand);
   setOperationAction(ISD::SINT_TO_FP, MVT::v4i32, Expand);