[llvm-branch-commits] [llvm-branch] r172541 [8/8] - in /llvm/branches/AMDILBackend: ./ autoconf/ bindings/ocaml/executionengine/ bindings/ocaml/llvm/ bindings/ocaml/target/ cmake/ cmake/modules/ cmake/platforms/ docs/ docs/CommandGuide/ docs/_themes/ docs/_themes/llvm-theme/ docs/_themes/llvm-theme/static/ docs/llvm-theme/ docs/llvm-theme/static/ docs/tutorial/ examples/ExceptionDemo/ examples/Fibonacci/ examples/Kaleidoscope/Chapter4/ examples/Kaleidoscope/Chapter5/ examples/Kaleidoscope/Chapter6/ examples/Kaleidoscope/Chapt...
Richard Relph
Richard.Relph at amd.com
Tue Jan 15 09:16:26 PST 2013
Modified: llvm/branches/AMDILBackend/utils/TableGen/TGValueTypes.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/AMDILBackend/utils/TableGen/TGValueTypes.cpp?rev=172541&r1=172540&r2=172541&view=diff
==============================================================================
--- llvm/branches/AMDILBackend/utils/TableGen/TGValueTypes.cpp (original)
+++ llvm/branches/AMDILBackend/utils/TableGen/TGValueTypes.cpp Tue Jan 15 11:16:16 2013
@@ -15,13 +15,25 @@
//===----------------------------------------------------------------------===//
#include "llvm/CodeGen/ValueTypes.h"
+#include "llvm/Support/Casting.h"
#include <map>
using namespace llvm;
namespace llvm {
class Type {
+protected:
+ enum TypeKind {
+ TK_ExtendedIntegerType,
+ TK_ExtendedVectorType
+ };
+private:
+ TypeKind Kind;
public:
+ TypeKind getKind() const {
+ return Kind;
+ }
+ Type(TypeKind K) : Kind(K) {}
virtual unsigned getSizeInBits() const = 0;
virtual ~Type() {}
};
@@ -32,7 +44,10 @@
unsigned BitWidth;
public:
explicit ExtendedIntegerType(unsigned bits)
- : BitWidth(bits) {}
+ : Type(TK_ExtendedIntegerType), BitWidth(bits) {}
+ static bool classof(const Type *T) {
+ return T->getKind() == TK_ExtendedIntegerType;
+ }
unsigned getSizeInBits() const {
return getBitWidth();
}
@@ -46,7 +61,10 @@
unsigned NumElements;
public:
ExtendedVectorType(EVT elty, unsigned num)
- : ElementType(elty), NumElements(num) {}
+ : Type(TK_ExtendedVectorType), ElementType(elty), NumElements(num) {}
+ static bool classof(const Type *T) {
+ return T->getKind() == TK_ExtendedVectorType;
+ }
unsigned getSizeInBits() const {
return getNumElements() * getElementType().getSizeInBits();
}
@@ -71,12 +89,12 @@
bool EVT::isExtendedInteger() const {
assert(isExtended() && "Type is not extended!");
- return dynamic_cast<const ExtendedIntegerType *>(LLVMTy) != 0;
+ return isa<ExtendedIntegerType>(LLVMTy);
}
bool EVT::isExtendedVector() const {
assert(isExtended() && "Type is not extended!");
- return dynamic_cast<const ExtendedVectorType *>(LLVMTy) != 0;
+ return isa<ExtendedVectorType>(LLVMTy);
}
bool EVT::isExtended64BitVector() const {
Modified: llvm/branches/AMDILBackend/utils/TableGen/TableGen.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/AMDILBackend/utils/TableGen/TableGen.cpp?rev=172541&r1=172540&r2=172541&view=diff
==============================================================================
--- llvm/branches/AMDILBackend/utils/TableGen/TableGen.cpp (original)
+++ llvm/branches/AMDILBackend/utils/TableGen/TableGen.cpp Tue Jan 15 11:16:16 2013
@@ -20,7 +20,6 @@
#include "llvm/TableGen/Error.h"
#include "llvm/TableGen/Main.h"
#include "llvm/TableGen/Record.h"
-#include "llvm/TableGen/TableGenAction.h"
using namespace llvm;
@@ -90,86 +89,83 @@
Class("class", cl::desc("Print Enum list for this class"),
cl::value_desc("class name"));
- class LLVMTableGenAction : public TableGenAction {
- public:
- bool operator()(raw_ostream &OS, RecordKeeper &Records) {
- switch (Action) {
- case PrintRecords:
- OS << Records; // No argument, dump all contents
- break;
- case GenEmitter:
- EmitCodeEmitter(Records, OS);
- break;
- case GenRegisterInfo:
- EmitRegisterInfo(Records, OS);
- break;
- case GenInstrInfo:
- EmitInstrInfo(Records, OS);
- break;
- case GenCallingConv:
- EmitCallingConv(Records, OS);
- break;
- case GenAsmWriter:
- EmitAsmWriter(Records, OS);
- break;
- case GenAsmMatcher:
- EmitAsmMatcher(Records, OS);
- break;
- case GenDisassembler:
- EmitDisassembler(Records, OS);
- break;
- case GenPseudoLowering:
- EmitPseudoLowering(Records, OS);
- break;
- case GenDAGISel:
- EmitDAGISel(Records, OS);
- break;
- case GenDFAPacketizer:
- EmitDFAPacketizer(Records, OS);
- break;
- case GenFastISel:
- EmitFastISel(Records, OS);
- break;
- case GenSubtarget:
- EmitSubtarget(Records, OS);
- break;
- case GenIntrinsic:
- EmitIntrinsics(Records, OS);
- break;
- case GenTgtIntrinsic:
- EmitIntrinsics(Records, OS, true);
- break;
- case GenEDInfo:
- EmitEnhancedDisassemblerInfo(Records, OS);
- break;
- case PrintEnums:
- {
- std::vector<Record*> Recs = Records.getAllDerivedDefinitions(Class);
- for (unsigned i = 0, e = Recs.size(); i != e; ++i)
- OS << Recs[i]->getName() << ", ";
- OS << "\n";
- break;
- }
- case PrintSets:
- {
- SetTheory Sets;
- Sets.addFieldExpander("Set", "Elements");
- std::vector<Record*> Recs = Records.getAllDerivedDefinitions("Set");
- for (unsigned i = 0, e = Recs.size(); i != e; ++i) {
- OS << Recs[i]->getName() << " = [";
- const std::vector<Record*> *Elts = Sets.expand(Recs[i]);
- assert(Elts && "Couldn't expand Set instance");
- for (unsigned ei = 0, ee = Elts->size(); ei != ee; ++ei)
- OS << ' ' << (*Elts)[ei]->getName();
- OS << " ]\n";
- }
- break;
- }
- }
-
- return false;
+bool LLVMTableGenMain(raw_ostream &OS, RecordKeeper &Records) {
+ switch (Action) {
+ case PrintRecords:
+ OS << Records; // No argument, dump all contents
+ break;
+ case GenEmitter:
+ EmitCodeEmitter(Records, OS);
+ break;
+ case GenRegisterInfo:
+ EmitRegisterInfo(Records, OS);
+ break;
+ case GenInstrInfo:
+ EmitInstrInfo(Records, OS);
+ break;
+ case GenCallingConv:
+ EmitCallingConv(Records, OS);
+ break;
+ case GenAsmWriter:
+ EmitAsmWriter(Records, OS);
+ break;
+ case GenAsmMatcher:
+ EmitAsmMatcher(Records, OS);
+ break;
+ case GenDisassembler:
+ EmitDisassembler(Records, OS);
+ break;
+ case GenPseudoLowering:
+ EmitPseudoLowering(Records, OS);
+ break;
+ case GenDAGISel:
+ EmitDAGISel(Records, OS);
+ break;
+ case GenDFAPacketizer:
+ EmitDFAPacketizer(Records, OS);
+ break;
+ case GenFastISel:
+ EmitFastISel(Records, OS);
+ break;
+ case GenSubtarget:
+ EmitSubtarget(Records, OS);
+ break;
+ case GenIntrinsic:
+ EmitIntrinsics(Records, OS);
+ break;
+ case GenTgtIntrinsic:
+ EmitIntrinsics(Records, OS, true);
+ break;
+ case GenEDInfo:
+ EmitEnhancedDisassemblerInfo(Records, OS);
+ break;
+ case PrintEnums:
+ {
+ std::vector<Record*> Recs = Records.getAllDerivedDefinitions(Class);
+ for (unsigned i = 0, e = Recs.size(); i != e; ++i)
+ OS << Recs[i]->getName() << ", ";
+ OS << "\n";
+ break;
+ }
+ case PrintSets:
+ {
+ SetTheory Sets;
+ Sets.addFieldExpander("Set", "Elements");
+ std::vector<Record*> Recs = Records.getAllDerivedDefinitions("Set");
+ for (unsigned i = 0, e = Recs.size(); i != e; ++i) {
+ OS << Recs[i]->getName() << " = [";
+ const std::vector<Record*> *Elts = Sets.expand(Recs[i]);
+ assert(Elts && "Couldn't expand Set instance");
+ for (unsigned ei = 0, ee = Elts->size(); ei != ee; ++ei)
+ OS << ' ' << (*Elts)[ei]->getName();
+ OS << " ]\n";
}
- };
+ break;
+ }
+ }
+
+ return false;
+}
}
int main(int argc, char **argv) {
@@ -177,6 +173,5 @@
PrettyStackTraceProgram X(argc, argv);
cl::ParseCommandLineOptions(argc, argv);
- LLVMTableGenAction Action;
- return TableGenMain(argv[0], Action);
+ return TableGenMain(argv[0], &LLVMTableGenMain);
}
Modified: llvm/branches/AMDILBackend/utils/TableGen/TableGenBackends.h
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/AMDILBackend/utils/TableGen/TableGenBackends.h?rev=172541&r1=172540&r2=172541&view=diff
==============================================================================
--- llvm/branches/AMDILBackend/utils/TableGen/TableGenBackends.h (original)
+++ llvm/branches/AMDILBackend/utils/TableGen/TableGenBackends.h Tue Jan 15 11:16:16 2013
@@ -74,5 +74,6 @@
void EmitPseudoLowering(RecordKeeper &RK, raw_ostream &OS);
void EmitRegisterInfo(RecordKeeper &RK, raw_ostream &OS);
void EmitSubtarget(RecordKeeper &RK, raw_ostream &OS);
+void EmitMapTable(RecordKeeper &RK, raw_ostream &OS);
} // End llvm namespace
Modified: llvm/branches/AMDILBackend/utils/TableGen/X86DisassemblerTables.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/AMDILBackend/utils/TableGen/X86DisassemblerTables.cpp?rev=172541&r1=172540&r2=172541&view=diff
==============================================================================
--- llvm/branches/AMDILBackend/utils/TableGen/X86DisassemblerTables.cpp (original)
+++ llvm/branches/AMDILBackend/utils/TableGen/X86DisassemblerTables.cpp Tue Jan 15 11:16:16 2013
@@ -209,6 +209,7 @@
bool satisfiesOneEntry = true;
bool satisfiesSplitRM = true;
bool satisfiesSplitReg = true;
+ bool satisfiesSplitMisc = true;
for (unsigned index = 0; index < 256; ++index) {
if (decision.instructionIDs[index] != decision.instructionIDs[0])
@@ -228,7 +229,7 @@
if (((index & 0xc0) != 0xc0) &&
(decision.instructionIDs[index] != decision.instructionIDs[index&0x38]))
- satisfiesSplitReg = false;
+ satisfiesSplitMisc = false;
}
if (satisfiesOneEntry)
@@ -237,9 +238,12 @@
if (satisfiesSplitRM)
return MODRM_SPLITRM;
- if (satisfiesSplitReg)
+ if (satisfiesSplitReg && satisfiesSplitMisc)
return MODRM_SPLITREG;
+ if (satisfiesSplitMisc)
+ return MODRM_SPLITMISC;
+
return MODRM_FULL;
}
@@ -332,6 +336,12 @@
for (unsigned index = 0xc0; index < 256; index += 8)
emitOneID(o1, i1, decision.instructionIDs[index], true);
break;
+ case MODRM_SPLITMISC:
+ for (unsigned index = 0; index < 64; index += 8)
+ emitOneID(o1, i1, decision.instructionIDs[index], true);
+ for (unsigned index = 0xc0; index < 256; ++index)
+ emitOneID(o1, i1, decision.instructionIDs[index], true);
+ break;
case MODRM_FULL:
for (unsigned index = 0; index < 256; ++index)
emitOneID(o1, i1, decision.instructionIDs[index], true);
@@ -361,11 +371,18 @@
case MODRM_SPLITREG:
sEntryNumber += 16;
break;
+ case MODRM_SPLITMISC:
+ sEntryNumber += 8 + 64;
+ break;
case MODRM_FULL:
sEntryNumber += 256;
break;
}
+ // We assume that the index can fit into uint16_t.
+ assert(sEntryNumber < 65536U &&
+ "Index into ModRMDecision is too large for uint16_t!");
+
++sTableNumber;
}
Modified: llvm/branches/AMDILBackend/utils/TableGen/X86ModRMFilters.h
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/AMDILBackend/utils/TableGen/X86ModRMFilters.h?rev=172541&r1=172540&r2=172541&view=diff
==============================================================================
--- llvm/branches/AMDILBackend/utils/TableGen/X86ModRMFilters.h (original)
+++ llvm/branches/AMDILBackend/utils/TableGen/X86ModRMFilters.h Tue Jan 15 11:16:16 2013
@@ -70,7 +70,7 @@
public:
/// Constructor
///
- /// @r - True if the mod bits of the ModR/M byte must be 11; false
+ /// \param r True if the mod bits of the ModR/M byte must be 11; false
/// otherwise. The name r derives from the fact that the mod
/// bits indicate whether the R/M bits [bits 2-0] signify a
/// register or a memory operand.
@@ -98,11 +98,12 @@
public:
/// Constructor
///
- /// @c0_ff - True if the ModR/M byte must fall between 0xc0 and 0xff;
- /// false otherwise.
- /// @nnn_or_modRM - If c0_ff is true, the required value of the entire ModR/M
- /// byte. If c0_ff is false, the required value of the nnn
- /// field.
+ /// \param c0_ff True if the ModR/M byte must fall between 0xc0 and 0xff;
+ /// false otherwise.
+ ///
+ /// \param nnn_or_modRM If c0_ff is true, the required value of the entire
+ /// ModR/M byte. If c0_ff is false, the required value
+ /// of the nnn field.
EscapeFilter(bool c0_ff, uint8_t nnn_or_modRM) :
ModRMFilter(),
C0_FF(c0_ff),
@@ -128,8 +129,8 @@
public:
/// Constructor
///
- /// @modRM - The value of the ModR/M byte when the register operand
- /// refers to the first register in the register set.
+ /// \param modRM The value of the ModR/M byte when the register operand
+ /// refers to the first register in the register set.
AddRegEscapeFilter(uint8_t modRM) : ModRM(modRM) {
}
@@ -150,9 +151,9 @@
public:
/// Constructor
///
- /// @r - True if the mod field must be set to 11; false otherwise.
- /// The name is explained at ModFilter.
- /// @nnn - The required value of the nnn field.
+ /// \param r True if the mod field must be set to 11; false otherwise.
+ /// The name is explained at ModFilter.
+ /// \param nnn The required value of the nnn field.
ExtendedFilter(bool r, uint8_t nnn) :
ModRMFilter(),
R(r),
@@ -177,7 +178,7 @@
public:
/// Constructor
///
- /// @modRM - The required value of the full ModR/M byte.
+ /// \param modRM The required value of the full ModR/M byte.
ExactFilter(uint8_t modRM) :
ModRMFilter(),
ModRM(modRM) {
Modified: llvm/branches/AMDILBackend/utils/TableGen/X86RecognizableInstr.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/AMDILBackend/utils/TableGen/X86RecognizableInstr.cpp?rev=172541&r1=172540&r2=172541&view=diff
==============================================================================
--- llvm/branches/AMDILBackend/utils/TableGen/X86RecognizableInstr.cpp (original)
+++ llvm/branches/AMDILBackend/utils/TableGen/X86RecognizableInstr.cpp Tue Jan 15 11:16:16 2013
@@ -38,14 +38,15 @@
MAP(D0, 45) \
MAP(D1, 46) \
MAP(D4, 47) \
- MAP(D8, 48) \
- MAP(D9, 49) \
- MAP(DA, 50) \
- MAP(DB, 51) \
- MAP(DC, 52) \
- MAP(DD, 53) \
- MAP(DE, 54) \
- MAP(DF, 55)
+ MAP(D5, 48) \
+ MAP(D8, 49) \
+ MAP(D9, 50) \
+ MAP(DA, 51) \
+ MAP(DB, 52) \
+ MAP(DC, 53) \
+ MAP(DD, 54) \
+ MAP(DE, 55) \
+ MAP(DF, 56)
// A clone of X86 since we can't depend on something that is generated.
namespace X86Local {
@@ -244,7 +245,7 @@
IsSSE = (HasOpSizePrefix && (Name.find("16") == Name.npos)) ||
(Name.find("CRC32") != Name.npos);
HasFROperands = hasFROperands();
- HasVEX_LPrefix = has256BitOperands() || Rec->getValueAsBit("hasVEX_L");
+ HasVEX_LPrefix = Rec->getValueAsBit("hasVEX_L");
// Check for 64-bit inst which does not require REX
Is32Bit = false;
@@ -479,20 +480,6 @@
return false;
}
-bool RecognizableInstr::has256BitOperands() const {
- const std::vector<CGIOperandList::OperandInfo> &OperandList = *Operands;
- unsigned numOperands = OperandList.size();
-
- for (unsigned operandIndex = 0; operandIndex < numOperands; ++operandIndex) {
- const std::string &recName = OperandList[operandIndex].Rec->getName();
-
- if (!recName.compare("VR256")) {
- return true;
- }
- }
- return false;
-}
-
void RecognizableInstr::handleOperand(bool optional, unsigned &operandIndex,
unsigned &physicalOperandIndex,
unsigned &numPhysicalOperands,
@@ -1145,6 +1132,8 @@
// register IDs in 8-bit immediates nowadays.
ENCODING("VR256", ENCODING_IB)
ENCODING("VR128", ENCODING_IB)
+ ENCODING("FR32", ENCODING_IB)
+ ENCODING("FR64", ENCODING_IB)
errs() << "Unhandled immediate encoding " << s << "\n";
llvm_unreachable("Unhandled immediate encoding");
}
Modified: llvm/branches/AMDILBackend/utils/TableGen/X86RecognizableInstr.h
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/AMDILBackend/utils/TableGen/X86RecognizableInstr.h?rev=172541&r1=172540&r2=172541&view=diff
==============================================================================
--- llvm/branches/AMDILBackend/utils/TableGen/X86RecognizableInstr.h (original)
+++ llvm/branches/AMDILBackend/utils/TableGen/X86RecognizableInstr.h Tue Jan 15 11:16:16 2013
@@ -127,10 +127,7 @@
/// hasFROperands - Returns true if any operand is a FR operand.
bool hasFROperands() const;
-
- /// has256BitOperands - Returns true if any operand is a 256-bit SSE operand.
- bool has256BitOperands() const;
-
+
/// typeFromString - Translates an operand type from the string provided in
/// the LLVM tables to an OperandType for use in the operand specifier.
///
@@ -143,7 +140,7 @@
/// @param hasREX_WPrefix - Indicates whether the instruction has a REX.W
/// prefix. If it does, 32-bit register operands stay
/// 32-bit regardless of the operand size.
- /// @param hasOpSizePrefix- Indicates whether the instruction has an OpSize
+ /// @param hasOpSizePrefix Indicates whether the instruction has an OpSize
/// prefix. If it does not, then 16-bit register
/// operands stay 16-bit.
/// @return - The operand's type.
@@ -225,23 +222,23 @@
/// emitInstructionSpecifier - Loads the instruction specifier for the current
/// instruction into a DisassemblerTables.
///
- /// @arg tables - The DisassemblerTables to populate with the specifier for
+ /// \param tables The DisassemblerTables to populate with the specifier for
/// the current instruction.
void emitInstructionSpecifier(DisassemblerTables &tables);
/// emitDecodePath - Populates the proper fields in the decode tables
/// corresponding to the decode paths for this instruction.
///
- /// @arg tables - The DisassemblerTables to populate with the decode
+ /// \param tables The DisassemblerTables to populate with the decode
/// decode information for the current instruction.
void emitDecodePath(DisassemblerTables &tables) const;
/// Constructor - Initializes a RecognizableInstr with the appropriate fields
/// from a CodeGenInstruction.
///
- /// @arg tables - The DisassemblerTables that the specifier will be added to.
- /// @arg insn - The CodeGenInstruction to extract information from.
- /// @arg uid - The unique ID of the current instruction.
+ /// \param tables The DisassemblerTables that the specifier will be added to.
+ /// \param insn The CodeGenInstruction to extract information from.
+ /// \param uid The unique ID of the current instruction.
RecognizableInstr(DisassemblerTables &tables,
const CodeGenInstruction &insn,
InstrUID uid);
@@ -249,11 +246,11 @@
/// processInstr - Accepts a CodeGenInstruction and loads decode information
/// for it into a DisassemblerTables if appropriate.
///
- /// @arg tables - The DiassemblerTables to be populated with decode
+ /// \param tables The DiassemblerTables to be populated with decode
/// information.
- /// @arg insn - The CodeGenInstruction to be used as a source for this
+ /// \param insn The CodeGenInstruction to be used as a source for this
/// information.
- /// @uid - The unique ID of the instruction.
+ /// \param uid The unique ID of the instruction.
static void processInstr(DisassemblerTables &tables,
const CodeGenInstruction &insn,
InstrUID uid);
Removed: llvm/branches/AMDILBackend/utils/lit/lit/ExampleTests/LLVM.InTree/test/Bar/bar-test.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/AMDILBackend/utils/lit/lit/ExampleTests/LLVM.InTree/test/Bar/bar-test.ll?rev=172540&view=auto
==============================================================================
--- llvm/branches/AMDILBackend/utils/lit/lit/ExampleTests/LLVM.InTree/test/Bar/bar-test.ll (original)
+++ llvm/branches/AMDILBackend/utils/lit/lit/ExampleTests/LLVM.InTree/test/Bar/bar-test.ll (removed)
@@ -1,3 +0,0 @@
-; RUN: true
-; XFAIL: *
-; XTARGET: darwin
Modified: llvm/branches/AMDILBackend/utils/lit/lit/ExampleTests/LLVM.InTree/test/lit.cfg
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/AMDILBackend/utils/lit/lit/ExampleTests/LLVM.InTree/test/lit.cfg?rev=172541&r1=172540&r2=172541&view=diff
==============================================================================
--- llvm/branches/AMDILBackend/utils/lit/lit/ExampleTests/LLVM.InTree/test/lit.cfg (original)
+++ llvm/branches/AMDILBackend/utils/lit/lit/ExampleTests/LLVM.InTree/test/lit.cfg Tue Jan 15 11:16:16 2013
@@ -77,7 +77,7 @@
excludes = []
-# Provide target_triple for use in XFAIL and XTARGET.
+# Provide target_triple for use in XFAIL.
config.target_triple = site_exp['target_triplet']
# Provide llvm_supports_target for use in local configs.
Modified: llvm/branches/AMDILBackend/utils/lit/lit/ExampleTests/LLVM.OutOfTree/src/test/lit.cfg
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/AMDILBackend/utils/lit/lit/ExampleTests/LLVM.OutOfTree/src/test/lit.cfg?rev=172541&r1=172540&r2=172541&view=diff
==============================================================================
--- llvm/branches/AMDILBackend/utils/lit/lit/ExampleTests/LLVM.OutOfTree/src/test/lit.cfg (original)
+++ llvm/branches/AMDILBackend/utils/lit/lit/ExampleTests/LLVM.OutOfTree/src/test/lit.cfg Tue Jan 15 11:16:16 2013
@@ -77,7 +77,7 @@
excludes = []
-# Provide target_triple for use in XFAIL and XTARGET.
+# Provide target_triple for use in XFAIL.
config.target_triple = site_exp['target_triplet']
# Provide llvm_supports_target for use in local configs.
Modified: llvm/branches/AMDILBackend/utils/lit/lit/ExampleTests/lit.cfg
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/AMDILBackend/utils/lit/lit/ExampleTests/lit.cfg?rev=172541&r1=172540&r2=172541&view=diff
==============================================================================
--- llvm/branches/AMDILBackend/utils/lit/lit/ExampleTests/lit.cfg (original)
+++ llvm/branches/AMDILBackend/utils/lit/lit/ExampleTests/lit.cfg Tue Jan 15 11:16:16 2013
@@ -23,4 +23,4 @@
config.target_triple = 'foo'
# available_features: Used by ShTest and TclTest formats for REQUIRES checks.
-config.available_features = ['some-feature-name']
+config.available_features.add('some-feature-name')
Modified: llvm/branches/AMDILBackend/utils/lit/lit/LitConfig.py
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/AMDILBackend/utils/lit/lit/LitConfig.py?rev=172541&r1=172540&r2=172541&view=diff
==============================================================================
--- llvm/branches/AMDILBackend/utils/lit/lit/LitConfig.py (original)
+++ llvm/branches/AMDILBackend/utils/lit/lit/LitConfig.py Tue Jan 15 11:16:16 2013
@@ -42,14 +42,11 @@
self.numWarnings = 0
self.valgrindArgs = []
- self.valgrindTriple = ""
if self.useValgrind:
- self.valgrindTriple = "-vg"
self.valgrindArgs = ['valgrind', '-q', '--run-libc-freeres=no',
'--tool=memcheck', '--trace-children=yes',
'--error-exitcode=123']
if self.valgrindLeakCheck:
- self.valgrindTriple += "_leak"
self.valgrindArgs.append('--leak-check=full')
else:
# The default is 'summary'.
Modified: llvm/branches/AMDILBackend/utils/lit/lit/TestRunner.py
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/AMDILBackend/utils/lit/lit/TestRunner.py?rev=172541&r1=172540&r2=172541&view=diff
==============================================================================
--- llvm/branches/AMDILBackend/utils/lit/lit/TestRunner.py (original)
+++ llvm/branches/AMDILBackend/utils/lit/lit/TestRunner.py Tue Jan 15 11:16:16 2013
@@ -370,27 +370,27 @@
return executeCommand(command, cwd=cwd, env=test.config.environment)
-def isExpectedFail(xfails, xtargets, target_triple):
- # Check if any xfail matches this target.
+def isExpectedFail(test, xfails):
+ # Check if any of the xfails match an available feature or the target.
for item in xfails:
- if item == '*' or item in target_triple:
- break
- else:
- return False
-
- # If so, see if it is expected to pass on this target.
- #
- # FIXME: Rename XTARGET to something that makes sense, like XPASS.
- for item in xtargets:
- if item == '*' or item in target_triple:
- return False
+ # If this is the wildcard, it always fails.
+ if item == '*':
+ return True
+
+ # If this is an exact match for one of the features, it fails.
+ if item in test.config.available_features:
+ return True
+
+ # If this is a part of the target triple, it fails.
+ if item in test.suite.config.target_triple:
+ return True
- return True
+ return False
def parseIntegratedTestScript(test, normalize_slashes=False,
extra_substitutions=[]):
"""parseIntegratedTestScript - Scan an LLVM/Clang style integrated test
- script and extract the lines to 'RUN' as well as 'XFAIL' and 'XTARGET'
+ script and extract the lines to 'RUN' as well as 'XFAIL' and 'REQUIRES'
information. The RUN lines also will have variable substitution performed.
"""
@@ -431,7 +431,6 @@
# Collect the test lines from the script.
script = []
xfails = []
- xtargets = []
requires = []
for ln in open(sourcepath):
if 'RUN:' in ln:
@@ -450,9 +449,6 @@
elif 'XFAIL:' in ln:
items = ln[ln.index('XFAIL:') + 6:].split(',')
xfails.extend([s.strip() for s in items])
- elif 'XTARGET:' in ln:
- items = ln[ln.index('XTARGET:') + 8:].split(',')
- xtargets.extend([s.strip() for s in items])
elif 'REQUIRES:' in ln:
items = ln[ln.index('REQUIRES:') + 9:].split(',')
requires.extend([s.strip() for s in items])
@@ -491,7 +487,7 @@
return (Test.UNSUPPORTED,
"Test requires the following features: %s" % msg)
- isXFail = isExpectedFail(xfails, xtargets, test.suite.config.target_triple)
+ isXFail = isExpectedFail(test, xfails)
return script,isXFail,tmpBase,execdir
def formatTestOutput(status, out, err, exitCode, failDueToStderr, script):
Modified: llvm/branches/AMDILBackend/utils/lit/lit/TestingConfig.py
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/AMDILBackend/utils/lit/lit/TestingConfig.py?rev=172541&r1=172540&r2=172541&view=diff
==============================================================================
--- llvm/branches/AMDILBackend/utils/lit/lit/TestingConfig.py (original)
+++ llvm/branches/AMDILBackend/utils/lit/lit/TestingConfig.py Tue Jan 15 11:16:16 2013
@@ -16,6 +16,7 @@
'PATH' : os.pathsep.join(litConfig.path +
[os.environ.get('PATH','')]),
'SYSTEMROOT' : os.environ.get('SYSTEMROOT',''),
+ 'TERM' : os.environ.get('TERM',''),
'LLVM_DISABLE_CRASH_REPORT' : '1',
}
@@ -28,6 +29,13 @@
'TMP' : os.environ.get('TMP',''),
})
+ # Set the default available features based on the LitConfig.
+ available_features = []
+ if litConfig.useValgrind:
+ available_features.append('valgrind')
+ if litConfig.valgrindLeakCheck:
+ available_features.append('vg_leak')
+
config = TestingConfig(parent,
name = '<unnamed>',
suffixes = set(),
@@ -39,7 +47,7 @@
test_exec_root = None,
test_source_root = None,
excludes = [],
- available_features = [])
+ available_features = available_features)
if os.path.exists(path):
# FIXME: Improve detection and error reporting of errors in the
Modified: llvm/branches/AMDILBackend/utils/lit/lit/Util.py
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/AMDILBackend/utils/lit/lit/Util.py?rev=172541&r1=172540&r2=172541&view=diff
==============================================================================
--- llvm/branches/AMDILBackend/utils/lit/lit/Util.py (original)
+++ llvm/branches/AMDILBackend/utils/lit/lit/Util.py Tue Jan 15 11:16:16 2013
@@ -56,7 +56,7 @@
paths = os.environ.get('PATH','')
# Check for absolute match first.
- if os.path.exists(command):
+ if os.path.isfile(command):
return command
# Would be nice if Python had a lib function for this.
Modified: llvm/branches/AMDILBackend/utils/lit/lit/main.py
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/AMDILBackend/utils/lit/lit/main.py?rev=172541&r1=172540&r2=172541&view=diff
==============================================================================
--- llvm/branches/AMDILBackend/utils/lit/lit/main.py (original)
+++ llvm/branches/AMDILBackend/utils/lit/lit/main.py Tue Jan 15 11:16:16 2013
@@ -566,6 +566,9 @@
if opts.maxTests is not None:
tests = tests[:opts.maxTests]
+ # Don't create more threads than tests.
+ opts.numThreads = min(len(tests), opts.numThreads)
+
extra = ''
if len(tests) != numTotalTests:
extra = ' of %d' % numTotalTests
@@ -589,9 +592,6 @@
else:
print header
- # Don't create more threads than tests.
- opts.numThreads = min(len(tests), opts.numThreads)
-
startTime = time.time()
display = TestingProgressDisplay(opts, len(tests), progressBar)
provider = TestProvider(tests, opts.maxTime)
Modified: llvm/branches/AMDILBackend/utils/lldbDataFormatters.py
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/AMDILBackend/utils/lldbDataFormatters.py?rev=172541&r1=172540&r2=172541&view=diff
==============================================================================
--- llvm/branches/AMDILBackend/utils/lldbDataFormatters.py (original)
+++ llvm/branches/AMDILBackend/utils/lldbDataFormatters.py Tue Jan 15 11:16:16 2013
@@ -2,6 +2,7 @@
Load into LLDB with:
script import lldbDataFormatters
type synthetic add -x "^llvm::SmallVectorImpl<.+>$" -l lldbDataFormatters.SmallVectorSynthProvider
+type synthetic add -x "^llvm::SmallVector<.+,.+>$" -l lldbDataFormatters.SmallVectorSynthProvider
"""
# Pretty printer for llvm::SmallVector/llvm::SmallVectorImpl
@@ -32,22 +33,15 @@
return self.begin.CreateChildAtOffset('['+str(index)+']',
offset, self.data_type)
- def get_type_from_name(self):
- import re
- name = self.valobj.GetType().GetName()
- # This class works with both SmallVectors and SmallVectorImpls.
- res = re.match("^(llvm::)?SmallVectorImpl<(.+)>$", name)
- if res:
- return res.group(2)
- res = re.match("^(llvm::)?SmallVector<(.+), \d+>$", name)
- if res:
- return res.group(2)
- return None
-
def update(self):
self.begin = self.valobj.GetChildMemberWithName('BeginX')
self.end = self.valobj.GetChildMemberWithName('EndX')
- data_type = self.get_type_from_name()
- # FIXME: this sometimes returns an invalid type.
- self.data_type = self.valobj.GetTarget().FindFirstType(data_type)
+ the_type = self.valobj.GetType()
+ # If this is a reference type we have to dereference it to get to the
+ # template parameter.
+ if the_type.IsReferenceType():
+ the_type = the_type.GetDereferencedType()
+
+ self.data_type = the_type.GetTemplateArgumentType(0)
self.type_size = self.data_type.GetByteSize()
+ assert self.type_size != 0
Modified: llvm/branches/AMDILBackend/utils/llvm-lit/llvm-lit.in
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/AMDILBackend/utils/llvm-lit/llvm-lit.in?rev=172541&r1=172540&r2=172541&view=diff
==============================================================================
--- llvm/branches/AMDILBackend/utils/llvm-lit/llvm-lit.in (original)
+++ llvm/branches/AMDILBackend/utils/llvm-lit/llvm-lit.in Tue Jan 15 11:16:16 2013
@@ -18,10 +18,15 @@
'llvm_site_config' : os.path.join(llvm_obj_root, 'test', 'lit.site.cfg')
}
-clang_site_config = os.path.join(llvm_obj_root, 'tools', 'clang', 'test',
- 'lit.site.cfg')
-if os.path.exists(clang_site_config):
- builtin_parameters['clang_site_config'] = clang_site_config
+clang_obj_root = os.path.join(llvm_obj_root, 'tools', 'clang')
+
+if os.path.exists(clang_obj_root):
+ builtin_parameters['clang_site_config'] = \
+ os.path.join(clang_obj_root, 'test', 'lit.site.cfg')
+ clang_tools_extra_obj_root = os.path.join(clang_obj_root, 'tools', 'extra')
+ if os.path.exists(clang_tools_extra_obj_root):
+ builtin_parameters['clang_tools_extra_site_config'] = \
+ os.path.join(clang_tools_extra_obj_root, 'test', 'lit.site.cfg')
if __name__=='__main__':
import lit
Modified: llvm/branches/AMDILBackend/utils/llvm.grm
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/AMDILBackend/utils/llvm.grm?rev=172541&r1=172540&r2=172541&view=diff
==============================================================================
--- llvm/branches/AMDILBackend/utils/llvm.grm (original)
+++ llvm/branches/AMDILBackend/utils/llvm.grm Tue Jan 15 11:16:16 2013
@@ -175,7 +175,6 @@
| returns_twice
| nonlazybind
| address_safety
- | ia_nsdialect
;
OptFuncAttrs ::= + _ | OptFuncAttrs FuncAttr ;
Modified: llvm/branches/AMDILBackend/utils/unittest/googletest/gtest-port.cc
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/AMDILBackend/utils/unittest/googletest/gtest-port.cc?rev=172541&r1=172540&r2=172541&view=diff
==============================================================================
--- llvm/branches/AMDILBackend/utils/unittest/googletest/gtest-port.cc (original)
+++ llvm/branches/AMDILBackend/utils/unittest/googletest/gtest-port.cc Tue Jan 15 11:16:16 2013
@@ -505,6 +505,10 @@
GTEST_CHECK_(captured_fd != -1) << "Unable to open temporary file "
<< temp_file_path;
filename_ = temp_file_path;
+#elif GTEST_OS_LINUX_ANDROID
+ char name_template[] = "/sdcard/captured_stderr.XXXXXX";
+ const int captured_fd = mkstemp(name_template);
+ filename_ = name_template;
# else
// There's no guarantee that a test has write access to the
// current directory, so we create the temporary file in the /tmp
Modified: llvm/branches/AMDILBackend/utils/unittest/googletest/include/gtest/internal/gtest-port.h
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/AMDILBackend/utils/unittest/googletest/include/gtest/internal/gtest-port.h?rev=172541&r1=172540&r2=172541&view=diff
==============================================================================
--- llvm/branches/AMDILBackend/utils/unittest/googletest/include/gtest/internal/gtest-port.h (original)
+++ llvm/branches/AMDILBackend/utils/unittest/googletest/include/gtest/internal/gtest-port.h Tue Jan 15 11:16:16 2013
@@ -230,7 +230,7 @@
# define GTEST_OS_MAC 1
#elif defined __linux__
# define GTEST_OS_LINUX 1
-# ifdef ANDROID
+# if defined(ANDROID) || defined(__ANDROID__)
# define GTEST_OS_LINUX_ANDROID 1
# endif // ANDROID
#elif defined __MVS__
Modified: llvm/branches/AMDILBackend/utils/vim/llvm.vim
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/AMDILBackend/utils/vim/llvm.vim?rev=172541&r1=172540&r2=172541&view=diff
==============================================================================
--- llvm/branches/AMDILBackend/utils/vim/llvm.vim (original)
+++ llvm/branches/AMDILBackend/utils/vim/llvm.vim Tue Jan 15 11:16:16 2013
@@ -79,7 +79,6 @@
syn match llvmSpecialComment /;\s*PR\d*\s*$/
syn match llvmSpecialComment /;\s*END\.\s*$/
syn match llvmSpecialComment /;\s*XFAIL:.*$/
-syn match llvmSpecialComment /;\s*XTARGET:.*$/
if version >= 508 || !exists("did_c_syn_inits")
if version < 508
Modified: llvm/branches/AMDILBackend/utils/yaml2obj/yaml2obj.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/AMDILBackend/utils/yaml2obj/yaml2obj.cpp?rev=172541&r1=172540&r2=172541&view=diff
==============================================================================
--- llvm/branches/AMDILBackend/utils/yaml2obj/yaml2obj.cpp (original)
+++ llvm/branches/AMDILBackend/utils/yaml2obj/yaml2obj.cpp Tue Jan 15 11:16:16 2013
@@ -148,7 +148,7 @@
return false;
}
if (KeyValue == "Machine") {
- uint16_t Machine;
+ uint16_t Machine = COFF::MT_Invalid;
if (!getAs(Value, Machine)) {
// It's not a raw number, try matching the string.
StringRef ValueValue = Value->getValue(Storage);
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