[llvm-branch-commits] [cfe-branch] r196673 - Merging r196191:

Bill Wendling isanbard at gmail.com
Sat Dec 7 16:01:00 PST 2013


Author: void
Date: Sat Dec  7 18:01:00 2013
New Revision: 196673

URL: http://llvm.org/viewvc/llvm-project?rev=196673&view=rev
Log:
Merging r196191:
------------------------------------------------------------------------
r196191 | jiangning | 2013-12-02 17:33:16 -0800 (Mon, 02 Dec 2013) | 2 lines

Add some missing AArch64 Neon intrinsics like vuqadd_s64 and friends.

------------------------------------------------------------------------

Modified:
    cfe/branches/release_34/   (props changed)
    cfe/branches/release_34/include/clang/Basic/arm_neon.td
    cfe/branches/release_34/test/CodeGen/aarch64-neon-intrinsics.c

Propchange: cfe/branches/release_34/
------------------------------------------------------------------------------
--- svn:mergeinfo (original)
+++ svn:mergeinfo Sat Dec  7 18:01:00 2013
@@ -1,4 +1,4 @@
 /cfe/branches/type-system-rewrite:134693-134817
-/cfe/trunk:195126,195128,195135-195136,195146,195149,195154,195158,195163,195168,195174,195249,195268,195283,195303,195326,195329,195367,195384,195409,195420,195422,195501,195547,195556,195558,195587,195620,195635,195669,195687,195693,195710,195713,195716,195756,195760,195768,195777,195789,195792,195804,195827,195843-195844,195877,195887-195888,195897,195903,195905-195906,195932,195936-195943,195970,195983,196045,196048,196050,196058,196114-196115,196153,196189-196190,196206,196215,196370,196387,196423,196454,196459,196488,196532,196538,196658
+/cfe/trunk:195126,195128,195135-195136,195146,195149,195154,195158,195163,195168,195174,195249,195268,195283,195303,195326,195329,195367,195384,195409,195420,195422,195501,195547,195556,195558,195587,195620,195635,195669,195687,195693,195710,195713,195716,195756,195760,195768,195777,195789,195792,195804,195827,195843-195844,195877,195887-195888,195897,195903,195905-195906,195932,195936-195943,195970,195983,196045,196048,196050,196058,196114-196115,196153,196189-196191,196206,196215,196370,196387,196423,196454,196459,196488,196532,196538,196658
 /cfe/trunk/test:170344
 /cfe/trunk/test/SemaTemplate:126920

Modified: cfe/branches/release_34/include/clang/Basic/arm_neon.td
URL: http://llvm.org/viewvc/llvm-project/cfe/branches/release_34/include/clang/Basic/arm_neon.td?rev=196673&r1=196672&r2=196673&view=diff
==============================================================================
--- cfe/branches/release_34/include/clang/Basic/arm_neon.td (original)
+++ cfe/branches/release_34/include/clang/Basic/arm_neon.td Sat Dec  7 18:01:00 2013
@@ -652,18 +652,18 @@ def ABD  : SInst<"vabd", "ddd",  "csiUcU
 ////////////////////////////////////////////////////////////////////////////////
 // saturating absolute/negate
 // With additional Qd/Ql type.
-def ABS    : SInst<"vabs", "dd", "csifQcQsQiQfQlQd">;
-def QABS   : SInst<"vqabs", "dd", "csiQcQsQiQl">;
-def NEG    : SOpInst<"vneg", "dd", "csifQcQsQiQfQdQl", OP_NEG>;
-def QNEG   : SInst<"vqneg", "dd", "csiQcQsQiQl">;
+def ABS    : SInst<"vabs", "dd", "csilfQcQsQiQfQlQd">;
+def QABS   : SInst<"vqabs", "dd", "csilQcQsQiQl">;
+def NEG    : SOpInst<"vneg", "dd", "csilfQcQsQiQfQdQl", OP_NEG>;
+def QNEG   : SInst<"vqneg", "dd", "csilQcQsQiQl">;
 
 ////////////////////////////////////////////////////////////////////////////////
 // Signed Saturating Accumulated of Unsigned Value
-def SUQADD : SInst<"vuqadd", "ddd", "csiQcQsQiQl">;
+def SUQADD : SInst<"vuqadd", "ddd", "csilQcQsQiQl">;
 
 ////////////////////////////////////////////////////////////////////////////////
 // Unsigned Saturating Accumulated of Signed Value
-def USQADD : SInst<"vsqadd", "ddd", "UcUsUiQUcQUsQUiQUl">;
+def USQADD : SInst<"vsqadd", "ddd", "UcUsUiUlQUcQUsQUiQUl">;
 
 ////////////////////////////////////////////////////////////////////////////////
 // Reciprocal/Sqrt

Modified: cfe/branches/release_34/test/CodeGen/aarch64-neon-intrinsics.c
URL: http://llvm.org/viewvc/llvm-project/cfe/branches/release_34/test/CodeGen/aarch64-neon-intrinsics.c?rev=196673&r1=196672&r2=196673&view=diff
==============================================================================
--- cfe/branches/release_34/test/CodeGen/aarch64-neon-intrinsics.c (original)
+++ cfe/branches/release_34/test/CodeGen/aarch64-neon-intrinsics.c Sat Dec  7 18:01:00 2013
@@ -5616,6 +5616,12 @@ float64_t test_vcvtd_f64_s64(int64_t a)
   return vcvtd_f64_s64(a);
 }
 
+float64_t test_vcvt_f64_s64(int64_t a) {
+// CHECK: test_vcvt_f64_s64
+// CHECK: scvtf {{d[0-9]+}}, {{d[0-9]+}}
+  return vcvt_f64_s64(a);
+}
+
 float32_t test_vcvts_f32_u32(uint32_t a) {
 // CHECK: test_vcvts_f32_u32
 // CHECK: ucvtf {{s[0-9]+}}, {{s[0-9]+}}
@@ -5628,6 +5634,12 @@ float64_t test_vcvtd_f64_u64(uint64_t a)
   return vcvtd_f64_u64(a);
 }
 
+float64_t test_vcvt_f64_u64(uint64_t a) {
+// CHECK: test_vcvt_f64_u64
+// CHECK: ucvtf {{d[0-9]+}}, {{d[0-9]+}}
+  return vcvt_f64_u64(a);
+}
+
 float32_t test_vrecpes_f32(float32_t a) {
 // CHECK: test_vrecpes_f32
 // CHECK: frecpe {{s[0-9]+}}, {{s[0-9]+}}
@@ -11218,3 +11230,45 @@ float64_t test_vabdd_f64(float64_t a, fl
 // CHECK: fabd {{d[0-9]+}}, {{d[0-9]+}}, {{d[0-9]+}}
   return vabdd_f64(a, b);
 }
+
+float64_t test_vabd_f64(float64_t a, float64_t b) {
+// CHECK-LABEL: test_vabd_f64
+// CHECK: fabd {{d[0-9]+}}, {{d[0-9]+}}, {{d[0-9]+}}
+  return vabd_f64(a, b);
+}
+
+int64x1_t test_vuqadd_s64(int64x1_t a, uint64x1_t b) {
+  // CHECK-LABEL: test_vuqadd_s64
+  return vuqadd_s64(a, b);
+  // CHECK: suqadd d{{[0-9]+}}, d{{[0-9]+}}
+}
+
+uint64x1_t test_vsqadd_u64(uint64x1_t a, int64x1_t b) {
+  // CHECK-LABEL: test_vsqadd_u64
+  return vsqadd_u64(a, b);
+  // CHECK: usqadd d{{[0-9]+}}, d{{[0-9]+}}
+}
+
+int64x1_t test_vabs_s64(int64x1_t a) {
+  // CHECK-LABEL: test_vabs_s64
+  return vabs_s64(a);
+  // CHECK: abs d{{[0-9]+}}, d{{[0-9]+}}
+}
+
+int64x1_t test_vqabs_s64(int64x1_t a) {
+  // CHECK-LABEL: test_vqabs_s64
+  return vqabs_s64(a);
+  // CHECK: sqabs d{{[0-9]+}}, d{{[0-9]+}}
+}
+
+int64x1_t test_vqneg_s64(int64x1_t a) {
+  // CHECK-LABEL: test_vqneg_s64
+  return vqneg_s64(a);
+  // CHECK: sqneg d{{[0-9]+}}, d{{[0-9]+}}
+}
+
+int64x1_t test_vneg_s64(int64x1_t a) {
+  // CHECK-LABEL: test_vneg_s64
+  return vneg_s64(a);
+  // CHECK: neg d{{[0-9]+}}, d{{[0-9]+}}
+}





More information about the llvm-branch-commits mailing list