[llvm-branch-commits] [llvm-branch] r127437 - in /llvm/branches/release_29: ./ lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp

Eric Christopher echristo at apple.com
Thu Mar 10 16:12:43 PST 2011


Author: echristo
Date: Thu Mar 10 18:11:06 2011
New Revision: 127437

URL: http://llvm.org/viewvc/llvm-project?rev=127437&view=rev
Log:
Merge r127263 from mainline, fixes PR9427 for 2.9.

Modified:
    llvm/branches/release_29/   (props changed)
    llvm/branches/release_29/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
    llvm/branches/release_29/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp

Propchange: llvm/branches/release_29/
------------------------------------------------------------------------------
--- svn:mergeinfo (original)
+++ svn:mergeinfo Thu Mar 10 18:11:06 2011
@@ -1,2 +1,2 @@
 /llvm/branches/Apple/Pertwee:110850,110961
-/llvm/trunk:127264,127298,127350-127351
+/llvm/trunk:127263-127264,127298,127350-127351

Modified: llvm/branches/release_29/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_29/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp?rev=127437&r1=127436&r2=127437&view=diff
==============================================================================
--- llvm/branches/release_29/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp (original)
+++ llvm/branches/release_29/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp Thu Mar 10 18:11:06 2011
@@ -1785,7 +1785,7 @@
   }
   const SDNode *N = SU->getNode();
 
-  if (!N->isMachineOpcode() || !SU->NumSuccs)
+  if (!N || !N->isMachineOpcode() || !SU->NumSuccs)
     return PDiff;
 
   unsigned NumDefs = TII->get(N->getMachineOpcode()).getNumDefs();
@@ -1804,6 +1804,9 @@
   if (!TracksRegPressure)
     return;
 
+  if (!SU->getNode())
+    return;
+  
   for (SUnit::pred_iterator I = SU->Preds.begin(), E = SU->Preds.end();
        I != E; ++I) {
     if (I->isCtrl())
@@ -1870,6 +1873,8 @@
     return;
 
   const SDNode *N = SU->getNode();
+  if (!N) return;
+  
   if (!N->isMachineOpcode()) {
     if (N->getOpcode() != ISD::CopyToReg)
       return;

Modified: llvm/branches/release_29/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_29/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp?rev=127437&r1=127436&r2=127437&view=diff
==============================================================================
--- llvm/branches/release_29/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp (original)
+++ llvm/branches/release_29/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp Thu Mar 10 18:11:06 2011
@@ -446,6 +446,10 @@
 
 // Initialize NumNodeDefs for the current Node's opcode.
 void ScheduleDAGSDNodes::RegDefIter::InitNodeNumDefs() {
+  // Check for phys reg copy.
+  if (!Node)
+    return;
+
   if (!Node->isMachineOpcode()) {
     if (Node->getOpcode() == ISD::CopyFromReg)
       NodeNumDefs = 1;





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