[llvm-branch-commits] [llvm-branch] r119233 - in /llvm/branches/Apple/whitney: lib/Target/X86/AsmParser/X86AsmParser.cpp lib/Target/X86/X86InstrInfo.td test/MC/X86/x86-64.s utils/TableGen/AsmMatcherEmitter.cpp utils/TableGen/CodeGenInstruction.cpp utils/TableGen/CodeGenInstruction.h
Daniel Dunbar
daniel at zuster.org
Mon Nov 15 13:44:57 PST 2010
Author: ddunbar
Date: Mon Nov 15 15:44:57 2010
New Revision: 119233
URL: http://llvm.org/viewvc/llvm-project?rev=119233&view=rev
Log:
Merge r117901:
--
Author: Chris Lattner <clattner at apple.com>
Date: Mon Nov 1 05:34:34 2010 +0000
Implement enough of the missing instalias support to get
aliases installed and working. They now work when the
matched pattern and the result instruction have exactly
the same operand list.
This is now enough for us to define proper aliases for
movzx and movsx, implementing rdar://8017633 and PR7459.
Note that we do not accept instructions like:
movzx 0(%rsp), %rsi
GAS accepts this instruction, but it doesn't make any
sense because we don't know the size of the memory
operand. It could be 8/16/32 bits.
Modified:
llvm/branches/Apple/whitney/lib/Target/X86/AsmParser/X86AsmParser.cpp
llvm/branches/Apple/whitney/lib/Target/X86/X86InstrInfo.td
llvm/branches/Apple/whitney/test/MC/X86/x86-64.s
llvm/branches/Apple/whitney/utils/TableGen/AsmMatcherEmitter.cpp
llvm/branches/Apple/whitney/utils/TableGen/CodeGenInstruction.cpp
llvm/branches/Apple/whitney/utils/TableGen/CodeGenInstruction.h
Modified: llvm/branches/Apple/whitney/lib/Target/X86/AsmParser/X86AsmParser.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/whitney/lib/Target/X86/AsmParser/X86AsmParser.cpp?rev=119233&r1=119232&r2=119233&view=diff
==============================================================================
--- llvm/branches/Apple/whitney/lib/Target/X86/AsmParser/X86AsmParser.cpp (original)
+++ llvm/branches/Apple/whitney/lib/Target/X86/AsmParser/X86AsmParser.cpp Mon Nov 15 15:44:57 2010
@@ -620,9 +620,6 @@
bool X86ATTAsmParser::
ParseInstruction(StringRef Name, SMLoc NameLoc,
SmallVectorImpl<MCParsedAsmOperand*> &Operands) {
- // FIXME: This is not correct at all.
- if (Name == "movzx") Name = "movzb";
-
StringRef PatchedName = Name;
// FIXME: Hack to recognize cmp<comparison code>{ss,sd,ps,pd}.
Modified: llvm/branches/Apple/whitney/lib/Target/X86/X86InstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/whitney/lib/Target/X86/X86InstrInfo.td?rev=119233&r1=119232&r2=119233&view=diff
==============================================================================
--- llvm/branches/Apple/whitney/lib/Target/X86/X86InstrInfo.td (original)
+++ llvm/branches/Apple/whitney/lib/Target/X86/X86InstrInfo.td Mon Nov 15 15:44:57 2010
@@ -1259,6 +1259,10 @@
//===----------------------------------------------------------------------===//
// movsx aliases
+def : InstAlias<(outs GR16:$dst), (ins GR8 :$src),
+ "movsx $src, $dst",
+ (MOVSX16rr8W GR16:$dst, GR8:$src)>;
+
def : InstAlias<(outs GR32:$dst), (ins GR8 :$src),
"movsx $src, $dst",
(MOVSX32rr8 GR32:$dst, GR8:$src)>;
@@ -1266,6 +1270,35 @@
"movsx $src, $dst",
(MOVSX32rr16 GR32:$dst, GR16:$src)>;
+def : InstAlias<(outs GR64:$dst), (ins GR8 :$src),
+ "movsx $src, $dst",
+ (MOVSX64rr8 GR64:$dst, GR8:$src)>;
+def : InstAlias<(outs GR64:$dst), (ins GR16:$src),
+ "movsx $src, $dst",
+ (MOVSX64rr16 GR64:$dst, GR16:$src)>;
+def : InstAlias<(outs GR64:$dst), (ins GR32:$src),
+ "movsx $src, $dst",
+ (MOVSX64rr32 GR64:$dst, GR32:$src)>;
+
+// movzx aliases
+def : InstAlias<(outs GR16:$dst), (ins GR8 :$src),
+ "movzx $src, $dst",
+ (MOVZX16rr8W GR16:$dst, GR8:$src)>;
+
+def : InstAlias<(outs GR32:$dst), (ins GR8 :$src),
+ "movzx $src, $dst",
+ (MOVZX32rr8 GR32:$dst, GR8:$src)>;
+def : InstAlias<(outs GR32:$dst), (ins GR16:$src),
+ "movzx $src, $dst",
+ (MOVZX32rr16 GR32:$dst, GR16:$src)>;
+
+def : InstAlias<(outs GR64:$dst), (ins GR8 :$src),
+ "movzx $src, $dst",
+ (MOVZX64rr8_Q GR64:$dst, GR8:$src)>;
+def : InstAlias<(outs GR64:$dst), (ins GR16:$src),
+ "movzx $src, $dst",
+ (MOVZX64rr16_Q GR64:$dst, GR16:$src)>;
+// Note: No GR32->GR64 movzx form.
// TODO: lidtl/lidtq can be opcode aliases, perhaps others.
Modified: llvm/branches/Apple/whitney/test/MC/X86/x86-64.s
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/whitney/test/MC/X86/x86-64.s?rev=119233&r1=119232&r2=119233&view=diff
==============================================================================
--- llvm/branches/Apple/whitney/test/MC/X86/x86-64.s (original)
+++ llvm/branches/Apple/whitney/test/MC/X86/x86-64.s Mon Nov 15 15:44:57 2010
@@ -648,9 +648,51 @@
// CHECK: encoding: [0x48,0x0f,0xb6,0xf0]
movzx %al, %rsi
-// CHECK: movzbq (%rsp), %rsi
-// CHECK: encoding: [0x48,0x0f,0xb6,0x34,0x24]
- movzx 0(%rsp), %rsi
+// CHECK: movsbw %al, %ax
+// CHECK: encoding: [0x66,0x0f,0xbe,0xc0]
+movsx %al, %ax
+
+// CHECK: movsbl %al, %eax
+// CHECK: encoding: [0x0f,0xbe,0xc0]
+movsx %al, %eax
+
+// CHECK: movswl %ax, %eax
+// CHECK: encoding: [0x0f,0xbf,0xc0]
+movsx %ax, %eax
+
+// CHECK: movsbq %bl, %rax
+// CHECK: encoding: [0x48,0x0f,0xbe,0xc3]
+movsx %bl, %rax
+
+// CHECK: movswq %cx, %rax
+// CHECK: encoding: [0x48,0x0f,0xbf,0xc1]
+movsx %cx, %rax
+
+// CHECK: movslq %edi, %rax
+// CHECK: encoding: [0x48,0x63,0xc7]
+movsx %edi, %rax
+
+// CHECK: movzbw %al, %ax
+// CHECK: encoding: [0x66,0x0f,0xb6,0xc0]
+movzx %al, %ax
+
+// CHECK: movzbl %al, %eax
+// CHECK: encoding: [0x0f,0xb6,0xc0]
+movzx %al, %eax
+
+// CHECK: movzwl %ax, %eax
+// CHECK: encoding: [0x0f,0xb7,0xc0]
+movzx %ax, %eax
+
+// CHECK: movzbq %bl, %rax
+// CHECK: encoding: [0x48,0x0f,0xb6,0xc3]
+movzx %bl, %rax
+
+// CHECK: movzwq %cx, %rax
+// CHECK: encoding: [0x48,0x0f,0xb7,0xc1]
+movzx %cx, %rax
+
+
// rdar://7873482
Modified: llvm/branches/Apple/whitney/utils/TableGen/AsmMatcherEmitter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/whitney/utils/TableGen/AsmMatcherEmitter.cpp?rev=119233&r1=119232&r2=119233&view=diff
==============================================================================
--- llvm/branches/Apple/whitney/utils/TableGen/AsmMatcherEmitter.cpp (original)
+++ llvm/branches/Apple/whitney/utils/TableGen/AsmMatcherEmitter.cpp Mon Nov 15 15:44:57 2010
@@ -357,12 +357,18 @@
MatchableInfo(const CodeGenInstruction &CGI)
: TheDef(CGI.TheDef), OperandList(CGI.Operands), AsmString(CGI.AsmString) {
+ InstrName = TheDef->getName();
}
MatchableInfo(const CodeGenInstAlias *Alias)
: TheDef(Alias->TheDef), OperandList(Alias->Operands),
AsmString(Alias->AsmString) {
-
+
+ // FIXME: Huge hack.
+ DefInit *DI = dynamic_cast<DefInit*>(Alias->Result->getOperator());
+ assert(DI);
+
+ InstrName = DI->getDef()->getName();
}
void Initialize(const AsmMatcherInfo &Info,
@@ -551,8 +557,6 @@
void MatchableInfo::Initialize(const AsmMatcherInfo &Info,
SmallPtrSet<Record*, 16> &SingletonRegisters) {
- InstrName = TheDef->getName();
-
// TODO: Eventually support asmparser for Variant != 0.
AsmString = CodeGenInstruction::FlattenAsmStringVariants(AsmString, 0);
@@ -974,7 +978,7 @@
// Validate the alias definitions.
II->Validate(CommentDelimiter, false);
- //Matchables.push_back(II.take());
+ Matchables.push_back(II.take());
}
// Build info for the register classes.
Modified: llvm/branches/Apple/whitney/utils/TableGen/CodeGenInstruction.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/whitney/utils/TableGen/CodeGenInstruction.cpp?rev=119233&r1=119232&r2=119233&view=diff
==============================================================================
--- llvm/branches/Apple/whitney/utils/TableGen/CodeGenInstruction.cpp (original)
+++ llvm/branches/Apple/whitney/utils/TableGen/CodeGenInstruction.cpp Mon Nov 15 15:44:57 2010
@@ -110,6 +110,12 @@
MIOperandNo, NumOps, MIOpInfo));
MIOperandNo += NumOps;
}
+
+
+ // Make sure the constraints list for each operand is large enough to hold
+ // constraint info, even if none is present.
+ for (unsigned i = 0, e = OperandList.size(); i != e; ++i)
+ OperandList[i].Constraints.resize(OperandList[i].MINumOperands);
}
@@ -235,11 +241,6 @@
}
static void ParseConstraints(const std::string &CStr, CGIOperandList &Ops) {
- // Make sure the constraints list for each operand is large enough to hold
- // constraint info, even if none is present.
- for (unsigned i = 0, e = Ops.size(); i != e; ++i)
- Ops[i].Constraints.resize(Ops[i].MINumOperands);
-
if (CStr.empty()) return;
const std::string delims(",");
@@ -390,5 +391,5 @@
CodeGenInstAlias::CodeGenInstAlias(Record *R) : TheDef(R), Operands(R) {
AsmString = R->getValueAsString("AsmString");
-
+ Result = R->getValueAsDag("ResultInst");
}
Modified: llvm/branches/Apple/whitney/utils/TableGen/CodeGenInstruction.h
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/whitney/utils/TableGen/CodeGenInstruction.h?rev=119233&r1=119232&r2=119233&view=diff
==============================================================================
--- llvm/branches/Apple/whitney/utils/TableGen/CodeGenInstruction.h (original)
+++ llvm/branches/Apple/whitney/utils/TableGen/CodeGenInstruction.h Mon Nov 15 15:44:57 2010
@@ -250,6 +250,9 @@
/// to the alias.
CGIOperandList Operands;
+ /// Result - The result instruction.
+ DagInit *Result;
+
CodeGenInstAlias(Record *R);
};
}
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