[llvm-branch-commits] [llvm-branch] r99631 - in /llvm/branches/Apple/Morbo: ./ lib/Target/ARM/ARMLoadStoreOptimizer.cpp

[Jim Grosbach]

Author: grosbach
Date: Fri Mar 26 13:45:17 2010
New Revision: 99631

URL: http://llvm.org/viewvc/llvm-project?rev=99631&view=rev
Log:
merge 99630

Modified:
    llvm/branches/Apple/Morbo/   (props changed)
    llvm/branches/Apple/Morbo/lib/Target/ARM/ARMLoadStoreOptimizer.cpp

Propchange: llvm/branches/Apple/Morbo/
------------------------------------------------------------------------------
--- svn:mergeinfo (original)
+++ svn:mergeinfo Fri Mar 26 13:45:17 2010
@@ -1,2 +1,2 @@
 /llvm/branches/Apple/Hermes:96832,96835,96858,96870,96876,96879
-/llvm/trunk:98602,98604,98612,98615-98616,98675,98686,98743-98744,98773,98778,98780,98810,98835,98839,98845,98855,98862,98881,98920,98977,99032-99033,99043,99223,99263,99282-99284,99306,99319-99321,99324,99336,99378,99418,99423,99429,99455,99463,99465,99469,99484,99490,99493-99494,99537,99544,99570,99575
+/llvm/trunk:98602,98604,98612,98615-98616,98675,98686,98743-98744,98773,98778,98780,98810,98835,98839,98845,98855,98862,98881,98920,98977,99032-99033,99043,99223,99263,99282-99284,99306,99319-99321,99324,99336,99378,99418,99423,99429,99455,99463,99465,99469,99484,99490,99493-99494,99537,99544,99570,99575,99630

Modified: llvm/branches/Apple/Morbo/lib/Target/ARM/ARMLoadStoreOptimizer.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Morbo/lib/Target/ARM/ARMLoadStoreOptimizer.cpp?rev=99631&r1=99630&r2=99631&view=diff
==============================================================================
--- llvm/branches/Apple/Morbo/lib/Target/ARM/ARMLoadStoreOptimizer.cpp (original)
+++ llvm/branches/Apple/Morbo/lib/Target/ARM/ARMLoadStoreOptimizer.cpp Fri Mar 26 13:45:17 2010
@@ -341,6 +341,7 @@
   unsigned PReg = PMO.getReg();
   unsigned PRegNum = PMO.isUndef() ? UINT_MAX
     : ARMRegisterInfo::getRegisterNumbering(PReg);
+  unsigned Count = 1;
 
   for (unsigned i = SIndex+1, e = MemOps.size(); i != e; ++i) {
     int NewOffset = MemOps[i].Offset;
@@ -350,11 +351,14 @@
       : ARMRegisterInfo::getRegisterNumbering(Reg);
     // AM4 - register numbers in ascending order.
     // AM5 - consecutive register numbers in ascending order.
+    //       Can only do up to 16 double-word registers per insn.
     if (Reg != ARM::SP &&
         NewOffset == Offset + (int)Size &&
-        ((isAM4 && RegNum > PRegNum) || RegNum == PRegNum+1)) {
+        ((isAM4 && RegNum > PRegNum)
+         || ((Size < 8 || Count < 16) && RegNum == PRegNum+1))) {
       Offset += Size;
       PRegNum = RegNum;
+      ++Count;
     } else {
       // Can't merge this in. Try merge the earlier ones first.
       MergeOpsUpdate(MBB, MemOps, SIndex, i, insertAfter, SOffset,