[llvm-branch-commits] [llvm-branch] r106675 - in /llvm/branches/Apple/Troughton: lib/Target/ARM/ARMISelLowering.cpp test/CodeGen/ARM/ifcvt6-tc.ll test/CodeGen/ARM/insn-sched1-tc.ll test/CodeGen/ARM/ldm-tc.ll
Dale Johannesen
dalej at apple.com
Wed Jun 23 13:31:07 PDT 2010
Author: johannes
Date: Wed Jun 23 15:31:06 2010
New Revision: 106675
URL: http://llvm.org/viewvc/llvm-project?rev=106675&view=rev
Log:
--- Merging r106662 into '.':
U lib/Target/ARM/ARMISelLowering.cpp
--- Merging r106663 into '.':
D test/CodeGen/ARM/insn-sched1-tc.ll
D test/CodeGen/ARM/ldm-tc.ll
D test/CodeGen/ARM/ifcvt6.ll
--- Merging r106664 into 'test/CodeGen/ARM/ifcvt6.ll':
A test/CodeGen/ARM/ifcvt6.ll
--- Merging r106664 into '.':
D test/CodeGen/ARM/ifcvt6-tc.ll
Removed:
llvm/branches/Apple/Troughton/test/CodeGen/ARM/ifcvt6-tc.ll
llvm/branches/Apple/Troughton/test/CodeGen/ARM/insn-sched1-tc.ll
llvm/branches/Apple/Troughton/test/CodeGen/ARM/ldm-tc.ll
Modified:
llvm/branches/Apple/Troughton/lib/Target/ARM/ARMISelLowering.cpp
Modified: llvm/branches/Apple/Troughton/lib/Target/ARM/ARMISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Troughton/lib/Target/ARM/ARMISelLowering.cpp?rev=106675&r1=106674&r2=106675&view=diff
==============================================================================
--- llvm/branches/Apple/Troughton/lib/Target/ARM/ARMISelLowering.cpp (original)
+++ llvm/branches/Apple/Troughton/lib/Target/ARM/ARMISelLowering.cpp Wed Jun 23 15:31:06 2010
@@ -1408,29 +1408,26 @@
if (isCalleeStructRet || isCallerStructRet)
return false;
- // FIXME: Completely disable sibcal for Thumb1 since Thumb1RegisterInfo::
+ // FIXME: Completely disable sibcall for Thumb1 since Thumb1RegisterInfo::
// emitEpilogue is not ready for them.
if (Subtarget->isThumb1Only())
return false;
+ // For the moment, we can only do this to functions defined in this
+ // compilation, or to indirect calls. A Thumb B to an ARM function,
+ // or vice versa, is not easily fixed up in the linker unlike BL.
+ // (We could do this by loading the address of the callee into a register;
+ // that is an extra instruction over the direct call and burns a register
+ // as well, so is not likely to be a win.)
if (isa<ExternalSymbolSDNode>(Callee))
return false;
if (GlobalAddressSDNode *G = dyn_cast<GlobalAddressSDNode>(Callee)) {
- if (Subtarget->isThumb1Only())
+ const GlobalValue *GV = G->getGlobal();
+ if (GV->isDeclaration() || GV->isWeakForLinker())
return false;
-
- // On Thumb, for the moment, we can only do this to functions defined in this
- // compilation, or to indirect calls. A Thumb B to an ARM function is not
- // easily fixed up in the linker, unlike BL.
- if (Subtarget->isThumb()) {
- const GlobalValue *GV = G->getGlobal();
- if (GV->isDeclaration() || GV->isWeakForLinker())
- return false;
- }
}
-
// If the calling conventions do not match, then we'd better make sure the
// results are returned in the same way as what the caller expects.
if (!CCMatch) {
Removed: llvm/branches/Apple/Troughton/test/CodeGen/ARM/ifcvt6-tc.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Troughton/test/CodeGen/ARM/ifcvt6-tc.ll?rev=106674&view=auto
==============================================================================
--- llvm/branches/Apple/Troughton/test/CodeGen/ARM/ifcvt6-tc.ll (original)
+++ llvm/branches/Apple/Troughton/test/CodeGen/ARM/ifcvt6-tc.ll (removed)
@@ -1,23 +0,0 @@
-; RUN: llc < %s -march=arm -mtriple=arm-apple-darwin | \
-; RUN: grep cmpne | count 1
-; RUN: llc < %s -march=arm -mtriple=arm-apple-darwin | \
-; RUN: grep bls | count 1
-; Here, tail call wins over eliminating branches. It is 1 fewer instruction
-; and removes all stack accesses, so seems like a win.
-
-define void @foo(i32 %X, i32 %Y) {
-entry:
- %tmp1 = icmp ult i32 %X, 4 ; <i1> [#uses=1]
- %tmp4 = icmp eq i32 %Y, 0 ; <i1> [#uses=1]
- %tmp7 = or i1 %tmp4, %tmp1 ; <i1> [#uses=1]
- br i1 %tmp7, label %cond_true, label %UnifiedReturnBlock
-
-cond_true: ; preds = %entry
- %tmp10 = tail call i32 (...)* @bar( ) ; <i32> [#uses=0]
- ret void
-
-UnifiedReturnBlock: ; preds = %entry
- ret void
-}
-
-declare i32 @bar(...)
Removed: llvm/branches/Apple/Troughton/test/CodeGen/ARM/insn-sched1-tc.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Troughton/test/CodeGen/ARM/insn-sched1-tc.ll?rev=106674&view=auto
==============================================================================
--- llvm/branches/Apple/Troughton/test/CodeGen/ARM/insn-sched1-tc.ll (original)
+++ llvm/branches/Apple/Troughton/test/CodeGen/ARM/insn-sched1-tc.ll (removed)
@@ -1,11 +0,0 @@
-; RUN: llc < %s -march=arm -mattr=+v6
-; RUN: llc < %s -mtriple=arm-apple-darwin -mattr=+v6 |\
-; RUN: grep mov | count 2
-
-define i32 @test(i32 %x) {
- %tmp = trunc i32 %x to i16 ; <i16> [#uses=1]
- %tmp2 = tail call i32 @f( i32 1, i16 %tmp ) ; <i32> [#uses=1]
- ret i32 %tmp2
-}
-
-declare i32 @f(i32, i16)
Removed: llvm/branches/Apple/Troughton/test/CodeGen/ARM/ldm-tc.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Troughton/test/CodeGen/ARM/ldm-tc.ll?rev=106674&view=auto
==============================================================================
--- llvm/branches/Apple/Troughton/test/CodeGen/ARM/ldm-tc.ll (original)
+++ llvm/branches/Apple/Troughton/test/CodeGen/ARM/ldm-tc.ll (removed)
@@ -1,37 +0,0 @@
-; RUN: llc < %s -mtriple=arm-apple-darwin | FileCheck %s
-
- at X = external global [0 x i32] ; <[0 x i32]*> [#uses=5]
-
-define i32 @t1() {
-; CHECK: t1:
-; CHECK: ldmia
- %tmp = load i32* getelementptr ([0 x i32]* @X, i32 0, i32 0) ; <i32> [#uses=1]
- %tmp3 = load i32* getelementptr ([0 x i32]* @X, i32 0, i32 1) ; <i32> [#uses=1]
- %tmp4 = tail call i32 @f1( i32 %tmp, i32 %tmp3 ) ; <i32> [#uses=1]
- ret i32 %tmp4
-}
-
-define i32 @t2() {
-; CHECK: t2:
-; CHECK: ldmia
- %tmp = load i32* getelementptr ([0 x i32]* @X, i32 0, i32 2) ; <i32> [#uses=1]
- %tmp3 = load i32* getelementptr ([0 x i32]* @X, i32 0, i32 3) ; <i32> [#uses=1]
- %tmp5 = load i32* getelementptr ([0 x i32]* @X, i32 0, i32 4) ; <i32> [#uses=1]
- %tmp6 = tail call i32 @f2( i32 %tmp, i32 %tmp3, i32 %tmp5 ) ; <i32> [#uses=1]
- ret i32 %tmp6
-}
-
-define i32 @t3() {
-; CHECK: t3:
-; CHECK: ldmib
-; CHECK: b.w _f2 @ TAILCALL
- %tmp = load i32* getelementptr ([0 x i32]* @X, i32 0, i32 1) ; <i32> [#uses=1]
- %tmp3 = load i32* getelementptr ([0 x i32]* @X, i32 0, i32 2) ; <i32> [#uses=1]
- %tmp5 = load i32* getelementptr ([0 x i32]* @X, i32 0, i32 3) ; <i32> [#uses=1]
- %tmp6 = tail call i32 @f2( i32 %tmp, i32 %tmp3, i32 %tmp5 ) ; <i32> [#uses=1]
- ret i32 %tmp6
-}
-
-declare i32 @f1(i32, i32)
-
-declare i32 @f2(i32, i32, i32)
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