[llvm-branch-commits] [llvm-branch] r106313 - in /llvm/branches/Apple/Troughton: ./ lib/Target/ARM/ARMBaseRegisterInfo.cpp test/CodeGen/ARM/crash-O0.ll
Jakob Stoklund Olesen
stoklund at 2pi.dk
Fri Jun 18 14:00:36 PDT 2010
Author: stoklund
Date: Fri Jun 18 16:00:36 2010
New Revision: 106313
URL: http://llvm.org/viewvc/llvm-project?rev=106313&view=rev
Log:
$ svn merge -c 106312 https://llvm.org/svn/llvm-project/llvm/trunk
--- Merging r106312 into '.':
U test/CodeGen/ARM/crash-O0.ll
U lib/Target/ARM/ARMBaseRegisterInfo.cpp
Modified:
llvm/branches/Apple/Troughton/ (props changed)
llvm/branches/Apple/Troughton/lib/Target/ARM/ARMBaseRegisterInfo.cpp
llvm/branches/Apple/Troughton/test/CodeGen/ARM/crash-O0.ll
Propchange: llvm/branches/Apple/Troughton/
------------------------------------------------------------------------------
--- svn:mergeinfo (original)
+++ svn:mergeinfo Fri Jun 18 16:00:36 2010
@@ -1 +1 @@
-/llvm/trunk:105358,105361,105369,105372,105399,105427,105437,105439,105441,105470,105473,105481,105498,105541,105554,105557,105585-105586,105634,105653,105665,105669,105677,105745,105749,105774-105775,105836,105845,105862,105938,105959,105965,105969,105982,105990-105991,105997-105998,106004,106015,106021,106024,106027,106030,106051,106057,106146,106149,106152,106155,106157,106164,106199,106203-106204,106227,106229,106289,106292
+/llvm/trunk:105358,105361,105369,105372,105399,105427,105437,105439,105441,105470,105473,105481,105498,105541,105554,105557,105585-105586,105634,105653,105665,105669,105677,105745,105749,105774-105775,105836,105845,105862,105938,105959,105965,105969,105982,105990-105991,105997-105998,106004,106015,106021,106024,106027,106030,106051,106057,106146,106149,106152,106155,106157,106164,106199,106203-106204,106227,106229,106289,106292,106312
Modified: llvm/branches/Apple/Troughton/lib/Target/ARM/ARMBaseRegisterInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Troughton/lib/Target/ARM/ARMBaseRegisterInfo.cpp?rev=106313&r1=106312&r2=106313&view=diff
==============================================================================
--- llvm/branches/Apple/Troughton/lib/Target/ARM/ARMBaseRegisterInfo.cpp (original)
+++ llvm/branches/Apple/Troughton/lib/Target/ARM/ARMBaseRegisterInfo.cpp Fri Jun 18 16:00:36 2010
@@ -674,6 +674,15 @@
I != E; ++I) {
for (unsigned i = 0, e = I->getNumOperands(); i != e; ++i) {
if (!I->getOperand(i).isFI()) continue;
+
+ // When using ADDri to get the address of a stack object, 255 is the
+ // largest offset guaranteed to fit in the immediate offset.
+ if (I->getOpcode() == ARM::ADDri) {
+ Limit = std::min(Limit, (1U << 8) - 1);
+ break;
+ }
+
+ // Otherwise check the addressing mode.
switch (I->getDesc().TSFlags & ARMII::AddrModeMask) {
case ARMII::AddrMode3:
case ARMII::AddrModeT2_i8:
Modified: llvm/branches/Apple/Troughton/test/CodeGen/ARM/crash-O0.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Troughton/test/CodeGen/ARM/crash-O0.ll?rev=106313&r1=106312&r2=106313&view=diff
==============================================================================
--- llvm/branches/Apple/Troughton/test/CodeGen/ARM/crash-O0.ll (original)
+++ llvm/branches/Apple/Troughton/test/CodeGen/ARM/crash-O0.ll Fri Jun 18 16:00:36 2010
@@ -10,3 +10,19 @@
%asmtmp = call %struct0 asm sideeffect "...", "=&r,=&r,r,Ir,r,~{cc},~{memory}"(i32* undef, i32 undef, i32 1) nounwind ; <%0> [#uses=0]
unreachable
}
+
+ at .str523 = private constant [256 x i8] c"<Unknown>\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00", align 4 ; <[256 x i8]*> [#uses=1]
+declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture, i32, i32, i1) nounwind
+
+; This function uses the scavenger for an ADDri instruction.
+; ARMBaseRegisterInfo::estimateRSStackSizeLimit must return a 255 limit.
+define arm_apcscc void @scavence_ADDri() nounwind {
+entry:
+ %letter = alloca i8 ; <i8*> [#uses=0]
+ %prodvers = alloca [256 x i8] ; <[256 x i8]*> [#uses=1]
+ %buildver = alloca [256 x i8] ; <[256 x i8]*> [#uses=0]
+ call void @llvm.memcpy.p0i8.p0i8.i32(i8* undef, i8* getelementptr inbounds ([256 x i8]* @.str523, i32 0, i32 0), i32 256, i32 1, i1 false)
+ %prodvers2 = bitcast [256 x i8]* %prodvers to i8* ; <i8*> [#uses=1]
+ call void @llvm.memcpy.p0i8.p0i8.i32(i8* %prodvers2, i8* getelementptr inbounds ([256 x i8]* @.str523, i32 0, i32 0), i32 256, i32 1, i1 false)
+ unreachable
+}
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