[llvm-branch-commits] [llvm-branch] r109115 - /llvm/branches/Apple/williamson/lib/Target/ARM/ARMConstantIslandPass.cpp

Daniel Dunbar daniel at zuster.org
Thu Jul 22 09:31:02 PDT 2010


Author: ddunbar
Date: Thu Jul 22 11:31:01 2010
New Revision: 109115

URL: http://llvm.org/viewvc/llvm-project?rev=109115&view=rev
Log:
Merge r109076:
--
Author: Evan Cheng <evan.cheng at apple.com>
Date:   Thu Jul 22 02:09:47 2010 +0000

    Fix constant island pass's handling of tBR_JTr. The offset of the instruction does not have to be 4-byte aligned. Rather, it's the offset + 2 that must be aligned since the instruction expands into:
            mov     pc, r1
            .align  2
    LJTI0_0_0:
            .long    LBB0_14

    This fixes rdar://8213383. No test case since it's not possible to come up with a suitable small one.

Modified:
    llvm/branches/Apple/williamson/lib/Target/ARM/ARMConstantIslandPass.cpp

Modified: llvm/branches/Apple/williamson/lib/Target/ARM/ARMConstantIslandPass.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/williamson/lib/Target/ARM/ARMConstantIslandPass.cpp?rev=109115&r1=109114&r2=109115&view=diff
==============================================================================
--- llvm/branches/Apple/williamson/lib/Target/ARM/ARMConstantIslandPass.cpp (original)
+++ llvm/branches/Apple/williamson/lib/Target/ARM/ARMConstantIslandPass.cpp Thu Jul 22 11:31:01 2010
@@ -366,6 +366,8 @@
   if (isThumb && !HasFarJump && AFI->isLRSpilledForFarJump())
     MadeChange |= UndoLRSpillRestore();
 
+  DEBUG(errs() << '\n'; dumpBBs());
+
   BBSizes.clear();
   BBOffsets.clear();
   WaterList.clear();
@@ -509,8 +511,11 @@
         case ARM::tBR_JTr:
           // A Thumb1 table jump may involve padding; for the offsets to
           // be right, functions containing these must be 4-byte aligned.
+          // tBR_JTr expands to a mov pc followed by .align 2 and then the jump
+          // table entries. So this code checks whether offset of tBR_JTr + 2
+          // is aligned.
           MF.EnsureAlignment(2U);
-          if ((Offset+MBBSize)%4 != 0 || HasInlineAsm)
+          if ((Offset+MBBSize+2)%4 != 0 || HasInlineAsm)
             // FIXME: Add a pseudo ALIGN instruction instead.
             MBBSize += 2;           // padding
           continue;   // Does not get an entry in ImmBranches
@@ -915,9 +920,12 @@
       }
       // Thumb1 jump tables require padding.  They should be at the end;
       // following unconditional branches are removed by AnalyzeBranch.
+      // tBR_JTr expands to a mov pc followed by .align 2 and then the jump
+      // table entries. So this code checks whether offset of tBR_JTr + 2
+      // is aligned.
       MachineInstr *ThumbJTMI = prior(MBB->end());
       if (ThumbJTMI->getOpcode() == ARM::tBR_JTr) {
-        unsigned NewMIOffset = GetOffsetOf(ThumbJTMI);
+        unsigned NewMIOffset = GetOffsetOf(ThumbJTMI) + 2;
         unsigned OldMIOffset = NewMIOffset - delta;
         if ((OldMIOffset%4) == 0 && (NewMIOffset%4) != 0) {
           // remove existing padding





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