[llvm-branch-commits] [llvm-branch] r97050 - in /llvm/branches/Apple/Hermes: include/llvm/Target/TargetRegisterInfo.h lib/CodeGen/PrologEpilogInserter.cpp lib/Target/ARM/ARMBaseRegisterInfo.cpp lib/Target/ARM/ARMBaseRegisterInfo.h lib/Target/ARM/ARMISelLowering.cpp lib/Target/ARM/ARMInstrInfo.td lib/Target/ARM/ARMInstrThumb.td lib/Target/ARM/Thumb1RegisterInfo.cpp test/CodeGen/Thumb2/ldr-str-imm12.ll

Jim Grosbach grosbach at apple.com
Wed Feb 24 11:43:01 PST 2010


Author: grosbach
Date: Wed Feb 24 13:43:01 2010
New Revision: 97050

URL: http://llvm.org/viewvc/llvm-project?rev=97050&view=rev
Log:
merge 96817 96818 96822 96954 97012 97013 97022

Modified:
    llvm/branches/Apple/Hermes/include/llvm/Target/TargetRegisterInfo.h
    llvm/branches/Apple/Hermes/lib/CodeGen/PrologEpilogInserter.cpp
    llvm/branches/Apple/Hermes/lib/Target/ARM/ARMBaseRegisterInfo.cpp
    llvm/branches/Apple/Hermes/lib/Target/ARM/ARMBaseRegisterInfo.h
    llvm/branches/Apple/Hermes/lib/Target/ARM/ARMISelLowering.cpp
    llvm/branches/Apple/Hermes/lib/Target/ARM/ARMInstrInfo.td
    llvm/branches/Apple/Hermes/lib/Target/ARM/ARMInstrThumb.td
    llvm/branches/Apple/Hermes/lib/Target/ARM/Thumb1RegisterInfo.cpp
    llvm/branches/Apple/Hermes/test/CodeGen/Thumb2/ldr-str-imm12.ll

Modified: llvm/branches/Apple/Hermes/include/llvm/Target/TargetRegisterInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Hermes/include/llvm/Target/TargetRegisterInfo.h?rev=97050&r1=97049&r2=97050&view=diff
==============================================================================
--- llvm/branches/Apple/Hermes/include/llvm/Target/TargetRegisterInfo.h (original)
+++ llvm/branches/Apple/Hermes/include/llvm/Target/TargetRegisterInfo.h Wed Feb 24 13:43:01 2010
@@ -587,6 +587,17 @@
     return !hasFP(MF);
   }
 
+  /// canSimplifyCallFramePseudos - When possible, it's best to simplify the
+  /// call frame pseudo ops before doing frame index elimination. This is
+  /// possible only when frame index references between the pseudos won't
+  /// need adjusted for the call frame adjustments. Normally, that's true
+  /// if the function has a reserved call frame or a frame pointer. Some
+  /// targets (Thumb2, for example) may have more complicated criteria,
+  /// however, and can override this behavior.
+  virtual bool canSimplifyCallFramePseudos(MachineFunction &MF) const {
+    return hasReservedCallFrame(MF) || hasFP(MF);
+  }
+
   /// hasReservedSpillSlot - Return true if target has reserved a spill slot in
   /// the stack frame of the given function for the specified register. e.g. On
   /// x86, if the frame register is required, the first fixed stack object is

Modified: llvm/branches/Apple/Hermes/lib/CodeGen/PrologEpilogInserter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Hermes/lib/CodeGen/PrologEpilogInserter.cpp?rev=97050&r1=97049&r2=97050&view=diff
==============================================================================
--- llvm/branches/Apple/Hermes/lib/CodeGen/PrologEpilogInserter.cpp (original)
+++ llvm/branches/Apple/Hermes/lib/CodeGen/PrologEpilogInserter.cpp Wed Feb 24 13:43:01 2010
@@ -175,9 +175,10 @@
     MachineBasicBlock::iterator I = *i;
 
     // If call frames are not being included as part of the stack frame, and
-    // there is no dynamic allocation (therefore referencing frame slots off
-    // sp), leave the pseudo ops alone. We'll eliminate them later.
-    if (RegInfo->hasReservedCallFrame(Fn) || RegInfo->hasFP(Fn))
+    // the target doesn't indicate otherwise, remove the call frame pseudos
+    // here. The sub/add sp instruction pairs are still inserted, but we don't
+    // need to track the SP adjustment for frame index elimination.
+    if (RegInfo->canSimplifyCallFramePseudos(Fn))
       RegInfo->eliminateCallFramePseudoInstr(Fn, *I->getParent(), I);
   }
 }

Modified: llvm/branches/Apple/Hermes/lib/Target/ARM/ARMBaseRegisterInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Hermes/lib/Target/ARM/ARMBaseRegisterInfo.cpp?rev=97050&r1=97049&r2=97050&view=diff
==============================================================================
--- llvm/branches/Apple/Hermes/lib/Target/ARM/ARMBaseRegisterInfo.cpp (original)
+++ llvm/branches/Apple/Hermes/lib/Target/ARM/ARMBaseRegisterInfo.cpp Wed Feb 24 13:43:01 2010
@@ -1085,6 +1085,15 @@
   return !MF.getFrameInfo()->hasVarSizedObjects();
 }
 
+// canSimplifyCallFramePseudos - If there is a reserved call frame, the
+// call frame pseudos can be simplified. Unlike most targets, having a FP
+// is not sufficient here since we still may reference some objects via SP
+// even when FP is available in Thumb2 mode.
+bool ARMBaseRegisterInfo::
+canSimplifyCallFramePseudos(MachineFunction &MF) const {
+  return hasReservedCallFrame(MF) || MF.getFrameInfo()->hasVarSizedObjects();
+}
+
 static void
 emitSPUpdate(bool isARM,
              MachineBasicBlock &MBB, MachineBasicBlock::iterator &MBBI,
@@ -1119,13 +1128,14 @@
 
       ARMFunctionInfo *AFI = MF.getInfo<ARMFunctionInfo>();
       assert(!AFI->isThumb1OnlyFunction() &&
-             "This eliminateCallFramePseudoInstr does not suppor Thumb1!");
+             "This eliminateCallFramePseudoInstr does not support Thumb1!");
       bool isARM = !AFI->isThumbFunction();
 
       // Replace the pseudo instruction with a new instruction...
       unsigned Opc = Old->getOpcode();
-      ARMCC::CondCodes Pred = (ARMCC::CondCodes)Old->getOperand(1).getImm();
-      // FIXME: Thumb2 version of ADJCALLSTACKUP and ADJCALLSTACKDOWN?
+      int PIdx = Old->findFirstPredOperandIdx();
+      ARMCC::CondCodes Pred = (PIdx == -1)
+        ? ARMCC::AL : (ARMCC::CondCodes)Old->getOperand(PIdx).getImm();
       if (Opc == ARM::ADJCALLSTACKDOWN || Opc == ARM::tADJCALLSTACKDOWN) {
         // Note: PredReg is operand 2 for ADJCALLSTACKDOWN.
         unsigned PredReg = Old->getOperand(2).getReg();
@@ -1149,7 +1159,6 @@
   MachineInstr &MI = *II;
   MachineBasicBlock &MBB = *MI.getParent();
   MachineFunction &MF = *MBB.getParent();
-  const MachineFrameInfo *MFI = MF.getFrameInfo();
   ARMFunctionInfo *AFI = MF.getInfo<ARMFunctionInfo>();
   assert(!AFI->isThumb1OnlyFunction() &&
          "This eliminateFrameIndex does not support Thumb1!");
@@ -1160,12 +1169,12 @@
   }
 
   int FrameIndex = MI.getOperand(i).getIndex();
-  int Offset = MFI->getObjectOffset(FrameIndex) + MFI->getStackSize() + SPAdj;
   unsigned FrameReg;
 
-  Offset = getFrameIndexReference(MF, FrameIndex, FrameReg);
+  int Offset = getFrameIndexReference(MF, FrameIndex, FrameReg);
   if (FrameReg != ARM::SP)
     SPAdj = 0;
+  Offset += SPAdj;
 
   // Modify MI as necessary to handle as much of 'Offset' as possible
   bool Done = false;
@@ -1256,7 +1265,7 @@
   MachineFrameInfo  *MFI = MF.getFrameInfo();
   ARMFunctionInfo *AFI = MF.getInfo<ARMFunctionInfo>();
   assert(!AFI->isThumb1OnlyFunction() &&
-         "This emitPrologue does not suppor Thumb1!");
+         "This emitPrologue does not support Thumb1!");
   bool isARM = !AFI->isThumbFunction();
   unsigned VARegSaveSize = AFI->getVarArgsRegSaveSize();
   unsigned NumBytes = MFI->getStackSize();
@@ -1417,7 +1426,7 @@
   MachineFrameInfo *MFI = MF.getFrameInfo();
   ARMFunctionInfo *AFI = MF.getInfo<ARMFunctionInfo>();
   assert(!AFI->isThumb1OnlyFunction() &&
-         "This emitEpilogue does not suppor Thumb1!");
+         "This emitEpilogue does not support Thumb1!");
   bool isARM = !AFI->isThumbFunction();
 
   unsigned VARegSaveSize = AFI->getVarArgsRegSaveSize();

Modified: llvm/branches/Apple/Hermes/lib/Target/ARM/ARMBaseRegisterInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Hermes/lib/Target/ARM/ARMBaseRegisterInfo.h?rev=97050&r1=97049&r2=97050&view=diff
==============================================================================
--- llvm/branches/Apple/Hermes/lib/Target/ARM/ARMBaseRegisterInfo.h (original)
+++ llvm/branches/Apple/Hermes/lib/Target/ARM/ARMBaseRegisterInfo.h Wed Feb 24 13:43:01 2010
@@ -138,6 +138,7 @@
   virtual bool requiresFrameIndexScavenging(const MachineFunction &MF) const;
 
   virtual bool hasReservedCallFrame(MachineFunction &MF) const;
+  virtual bool canSimplifyCallFramePseudos(MachineFunction &MF) const;
 
   virtual void eliminateCallFramePseudoInstr(MachineFunction &MF,
                                              MachineBasicBlock &MBB,

Modified: llvm/branches/Apple/Hermes/lib/Target/ARM/ARMISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Hermes/lib/Target/ARM/ARMISelLowering.cpp?rev=97050&r1=97049&r2=97050&view=diff
==============================================================================
--- llvm/branches/Apple/Hermes/lib/Target/ARM/ARMISelLowering.cpp (original)
+++ llvm/branches/Apple/Hermes/lib/Target/ARM/ARMISelLowering.cpp Wed Feb 24 13:43:01 2010
@@ -920,7 +920,7 @@
   // These operations are automatically eliminated by the prolog/epilog pass
   Chain = DAG.getCALLSEQ_START(Chain, DAG.getIntPtrConstant(NumBytes, true));
 
-  SDValue StackPtr = DAG.getRegister(ARM::SP, MVT::i32);
+  SDValue StackPtr = DAG.getCopyFromReg(Chain, dl, ARM::SP, getPointerTy());
 
   RegsToPassVector RegsToPass;
   SmallVector<SDValue, 8> MemOpChains;
@@ -969,8 +969,6 @@
                            VA, ArgLocs[++i], StackPtr, MemOpChains, Flags);
         } else {
           assert(VA.isMemLoc());
-          if (StackPtr.getNode() == 0)
-            StackPtr = DAG.getCopyFromReg(Chain, dl, ARM::SP, getPointerTy());
 
           MemOpChains.push_back(LowerMemOpCallTo(Chain, StackPtr, Op1,
                                                  dl, DAG, VA, Flags));
@@ -983,8 +981,6 @@
       RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg));
     } else {
       assert(VA.isMemLoc());
-      if (StackPtr.getNode() == 0)
-        StackPtr = DAG.getCopyFromReg(Chain, dl, ARM::SP, getPointerTy());
 
       MemOpChains.push_back(LowerMemOpCallTo(Chain, StackPtr, Arg,
                                              dl, DAG, VA, Flags));

Modified: llvm/branches/Apple/Hermes/lib/Target/ARM/ARMInstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Hermes/lib/Target/ARM/ARMInstrInfo.td?rev=97050&r1=97049&r2=97050&view=diff
==============================================================================
--- llvm/branches/Apple/Hermes/lib/Target/ARM/ARMInstrInfo.td (original)
+++ llvm/branches/Apple/Hermes/lib/Target/ARM/ARMInstrInfo.td Wed Feb 24 13:43:01 2010
@@ -594,7 +594,10 @@
                     i32imm:$size), NoItinerary,
            "${instid:label} ${cpidx:cpentry}", []>;
 
-let Defs = [SP], Uses = [SP] in {
+// FIXME: Marking these as hasSideEffects is necessary to prevent machine DCE
+// from removing one half of the matched pairs. That breaks PEI, which assumes
+// these will always be in pairs, and asserts if it finds otherwise. Better way?
+let Defs = [SP], Uses = [SP], hasSideEffects = 1 in {
 def ADJCALLSTACKUP :
 PseudoInst<(outs), (ins i32imm:$amt1, i32imm:$amt2, pred:$p), NoItinerary,
            "@ ADJCALLSTACKUP $amt1",

Modified: llvm/branches/Apple/Hermes/lib/Target/ARM/ARMInstrThumb.td
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Hermes/lib/Target/ARM/ARMInstrThumb.td?rev=97050&r1=97049&r2=97050&view=diff
==============================================================================
--- llvm/branches/Apple/Hermes/lib/Target/ARM/ARMInstrThumb.td (original)
+++ llvm/branches/Apple/Hermes/lib/Target/ARM/ARMInstrThumb.td Wed Feb 24 13:43:01 2010
@@ -120,7 +120,10 @@
 //  Miscellaneous Instructions.
 //
 
-let Defs = [SP], Uses = [SP] in {
+// FIXME: Marking these as hasSideEffects is necessary to prevent machine DCE
+// from removing one half of the matched pairs. That breaks PEI, which assumes
+// these will always be in pairs, and asserts if it finds otherwise. Better way?
+let Defs = [SP], Uses = [SP], hasSideEffects = 1 in {
 def tADJCALLSTACKUP :
 PseudoInst<(outs), (ins i32imm:$amt1, i32imm:$amt2), NoItinerary,
            "@ tADJCALLSTACKUP $amt1",

Modified: llvm/branches/Apple/Hermes/lib/Target/ARM/Thumb1RegisterInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Hermes/lib/Target/ARM/Thumb1RegisterInfo.cpp?rev=97050&r1=97049&r2=97050&view=diff
==============================================================================
--- llvm/branches/Apple/Hermes/lib/Target/ARM/Thumb1RegisterInfo.cpp (original)
+++ llvm/branches/Apple/Hermes/lib/Target/ARM/Thumb1RegisterInfo.cpp Wed Feb 24 13:43:01 2010
@@ -450,9 +450,9 @@
     Offset -= AFI->getGPRCalleeSavedArea1Offset();
   else if (AFI->isGPRCalleeSavedArea2Frame(FrameIndex))
     Offset -= AFI->getGPRCalleeSavedArea2Offset();
-  else if (hasFP(MF)) {
-    assert(SPAdj == 0 && "Unexpected");
-    // There is alloca()'s in this function, must reference off the frame
+  else if (MF.getFrameInfo()->hasVarSizedObjects()) {
+    assert(SPAdj == 0 && hasFP(MF) && "Unexpected");
+    // There are alloca()'s in this function, must reference off the frame
     // pointer instead.
     FrameReg = getFrameRegister(MF);
     Offset -= AFI->getFramePtrSpillOffset();

Modified: llvm/branches/Apple/Hermes/test/CodeGen/Thumb2/ldr-str-imm12.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Hermes/test/CodeGen/Thumb2/ldr-str-imm12.ll?rev=97050&r1=97049&r2=97050&view=diff
==============================================================================
--- llvm/branches/Apple/Hermes/test/CodeGen/Thumb2/ldr-str-imm12.ll (original)
+++ llvm/branches/Apple/Hermes/test/CodeGen/Thumb2/ldr-str-imm12.ll Wed Feb 24 13:43:01 2010
@@ -52,7 +52,7 @@
 ; CHECK: str r{{[0-7]}}, [sp]
 ; CHECK: str r{{[0-7]}}, [sp, #+4]
 ; CHECK: str r{{[0-7]}}, [sp, #+8]
-; CHECK: str r{{[0-7]}}, [sp, #+24]
+; CHECK: str{{(.w)?}} r{{[0-9]+}}, [sp, #+24]
   store %union.rec* null, %union.rec** @zz_hold, align 4
   store %union.rec* null, %union.rec** @zz_res, align 4
   store %union.rec* %x, %union.rec** @zz_hold, align 4





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