[llvm-branch-commits] [llvm-branch] r81977 - in /llvm/branches/release_26: lib/Target/X86/X86Instr64bit.td test/CodeGen/X86/cmov-zext.ll

[Tanya Lattner]

Author: tbrethou
Date: Tue Sep 15 20:12:05 2009
New Revision: 81977

URL: http://llvm.org/viewvc/llvm-project?rev=81977&view=rev
Log:
Merge 81814 from mainline.
On x86-64, the 32-bit cmov doesn't actually clear the high 32-bit of
its result if the condition is false.

Added:
    llvm/branches/release_26/test/CodeGen/X86/cmov-zext.ll
      - copied unchanged from r81814, llvm/trunk/test/CodeGen/X86/cmov-zext.ll
Modified:
    llvm/branches/release_26/lib/Target/X86/X86Instr64bit.td

Modified: llvm/branches/release_26/lib/Target/X86/X86Instr64bit.td
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_26/lib/Target/X86/X86Instr64bit.td?rev=81977&r1=81976&r2=81977&view=diff

==============================================================================
--- llvm/branches/release_26/lib/Target/X86/X86Instr64bit.td (original)
+++ llvm/branches/release_26/lib/Target/X86/X86Instr64bit.td Tue Sep 15 20:12:05 2009
@@ -363,13 +363,15 @@
                     [(set GR64:$dst, (zextloadi64i32 addr:$src))]>;
 
 // Any instruction that defines a 32-bit result leaves the high half of the
-// register. Truncate can be lowered to EXTRACT_SUBREG, and CopyFromReg may
-// be copying from a truncate, but any other 32-bit operation will zero-extend
+// register. Truncate can be lowered to EXTRACT_SUBREG. CopyFromReg may
+// be copying from a truncate. And x86's cmov doesn't do anything if the
+// condition is false. But any other 32-bit operation will zero-extend
 // up to 64 bits.
 def def32 : PatLeaf<(i32 GR32:$src), [{
   return N->getOpcode() != ISD::TRUNCATE &&
          N->getOpcode() != TargetInstrInfo::EXTRACT_SUBREG &&
-         N->getOpcode() != ISD::CopyFromReg;
+         N->getOpcode() != ISD::CopyFromReg &&
+         N->getOpcode() != X86ISD::CMOV;
 }]>;
 
 // In the case of a 32-bit def that is known to implicitly zero-extend,