[llvm-branch-commits] [llvm-branch] r90157 - in /llvm/branches/Apple/Zoidberg: include/llvm/CodeGen/ include/llvm/Target/ lib/CodeGen/SelectionDAG/ lib/Target/ARM/ lib/Target/Alpha/ lib/Target/Blackfin/ lib/Target/CellSPU/ lib/Target/Mips/ lib/Target/PowerPC/ lib/Target/Sparc/ lib/Target/X86/ lib/Target/XCore/ utils/TableGen/

Dan Gohman gohman at apple.com
Mon Nov 30 13:51:31 PST 2009


Author: djg
Date: Mon Nov 30 15:51:31 2009
New Revision: 90157

URL: http://llvm.org/viewvc/llvm-project?rev=90157&view=rev
Log:
$ svn merge -c 89711 https://djg@llvm.org/svn/llvm-project/llvm/trunk
--- Merging r89711 into '.':
U    include/llvm/Target/TargetSelectionDAG.td
U    include/llvm/CodeGen/SelectionDAGNodes.h
U    utils/TableGen/DAGISelEmitter.cpp
U    lib/CodeGen/SelectionDAG/SelectionDAG.cpp
U    lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
U    lib/CodeGen/SelectionDAG/TargetLowering.cpp
U    lib/Target/PowerPC/PPCInstrInfo.td
U    lib/Target/PowerPC/PPCISelLowering.cpp
U    lib/Target/ARM/ARMInstrInfo.td
U    lib/Target/ARM/ARMISelLowering.cpp
U    lib/Target/ARM/ARMCodeEmitter.cpp
U    lib/Target/XCore/XCoreISelLowering.cpp
U    lib/Target/Alpha/AlphaISelLowering.cpp
U    lib/Target/X86/X86InstrInfo.td
U    lib/Target/X86/X86ISelLowering.cpp
U    lib/Target/X86/X86CodeEmitter.cpp
U    lib/Target/X86/X86InstrInfo.cpp
U    lib/Target/CellSPU/SPUInstrInfo.td
U    lib/Target/CellSPU/SPUISelLowering.cpp
U    lib/Target/Sparc/SparcISelLowering.cpp
U    lib/Target/Mips/MipsISelLowering.cpp
U    lib/Target/Blackfin/BlackfinISelLowering.cpp

Modified:
    llvm/branches/Apple/Zoidberg/include/llvm/CodeGen/SelectionDAGNodes.h
    llvm/branches/Apple/Zoidberg/include/llvm/Target/TargetSelectionDAG.td
    llvm/branches/Apple/Zoidberg/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
    llvm/branches/Apple/Zoidberg/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
    llvm/branches/Apple/Zoidberg/lib/CodeGen/SelectionDAG/TargetLowering.cpp
    llvm/branches/Apple/Zoidberg/lib/Target/ARM/ARMCodeEmitter.cpp
    llvm/branches/Apple/Zoidberg/lib/Target/ARM/ARMISelLowering.cpp
    llvm/branches/Apple/Zoidberg/lib/Target/ARM/ARMInstrInfo.td
    llvm/branches/Apple/Zoidberg/lib/Target/Alpha/AlphaISelLowering.cpp
    llvm/branches/Apple/Zoidberg/lib/Target/Blackfin/BlackfinISelLowering.cpp
    llvm/branches/Apple/Zoidberg/lib/Target/CellSPU/SPUISelLowering.cpp
    llvm/branches/Apple/Zoidberg/lib/Target/CellSPU/SPUInstrInfo.td
    llvm/branches/Apple/Zoidberg/lib/Target/Mips/MipsISelLowering.cpp
    llvm/branches/Apple/Zoidberg/lib/Target/PowerPC/PPCISelLowering.cpp
    llvm/branches/Apple/Zoidberg/lib/Target/PowerPC/PPCInstrInfo.td
    llvm/branches/Apple/Zoidberg/lib/Target/Sparc/SparcISelLowering.cpp
    llvm/branches/Apple/Zoidberg/lib/Target/X86/X86CodeEmitter.cpp
    llvm/branches/Apple/Zoidberg/lib/Target/X86/X86ISelLowering.cpp
    llvm/branches/Apple/Zoidberg/lib/Target/X86/X86InstrInfo.cpp
    llvm/branches/Apple/Zoidberg/lib/Target/X86/X86InstrInfo.td
    llvm/branches/Apple/Zoidberg/lib/Target/XCore/XCoreISelLowering.cpp
    llvm/branches/Apple/Zoidberg/utils/TableGen/DAGISelEmitter.cpp

Modified: llvm/branches/Apple/Zoidberg/include/llvm/CodeGen/SelectionDAGNodes.h
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Zoidberg/include/llvm/CodeGen/SelectionDAGNodes.h?rev=90157&r1=90156&r2=90157&view=diff

==============================================================================
--- llvm/branches/Apple/Zoidberg/include/llvm/CodeGen/SelectionDAGNodes.h (original)
+++ llvm/branches/Apple/Zoidberg/include/llvm/CodeGen/SelectionDAGNodes.h Mon Nov 30 15:51:31 2009
@@ -494,10 +494,9 @@
     //   Operand #last: Optional, an incoming flag.
     INLINEASM,
 
-    // DBG_LABEL, EH_LABEL - Represents a label in mid basic block used to track
+    // EH_LABEL - Represents a label in mid basic block used to track
     // locations needed for debug and exception handling tables.  These nodes
     // take a chain as input and return a chain.
-    DBG_LABEL,
     EH_LABEL,
 
     // STACKSAVE - STACKSAVE has one operand, an input chain.  It produces a
@@ -546,12 +545,6 @@
     // HANDLENODE node - Used as a handle for various purposes.
     HANDLENODE,
 
-    // DEBUG_LOC - This node is used to represent source line information
-    // embedded in the code.  It takes a token chain as input, then a line
-    // number, then a column then a file id (provided by MachineModuleInfo.) It
-    // produces a token chain as output.
-    DEBUG_LOC,
-
     // TRAMPOLINE - This corresponds to the init_trampoline intrinsic.
     // It takes as input a token chain, the pointer to the trampoline,
     // the pointer to the nested function, the pointer to pass for the
@@ -630,10 +623,6 @@
   /// element is not an undef.
   bool isScalarToVector(const SDNode *N);
 
-  /// isDebugLabel - Return true if the specified node represents a debug
-  /// label (i.e. ISD::DBG_LABEL or TargetInstrInfo::DBG_LABEL node).
-  bool isDebugLabel(const SDNode *N);
-
   //===--------------------------------------------------------------------===//
   /// MemIndexedMode enum - This enum defines the load / store indexed
   /// addressing modes.
@@ -2031,8 +2020,7 @@
 
   static bool classof(const LabelSDNode *) { return true; }
   static bool classof(const SDNode *N) {
-    return N->getOpcode() == ISD::DBG_LABEL ||
-           N->getOpcode() == ISD::EH_LABEL;
+    return N->getOpcode() == ISD::EH_LABEL;
   }
 };
 

Modified: llvm/branches/Apple/Zoidberg/include/llvm/Target/TargetSelectionDAG.td
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Zoidberg/include/llvm/Target/TargetSelectionDAG.td?rev=90157&r1=90156&r2=90157&view=diff

==============================================================================
--- llvm/branches/Apple/Zoidberg/include/llvm/Target/TargetSelectionDAG.td (original)
+++ llvm/branches/Apple/Zoidberg/include/llvm/Target/TargetSelectionDAG.td Mon Nov 30 15:51:31 2009
@@ -864,10 +864,3 @@
   list<SDNodeProperty> Properties = props;
   list<CPAttribute> Attributes = attrs;
 }
-
-//===----------------------------------------------------------------------===//
-// Dwarf support.
-//
-def SDT_dwarf_loc : SDTypeProfile<0, 3,
-                      [SDTCisInt<0>, SDTCisInt<1>, SDTCisInt<2>]>;
-def dwarf_loc : SDNode<"ISD::DEBUG_LOC", SDT_dwarf_loc,[SDNPHasChain]>;

Modified: llvm/branches/Apple/Zoidberg/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Zoidberg/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp?rev=90157&r1=90156&r2=90157&view=diff

==============================================================================
--- llvm/branches/Apple/Zoidberg/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp (original)
+++ llvm/branches/Apple/Zoidberg/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Mon Nov 30 15:51:31 2009
@@ -2243,7 +2243,6 @@
     Results.push_back(DAG.getConstant(1, Node->getValueType(0)));
     break;
   case ISD::EH_RETURN:
-  case ISD::DBG_LABEL:
   case ISD::EH_LABEL:
   case ISD::PREFETCH:
   case ISD::MEMBARRIER:

Modified: llvm/branches/Apple/Zoidberg/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Zoidberg/lib/CodeGen/SelectionDAG/SelectionDAG.cpp?rev=90157&r1=90156&r2=90157&view=diff

==============================================================================
--- llvm/branches/Apple/Zoidberg/lib/CodeGen/SelectionDAG/SelectionDAG.cpp (original)
+++ llvm/branches/Apple/Zoidberg/lib/CodeGen/SelectionDAG/SelectionDAG.cpp Mon Nov 30 15:51:31 2009
@@ -200,19 +200,6 @@
   return true;
 }
 
-
-/// isDebugLabel - Return true if the specified node represents a debug
-/// label (i.e. ISD::DBG_LABEL or TargetInstrInfo::DBG_LABEL node).
-bool ISD::isDebugLabel(const SDNode *N) {
-  SDValue Zero;
-  if (N->getOpcode() == ISD::DBG_LABEL)
-    return true;
-  if (N->isMachineOpcode() &&
-      N->getMachineOpcode() == TargetInstrInfo::DBG_LABEL)
-    return true;
-  return false;
-}
-
 /// getSetCCSwappedOperands - Return the operation corresponding to (Y op X)
 /// when given the operation for (X op Y).
 ISD::CondCode ISD::getSetCCSwappedOperands(ISD::CondCode Operation) {
@@ -503,7 +490,6 @@
   switch (N->getOpcode()) {
   default: break;
   case ISD::HANDLENODE:
-  case ISD::DBG_LABEL:
   case ISD::EH_LABEL:
     return true;   // Never CSE these nodes.
   }
@@ -5438,7 +5424,6 @@
   case ISD::UNDEF:         return "undef";
   case ISD::MERGE_VALUES:  return "merge_values";
   case ISD::INLINEASM:     return "inlineasm";
-  case ISD::DBG_LABEL:     return "dbg_label";
   case ISD::EH_LABEL:      return "eh_label";
   case ISD::HANDLENODE:    return "handlenode";
 
@@ -5572,9 +5557,6 @@
   case ISD::CTTZ:    return "cttz";
   case ISD::CTLZ:    return "ctlz";
 
-  // Debug info
-  case ISD::DEBUG_LOC: return "debug_loc";
-
   // Trampolines
   case ISD::TRAMPOLINE: return "trampoline";
 

Modified: llvm/branches/Apple/Zoidberg/lib/CodeGen/SelectionDAG/TargetLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Zoidberg/lib/CodeGen/SelectionDAG/TargetLowering.cpp?rev=90157&r1=90156&r2=90157&view=diff

==============================================================================
--- llvm/branches/Apple/Zoidberg/lib/CodeGen/SelectionDAG/TargetLowering.cpp (original)
+++ llvm/branches/Apple/Zoidberg/lib/CodeGen/SelectionDAG/TargetLowering.cpp Mon Nov 30 15:51:31 2009
@@ -532,11 +532,6 @@
   InitLibcallNames(LibcallRoutineNames);
   InitCmpLibcallCCs(CmpLibcallCCs);
   InitLibcallCallingConvs(LibcallCallingConvs);
-
-  // Tell Legalize whether the assembler supports DEBUG_LOC.
-  const MCAsmInfo *TASM = TM.getMCAsmInfo();
-  if (!TASM || !TASM->hasDotLocAndDotFile())
-    setOperationAction(ISD::DEBUG_LOC, MVT::Other, Expand);
 }
 
 TargetLowering::~TargetLowering() {

Modified: llvm/branches/Apple/Zoidberg/lib/Target/ARM/ARMCodeEmitter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Zoidberg/lib/Target/ARM/ARMCodeEmitter.cpp?rev=90157&r1=90156&r2=90157&view=diff

==============================================================================
--- llvm/branches/Apple/Zoidberg/lib/Target/ARM/ARMCodeEmitter.cpp (original)
+++ llvm/branches/Apple/Zoidberg/lib/Target/ARM/ARMCodeEmitter.cpp Mon Nov 30 15:51:31 2009
@@ -613,7 +613,6 @@
     break;
   case TargetInstrInfo::IMPLICIT_DEF:
   case TargetInstrInfo::KILL:
-  case ARM::DWARF_LOC:
     // Do nothing.
     break;
   case ARM::CONSTPOOL_ENTRY:

Modified: llvm/branches/Apple/Zoidberg/lib/Target/ARM/ARMISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Zoidberg/lib/Target/ARM/ARMISelLowering.cpp?rev=90157&r1=90156&r2=90157&view=diff

==============================================================================
--- llvm/branches/Apple/Zoidberg/lib/Target/ARM/ARMISelLowering.cpp (original)
+++ llvm/branches/Apple/Zoidberg/lib/Target/ARM/ARMISelLowering.cpp Mon Nov 30 15:51:31 2009
@@ -355,9 +355,6 @@
   setOperationAction(ISD::SDIVREM, MVT::i32, Expand);
   setOperationAction(ISD::UDIVREM, MVT::i32, Expand);
 
-  // Support label based line numbers.
-  setOperationAction(ISD::DEBUG_LOC, MVT::Other, Expand);
-
   setOperationAction(ISD::GlobalAddress, MVT::i32,   Custom);
   setOperationAction(ISD::ConstantPool,  MVT::i32,   Custom);
   setOperationAction(ISD::GLOBAL_OFFSET_TABLE, MVT::i32, Custom);

Modified: llvm/branches/Apple/Zoidberg/lib/Target/ARM/ARMInstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Zoidberg/lib/Target/ARM/ARMInstrInfo.td?rev=90157&r1=90156&r2=90157&view=diff

==============================================================================
--- llvm/branches/Apple/Zoidberg/lib/Target/ARM/ARMInstrInfo.td (original)
+++ llvm/branches/Apple/Zoidberg/lib/Target/ARM/ARMInstrInfo.td Mon Nov 30 15:51:31 2009
@@ -584,12 +584,6 @@
            [(ARMcallseq_start timm:$amt)]>;
 }
 
-def DWARF_LOC :
-PseudoInst<(outs), (ins i32imm:$line, i32imm:$col, i32imm:$file), NoItinerary,
-           ".loc $file, $line, $col",
-           [(dwarf_loc (i32 imm:$line), (i32 imm:$col), (i32 imm:$file))]>;
-
-
 // Address computation and loads and stores in PIC mode.
 let isNotDuplicable = 1 in {
 def PICADD : AXI1<0b0100, (outs GPR:$dst), (ins GPR:$a, pclabel:$cp, pred:$p),

Modified: llvm/branches/Apple/Zoidberg/lib/Target/Alpha/AlphaISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Zoidberg/lib/Target/Alpha/AlphaISelLowering.cpp?rev=90157&r1=90156&r2=90157&view=diff

==============================================================================
--- llvm/branches/Apple/Zoidberg/lib/Target/Alpha/AlphaISelLowering.cpp (original)
+++ llvm/branches/Apple/Zoidberg/lib/Target/Alpha/AlphaISelLowering.cpp Mon Nov 30 15:51:31 2009
@@ -127,9 +127,6 @@
 
   setOperationAction(ISD::BIT_CONVERT, MVT::f32, Promote);
 
-  // We don't have line number support yet.
-  setOperationAction(ISD::DEBUG_LOC, MVT::Other, Expand);
-  setOperationAction(ISD::DBG_LABEL, MVT::Other, Expand);
   setOperationAction(ISD::EH_LABEL, MVT::Other, Expand);
 
   // Not implemented yet.

Modified: llvm/branches/Apple/Zoidberg/lib/Target/Blackfin/BlackfinISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Zoidberg/lib/Target/Blackfin/BlackfinISelLowering.cpp?rev=90157&r1=90156&r2=90157&view=diff

==============================================================================
--- llvm/branches/Apple/Zoidberg/lib/Target/Blackfin/BlackfinISelLowering.cpp (original)
+++ llvm/branches/Apple/Zoidberg/lib/Target/Blackfin/BlackfinISelLowering.cpp Mon Nov 30 15:51:31 2009
@@ -114,9 +114,6 @@
   // READCYCLECOUNTER needs special type legalization.
   setOperationAction(ISD::READCYCLECOUNTER, MVT::i64, Custom);
 
-  // We don't have line number support yet.
-  setOperationAction(ISD::DEBUG_LOC, MVT::Other, Expand);
-  setOperationAction(ISD::DBG_LABEL, MVT::Other, Expand);
   setOperationAction(ISD::EH_LABEL, MVT::Other, Expand);
 
   // Use the default implementation.

Modified: llvm/branches/Apple/Zoidberg/lib/Target/CellSPU/SPUISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Zoidberg/lib/Target/CellSPU/SPUISelLowering.cpp?rev=90157&r1=90156&r2=90157&view=diff

==============================================================================
--- llvm/branches/Apple/Zoidberg/lib/Target/CellSPU/SPUISelLowering.cpp (original)
+++ llvm/branches/Apple/Zoidberg/lib/Target/CellSPU/SPUISelLowering.cpp Mon Nov 30 15:51:31 2009
@@ -387,9 +387,6 @@
   // We cannot sextinreg(i1).  Expand to shifts.
   setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::i1, Expand);
 
-  // Support label based line numbers.
-  setOperationAction(ISD::DEBUG_LOC, MVT::Other, Expand);
-
   // We want to legalize GlobalAddress and ConstantPool nodes into the
   // appropriate instructions to materialize the address.
   for (unsigned sctype = (unsigned) MVT::i8; sctype < (unsigned) MVT::f128;

Modified: llvm/branches/Apple/Zoidberg/lib/Target/CellSPU/SPUInstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Zoidberg/lib/Target/CellSPU/SPUInstrInfo.td?rev=90157&r1=90156&r2=90157&view=diff

==============================================================================
--- llvm/branches/Apple/Zoidberg/lib/Target/CellSPU/SPUInstrInfo.td (original)
+++ llvm/branches/Apple/Zoidberg/lib/Target/CellSPU/SPUInstrInfo.td Mon Nov 30 15:51:31 2009
@@ -31,14 +31,6 @@
 }
 
 //===----------------------------------------------------------------------===//
-// DWARF debugging Pseudo Instructions
-//===----------------------------------------------------------------------===//
-
-def DWARF_LOC : Pseudo<(outs), (ins i32imm:$line, i32imm:$col, i32imm:$file),
-           ".loc $file, $line, $col",
-           [(dwarf_loc (i32 imm:$line), (i32 imm:$col), (i32 imm:$file))]>;
-
-//===----------------------------------------------------------------------===//
 // Loads:
 // NB: The ordering is actually important, since the instruction selection
 // will try each of the instructions in sequence, i.e., the D-form first with

Modified: llvm/branches/Apple/Zoidberg/lib/Target/Mips/MipsISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Zoidberg/lib/Target/Mips/MipsISelLowering.cpp?rev=90157&r1=90156&r2=90157&view=diff

==============================================================================
--- llvm/branches/Apple/Zoidberg/lib/Target/Mips/MipsISelLowering.cpp (original)
+++ llvm/branches/Apple/Zoidberg/lib/Target/Mips/MipsISelLowering.cpp Mon Nov 30 15:51:31 2009
@@ -132,9 +132,6 @@
   setOperationAction(ISD::FLOG10,            MVT::f32,   Expand);
   setOperationAction(ISD::FEXP,              MVT::f32,   Expand);
 
-  // We don't have line number support yet.
-  setOperationAction(ISD::DEBUG_LOC,         MVT::Other, Expand);
-  setOperationAction(ISD::DBG_LABEL,         MVT::Other, Expand);
   setOperationAction(ISD::EH_LABEL,          MVT::Other, Expand);
 
   // Use the default for now

Modified: llvm/branches/Apple/Zoidberg/lib/Target/PowerPC/PPCISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Zoidberg/lib/Target/PowerPC/PPCISelLowering.cpp?rev=90157&r1=90156&r2=90157&view=diff

==============================================================================
--- llvm/branches/Apple/Zoidberg/lib/Target/PowerPC/PPCISelLowering.cpp (original)
+++ llvm/branches/Apple/Zoidberg/lib/Target/PowerPC/PPCISelLowering.cpp Mon Nov 30 15:51:31 2009
@@ -182,9 +182,6 @@
   // We cannot sextinreg(i1).  Expand to shifts.
   setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::i1, Expand);
 
-  // Support label based line numbers.
-  setOperationAction(ISD::DEBUG_LOC, MVT::Other, Expand);
-
   setOperationAction(ISD::EXCEPTIONADDR, MVT::i64, Expand);
   setOperationAction(ISD::EHSELECTION,   MVT::i64, Expand);
   setOperationAction(ISD::EXCEPTIONADDR, MVT::i32, Expand);

Modified: llvm/branches/Apple/Zoidberg/lib/Target/PowerPC/PPCInstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Zoidberg/lib/Target/PowerPC/PPCInstrInfo.td?rev=90157&r1=90156&r2=90157&view=diff

==============================================================================
--- llvm/branches/Apple/Zoidberg/lib/Target/PowerPC/PPCInstrInfo.td (original)
+++ llvm/branches/Apple/Zoidberg/lib/Target/PowerPC/PPCInstrInfo.td Mon Nov 30 15:51:31 2009
@@ -1358,15 +1358,6 @@
 
 
 //===----------------------------------------------------------------------===//
-// DWARF Pseudo Instructions
-//
-
-def DWARF_LOC        : Pseudo<(outs), (ins i32imm:$line, i32imm:$col, i32imm:$file),
-                              "${:comment} .loc $file, $line, $col",
-                      [(dwarf_loc (i32 imm:$line), (i32 imm:$col),
-                                  (i32 imm:$file))]>;
-
-//===----------------------------------------------------------------------===//
 // PowerPC Instruction Patterns
 //
 

Modified: llvm/branches/Apple/Zoidberg/lib/Target/Sparc/SparcISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Zoidberg/lib/Target/Sparc/SparcISelLowering.cpp?rev=90157&r1=90156&r2=90157&view=diff

==============================================================================
--- llvm/branches/Apple/Zoidberg/lib/Target/Sparc/SparcISelLowering.cpp (original)
+++ llvm/branches/Apple/Zoidberg/lib/Target/Sparc/SparcISelLowering.cpp Mon Nov 30 15:51:31 2009
@@ -644,9 +644,6 @@
   setOperationAction(ISD::UMUL_LOHI, MVT::i32, Expand);
   setOperationAction(ISD::SMUL_LOHI, MVT::i32, Expand);
 
-  // We don't have line number support yet.
-  setOperationAction(ISD::DEBUG_LOC, MVT::Other, Expand);
-  setOperationAction(ISD::DBG_LABEL, MVT::Other, Expand);
   setOperationAction(ISD::EH_LABEL, MVT::Other, Expand);
 
   // VASTART needs to be custom lowered to use the VarArgsFrameIndex.
@@ -662,7 +659,6 @@
   setOperationAction(ISD::DYNAMIC_STACKALLOC, MVT::i32  , Custom);
 
   // No debug info support yet.
-  setOperationAction(ISD::DBG_LABEL, MVT::Other, Expand);
   setOperationAction(ISD::EH_LABEL, MVT::Other, Expand);
 
   setStackPointerRegisterToSaveRestore(SP::O6);

Modified: llvm/branches/Apple/Zoidberg/lib/Target/X86/X86CodeEmitter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Zoidberg/lib/Target/X86/X86CodeEmitter.cpp?rev=90157&r1=90156&r2=90157&view=diff

==============================================================================
--- llvm/branches/Apple/Zoidberg/lib/Target/X86/X86CodeEmitter.cpp (original)
+++ llvm/branches/Apple/Zoidberg/lib/Target/X86/X86CodeEmitter.cpp Mon Nov 30 15:51:31 2009
@@ -595,7 +595,6 @@
       break;
     case TargetInstrInfo::IMPLICIT_DEF:
     case TargetInstrInfo::KILL:
-    case X86::DWARF_LOC:
     case X86::FP_REG_KILL:
       break;
     case X86::MOVPC32r: {

Modified: llvm/branches/Apple/Zoidberg/lib/Target/X86/X86ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Zoidberg/lib/Target/X86/X86ISelLowering.cpp?rev=90157&r1=90156&r2=90157&view=diff

==============================================================================
--- llvm/branches/Apple/Zoidberg/lib/Target/X86/X86ISelLowering.cpp (original)
+++ llvm/branches/Apple/Zoidberg/lib/Target/X86/X86ISelLowering.cpp Mon Nov 30 15:51:31 2009
@@ -377,7 +377,6 @@
   if (!Subtarget->isTargetDarwin() &&
       !Subtarget->isTargetELF() &&
       !Subtarget->isTargetCygMing()) {
-    setOperationAction(ISD::DBG_LABEL, MVT::Other, Expand);
     setOperationAction(ISD::EH_LABEL, MVT::Other, Expand);
   }
 

Modified: llvm/branches/Apple/Zoidberg/lib/Target/X86/X86InstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Zoidberg/lib/Target/X86/X86InstrInfo.cpp?rev=90157&r1=90156&r2=90157&view=diff

==============================================================================
--- llvm/branches/Apple/Zoidberg/lib/Target/X86/X86InstrInfo.cpp (original)
+++ llvm/branches/Apple/Zoidberg/lib/Target/X86/X86InstrInfo.cpp Mon Nov 30 15:51:31 2009
@@ -3133,7 +3133,6 @@
       break;
     case TargetInstrInfo::IMPLICIT_DEF:
     case TargetInstrInfo::KILL:
-    case X86::DWARF_LOC:
     case X86::FP_REG_KILL:
       break;
     case X86::MOVPC32r: {

Modified: llvm/branches/Apple/Zoidberg/lib/Target/X86/X86InstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Zoidberg/lib/Target/X86/X86InstrInfo.td?rev=90157&r1=90156&r2=90157&view=diff

==============================================================================
--- llvm/branches/Apple/Zoidberg/lib/Target/X86/X86InstrInfo.td (original)
+++ llvm/branches/Apple/Zoidberg/lib/Target/X86/X86InstrInfo.td Mon Nov 30 15:51:31 2009
@@ -3506,16 +3506,6 @@
                    [(set GR32:$dst, (fsload addr:$src))]>, SegFS;
 
 //===----------------------------------------------------------------------===//
-// DWARF Pseudo Instructions
-//
-
-def DWARF_LOC   : I<0, Pseudo, (outs),
-                    (ins i32imm:$line, i32imm:$col, i32imm:$file),
-                    ".loc\t$file $line $col",
-                    [(dwarf_loc (i32 imm:$line), (i32 imm:$col),
-                      (i32 imm:$file))]>;
-
-//===----------------------------------------------------------------------===//
 // EH Pseudo Instructions
 //
 let isTerminator = 1, isReturn = 1, isBarrier = 1,

Modified: llvm/branches/Apple/Zoidberg/lib/Target/XCore/XCoreISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Zoidberg/lib/Target/XCore/XCoreISelLowering.cpp?rev=90157&r1=90156&r2=90157&view=diff

==============================================================================
--- llvm/branches/Apple/Zoidberg/lib/Target/XCore/XCoreISelLowering.cpp (original)
+++ llvm/branches/Apple/Zoidberg/lib/Target/XCore/XCoreISelLowering.cpp Mon Nov 30 15:51:31 2009
@@ -142,9 +142,6 @@
   setOperationAction(ISD::STACKRESTORE, MVT::Other, Expand);
   setOperationAction(ISD::DYNAMIC_STACKALLOC, MVT::i32, Expand);
   
-  // Debug
-  setOperationAction(ISD::DEBUG_LOC, MVT::Other, Expand);
-
   maxStoresPerMemset = 4;
   maxStoresPerMemmove = maxStoresPerMemcpy = 2;
 

Modified: llvm/branches/Apple/Zoidberg/utils/TableGen/DAGISelEmitter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Zoidberg/utils/TableGen/DAGISelEmitter.cpp?rev=90157&r1=90156&r2=90157&view=diff

==============================================================================
--- llvm/branches/Apple/Zoidberg/utils/TableGen/DAGISelEmitter.cpp (original)
+++ llvm/branches/Apple/Zoidberg/utils/TableGen/DAGISelEmitter.cpp Mon Nov 30 15:51:31 2009
@@ -1947,7 +1947,6 @@
      << "    return NULL;\n"
      << "  }\n"
      << "  case ISD::INLINEASM: return Select_INLINEASM(N);\n"
-     << "  case ISD::DBG_LABEL: return Select_DBG_LABEL(N);\n"
      << "  case ISD::EH_LABEL: return Select_EH_LABEL(N);\n"
      << "  case ISD::UNDEF: return Select_UNDEF(N);\n";
 





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