[llvm-branch-commits] [llvm-gcc-branch] r72546 - in /llvm-gcc-4.2/branches/Apple/Bender/gcc: config/i386/llvm-i386-target.h config/i386/llvm-i386.cpp llvm-abi.h llvm-convert.cpp
Bill Wendling
isanbard at gmail.com
Thu May 28 15:19:12 PDT 2009
Author: void
Date: Thu May 28 17:19:12 2009
New Revision: 72546
URL: http://llvm.org/viewvc/llvm-project?rev=72546&view=rev
Log:
--- Merging r72442 into '.':
U gcc/llvm-convert.cpp
U gcc/llvm-abi.h
U gcc/config/i386/llvm-i386.cpp
U gcc/config/i386/llvm-i386-target.h
Allow for SRET when figuring out registers to put
struct parameters in on x86-64. Fixes PR 4242.
Modified:
llvm-gcc-4.2/branches/Apple/Bender/gcc/config/i386/llvm-i386-target.h
llvm-gcc-4.2/branches/Apple/Bender/gcc/config/i386/llvm-i386.cpp
llvm-gcc-4.2/branches/Apple/Bender/gcc/llvm-abi.h
llvm-gcc-4.2/branches/Apple/Bender/gcc/llvm-convert.cpp
Modified: llvm-gcc-4.2/branches/Apple/Bender/gcc/config/i386/llvm-i386-target.h
URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/branches/Apple/Bender/gcc/config/i386/llvm-i386-target.h?rev=72546&r1=72545&r2=72546&view=diff
==============================================================================
--- llvm-gcc-4.2/branches/Apple/Bender/gcc/config/i386/llvm-i386-target.h (original)
+++ llvm-gcc-4.2/branches/Apple/Bender/gcc/config/i386/llvm-i386-target.h Thu May 28 17:19:12 2009
@@ -216,11 +216,12 @@
extern
bool llvm_x86_64_aggregate_partially_passed_in_regs(std::vector<const Type*>&,
- std::vector<const Type*>&);
+ std::vector<const Type*>&,
+ bool);
-#define LLVM_AGGREGATE_PARTIALLY_PASSED_IN_REGS(E, SE) \
- (TARGET_64BIT ? \
- llvm_x86_64_aggregate_partially_passed_in_regs((E), (SE)) : \
+#define LLVM_AGGREGATE_PARTIALLY_PASSED_IN_REGS(E, SE, ISR) \
+ (TARGET_64BIT ? \
+ llvm_x86_64_aggregate_partially_passed_in_regs((E), (SE), (ISR)) : \
false)
/* llvm_store_scalar_argument - Store scalar argument ARGVAL of type
Modified: llvm-gcc-4.2/branches/Apple/Bender/gcc/config/i386/llvm-i386.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/branches/Apple/Bender/gcc/config/i386/llvm-i386.cpp?rev=72546&r1=72545&r2=72546&view=diff
==============================================================================
--- llvm-gcc-4.2/branches/Apple/Bender/gcc/config/i386/llvm-i386.cpp (original)
+++ llvm-gcc-4.2/branches/Apple/Bender/gcc/config/i386/llvm-i386.cpp Thu May 28 17:19:12 2009
@@ -715,11 +715,9 @@
}
/* count_num_registers_uses - Return the number of GPRs and XMMs parameter
- register used so far. */
+ register used so far. Caller is responsible for initializing outputs. */
static void count_num_registers_uses(std::vector<const Type*> &ScalarElts,
unsigned &NumGPRs, unsigned &NumXMMs) {
- NumGPRs = 0;
- NumXMMs = 0;
for (unsigned i = 0, e = ScalarElts.size(); i != e; ++i) {
const Type *Ty = ScalarElts[i];
if (const VectorType *VTy = dyn_cast<VectorType>(Ty)) {
@@ -753,7 +751,8 @@
be passed in memory. */
bool
llvm_x86_64_aggregate_partially_passed_in_regs(std::vector<const Type*> &Elts,
- std::vector<const Type*> &ScalarElts) {
+ std::vector<const Type*> &ScalarElts,
+ bool isShadowReturn) {
// Counting number of GPRs and XMMs used so far. According to AMD64 ABI
// document: "If there are no registers available for any eightbyte of an
// argument, the whole argument is passed on the stack." X86-64 uses 6
@@ -762,7 +761,7 @@
// both parts will be in memory.
// FIXME: This is a temporary solution. To be removed when llvm has first
// class aggregate values.
- unsigned NumGPRs = 0;
+ unsigned NumGPRs = isShadowReturn ? 1 : 0;
unsigned NumXMMs = 0;
count_num_registers_uses(ScalarElts, NumGPRs, NumXMMs);
Modified: llvm-gcc-4.2/branches/Apple/Bender/gcc/llvm-abi.h
URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/branches/Apple/Bender/gcc/llvm-abi.h?rev=72546&r1=72545&r2=72546&view=diff
==============================================================================
--- llvm-gcc-4.2/branches/Apple/Bender/gcc/llvm-abi.h (original)
+++ llvm-gcc-4.2/branches/Apple/Bender/gcc/llvm-abi.h Thu May 28 17:19:12 2009
@@ -277,7 +277,7 @@
// the aggregate. Note, this routine should return false if none of the needed
// registers are available.
#ifndef LLVM_AGGREGATE_PARTIALLY_PASSED_IN_REGS
-#define LLVM_AGGREGATE_PARTIALLY_PASSED_IN_REGS(E, SE) \
+#define LLVM_AGGREGATE_PARTIALLY_PASSED_IN_REGS(E, SE, ISR) \
false
#endif
@@ -455,7 +455,8 @@
} else if (LLVM_SHOULD_PASS_AGGREGATE_AS_FCA(type, Ty)) {
C.HandleFCAArgument(Ty, type);
} else if (LLVM_SHOULD_PASS_AGGREGATE_IN_MIXED_REGS(type, Ty, Elts)) {
- if (!LLVM_AGGREGATE_PARTIALLY_PASSED_IN_REGS(Elts, ScalarElts))
+ if (!LLVM_AGGREGATE_PARTIALLY_PASSED_IN_REGS(Elts, ScalarElts,
+ C.isShadowReturn()))
PassInMixedRegisters(type, Ty, Elts, ScalarElts);
else {
C.HandleByValArgument(Ty, type);
Modified: llvm-gcc-4.2/branches/Apple/Bender/gcc/llvm-convert.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/branches/Apple/Bender/gcc/llvm-convert.cpp?rev=72546&r1=72545&r2=72546&view=diff
==============================================================================
--- llvm-gcc-4.2/branches/Apple/Bender/gcc/llvm-convert.cpp (original)
+++ llvm-gcc-4.2/branches/Apple/Bender/gcc/llvm-convert.cpp Thu May 28 17:19:12 2009
@@ -233,11 +233,16 @@
std::vector<Value*> LocStack;
std::vector<std::string> NameStack;
unsigned Offset;
+ bool isShadowRet;
FunctionPrologArgumentConversion(tree FnDecl,
Function::arg_iterator &ai,
const LLVMBuilder &B)
- : FunctionDecl(FnDecl), AI(ai), Builder(B), Offset(0) {}
+ : FunctionDecl(FnDecl), AI(ai), Builder(B), Offset(0),
+ isShadowRet(false) {}
+ bool isShadowReturn() {
+ return isShadowRet;
+ }
void setName(const std::string &Name) {
NameStack.push_back(Name);
}
@@ -258,7 +263,8 @@
assert(AI != Builder.GetInsertBlock()->getParent()->arg_end() &&
"No explicit return value?");
AI->setName("agg.result");
-
+
+ isShadowRet = true;
tree ResultDecl = DECL_RESULT(FunctionDecl);
tree RetTy = TREE_TYPE(TREE_TYPE(FunctionDecl));
if (TREE_CODE(RetTy) == TREE_CODE(TREE_TYPE(ResultDecl))) {
@@ -288,6 +294,7 @@
assert(AI != Builder.GetInsertBlock()->getParent()->arg_end() &&
"No explicit return value?");
AI->setName("scalar.result");
+ isShadowRet = true;
SET_DECL_LLVM(DECL_RESULT(FunctionDecl), AI);
++AI;
}
@@ -359,13 +366,14 @@
// isPassedByVal - Return true if an aggregate of the specified type will be
// passed in memory byval.
static bool isPassedByVal(tree type, const Type *Ty,
- std::vector<const Type*> &ScalarArgs) {
+ std::vector<const Type*> &ScalarArgs,
+ bool isShadowRet) {
if (LLVM_SHOULD_PASS_AGGREGATE_USING_BYVAL_ATTR(type, Ty))
return true;
std::vector<const Type*> Args;
if (LLVM_SHOULD_PASS_AGGREGATE_IN_MIXED_REGS(type, Ty, Args) &&
- LLVM_AGGREGATE_PARTIALLY_PASSED_IN_REGS(Args, ScalarArgs))
+ LLVM_AGGREGATE_PARTIALLY_PASSED_IN_REGS(Args, ScalarArgs, isShadowRet))
// We want to pass the whole aggregate in registers but only some of the
// registers are available.
return true;
@@ -542,7 +550,8 @@
(ArgTy->getTypeID()==Type::VectorTyID &&
LLVM_SHOULD_PASS_VECTOR_USING_BYVAL_ATTR(TREE_TYPE(Args))) ||
(!ArgTy->isSingleValueType() &&
- isPassedByVal(TREE_TYPE(Args), ArgTy, ScalarArgs))) {
+ isPassedByVal(TREE_TYPE(Args), ArgTy, ScalarArgs,
+ Client.isShadowReturn()))) {
// If the value is passed by 'invisible reference' or 'byval reference',
// the l-value for the argument IS the argument itself.
AI->setName(Name);
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