[llvm-branch-commits] [llvm-branch] r70456 - in /llvm/branches/Apple/Dib: lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp test/CodeGen/X86/2009-04-29-IndirectDestOperands.ll

[Bill Wendling]

Author: void
Date: Wed Apr 29 19:54:47 2009
New Revision: 70456

URL: http://llvm.org/viewvc/llvm-project?rev=70456&view=rev
Log:
--- Merging r70455 into '.':
A    test/CodeGen/X86/2009-04-29-IndirectDestOperands.ll
U    lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp

fix a regression handling indirect results: these need to be considered
memory operands otherwise the writebacks get lost when the inline asm
doesn't otherwise have side effects.  This fixes rdar://6839427, though
clang really shouldn't generate these anymore.

Added:
    llvm/branches/Apple/Dib/test/CodeGen/X86/2009-04-29-IndirectDestOperands.ll
      - copied unchanged from r70455, llvm/trunk/test/CodeGen/X86/2009-04-29-IndirectDestOperands.ll
Modified:
    llvm/branches/Apple/Dib/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp

Modified: llvm/branches/Apple/Dib/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Dib/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp?rev=70456&r1=70455&r2=70456&view=diff

==============================================================================
--- llvm/branches/Apple/Dib/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp (original)
+++ llvm/branches/Apple/Dib/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp Wed Apr 29 19:54:47 2009
@@ -5088,6 +5088,10 @@
       if (CType == TargetLowering::C_Memory)
         return true;
     }
+    
+    // Indirect operand accesses access memory.
+    if (CI.isIndirect)
+      return true;
   }
 
   return false;
@@ -5101,11 +5105,6 @@
   /// ConstraintOperands - Information about all of the constraints.
   std::vector<SDISelAsmOperandInfo> ConstraintOperands;
 
-  // We won't need to flush pending loads if this asm doesn't touch
-  // memory and is nonvolatile.
-  SDValue Chain = IA->hasSideEffects() ? getRoot() : DAG.getRoot();
-  SDValue Flag;
-
   std::set<unsigned> OutputRegs, InputRegs;
 
   // Do a prepass over the constraints, canonicalizing them, and building up the
@@ -5114,10 +5113,15 @@
     ConstraintInfos = IA->ParseConstraints();
 
   bool hasMemory = hasInlineAsmMemConstraint(ConstraintInfos, TLI);
-  // Flush pending loads if this touches memory (includes clobbering it).
-  // It's possible this is overly conservative.
-  if (hasMemory)
+  
+  SDValue Chain, Flag;
+  
+  // We won't need to flush pending loads if this asm doesn't touch
+  // memory and is nonvolatile.
+  if (hasMemory || IA->hasSideEffects())
     Chain = getRoot();
+  else
+    Chain = DAG.getRoot();
 
   unsigned ArgNo = 0;   // ArgNo - The argument of the CallInst.
   unsigned ResNo = 0;   // ResNo - The result number of the next output.
@@ -5495,6 +5499,7 @@
     SDValue OutVal = OutRegs.getCopyFromRegs(DAG, getCurDebugLoc(),
                                              Chain, &Flag);
     StoresToEmit.push_back(std::make_pair(OutVal, Ptr));
+
   }
 
   // Emit the non-flagged stores from the physregs.