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<p class="x_MsoNormal">>> cache view</p>
<p class="x_MsoNormal"> </p>
<p class="x_MsoNormal">Debugging cache problems is always fun, being able to do this is very helpful.</p>
<p class="x_MsoNormal"> </p>
<p class="x_MsoNormal">>> You can conceptually take this a step further.</p>
<p class="x_MsoNormal"> </p>
<p class="x_MsoNormal">This is exactly my point, these would be in a “target specific” range of prefix names</p>
<p class="x_MsoNormal"> </p>
<p class="x_MsoNormal">When specifying an address, there should be some set of “common names” that all CPUs use</p>
<p class="x_MsoNormal">For example: default:0x12345, phys:0x12345, or user:0x12345, kern:0x12345, hype:0x12345 -
</p>
<p class="x_MsoNormal"> for default (ie: current cpu mode/configuration, used when route is not specified)</p>
<p class="x_MsoNormal"> and memory spaces like physical, user, kernel, hypervisor
</p>
<p class="x_MsoNormal"> </p>
<p class="x_MsoNormal">In Ted’s example case</p>
<p class="x_MsoNormal"> </p>
<p class="x_MsoNormal">Ie: DSCR:0x12345 -> Translates to DSCR at address 0x12345</p>
<p class="x_MsoNormal"> </p>
<p class="x_MsoNormal">Where as ARM cores might have their own set of special names
</p>
<p class="x_MsoNormal"> </p>
<p class="x_MsoNormal">Field the route value needs two field– Major = (at least 16bits, ie: cpu core) and Minor (16bits) core specific.</p>
<p class="x_MsoNormal"> </p>
<p class="x_MsoNormal">Also need to reserve a range for “non-core” like accesses known only by the debug agent/server/hardware interface, the user might want to say: Name: “FOO” means - access_route(X), with configuration value: (some 32bit integer) that is
unknown at the debugger level, but know/understood at the lower level.</p>
<p class="x_MsoNormal"></p>
<p class="x_MsoNormal">Otherwise the permutations are endless</p>
<p class="x_MsoNormal"> </p>
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<div id="x_divRplyFwdMsg" dir="ltr"><font face="Calibri, sans-serif" color="#000000" style="font-size:11pt"><b>From:</b> Ted Woodward <ted.woodward@codeaurora.org><br>
<b>Sent:</b> Friday, May 25, 2018 9:44:53 AM<br>
<b>To:</b> Duane Ellis; 'Zdenek Prikryl'; lldb-dev@lists.llvm.org<br>
<b>Subject:</b> RE: [lldb-dev] Advice on architectures with multiple address spaces</font>
<div> </div>
</div>
</div>
<font size="2"><span style="font-size:11pt;">
<div class="PlainText">You can conceptually take this a step further. I used to work at Freescale, and supported SoCs with multiple heterogeneous cores. I provided memory spaces that let the user access these memory views:<br>
<br>
- DCSR (debug memory, a separate bus) through the SoC<br>
- CCSR (memory mapped config registers) through the SoC<br>
- cache coherent physical access through the SoC<br>
- uncached physical access through the SoC<br>
- virtual access through a given core (PPC or StarCore)<br>
- cache coherent physical access through a given core<br>
- uncached physical access through a given core<br>
<br>
I also provided a cache view which would allow the user to read/modify data and tag/status of the L1i, L1d, L2 and L3 caches.<br>
<br>
Basically, let the user access memory (whether it was RAM, memory mapped registers, or something else) any way he or she wants. What the core sees, what the SoC sees, cacheable, uncached (so, in the backing store), or what's in the caches.<br>
<br>
Once you have memory space support, you can make arbitrary spaces that show you whatever you want.<br>
<br>
--<br>
Qualcomm Innovation Center, Inc.<br>
The Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux Foundation Collaborative Project<br>
<br>
> -----Original Message-----<br>
> From: lldb-dev [<a href="mailto:lldb-dev-bounces@lists.llvm.org">mailto:lldb-dev-bounces@lists.llvm.org</a>] On Behalf Of Duane<br>
> Ellis via lldb-dev<br>
> Sent: Friday, May 25, 2018 9:40 AM<br>
> To: Zdenek Prikryl <prikryl@codasip.com><br>
> Cc: LLDB <lldb-dev@lists.llvm.org><br>
> Subject: Re: [lldb-dev] Advice on architectures with multiple address spaces<br>
> <br>
> As an FYI - this is another way of looking at Address spaces.. I like the word<br>
> “Route” to the memory space, i think it defines the problem better.<br>
> <br>
> All Armv8 chips effectively have - multiple address available to the debugger<br>
> <br>
> For instance, a JTAG debugger halts an ARMV8 cpu core, and the core halts in<br>
> user space - the question is what are the various address spaces a developer<br>
> might want to dump memory for:<br>
> <br>
> A) The current user space view of memory - to print a user space variable.<br>
> <br>
> B) The current Kernel (OS) view of memory - perhaps to print data structure in<br>
> kernel space<br>
> <br>
> C) At the hypervisor level which is the core’s view of physical memory - perhaps<br>
> the developer wants to examine a data structure or variable in the hypervisor.<br>
> <br>
> D) The ARM dap - has 3 (sometime 4) memory bus interfaces. They are<br>
> typically:<br>
> <br>
> Dap Port 0 - is typically the main system bus, often the same as the CPU’s<br>
> connection to the main system bus but not exactly<br>
> <br>
> ie: CPU access to a multi-media bus, via a dedicated connection/address range,<br>
> in contrast the main system bus has a different connection/route to the<br>
> multimedia memory<br>
> <br>
> Dap Port 1 - commonly provides access to various Coresight items for most of<br>
> the cores.<br>
> <br>
> Dap Port 2 - Varies - it could be an embedded Jtag controller - say with an<br>
> ARM9 or other JTAG only interface)<br>
> <br>
> Dap Port 3 - Varies - But often there are a few CORTEX M series CPUs - and I<br>
> believe each M3 on the target must have its own dedicated DAP interface.<br>
> <br>
> Assume for a moment, each of these address spaces have a name, there is the<br>
> default, then there needs to be various override methods<br>
> <br>
> Being able to some how specify these different “access routes” is helpful when<br>
> debugging hardware at the bare metal level.<br>
> <br>
> In the above, I’m not talking about looking at a complex variable (that would be<br>
> really nice, ie: cast a memory address to a fancy type)<br>
> <br>
> When debugging a SYSTEM - this becomes very important. Minimally being<br>
> able to have a “memory window” that can specify the route is helpful - for<br>
> example<br>
> <br>
> Dump Memory at : HyperVisor address 0x12345678<br>
> Dump Memory at: Kernel address 0x45678901234<br>
> Dump Memory using the system bus interface<br>
> <br>
> Across multiple cores - you have<br>
> <br>
> 1) Some very common routes - ie: “In the current context” vrs “Kernel context”<br>
> These should have commonly defined names.<br>
> <br>
> 2) Some platforms may need to add their own “platform defined” items (ie:<br>
> various armv8 routes would be semi-common)<br>
> <br>
> 3) Some VERY specific routes or methods that are developer defined - For<br>
> example when accessing memory via the DAP MEM_AP, there are special bits<br>
> in the control register (controlling security and/or cache control). Maybe the<br>
> developer needs to set those a special way when performing the memory<br>
> access when using this “route”<br>
> <br>
> The lauterbach jtag debugger can do the above now (it is an address prefix)<br>
> The ARM debugger (If I remember correctly) can also do this somewhere in its<br>
> script language.<br>
> <br>
> But tools like GDB and LLDB can not<br>
> <br>
> Because tools like GDB and LLDB have a scripting language (ie: Python) - being<br>
> able to write a script in that scripting language and be able to specify the<br>
> ROUTE is important.<br>
> <br>
> For example, a script that writes to a bunch of hardware locations via the<br>
> MEMAP (or possibly via different CPU) - to enable a feature so that you can run<br>
> test/validation code<br>
> <br>
> Examples include write to a hardware register to turn a CLOCK on, or<br>
> disable/enable a security protection bit so that you can view/write to the<br>
> memory location.<br>
> <br>
> -Duane.<br>
> <br>
> <br>
> > On May 25, 2018, at 5:35 AM, Zdenek Prikryl via lldb-dev <lldb-<br>
> dev@lists.llvm.org> wrote:<br>
> ><br>
> > Just a small update. I did create the class AddressBase. Class Address inherits<br>
> from it. When I compare it with my first implementation, it's cleaner than the<br>
> additional argument in API. I also implemented all operators to the class<br>
> AddressBase, so it behaves like addr_t if you're not interested in the address<br>
> space.<br>
> ><br>
> > I thought that I'd rename the class AddressBase to addr_t and see what would<br>
> happen, but then I realized that LLDB has python support and I'm not sure how<br>
> this works with classes, so, any advice here?<br>
> ><br>
> > Btw. I still don't have a clear answer to my question below...<br>
> ><br>
> > Zdenek<br>
> ><br>
> >> On 05/17/2018 03:45 PM, Zdenek Prikryl wrote:<br>
> >> Greg, Jim, what's your opinion here?<br>
> >><br>
> >> What about having the class Address (pretty much as it is right now)<br>
> >> and the<br>
> >><br>
> >> struct AddressBase {<br>
> >> lldb::addr_t m_address;<br>
> >> lldb::as_t m_address_space;<br>
> >> ...<br>
> >> }<br>
> >><br>
> >> Another question is, which classes/code should use Address, AddressBase,<br>
> and addr_t. Do you have any idea here?<br>
> >><br>
> >> Zdenek<br>
> >><br>
> >>> On 05/17/2018 01:38 PM, Pavel Labath wrote:<br>
> >>> The Address class may be suitable for the higher layers of lldb, but<br>
> >>> I don't think the it can ever be a blanket replacement for<br>
> >>> lldb::addr_t. It has way too much smartness built-in. We use addr_t<br>
> >>> in a lot of places that don't/shouldn't care about Targets,<br>
> >>> ExecutionContexts or Sections. All of lldb-server is one of those<br>
> >>> places, but this is also true for any low-level operation which only<br>
> >>> wants to work with real (virtual) addresses in the process address space.<br>
> >>><br>
> >>> On the other hand, replacing addr_t with a lighweight struct which<br>
> >>> is just adds some sort of an address space identifier seems like a<br>
> >>> useful thing, and would go a long way towards bringing Harward<br>
> >>> architecture support to lldb-server. (Note that we would still need<br>
> >>> an addr_t or something of that form to name the type of the<br>
> >>> "address" member of the struct, but pretty much all of the apis that<br>
> >>> currently take addr_t, could that the new struct instead).<br>
> >>><br>
> >>><br>
> >>> On Thu, 17 May 2018 at 12:01, Zdenek Prikryl via lldb-dev <<br>
> >>> lldb-dev@lists.llvm.org> wrote:<br>
> >>><br>
> >>><br>
> >>>> On 04/19/2018 08:22 PM, Jim Ingham wrote:<br>
> >>>>>> On Apr 19, 2018, at 10:54 AM, Greg Clayton <clayborg@gmail.com><br>
> wrote:<br>
> >>>>>><br>
> >>>>>><br>
> >>>>>><br>
> >>>>>>> On Apr 19, 2018, at 10:35 AM, Jim Ingham <jingham@apple.com><br>
> wrote:<br>
> >>>>>>><br>
> >>>>>>><br>
> >>>>>>><br>
> >>>>>>>> On Apr 19, 2018, at 9:44 AM, Greg Clayton via lldb-dev <<br>
> >>> lldb-dev@lists.llvm.org> wrote:<br>
> >>>>>>>><br>
> >>>>>>>><br>
> >>>>>>>>> On Apr 19, 2018, at 6:51 AM, Zdenek Prikryl via lldb-dev <<br>
> >>> lldb-dev@lists.llvm.org> wrote:<br>
> >>>>>>>>> Hi lldb developers,<br>
> >>>>>>>>><br>
> >>>>>>>>> I've been researching using lldb + gdbserver stub that is<br>
> >>>>>>>>> based on<br>
> >>> Harvard architecture with multiple address spaces (one program,<br>
> >>> multiple data). The commonly adopted approach is that everything is<br>
> >>> mapped to a single "virtual" address space. The stub reads/writes<br>
> >>> from/to the right memory based on the "virtual" addresses. But I'd<br>
> >>> like to use real addresses with address space id instead. So, I've<br>
> >>> started looking at what has to be changed.<br>
> >>>>>>>>> I've enhanced read/write commands (e.g. memory read --as <id><br>
> >>>>>>>>> ...)<br>
> >>> and RSP protocol (new packet) so that the stub can read/write properly.<br>
> >>> That wasn't that complicated.<br>
> >>>>>>>> It might be nice to add a new RSP protocol packet that asks for<br>
> >>>>>>>> the<br>
> >>> address space names/values:<br>
> >>>>>>>> qGetAddressSpaces<br>
> >>>>>>>><br>
> >>>>>>>> which would return something like:<br>
> >>>>>>>><br>
> >>>>>>>> 1:text;2:data1,3:data2<br>
> >>>>>>>><br>
> >>>>>>>> or it would return not supported. If we get a valid return<br>
> >>>>>>>> value<br>
> >>> from qGetAddressSpaces, then it enables the use of the new packet<br>
> >>> you added above. Else it defaults to using the old memory read functions.<br>
> >>>>>>>><br>
> >>>>>>>>> Now I've hit an issue with expressions<br>
> >>>>>>>>> (LLVMUserExpression.cpp) and<br>
> >>> local variables (DWARFExpressions.cpp). There is a lot of memory<br>
> >>> read/write functions that take just an address argument. Is the only<br>
> >>> way to go to patch all these calls? Has anybody solved it differently?<br>
> >>>>>>>> My quick take is that any APIs that take just a lldb::addr_t<br>
> >>>>>>>> would<br>
> >>> need to take something like:<br>
> >>>>>>>> struct SpaceAddress {<br>
> >>>>>>>> static constexpr uint32_t kNoSpace = 0; lldb::addr_t addr;<br>
> >>>>>>>> uint32_t space; };<br>
> >>>>>>>><br>
> >>>>>>> I'm curious why you are suggesting another kind of address,<br>
> >>>>>>> rather<br>
> >>> than adding this functionality to Address? When you actually go to<br>
> >>> resolve an Address in a target with a process you should have<br>
> >>> everything you need to know to give it the proper space. Then<br>
> >>> fixing the expression evaluator (and anything else that needs<br>
> >>> fixing) would be a matter of consistently using Address rather than<br>
> >>> lldb::addr_t. That seems general goodness, since converting to an<br>
> lldb::addr_t loses information.<br>
> >>>>>> If we accept lldb_private::Address in all APIs that take a<br>
> >>> lldb::addr_t currently, then we need to always be able to get to the<br>
> >>> target in case we need to add code to resolve the address<br>
> >>> everywhere. I am thinking of SpaceAddress as an augmented<br>
> >>> lldb::addr_t instead of a section<br>
> >>> + offset style address. Also, there will be addresses in the code<br>
> >>> + and data<br>
> >>> that do not exist in actual sections. Not saying that you couldn't<br>
> >>> use lldb_private::Address. I am open to suggestions though. So your<br>
> >>> though it remove all API that take lldb::addr_t and use<br>
> >>> lldb_private::Address everywhere all the time?<br>
> >>>>> It has always bugged me that we have these two ways of specifying<br>
> >>> addresses. Are there many/any places that have to resolve an<br>
> >>> Address to a real address in a process that don't have a Target<br>
> >>> readily available? That would surprise me. I would much rather<br>
> >>> centralize on one way than adding a third.<br>
> >>>>> Jim<br>
> >>>> So, does it make sense to start with lldb::addr_t replacement? In<br>
> >>>> other words, replace all instances of lldb::addr_t with Address.<br>
> >>>> It'd be the first step and first patch towards to the ability to<br>
> >>>> extend it in the future, right?<br>
> >>>> Zdenek<br>
> >>><br>
> >>>>><br>
> >>>>>>> Jim<br>
> >>>>>>><br>
> >>>>>>><br>
> >>>>>>>> We would need a default value for "space" (feel free to rename)<br>
> >>>>>>>> that<br>
> >>> indicates the default address space as most of our architectures<br>
> >>> would not need this support. If we added a constructor like:<br>
> >>>>>>>> SpaceAddress(lldb::addr_t a) : addr(a), space(kNoSpace) {}<br>
> >>>>>>>><br>
> >>>>>>>> Then all usages of the APIs that used to take just a "lldb::addr_t"<br>
> >>> would implicitly call this constructor and continue to act as<br>
> >>> needed. Then we would need to allow lldb_private::Address objects to<br>
> >>> resolve to a<br>
> >>> SpaceAddress:<br>
> >>>>>>>> SpaceAddress lldb_private::Address::GetSpaceAddress(Target<br>
> >>>>>>>> *target)<br>
> >>> const;<br>
> >>>>>>>> Since each lldb_private::Address has a section and each section<br>
> >>> knows its address space. Then the tricky part is finding all<br>
> >>> locations in the expression parser and converting those to track and use<br>
> SpaceAddress.<br>
> >>> We would probably need to modify the allocate memory packets in the<br>
> >>> RSP protocol to be able to allocate memory in any address space as well.<br>
> >>>>>>>> I didn't spend much time think about correct names above, so<br>
> >>>>>>>> feel<br>
> >>> free to suggest alternate naming.<br>
> >>>>>>>> Best advice:<br>
> >>>>>>>> - make things "just work" to keep changes to a minimum and<br>
> >>>>>>>> allowing<br>
> >>> lldb::addr_t to implicitly convert to a SpaceAddress easily<br>
> >>>>>>>> - when modifying RSP, make sure to check for existence of new<br>
> >>> feature before enabling it<br>
> >>>>>>>> - query for address space names so when we dump SpaceAddress we<br>
> >>>>>>>> can<br>
> >>> show something that means something to the user. This means we would<br>
> >>> need to query the address space names from the current<br>
> >>> lldb_private::Process for display.<br>
> >>>>>>>> Submitting might go easier if we break it down into chunks:<br>
> >>>>>>>> 1 - add SpaceAddress and modify all needed APIs to use it<br>
> >>>>>>>> 2 - add ProcessGDBRemote changes that enable this support<br>
> >>>>>>>><br>
> >>>>>>>> It will be great to support this as a first class citizen<br>
> >>>>>>>> within<br>
> >>> LLDB. You might ask the Hexagon folks if they have done anything in<br>
> >>> case they already support this is some shape or form.<br>
> >>>>>>>> Greg Clayton<br>
> >>>>>>>><br>
> >>>>>>>> _______________________________________________<br>
> >>>>>>>> lldb-dev mailing list<br>
> >>>>>>>> lldb-dev@lists.llvm.org<br>
> >>>>>>>> <a href="http://lists.llvm.org/cgi-bin/mailman/listinfo/lldb-dev">http://lists.llvm.org/cgi-bin/mailman/listinfo/lldb-dev</a><br>
> >>>> _______________________________________________<br>
> >>>> lldb-dev mailing list<br>
> >>>> lldb-dev@lists.llvm.org<br>
> >>>> <a href="http://lists.llvm.org/cgi-bin/mailman/listinfo/lldb-dev">http://lists.llvm.org/cgi-bin/mailman/listinfo/lldb-dev</a><br>
> >><br>
> ><br>
> > _______________________________________________<br>
> > lldb-dev mailing list<br>
> > lldb-dev@lists.llvm.org<br>
> > <a href="http://lists.llvm.org/cgi-bin/mailman/listinfo/lldb-dev">http://lists.llvm.org/cgi-bin/mailman/listinfo/lldb-dev</a><br>
> <br>
> _______________________________________________<br>
> lldb-dev mailing list<br>
> lldb-dev@lists.llvm.org<br>
> <a href="http://lists.llvm.org/cgi-bin/mailman/listinfo/lldb-dev">http://lists.llvm.org/cgi-bin/mailman/listinfo/lldb-dev</a><br>
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