<html><head><meta http-equiv="Content-Type" content="text/html charset=us-ascii"></head><body style="word-wrap: break-word; -webkit-nbsp-mode: space; -webkit-line-break: after-white-space;" class=""><br class=""><div><blockquote type="cite" class=""><div class="">On Sep 19, 2017, at 3:32 AM, Ramana <<a href="mailto:ramana.venkat83@gmail.com" class="">ramana.venkat83@gmail.com</a>> wrote:</div><br class="Apple-interchange-newline"><div class=""><div class="">Thank you so much Greg for your comments.<br class=""><br class=""><blockquote type="cite" class="">What architecture and os are you looking to support?<br class=""></blockquote><br class="">The OS is Linux and the primary use scenario is remote debugging.<br class="">Basically <a href="http://lists.llvm.org/pipermail/lldb-dev/2017-June/012445.html" class="">http://lists.llvm.org/pipermail/lldb-dev/2017-June/012445.html</a><br class="">is what I am trying to achieve and unfortunately that query did not<br class="">get much attention of the members.<br class=""><br class=""></div></div></blockquote><div><br class=""></div><div>Sorry about missing that. I will attempt to address this now:</div><div><br class=""></div><div><blockquote type="cite" class=""><pre style="white-space: pre-wrap; font-variant-ligatures: normal; orphans: 2; widows: 2;" class="">I have to implement a debugger for our HW which comprises of CPU+GPU where
the GPU is coded in OpenCL and is accelerated through OpenVX API in C++
application which runs on CPU. Our requirement is we should be able to
debug the code running on both CPU and GPU simultaneously with in the same
LLDB debug session.
</pre></blockquote><div><br class=""></div>Interesting. There are two ways to accomplish this:</div><div>1 - Treat the CPU as one target and the GPU as another.</div><div>2 - Treat the CPU and GPU as one target</div><div><br class=""></div><div>There are tricky areas for both, but for sanity I would suggest options #1. </div><div><br class=""></div><div>The tricky things with solution #1 is how to manage switching the targets between the CPU and GPU when events happen (CPU stops, or GPU stops while the other is running or already stopped). We don't have any formal "cooperative targets" yet, but we know they will exist in the future (client/server, vm code/vm debug of vm code, etc) so we will be happy to assist with questions if and when you get there.</div><div><br class=""></div><div>Option #2 would be tricky as this would be the first target that has multiple architectures within one process. IF the CPU and GPU be be controlled separately, then I would go with option #1 as LLDB currently always stops all threads in a process when any thread stops. You would also need to implement different register contexts for each thread within such a target. It hasn't been done yet, other than through the OS plug-ins that can provide extra threads to show in case you are doing some sort of user space threading.</div><div><br class=""></div><div>GPU debugging is tricky since they usually don't have a kernel or anything running on the hardware. Many examples I have seen so far will set a breakpoint in the program at some point by compiling the code with a breakpoint inserted, run to that breakpoint, and then if the user wants to continue, you recompile with breakpoints set at a later place and re-run the entire program again. Is your GPU any different? Since they will be used in an OpenCL context maybe your solution is better? We also had discussions on how to represent the various "waves" or sets of cores running the same program on the GPU. The easiest solution is to make one thread per distinct core on the GPU. The harder way would be to treat a thread as a collection of multiple cores and each variable value now can have one value per core. </div><div><br class=""></div><div>We also discussed how to single step in a GPU program. Since multiple cores on the GPU are concurrently running the same program, there was discussion on how single stepping would work. If you are stepping and run into an if/then statement, do you walk through the if and the else at all times? One GPU professional was saying this is how GPU folks would want to see single stepping happen. So I think there is a lot of stuff we need to think about when debugging GPUs in general.<br class=""><blockquote type="cite" class=""><pre style="white-space: pre-wrap; font-variant-ligatures: normal; orphans: 2; widows: 2;" class="">
Looking at the mailing list archive I see that there were discussions about
this feature in LLDB here
<a href="http://lists.llvm.org/pipermail/lldb-dev/2014-August/005074.html." class="">http://lists.llvm.org/pipermail/lldb-dev/2014-August/005074.html.</a>
What is the present status i.e. what works today and what is to be improved
of simultaneous multiple target debugging support in LLDB? Were the changes
contributed to LLDB mainstream?
</pre></blockquote><div><br class=""></div>So we currently have no cooperative targets in LLDB. This will be the first. We will need to discuss how hand off between the targets will occur and many other aspects. We will be sure to comment when and if you get to this point.<br class=""><blockquote type="cite" class=""><pre style="white-space: pre-wrap; font-variant-ligatures: normal; orphans: 2; widows: 2;" class="">
How can I access the material for <a href="http://llvm.org/devmtg/2014-10/#bof5" class="">http://llvm.org/devmtg/2014-10/#bof5</a>
(Future directions and features for LLDB)
</pre></blockquote><div>Over the years we have talked about this, but it never really got into any real amount of detail and I don't think the BoF notes will help you much.</div><blockquote type="cite" class=""><pre style="white-space: pre-wrap; font-variant-ligatures: normal; orphans: 2; widows: 2;" class="">Appreciate any help/guidance provided on the same.</pre></blockquote><div class=""><pre style="white-space: pre-wrap; font-variant-ligatures: normal; orphans: 2; widows: 2;" class="">I do believe approach #1 will work the best. The easiest thing you can do is to insulate LLDB from the GPU by putting it behind a GDB server boundary. Then we need to really figure out how we want to do GPU debugging. </pre></div></div><div>Hopefully this filled in your missing answers. Let me know what questions you have.</div><div><br class=""></div><div>Greg</div><br class=""><blockquote type="cite" class=""><div class=""><div class="">Thanks,<br class="">Ramana<br class=""><br class="">On Mon, Sep 18, 2017 at 8:46 PM, Greg Clayton <<a href="mailto:clayborg@gmail.com" class="">clayborg@gmail.com</a>> wrote:<br class=""><blockquote type="cite" class="">When supporting a new architecture, our preferred route is to modify lldb-server (a GDB server binary that supports native debugging) to support your architecture. Why? Because this gets you remote debugging for free. If you go this route, then you will subclass a lldb_private::NativeRegisterContext and that will get used by lldb-server (along with lldb_private::NativeProcessProtocol and lldb_private::NativeThreadProtocol). If you are adding a new architecture to Linux, then you will likely just need to subclass NativeRegisterContext.<br class=""><br class="">The other way to go is to subclass lldb_private::Process, lldb_private::Thread and lldb_private::RegisterContext.<br class=""><br class="">The nice thing about the lldb_private::Native* subclasses is that you only need to worry about native support. You can use #ifdef and use system header files, where as the non native route, those classes need to be able to debug remotely and you can't rely on system headers (lldb_private::Process, lldb_private::Thread and lldb_private::RegisterContext) since they can be compiled on any system for possibly local debugging (if current arch/vendor/os matches the current system) and remote (if you use lldb-server or another form for RPC).<br class=""><br class="">I would highly suggest getting going the lldb-server route as then you can use system header files that contain the definitions of the registers and you only need to worry about the native architecture. Linux uses ptrace and has much the the common code filtered out into correct classes (posix ptrace, linux specifics, and more.<br class=""><br class="">What architecture and os are you looking to support?<br class=""><br class="">Greg Clayton<br class=""><br class=""><blockquote type="cite" class="">On Sep 16, 2017, at 6:28 AM, Ramana <<a href="mailto:ramana.venkat83@gmail.com" class="">ramana.venkat83@gmail.com</a>> wrote:<br class=""><br class="">Thank you Greg for the detailed response.<br class=""><br class="">Can you please also shed some light on the NativeRegisterContext. When<br class="">do we need to subclass NativeRegisterContext and (how) are they<br class="">related to RegisterContext<OS>_<Arc<br class="">It appears that not all architectures having<br class="">RegisterContext<OS>_<Arch> have sub classed NativeRegisterContext.<br class=""><br class="">Regards,<br class="">Ramana<br class=""><br class="">On Thu, Sep 14, 2017 at 9:02 PM, Greg Clayton <<a href="mailto:clayborg@gmail.com" class="">clayborg@gmail.com</a>> wrote:<br class=""><blockquote type="cite" class="">Seems like this class was added for testing. RegisterInfoInterface is a class that creates a common API for getting lldb_private::RegisterInfo structures.<br class=""><br class="">A RegisterContext<OS>_<Arch> class uses one of these to be able to create a buffer large enough to store all registers defined in the RegisterInfoInterface and will actually read/write there registers to/from the debugged process. RegisterContext also caches registers values so they don't get read multiple times when the process hasn't resumed. A RegisterContext subclass is needed for each architecture so we can dynamically tell LLDB what the registers look like for a given architecture. It also provides abstractions by letting each register define its registers numbers for Compilers, DWARF, and generic register numbers like PC, SP, FP, return address, and flags registers. This allows the generic part of LLDB to say "I need you to give me the PC register for this thread" and we don't need to know that the register is "eip" on x86, "rip" on x86_64, "r15" on ARM. RegisterContext classes can also determine how registers are read/written: one at a time, or "get all general purpose regs" and "get all FPU regs". So if someone asks a RegisterContext to read the PC, it might go read all GPR regs and then mark them all as valid in the register context buffer cache, so if someone subsequently asks for SP, it will be already cached.<br class=""><br class="">So RegisterInfoInterface defines a common way that many RegisterContext classes can inherit from in order to give out the lldb_private::RegisterInfo (which is required by all subclasses of RegisterContext) info for a register context, and RegisterContext is the one that actually will interface with the debugged process in order to read/write and cache those registers as efficiently as possible for the current program being debugged.<br class=""><br class=""><blockquote type="cite" class="">On Sep 12, 2017, at 10:59 PM, Ramana via lldb-dev <<a href="mailto:lldb-dev@lists.llvm.org" class="">lldb-dev@lists.llvm.org</a>> wrote:<br class=""><br class="">Hi,<br class=""><br class="">When deriving RegisterContext<OS>_<Arch>, why some platforms (Arch+OS)<br class="">are deriving it from lldb_private::RegisterContext while others are<br class="">deriving from lldb_private::RegisterInfoInterface or in other words<br class="">how to decide on the base class to derive from between those two and<br class="">what are the implications?<br class=""><br class="">Thanks,<br class="">Ramana<br class="">_______________________________________________<br class="">lldb-dev mailing list<br class=""><a href="mailto:lldb-dev@lists.llvm.org" class="">lldb-dev@lists.llvm.org</a><br class="">http://lists.llvm.org/cgi-bin/mailman/listinfo/lldb-dev<br class=""></blockquote><br class=""></blockquote></blockquote><br class=""></blockquote></div></div></blockquote></div><br class=""></body></html>