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<p class="MsoNormal">Hi,<o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal">We are planning to implement support for various MIPS ABIs (O32, N32, O64 and N64) and application specific extensions (ASE) like DSP and SIMD.
<o:p></o:p></p>
<p class="MsoNormal">Additionally we are planning to implement microMIPS ISA as an extension to the existing MIPS32/64 bit cores.
<o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal">Currently there are around 20 MIPS cores added in the ArchSpec.
<o:p></o:p></p>
<p class="MsoNormal">If we consider the various combinations of ABI+ASE+Core then number of cores for MIPS in (ArchSpec::Core) would increase significantly.
<o:p></o:p></p>
<p class="MsoNormal">We would like to keep the number of base cores (mips32, mips32r2, mips64 etc.) as it is and evaluate ABIs/ASEs dynamically using elf::ELFHeader::e_flags.
<o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal">We would need to extend the ArchSpec with the information contained in elf::ELFHeader::e_flags.<o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal">ArchSpec will have say "m_flags", which will be set to elf::ELFHeader::e_flags.<o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal">Then this information can be used in <o:p></o:p></p>
<p class="MsoNormal">- ABI plugin to know the ABI contained in the ELF<o:p></o:p></p>
<p class="MsoNormal">- EmulateInstruction plugin to know the ASE (MicroMips for example) and then Emulate the instructions accordingly.<o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal">Please let us know your thoughts on this.<o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal">-Bhushan<o:p></o:p></p>
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