<div dir="ltr">I had to revert this CL with <span style="color:rgb(33,33,33);font-family:'helvetica neue',helvetica,arial,sans-serif;font-size:13px">rL270214 as it causes a build breakage (see </span><font color="#212121" face="helvetica neue, helvetica, arial, sans-serif"><a href="http://lab.llvm.org:8011/builders/lldb-x86_64-ubuntu-14.04-buildserver/builds/7282">http://lab.llvm.org:8011/builders/lldb-x86_64-ubuntu-14.04-buildserver/builds/7282</a>) and makes a false assumption regarding host-target compatibility. Please see my commit message in <a href="http://reviews.llvm.org/rL270214">http://reviews.llvm.org/rL270214</a> for more details.</font><div><font color="#212121" face="helvetica neue, helvetica, arial, sans-serif"><br></font></div><div><font color="#212121" face="helvetica neue, helvetica, arial, sans-serif">Thanks,</font></div><div><font color="#212121" face="helvetica neue, helvetica, arial, sans-serif">Tamas<br></font><br><div class="gmail_quote"><div dir="ltr">On Fri, May 20, 2016 at 1:13 PM Sagar Thakur via lldb-commits <<a href="mailto:lldb-commits@lists.llvm.org">lldb-commits@lists.llvm.org</a>> wrote:<br></div><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">Author: slthakur<br>
Date: Fri May 20 07:07:27 2016<br>
New Revision: 270207<br>
<br>
URL: <a href="http://llvm.org/viewvc/llvm-project?rev=270207&view=rev" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project?rev=270207&view=rev</a><br>
Log:<br>
[LLDB][MIPS] Fix floating point handling in case of thread step-out<br>
<br>
Patch by Nitesh Jain.<br>
<br>
Summary: These patch fix thread step-out for hard and soft float.<br>
<br>
Reviewers: clayborg, bhushan, jaydeep<br>
Subscribers: mohit.bhakkad, sagar, sdardis<br>
Differential: D20416<br>
<br>
Modified:<br>
lldb/trunk/include/lldb/Core/ArchSpec.h<br>
lldb/trunk/source/Plugins/ABI/SysV-mips/ABISysV_mips.cpp<br>
lldb/trunk/source/Plugins/ABI/SysV-mips/ABISysV_mips.h<br>
lldb/trunk/source/Plugins/ABI/SysV-mips64/ABISysV_mips64.cpp<br>
lldb/trunk/source/Plugins/ABI/SysV-mips64/ABISysV_mips64.h<br>
lldb/trunk/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp<br>
<br>
Modified: lldb/trunk/include/lldb/Core/ArchSpec.h<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/lldb/trunk/include/lldb/Core/ArchSpec.h?rev=270207&r1=270206&r2=270207&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/lldb/trunk/include/lldb/Core/ArchSpec.h?rev=270207&r1=270206&r2=270207&view=diff</a><br>
==============================================================================<br>
--- lldb/trunk/include/lldb/Core/ArchSpec.h (original)<br>
+++ lldb/trunk/include/lldb/Core/ArchSpec.h Fri May 20 07:07:27 2016<br>
@@ -75,6 +75,20 @@ public:<br>
eMIPSABI_mask = 0x000ff000<br>
};<br>
<br>
+ // MIPS Floating point ABI Values<br>
+ enum MIPS_ABI_FP<br>
+ {<br>
+ eMIPS_ABI_FP_ANY = 0x00000000,<br>
+ eMIPS_ABI_FP_DOUBLE = 0x00100000, // hard float / -mdouble-float<br>
+ eMIPS_ABI_FP_SINGLE = 0x00200000, // hard float / -msingle-float<br>
+ eMIPS_ABI_FP_SOFT = 0x00300000, // soft float<br>
+ eMIPS_ABI_FP_OLD_64 = 0x00400000, // -mips32r2 -mfp64<br>
+ eMIPS_ABI_FP_XX = 0x00500000, // -mfpxx<br>
+ eMIPS_ABI_FP_64 = 0x00600000, // -mips32r2 -mfp64<br>
+ eMIPS_ABI_FP_64A = 0x00700000, // -mips32r2 -mfp64 -mno-odd-spreg<br>
+ eMIPS_ABI_FP_mask = 0x00700000<br>
+ };<br>
+<br>
// ARM specific e_flags<br>
enum ARMeflags<br>
{<br>
<br>
Modified: lldb/trunk/source/Plugins/ABI/SysV-mips/ABISysV_mips.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/lldb/trunk/source/Plugins/ABI/SysV-mips/ABISysV_mips.cpp?rev=270207&r1=270206&r2=270207&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/lldb/trunk/source/Plugins/ABI/SysV-mips/ABISysV_mips.cpp?rev=270207&r1=270206&r2=270207&view=diff</a><br>
==============================================================================<br>
--- lldb/trunk/source/Plugins/ABI/SysV-mips/ABISysV_mips.cpp (original)<br>
+++ lldb/trunk/source/Plugins/ABI/SysV-mips/ABISysV_mips.cpp Fri May 20 07:07:27 2016<br>
@@ -397,7 +397,11 @@ ABISysV_mips::GetReturnValueObjectImpl (<br>
if (exe_ctx.GetTargetPtr() == nullptr || exe_ctx.GetProcessPtr() == nullptr)<br>
return return_valobj_sp;<br>
<br>
+ Target *target = exe_ctx.GetTargetPtr();<br>
+ const ArchSpec target_arch = target->GetArchitecture();<br>
+ ByteOrder target_byte_order = target_arch.GetByteOrder();<br>
value.SetCompilerType(return_compiler_type);<br>
+ uint32_t fp_flag = target_arch.GetFlags() & lldb_private::ArchSpec::eMIPS_ABI_FP_mask;<br>
<br>
RegisterContext *reg_ctx = thread.GetRegisterContext().get();<br>
if (!reg_ctx)<br>
@@ -409,8 +413,7 @@ ABISysV_mips::GetReturnValueObjectImpl (<br>
<br>
// In MIPS register "r2" (v0) holds the integer function return values<br>
const RegisterInfo *r2_reg_info = reg_ctx->GetRegisterInfoByName("r2", 0);<br>
- size_t bit_width = return_compiler_type.GetBitSize(&thread);<br>
-<br>
+ size_t bit_width = return_compiler_type.GetBitSize(&thread);<br>
if (return_compiler_type.IsIntegerType (is_signed))<br>
{<br>
switch (bit_width)<br>
@@ -467,37 +470,107 @@ ABISysV_mips::GetReturnValueObjectImpl (<br>
}<br>
else if (return_compiler_type.IsFloatingPointType (count, is_complex))<br>
{<br>
- const RegisterInfo *f0_info = reg_ctx->GetRegisterInfoByName("f0", 0);<br>
- const RegisterInfo *f1_info = reg_ctx->GetRegisterInfoByName("f1", 0);<br>
-<br>
- if (count == 1 && !is_complex)<br>
+ if (IsSoftFloat (fp_flag))<br>
{<br>
+ uint64_t raw_value = reg_ctx->ReadRegisterAsUnsigned(r2_reg_info, 0);<br>
+ if (count != 1 && is_complex)<br>
+ return return_valobj_sp;<br>
switch (bit_width)<br>
{<br>
default:<br>
return return_valobj_sp;<br>
- case 64:<br>
- {<br>
- static_assert(sizeof(double) == sizeof(uint64_t), "");<br>
- uint64_t raw_value;<br>
- raw_value = reg_ctx->ReadRegisterAsUnsigned(f0_info, 0) & UINT32_MAX;<br>
- raw_value |= ((uint64_t)(reg_ctx->ReadRegisterAsUnsigned(f1_info, 0) & UINT32_MAX)) << 32;<br>
- value.GetScalar() = *reinterpret_cast<double*>(&raw_value);<br>
- break;<br>
- }<br>
case 32:<br>
- {<br>
static_assert(sizeof(float) == sizeof(uint32_t), "");<br>
- uint32_t raw_value = reg_ctx->ReadRegisterAsUnsigned(f0_info, 0) & UINT32_MAX;<br>
- value.GetScalar() = *reinterpret_cast<float*>(&raw_value);<br>
+ value.GetScalar() = *((float *)(&raw_value));<br>
+ break;<br>
+ case 64:<br>
+ static_assert(sizeof(double) == sizeof(uint64_t), "");<br>
+ const RegisterInfo *r3_reg_info = reg_ctx->GetRegisterInfoByName("r3", 0);<br>
+ if (target_byte_order == eByteOrderLittle)<br>
+ raw_value = ((reg_ctx->ReadRegisterAsUnsigned(r3_reg_info, 0)) << 32) | raw_value;<br>
+ else<br>
+ raw_value = (raw_value << 32) | reg_ctx->ReadRegisterAsUnsigned(r3_reg_info, 0);<br>
+ value.GetScalar() = *((double *)(&raw_value));<br>
break;<br>
- }<br>
}<br>
}<br>
+<br>
else<br>
{<br>
- // not handled yet<br>
- return return_valobj_sp;<br>
+ const RegisterInfo *f0_info = reg_ctx->GetRegisterInfoByName("f0", 0);<br>
+ RegisterValue f0_value;<br>
+ DataExtractor f0_data;<br>
+ reg_ctx->ReadRegister (f0_info, f0_value);<br>
+ f0_value.GetData(f0_data);<br>
+ lldb::offset_t offset = 0;<br>
+<br>
+ if (count == 1 && !is_complex)<br>
+ {<br>
+ switch (bit_width)<br>
+ {<br>
+ default:<br>
+ return return_valobj_sp;<br>
+ case 64:<br>
+ {<br>
+ static_assert(sizeof(double) == sizeof(uint64_t), "");<br>
+ const RegisterInfo *f1_info = reg_ctx->GetRegisterInfoByName("f1", 0);<br>
+ RegisterValue f1_value;<br>
+ DataExtractor f1_data;<br>
+ reg_ctx->ReadRegister (f1_info, f1_value);<br>
+ DataExtractor *copy_from_extractor = nullptr;<br>
+ DataBufferSP data_sp (new DataBufferHeap(8, 0));<br>
+ DataExtractor return_ext (data_sp,<br>
+ target_byte_order,<br>
+ target->GetArchitecture().GetAddressByteSize());<br>
+<br>
+ if (target_byte_order == eByteOrderLittle)<br>
+ {<br>
+ copy_from_extractor = &f0_data;<br>
+ copy_from_extractor->CopyByteOrderedData (offset,<br>
+ 4,<br>
+ data_sp->GetBytes(),<br>
+ 4,<br>
+ target_byte_order);<br>
+ f1_value.GetData(f1_data);<br>
+ copy_from_extractor = &f1_data;<br>
+ copy_from_extractor->CopyByteOrderedData (offset,<br>
+ 4,<br>
+ data_sp->GetBytes() + 4,<br>
+ 4,<br>
+ target_byte_order);<br>
+ }<br>
+ else<br>
+ {<br>
+ copy_from_extractor = &f0_data;<br>
+ copy_from_extractor->CopyByteOrderedData (offset,<br>
+ 4,<br>
+ data_sp->GetBytes() + 4,<br>
+ 4,<br>
+ target_byte_order);<br>
+ f1_value.GetData(f1_data);<br>
+ copy_from_extractor = &f1_data;<br>
+ copy_from_extractor->CopyByteOrderedData (offset,<br>
+ 4,<br>
+ data_sp->GetBytes(),<br>
+ 4,<br>
+ target_byte_order);<br>
+ }<br>
+ value.GetScalar() = (double) return_ext.GetDouble(&offset);<br>
+ break;<br>
+ }<br>
+ case 32:<br>
+ {<br>
+ static_assert(sizeof(float) == sizeof(uint32_t), "");<br>
+ value.GetScalar() = (float) f0_data.GetFloat(&offset);<br>
+ break;<br>
+ }<br>
+ }<br>
+ }<br>
+ else<br>
+ {<br>
+ // not handled yet<br>
+ return return_valobj_sp;<br>
+ }<br>
}<br>
}<br>
else<br>
@@ -563,6 +636,12 @@ ABISysV_mips::RegisterIsVolatile (const<br>
}<br>
<br>
bool<br>
+ABISysV_mips::IsSoftFloat(uint32_t fp_flags) const<br>
+{<br>
+ return (fp_flags == lldb_private::ArchSpec::eMIPS_ABI_FP_SOFT);<br>
+}<br>
+<br>
+bool<br>
ABISysV_mips::RegisterIsCalleeSaved (const RegisterInfo *reg_info)<br>
{<br>
if (reg_info)<br>
<br>
Modified: lldb/trunk/source/Plugins/ABI/SysV-mips/ABISysV_mips.h<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/lldb/trunk/source/Plugins/ABI/SysV-mips/ABISysV_mips.h?rev=270207&r1=270206&r2=270207&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/lldb/trunk/source/Plugins/ABI/SysV-mips/ABISysV_mips.h?rev=270207&r1=270206&r2=270207&view=diff</a><br>
==============================================================================<br>
--- lldb/trunk/source/Plugins/ABI/SysV-mips/ABISysV_mips.h (original)<br>
+++ lldb/trunk/source/Plugins/ABI/SysV-mips/ABISysV_mips.h Fri May 20 07:07:27 2016<br>
@@ -54,6 +54,9 @@ public:<br>
RegisterIsVolatile(const lldb_private::RegisterInfo *reg_info) override;<br>
<br>
bool<br>
+ IsSoftFloat(uint32_t fp_flag) const;<br>
+<br>
+ bool<br>
CallFrameAddressIsValid(lldb::addr_t cfa) override<br>
{<br>
// Make sure the stack call frame addresses are 8 byte aligned<br>
<br>
Modified: lldb/trunk/source/Plugins/ABI/SysV-mips64/ABISysV_mips64.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/lldb/trunk/source/Plugins/ABI/SysV-mips64/ABISysV_mips64.cpp?rev=270207&r1=270206&r2=270207&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/lldb/trunk/source/Plugins/ABI/SysV-mips64/ABISysV_mips64.cpp?rev=270207&r1=270206&r2=270207&view=diff</a><br>
==============================================================================<br>
--- lldb/trunk/source/Plugins/ABI/SysV-mips64/ABISysV_mips64.cpp (original)<br>
+++ lldb/trunk/source/Plugins/ABI/SysV-mips64/ABISysV_mips64.cpp Fri May 20 07:07:27 2016<br>
@@ -372,9 +372,11 @@ ABISysV_mips64::GetReturnValueObjectImpl<br>
return return_valobj_sp;<br>
<br>
Target *target = exe_ctx.GetTargetPtr();<br>
- ByteOrder target_byte_order = target->GetArchitecture().GetByteOrder();<br>
+ const ArchSpec target_arch = target->GetArchitecture();<br>
+ ByteOrder target_byte_order = target_arch.GetByteOrder();<br>
const size_t byte_size = return_compiler_type.GetByteSize(nullptr);<br>
const uint32_t type_flags = return_compiler_type.GetTypeInfo(nullptr);<br>
+ uint32_t fp_flag = target_arch.GetFlags () & lldb_private::ArchSpec::eMIPS_ABI_FP_mask;<br>
<br>
const RegisterInfo *r2_info = reg_ctx->GetRegisterInfoByName("r2", 0);<br>
const RegisterInfo *r3_info = reg_ctx->GetRegisterInfoByName("r3", 0);<br>
@@ -438,20 +440,52 @@ ABISysV_mips64::GetReturnValueObjectImpl<br>
{<br>
// Don't handle complex yet.<br>
}<br>
+ else if (IsSoftFloat(fp_flag))<br>
+ {<br>
+ uint64_t raw_value = reg_ctx->ReadRegisterAsUnsigned(r2_info, 0);<br>
+ switch (byte_size)<br>
+ {<br>
+ case sizeof(float):<br>
+ value.GetScalar() = *((float *)(&raw_value));<br>
+ success = true;<br>
+ break;<br>
+ case sizeof(double):<br>
+ value.GetScalar() = *((double *)(&raw_value));<br>
+ success = true;<br>
+ break;<br>
+ case sizeof(long double):<br>
+ uint64_t result[2];<br>
+ if (target_byte_order == eByteOrderLittle)<br>
+ {<br>
+ result[0] = raw_value;<br>
+ result[1] = reg_ctx->ReadRegisterAsUnsigned(r3_info, 0);<br>
+ value.GetScalar() = *((long double *)(result));<br>
+ }<br>
+ else<br>
+ {<br>
+ result[0] = reg_ctx->ReadRegisterAsUnsigned(r3_info, 0);<br>
+ result[1] = raw_value;<br>
+ value.GetScalar() = *((long double *)(result));<br>
+ }<br>
+ success = true;<br>
+ break;<br>
+ }<br>
+<br>
+ }<br>
else<br>
{<br>
if (byte_size <= sizeof(long double))<br>
{<br>
const RegisterInfo *f0_info = reg_ctx->GetRegisterInfoByName("f0", 0);<br>
- const RegisterInfo *f2_info = reg_ctx->GetRegisterInfoByName("f2", 0);<br>
- RegisterValue f0_value, f2_value;<br>
- DataExtractor f0_data, f2_data;<br>
+<br>
+ RegisterValue f0_value;<br>
+ DataExtractor f0_data;<br>
<br>
reg_ctx->ReadRegister (f0_info, f0_value);<br>
- reg_ctx->ReadRegister (f2_info, f2_value);<br>
+<br>
<br>
f0_value.GetData(f0_data);<br>
- f2_value.GetData(f2_data);<br>
+<br>
<br>
lldb::offset_t offset = 0;<br>
if (byte_size == sizeof(float))<br>
@@ -466,6 +500,10 @@ ABISysV_mips64::GetReturnValueObjectImpl<br>
}<br>
else if (byte_size == sizeof(long double))<br>
{<br>
+ const RegisterInfo *f2_info = reg_ctx->GetRegisterInfoByName("f2", 0);<br>
+ RegisterValue f2_value;<br>
+ DataExtractor f2_data;<br>
+ reg_ctx->ReadRegister (f2_info, f2_value);<br>
DataExtractor *copy_from_extractor = nullptr;<br>
DataBufferSP data_sp (new DataBufferHeap(16, 0));<br>
DataExtractor return_ext (data_sp,<br>
@@ -474,21 +512,37 @@ ABISysV_mips64::GetReturnValueObjectImpl<br>
<br>
if (target_byte_order == eByteOrderLittle)<br>
{<br>
- f0_data.Append(f2_data);<br>
copy_from_extractor = &f0_data;<br>
+ copy_from_extractor->CopyByteOrderedData (0,<br>
+ 8,<br>
+ data_sp->GetBytes(),<br>
+ byte_size - 8,<br>
+ target_byte_order);<br>
+ f2_value.GetData(f2_data);<br>
+ copy_from_extractor = &f2_data;<br>
+ copy_from_extractor->CopyByteOrderedData (0,<br>
+ 8,<br>
+ data_sp->GetBytes() + 8,<br>
+ byte_size - 8,<br>
+ target_byte_order);<br>
}<br>
else<br>
{<br>
- f2_data.Append(f0_data);<br>
- copy_from_extractor = &f2_data;<br>
+ copy_from_extractor = &f0_data;<br>
+ copy_from_extractor->CopyByteOrderedData (0,<br>
+ 8,<br>
+ data_sp->GetBytes() + 8,<br>
+ byte_size - 8,<br>
+ target_byte_order);<br>
+ f2_value.GetData(f2_data);<br>
+ copy_from_extractor = &f2_data;<br>
+ copy_from_extractor->CopyByteOrderedData (0,<br>
+ 8,<br>
+ data_sp->GetBytes(),<br>
+ byte_size - 8,<br>
+ target_byte_order);<br>
}<br>
<br>
- copy_from_extractor->CopyByteOrderedData (0,<br>
- byte_size,<br>
- data_sp->GetBytes(),<br>
- byte_size,<br>
- target_byte_order);<br>
-<br>
return_valobj_sp = ValueObjectConstResult::Create (&thread,<br>
return_compiler_type,<br>
ConstString(""),<br>
@@ -780,6 +834,12 @@ ABISysV_mips64::RegisterIsVolatile (cons<br>
}<br>
<br>
bool<br>
+ABISysV_mips64::IsSoftFloat (uint32_t fp_flag) const<br>
+{<br>
+ return (fp_flag == lldb_private::ArchSpec::eMIPS_ABI_FP_SOFT);<br>
+}<br>
+<br>
+bool<br>
ABISysV_mips64::RegisterIsCalleeSaved (const RegisterInfo *reg_info)<br>
{<br>
if (reg_info)<br>
<br>
Modified: lldb/trunk/source/Plugins/ABI/SysV-mips64/ABISysV_mips64.h<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/lldb/trunk/source/Plugins/ABI/SysV-mips64/ABISysV_mips64.h?rev=270207&r1=270206&r2=270207&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/lldb/trunk/source/Plugins/ABI/SysV-mips64/ABISysV_mips64.h?rev=270207&r1=270206&r2=270207&view=diff</a><br>
==============================================================================<br>
--- lldb/trunk/source/Plugins/ABI/SysV-mips64/ABISysV_mips64.h (original)<br>
+++ lldb/trunk/source/Plugins/ABI/SysV-mips64/ABISysV_mips64.h Fri May 20 07:07:27 2016<br>
@@ -53,6 +53,9 @@ public:<br>
bool<br>
RegisterIsVolatile(const lldb_private::RegisterInfo *reg_info) override;<br>
<br>
+ bool<br>
+ IsSoftFloat(uint32_t fp_flag) const;<br>
+<br>
// The SysV mips ABI requires that stack frames be 16 byte aligned.<br>
// When there is a trap handler on the stack, e.g. _sigtramp in userland<br>
// code, we've seen that the stack pointer is often not aligned properly<br>
<br>
Modified: lldb/trunk/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/lldb/trunk/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp?rev=270207&r1=270206&r2=270207&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/lldb/trunk/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp?rev=270207&r1=270206&r2=270207&view=diff</a><br>
==============================================================================<br>
--- lldb/trunk/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp (original)<br>
+++ lldb/trunk/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp Fri May 20 07:07:27 2016<br>
@@ -33,6 +33,7 @@<br>
#include "llvm/ADT/StringRef.h"<br>
#include "llvm/Support/ARMBuildAttributes.h"<br>
#include "llvm/Support/MathExtras.h"<br>
+#include "llvm/Support/MipsABIFlags.h"<br>
<br>
#define CASE_AND_STREAM(s, def, width) \<br>
case def: s->Printf("%-*s", width, #def); break;<br>
@@ -1706,8 +1707,39 @@ ObjectFileELF::GetSectionHeaderInfo(Sect<br>
<br>
if (section_size && (set_data (data, sheader.sh_offset, section_size) == section_size))<br>
{<br>
- lldb::offset_t ase_offset = 12; // MIPS ABI Flags Version: 0<br>
- arch_flags |= data.GetU32 (&ase_offset);<br>
+ // MIPS ASE Mask is at offset 12 in MIPS.abiflags section<br>
+ lldb::offset_t offset = 12; // MIPS ABI Flags Version: 0<br>
+ arch_flags |= data.GetU32 (&offset);<br>
+<br>
+ // The floating point ABI is at offset 7<br>
+ offset = 7;<br>
+ switch (data.GetU8 (&offset))<br>
+ {<br>
+ case llvm::Mips::Val_GNU_MIPS_ABI_FP_ANY :<br>
+ arch_flags |= lldb_private::ArchSpec::eMIPS_ABI_FP_ANY;<br>
+ break;<br>
+ case llvm::Mips::Val_GNU_MIPS_ABI_FP_DOUBLE :<br>
+ arch_flags |= lldb_private::ArchSpec::eMIPS_ABI_FP_DOUBLE;<br>
+ break;<br>
+ case llvm::Mips::Val_GNU_MIPS_ABI_FP_SINGLE :<br>
+ arch_flags |= lldb_private::ArchSpec::eMIPS_ABI_FP_SINGLE;<br>
+ break;<br>
+ case llvm::Mips::Val_GNU_MIPS_ABI_FP_SOFT :<br>
+ arch_flags |= lldb_private::ArchSpec::eMIPS_ABI_FP_SOFT;<br>
+ break;<br>
+ case llvm::Mips::Val_GNU_MIPS_ABI_FP_OLD_64 :<br>
+ arch_flags |= lldb_private::ArchSpec::eMIPS_ABI_FP_OLD_64;<br>
+ break;<br>
+ case llvm::Mips::Val_GNU_MIPS_ABI_FP_XX :<br>
+ arch_flags |= lldb_private::ArchSpec::eMIPS_ABI_FP_XX;<br>
+ break;<br>
+ case llvm::Mips::Val_GNU_MIPS_ABI_FP_64 :<br>
+ arch_flags |= lldb_private::ArchSpec::eMIPS_ABI_FP_64;<br>
+ break;<br>
+ case llvm::Mips::Val_GNU_MIPS_ABI_FP_64A :<br>
+ arch_flags |= lldb_private::ArchSpec::eMIPS_ABI_FP_64A;<br>
+ break;<br>
+ }<br>
}<br>
}<br>
// Settings appropriate ArchSpec ABI Flags<br>
<br>
<br>
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</blockquote></div></div></div>