[Lldb-commits] [PATCH] D77044: Extend max register size to accommodate AArch64 SVE vector regs

Pavel Labath via Phabricator via lldb-commits lldb-commits at lists.llvm.org
Wed Apr 1 05:30:57 PDT 2020


labath added a comment.

Sounds fairly noncontroversial. I don't think we have too many of these objects floating around, but if it turns out we do, we could switch to a SmallVector to optimize for the common case of smaller registers.



================
Comment at: lldb/include/lldb/Utility/RegisterValue.h:264
                                          // register for any supported target.
-    uint8_t length;
+    uint32_t length;
     lldb::ByteOrder byte_order;
----------------
how about we stick to uint16_t here ?


================
Comment at: lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServerLLGS.cpp:2051
   // Parse out the value.
-  uint8_t reg_bytes[32]; // big enough to support up to 256 bit ymmN register
+  uint8_t reg_bytes[256]; // big enough to support up to 256 byte AArch64 SVE
+                          // registers
----------------
danielkiss wrote:
> Could we use the kMaxRegisterByteSize here? 
An excellent idea.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D77044/new/

https://reviews.llvm.org/D77044





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