[Lldb-commits] [lldb] 4b63ca1 - [Mips] Use appropriate private label prefix based on Mips ABI
Mirko Brkusanin via lldb-commits
lldb-commits at lists.llvm.org
Wed Oct 23 03:25:26 PDT 2019
Author: Mirko Brkusanin
Date: 2019-10-23T12:24:35+02:00
New Revision: 4b63ca1379a8a6399c3d29560623ee832c818919
URL: https://github.com/llvm/llvm-project/commit/4b63ca1379a8a6399c3d29560623ee832c818919
DIFF: https://github.com/llvm/llvm-project/commit/4b63ca1379a8a6399c3d29560623ee832c818919.diff
LOG: [Mips] Use appropriate private label prefix based on Mips ABI
MipsMCAsmInfo was using '$' prefix for Mips32 and '.L' for Mips64
regardless of -target-abi option. By passing MCTargetOptions to MCAsmInfo
we can find out Mips ABI and pick appropriate prefix.
Tags: #llvm, #clang, #lldb
Differential Revision: https://reviews.llvm.org/D66795
Added:
llvm/test/MC/Mips/private-prefix.s
Modified:
clang/lib/Parse/ParseStmtAsm.cpp
clang/tools/driver/cc1as_main.cpp
lldb/source/Plugins/Disassembler/llvm/DisassemblerLLVMC.cpp
lldb/source/Plugins/Instruction/MIPS/EmulateInstructionMIPS.cpp
lldb/source/Plugins/Instruction/MIPS64/EmulateInstructionMIPS64.cpp
llvm/include/llvm/Support/TargetRegistry.h
llvm/lib/CodeGen/LLVMTargetMachine.cpp
llvm/lib/MC/MCDisassembler/Disassembler.cpp
llvm/lib/Object/ModuleSymbolTable.cpp
llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCTargetDesc.cpp
llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCAsmInfo.cpp
llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCAsmInfo.h
llvm/lib/Target/ARC/MCTargetDesc/ARCMCTargetDesc.cpp
llvm/lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.cpp
llvm/lib/Target/AVR/MCTargetDesc/AVRMCAsmInfo.cpp
llvm/lib/Target/AVR/MCTargetDesc/AVRMCAsmInfo.h
llvm/lib/Target/BPF/MCTargetDesc/BPFMCAsmInfo.h
llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCTargetDesc.cpp
llvm/lib/Target/Lanai/MCTargetDesc/LanaiMCAsmInfo.cpp
llvm/lib/Target/Lanai/MCTargetDesc/LanaiMCAsmInfo.h
llvm/lib/Target/MSP430/MCTargetDesc/MSP430MCAsmInfo.cpp
llvm/lib/Target/MSP430/MCTargetDesc/MSP430MCAsmInfo.h
llvm/lib/Target/Mips/MCTargetDesc/MipsMCAsmInfo.cpp
llvm/lib/Target/Mips/MCTargetDesc/MipsMCAsmInfo.h
llvm/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.cpp
llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXMCAsmInfo.cpp
llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXMCAsmInfo.h
llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp
llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCTargetDesc.cpp
llvm/lib/Target/Sparc/MCTargetDesc/SparcMCTargetDesc.cpp
llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCTargetDesc.cpp
llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCAsmInfo.cpp
llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCAsmInfo.h
llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCTargetDesc.cpp
llvm/lib/Target/X86/MCTargetDesc/X86MCTargetDesc.cpp
llvm/lib/Target/XCore/MCTargetDesc/XCoreMCTargetDesc.cpp
llvm/test/CodeGen/Mips/compactbranches/no-beqzc-bnezc.ll
llvm/test/MC/Mips/macro-li.d.s
llvm/test/MC/Mips/macro-li.s.s
llvm/tools/dsymutil/DwarfStreamer.cpp
llvm/tools/llvm-cfi-verify/lib/FileAnalysis.cpp
llvm/tools/llvm-dwp/llvm-dwp.cpp
llvm/tools/llvm-exegesis/lib/Analysis.cpp
llvm/tools/llvm-jitlink/llvm-jitlink.cpp
llvm/tools/llvm-mc-assemble-fuzzer/llvm-mc-assemble-fuzzer.cpp
llvm/tools/llvm-mc/Disassembler.cpp
llvm/tools/llvm-mc/Disassembler.h
llvm/tools/llvm-mc/llvm-mc.cpp
llvm/tools/llvm-mca/llvm-mca.cpp
llvm/tools/llvm-objdump/MachODump.cpp
llvm/tools/llvm-objdump/llvm-objdump.cpp
llvm/tools/llvm-rtdyld/llvm-rtdyld.cpp
llvm/tools/sancov/sancov.cpp
llvm/unittests/DebugInfo/DWARF/DwarfGenerator.cpp
llvm/unittests/ExecutionEngine/JITLink/JITLinkTestCommon.cpp
llvm/unittests/MC/DwarfLineTables.cpp
llvm/unittests/MC/MCInstPrinter.cpp
Removed:
################################################################################
diff --git a/clang/lib/Parse/ParseStmtAsm.cpp b/clang/lib/Parse/ParseStmtAsm.cpp
index 1153c2510b05..6b301667d3f2 100644
--- a/clang/lib/Parse/ParseStmtAsm.cpp
+++ b/clang/lib/Parse/ParseStmtAsm.cpp
@@ -582,7 +582,10 @@ StmtResult Parser::ParseMicrosoftAsmStatement(SourceLocation AsmLoc) {
llvm::join(TO.Features.begin(), TO.Features.end(), ",");
std::unique_ptr<llvm::MCRegisterInfo> MRI(TheTarget->createMCRegInfo(TT));
- std::unique_ptr<llvm::MCAsmInfo> MAI(TheTarget->createMCAsmInfo(*MRI, TT));
+ // FIXME: init MCOptions from sanitizer flags here.
+ llvm::MCTargetOptions MCOptions;
+ std::unique_ptr<llvm::MCAsmInfo> MAI(
+ TheTarget->createMCAsmInfo(*MRI, TT, MCOptions));
// Get the instruction descriptor.
std::unique_ptr<llvm::MCInstrInfo> MII(TheTarget->createMCInstrInfo());
std::unique_ptr<llvm::MCObjectFileInfo> MOFI(new llvm::MCObjectFileInfo());
@@ -602,8 +605,6 @@ StmtResult Parser::ParseMicrosoftAsmStatement(SourceLocation AsmLoc) {
std::unique_ptr<llvm::MCAsmParser> Parser(
createMCAsmParser(TempSrcMgr, Ctx, *Str.get(), *MAI));
- // FIXME: init MCOptions from sanitizer flags here.
- llvm::MCTargetOptions MCOptions;
std::unique_ptr<llvm::MCTargetAsmParser> TargetParser(
TheTarget->createMCAsmParser(*STI, *Parser, *MII, MCOptions));
diff --git a/clang/tools/driver/cc1as_main.cpp b/clang/tools/driver/cc1as_main.cpp
index ae58a95f36f5..53c8a9d642dc 100644
--- a/clang/tools/driver/cc1as_main.cpp
+++ b/clang/tools/driver/cc1as_main.cpp
@@ -353,7 +353,9 @@ static bool ExecuteAssembler(AssemblerInvocation &Opts,
std::unique_ptr<MCRegisterInfo> MRI(TheTarget->createMCRegInfo(Opts.Triple));
assert(MRI && "Unable to create target register info!");
- std::unique_ptr<MCAsmInfo> MAI(TheTarget->createMCAsmInfo(*MRI, Opts.Triple));
+ MCTargetOptions MCOptions;
+ std::unique_ptr<MCAsmInfo> MAI(
+ TheTarget->createMCAsmInfo(*MRI, Opts.Triple, MCOptions));
assert(MAI && "Unable to create target asm info!");
// Ensure MCAsmInfo initialization occurs before any use, otherwise sections
@@ -377,7 +379,6 @@ static bool ExecuteAssembler(AssemblerInvocation &Opts,
// MCObjectFileInfo needs a MCContext reference in order to initialize itself.
std::unique_ptr<MCObjectFileInfo> MOFI(new MCObjectFileInfo());
- MCTargetOptions MCOptions;
MCContext Ctx(MAI.get(), MRI.get(), MOFI.get(), &SrcMgr, &MCOptions);
bool PIC = false;
diff --git a/lldb/source/Plugins/Disassembler/llvm/DisassemblerLLVMC.cpp b/lldb/source/Plugins/Disassembler/llvm/DisassemblerLLVMC.cpp
index 28c9de2c1e96..fa9dae0c816e 100644
--- a/lldb/source/Plugins/Disassembler/llvm/DisassemblerLLVMC.cpp
+++ b/lldb/source/Plugins/Disassembler/llvm/DisassemblerLLVMC.cpp
@@ -20,6 +20,7 @@
#include "llvm/MC/MCInstrInfo.h"
#include "llvm/MC/MCRegisterInfo.h"
#include "llvm/MC/MCSubtargetInfo.h"
+#include "llvm/MC/MCTargetOptions.h"
#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/ScopedPrinter.h"
#include "llvm/Support/TargetRegistry.h"
@@ -949,8 +950,9 @@ DisassemblerLLVMC::MCDisasmInstance::Create(const char *triple, const char *cpu,
if (!subtarget_info_up)
return Instance();
+ llvm::MCTargetOptions MCOptions;
std::unique_ptr<llvm::MCAsmInfo> asm_info_up(
- curr_target->createMCAsmInfo(*reg_info_up, triple));
+ curr_target->createMCAsmInfo(*reg_info_up, triple, MCOptions));
if (!asm_info_up)
return Instance();
@@ -1212,7 +1214,7 @@ DisassemblerLLVMC::DisassemblerLLVMC(const ArchSpec &arch,
if (llvm_arch == llvm::Triple::arm) {
std::string thumb_triple(thumb_arch.GetTriple().getTriple());
m_alternate_disasm_up =
- MCDisasmInstance::Create(thumb_triple.c_str(), "", features_str.c_str(),
+ MCDisasmInstance::Create(thumb_triple.c_str(), "", features_str.c_str(),
flavor, *this);
if (!m_alternate_disasm_up)
m_disasm_up.reset();
diff --git a/lldb/source/Plugins/Instruction/MIPS/EmulateInstructionMIPS.cpp b/lldb/source/Plugins/Instruction/MIPS/EmulateInstructionMIPS.cpp
index 21b6296745bd..b92804788268 100644
--- a/lldb/source/Plugins/Instruction/MIPS/EmulateInstructionMIPS.cpp
+++ b/lldb/source/Plugins/Instruction/MIPS/EmulateInstructionMIPS.cpp
@@ -28,6 +28,7 @@
#include "llvm/MC/MCInstrInfo.h"
#include "llvm/MC/MCRegisterInfo.h"
#include "llvm/MC/MCSubtargetInfo.h"
+#include "llvm/MC/MCTargetOptions.h"
#include "llvm/Support/TargetRegistry.h"
#include "llvm/Support/TargetSelect.h"
@@ -149,7 +150,9 @@ EmulateInstructionMIPS::EmulateInstructionMIPS(
m_insn_info.reset(target->createMCInstrInfo());
assert(m_insn_info.get());
- m_asm_info.reset(target->createMCAsmInfo(*m_reg_info, triple.getTriple()));
+ llvm::MCTargetOptions MCOptions;
+ m_asm_info.reset(
+ target->createMCAsmInfo(*m_reg_info, triple.getTriple(), MCOptions));
m_subtype_info.reset(
target->createMCSubtargetInfo(triple.getTriple(), cpu, features));
assert(m_asm_info.get() && m_subtype_info.get());
diff --git a/lldb/source/Plugins/Instruction/MIPS64/EmulateInstructionMIPS64.cpp b/lldb/source/Plugins/Instruction/MIPS64/EmulateInstructionMIPS64.cpp
index 5fabbeb756cc..4b5ca564c0cc 100644
--- a/lldb/source/Plugins/Instruction/MIPS64/EmulateInstructionMIPS64.cpp
+++ b/lldb/source/Plugins/Instruction/MIPS64/EmulateInstructionMIPS64.cpp
@@ -28,6 +28,7 @@
#include "llvm/MC/MCInstrInfo.h"
#include "llvm/MC/MCRegisterInfo.h"
#include "llvm/MC/MCSubtargetInfo.h"
+#include "llvm/MC/MCTargetOptions.h"
#include "llvm/Support/TargetRegistry.h"
#include "llvm/Support/TargetSelect.h"
@@ -153,7 +154,9 @@ EmulateInstructionMIPS64::EmulateInstructionMIPS64(
m_insn_info.reset(target->createMCInstrInfo());
assert(m_insn_info.get());
- m_asm_info.reset(target->createMCAsmInfo(*m_reg_info, triple.getTriple()));
+ llvm::MCTargetOptions MCOptions;
+ m_asm_info.reset(
+ target->createMCAsmInfo(*m_reg_info, triple.getTriple(), MCOptions));
m_subtype_info.reset(
target->createMCSubtargetInfo(triple.getTriple(), cpu, features));
assert(m_asm_info.get() && m_subtype_info.get());
@@ -1360,7 +1363,7 @@ bool EmulateInstructionMIPS64::Emulate_BXX_3ops(llvm::MCInst &insn) {
if (!success)
return false;
- if (!strcasecmp(op_name, "BEQ") || !strcasecmp(op_name, "BEQL")
+ if (!strcasecmp(op_name, "BEQ") || !strcasecmp(op_name, "BEQL")
|| !strcasecmp(op_name, "BEQ64") ) {
if (rs_val == rt_val)
target = pc + offset;
@@ -1602,7 +1605,7 @@ bool EmulateInstructionMIPS64::Emulate_BXX_2ops(llvm::MCInst &insn) {
target = pc + offset;
else
target = pc + 8;
- } else if (!strcasecmp(op_name, "BLEZL") || !strcasecmp(op_name, "BLEZ")
+ } else if (!strcasecmp(op_name, "BLEZL") || !strcasecmp(op_name, "BLEZ")
|| !strcasecmp(op_name, "BLEZ64")) {
if (rs_val <= 0)
target = pc + offset;
diff --git a/llvm/include/llvm/Support/TargetRegistry.h b/llvm/include/llvm/Support/TargetRegistry.h
index f4bc26b858c8..30292b356142 100644
--- a/llvm/include/llvm/Support/TargetRegistry.h
+++ b/llvm/include/llvm/Support/TargetRegistry.h
@@ -128,7 +128,8 @@ class Target {
using ArchMatchFnTy = bool (*)(Triple::ArchType Arch);
using MCAsmInfoCtorFnTy = MCAsmInfo *(*)(const MCRegisterInfo &MRI,
- const Triple &TT);
+ const Triple &TT,
+ const MCTargetOptions &Options);
using MCInstrInfoCtorFnTy = MCInstrInfo *(*)();
using MCInstrAnalysisCtorFnTy = MCInstrAnalysis *(*)(const MCInstrInfo *Info);
using MCRegInfoCtorFnTy = MCRegisterInfo *(*)(const Triple &TT);
@@ -335,11 +336,11 @@ class Target {
/// feature set; it should always be provided. Generally this should be
/// either the target triple from the module, or the target triple of the
/// host if that does not exist.
- MCAsmInfo *createMCAsmInfo(const MCRegisterInfo &MRI,
- StringRef TheTriple) const {
+ MCAsmInfo *createMCAsmInfo(const MCRegisterInfo &MRI, StringRef TheTriple,
+ const MCTargetOptions &Options) const {
if (!MCAsmInfoCtorFn)
return nullptr;
- return MCAsmInfoCtorFn(MRI, Triple(TheTriple));
+ return MCAsmInfoCtorFn(MRI, Triple(TheTriple), Options);
}
/// createMCInstrInfo - Create a MCInstrInfo implementation.
@@ -948,9 +949,9 @@ template <class MCAsmInfoImpl> struct RegisterMCAsmInfo {
}
private:
- static MCAsmInfo *Allocator(const MCRegisterInfo & /*MRI*/,
- const Triple &TT) {
- return new MCAsmInfoImpl(TT);
+ static MCAsmInfo *Allocator(const MCRegisterInfo & /*MRI*/, const Triple &TT,
+ const MCTargetOptions &Options) {
+ return new MCAsmInfoImpl(TT, Options);
}
};
diff --git a/llvm/lib/CodeGen/LLVMTargetMachine.cpp b/llvm/lib/CodeGen/LLVMTargetMachine.cpp
index 1c362aec6e67..50c178ff7598 100644
--- a/llvm/lib/CodeGen/LLVMTargetMachine.cpp
+++ b/llvm/lib/CodeGen/LLVMTargetMachine.cpp
@@ -48,8 +48,8 @@ void LLVMTargetMachine::initAsmInfo() {
STI.reset(TheTarget.createMCSubtargetInfo(
getTargetTriple().str(), getTargetCPU(), getTargetFeatureString()));
- MCAsmInfo *TmpAsmInfo =
- TheTarget.createMCAsmInfo(*MRI, getTargetTriple().str());
+ MCAsmInfo *TmpAsmInfo = TheTarget.createMCAsmInfo(
+ *MRI, getTargetTriple().str(), Options.MCOptions);
// TargetSelect.h moved to a
diff erent directory between LLVM 2.9 and 3.0,
// and if the old one gets included then MCAsmInfo will be NULL and
// we'll crash later.
diff --git a/llvm/lib/MC/MCDisassembler/Disassembler.cpp b/llvm/lib/MC/MCDisassembler/Disassembler.cpp
index 21bdc2eaea3e..4123d12e1cc2 100644
--- a/llvm/lib/MC/MCDisassembler/Disassembler.cpp
+++ b/llvm/lib/MC/MCDisassembler/Disassembler.cpp
@@ -24,6 +24,7 @@
#include "llvm/MC/MCRegisterInfo.h"
#include "llvm/MC/MCSchedule.h"
#include "llvm/MC/MCSubtargetInfo.h"
+#include "llvm/MC/MCTargetOptions.h"
#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/FormattedStream.h"
#include "llvm/Support/TargetRegistry.h"
@@ -56,8 +57,10 @@ LLVMCreateDisasmCPUFeatures(const char *TT, const char *CPU,
if (!MRI)
return nullptr;
+ MCTargetOptions MCOptions;
// Get the assembler info needed to setup the MCContext.
- std::unique_ptr<const MCAsmInfo> MAI(TheTarget->createMCAsmInfo(*MRI, TT));
+ std::unique_ptr<const MCAsmInfo> MAI(
+ TheTarget->createMCAsmInfo(*MRI, TT, MCOptions));
if (!MAI)
return nullptr;
diff --git a/llvm/lib/Object/ModuleSymbolTable.cpp b/llvm/lib/Object/ModuleSymbolTable.cpp
index d1e0ce5edae1..17ac4afda2d6 100644
--- a/llvm/lib/Object/ModuleSymbolTable.cpp
+++ b/llvm/lib/Object/ModuleSymbolTable.cpp
@@ -83,7 +83,8 @@ initializeRecordStreamer(const Module &M,
if (!MRI)
return;
- std::unique_ptr<MCAsmInfo> MAI(T->createMCAsmInfo(*MRI, TT.str()));
+ MCTargetOptions MCOptions;
+ std::unique_ptr<MCAsmInfo> MAI(T->createMCAsmInfo(*MRI, TT.str(), MCOptions));
if (!MAI)
return;
@@ -109,7 +110,6 @@ initializeRecordStreamer(const Module &M,
std::unique_ptr<MCAsmParser> Parser(
createMCAsmParser(SrcMgr, MCCtx, Streamer, *MAI));
- MCTargetOptions MCOptions;
std::unique_ptr<MCTargetAsmParser> TAP(
T->createMCAsmParser(*STI, *Parser, *MCII, MCOptions));
if (!TAP)
diff --git a/llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCTargetDesc.cpp b/llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCTargetDesc.cpp
index 1d583ec0087b..0cafd5dd12fa 100644
--- a/llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCTargetDesc.cpp
+++ b/llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCTargetDesc.cpp
@@ -238,7 +238,8 @@ static MCRegisterInfo *createAArch64MCRegisterInfo(const Triple &Triple) {
}
static MCAsmInfo *createAArch64MCAsmInfo(const MCRegisterInfo &MRI,
- const Triple &TheTriple) {
+ const Triple &TheTriple,
+ const MCTargetOptions &Options) {
MCAsmInfo *MAI;
if (TheTriple.isOSBinFormatMachO())
MAI = new AArch64MCAsmInfoDarwin(TheTriple.getArch() == Triple::aarch64_32);
diff --git a/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCAsmInfo.cpp b/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCAsmInfo.cpp
index 9e04ab9bae93..9644e66fda4e 100644
--- a/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCAsmInfo.cpp
+++ b/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCAsmInfo.cpp
@@ -14,7 +14,9 @@
using namespace llvm;
-AMDGPUMCAsmInfo::AMDGPUMCAsmInfo(const Triple &TT) : MCAsmInfoELF() {
+AMDGPUMCAsmInfo::AMDGPUMCAsmInfo(const Triple &TT,
+ const MCTargetOptions &Options)
+ : MCAsmInfoELF() {
CodePointerSize = (TT.getArch() == Triple::amdgcn) ? 8 : 4;
StackGrowsUp = true;
HasSingleParameterDotFile = false;
diff --git a/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCAsmInfo.h b/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCAsmInfo.h
index 71e63ec27a8f..65c9b1917bf8 100644
--- a/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCAsmInfo.h
+++ b/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCAsmInfo.h
@@ -25,7 +25,7 @@ class Triple;
// with 'L' as a local symbol.
class AMDGPUMCAsmInfo : public MCAsmInfoELF {
public:
- explicit AMDGPUMCAsmInfo(const Triple &TT);
+ explicit AMDGPUMCAsmInfo(const Triple &TT, const MCTargetOptions &Options);
bool shouldOmitSectionDirective(StringRef SectionName) const override;
unsigned getMaxInstLength(const MCSubtargetInfo *STI) const override;
};
diff --git a/llvm/lib/Target/ARC/MCTargetDesc/ARCMCTargetDesc.cpp b/llvm/lib/Target/ARC/MCTargetDesc/ARCMCTargetDesc.cpp
index aa4818cd57ac..847534530274 100644
--- a/llvm/lib/Target/ARC/MCTargetDesc/ARCMCTargetDesc.cpp
+++ b/llvm/lib/Target/ARC/MCTargetDesc/ARCMCTargetDesc.cpp
@@ -52,7 +52,8 @@ static MCSubtargetInfo *createARCMCSubtargetInfo(const Triple &TT,
}
static MCAsmInfo *createARCMCAsmInfo(const MCRegisterInfo &MRI,
- const Triple &TT) {
+ const Triple &TT,
+ const MCTargetOptions &Options) {
MCAsmInfo *MAI = new ARCMCAsmInfo(TT);
// Initial state of the frame pointer is SP.
diff --git a/llvm/lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.cpp b/llvm/lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.cpp
index 90022a8d88a6..b546335efb9e 100644
--- a/llvm/lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.cpp
+++ b/llvm/lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.cpp
@@ -187,7 +187,8 @@ static MCRegisterInfo *createARMMCRegisterInfo(const Triple &Triple) {
}
static MCAsmInfo *createARMMCAsmInfo(const MCRegisterInfo &MRI,
- const Triple &TheTriple) {
+ const Triple &TheTriple,
+ const MCTargetOptions &Options) {
MCAsmInfo *MAI;
if (TheTriple.isOSDarwin() || TheTriple.isOSBinFormatMachO())
MAI = new ARMMCAsmInfoDarwin(TheTriple);
diff --git a/llvm/lib/Target/AVR/MCTargetDesc/AVRMCAsmInfo.cpp b/llvm/lib/Target/AVR/MCTargetDesc/AVRMCAsmInfo.cpp
index 99b2172c562f..c25a2b232013 100644
--- a/llvm/lib/Target/AVR/MCTargetDesc/AVRMCAsmInfo.cpp
+++ b/llvm/lib/Target/AVR/MCTargetDesc/AVRMCAsmInfo.cpp
@@ -16,7 +16,7 @@
namespace llvm {
-AVRMCAsmInfo::AVRMCAsmInfo(const Triple &TT) {
+AVRMCAsmInfo::AVRMCAsmInfo(const Triple &TT, const MCTargetOptions &Options) {
CodePointerSize = 2;
CalleeSaveStackSlotSize = 2;
CommentString = ";";
diff --git a/llvm/lib/Target/AVR/MCTargetDesc/AVRMCAsmInfo.h b/llvm/lib/Target/AVR/MCTargetDesc/AVRMCAsmInfo.h
index b2fa18777bc0..17dd77f6266a 100644
--- a/llvm/lib/Target/AVR/MCTargetDesc/AVRMCAsmInfo.h
+++ b/llvm/lib/Target/AVR/MCTargetDesc/AVRMCAsmInfo.h
@@ -22,7 +22,7 @@ class Triple;
/// Specifies the format of AVR assembly files.
class AVRMCAsmInfo : public MCAsmInfo {
public:
- explicit AVRMCAsmInfo(const Triple &TT);
+ explicit AVRMCAsmInfo(const Triple &TT, const MCTargetOptions &Options);
};
} // end namespace llvm
diff --git a/llvm/lib/Target/BPF/MCTargetDesc/BPFMCAsmInfo.h b/llvm/lib/Target/BPF/MCTargetDesc/BPFMCAsmInfo.h
index 04a6a87cebc9..97f0cbd58608 100644
--- a/llvm/lib/Target/BPF/MCTargetDesc/BPFMCAsmInfo.h
+++ b/llvm/lib/Target/BPF/MCTargetDesc/BPFMCAsmInfo.h
@@ -21,7 +21,7 @@ class Target;
class BPFMCAsmInfo : public MCAsmInfo {
public:
- explicit BPFMCAsmInfo(const Triple &TT) {
+ explicit BPFMCAsmInfo(const Triple &TT, const MCTargetOptions &Options) {
if (TT.getArch() == Triple::bpfeb)
IsLittleEndian = false;
diff --git a/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCTargetDesc.cpp b/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCTargetDesc.cpp
index 870ab9e94a63..85198ec65f91 100644
--- a/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCTargetDesc.cpp
+++ b/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCTargetDesc.cpp
@@ -219,7 +219,8 @@ static MCRegisterInfo *createHexagonMCRegisterInfo(const Triple &TT) {
}
static MCAsmInfo *createHexagonMCAsmInfo(const MCRegisterInfo &MRI,
- const Triple &TT) {
+ const Triple &TT,
+ const MCTargetOptions &Options) {
MCAsmInfo *MAI = new HexagonMCAsmInfo(TT);
// VirtualFP = (R30 + #0).
diff --git a/llvm/lib/Target/Lanai/MCTargetDesc/LanaiMCAsmInfo.cpp b/llvm/lib/Target/Lanai/MCTargetDesc/LanaiMCAsmInfo.cpp
index 14d3dac26d1f..f1c174897047 100644
--- a/llvm/lib/Target/Lanai/MCTargetDesc/LanaiMCAsmInfo.cpp
+++ b/llvm/lib/Target/Lanai/MCTargetDesc/LanaiMCAsmInfo.cpp
@@ -18,7 +18,8 @@ using namespace llvm;
void LanaiMCAsmInfo::anchor() {}
-LanaiMCAsmInfo::LanaiMCAsmInfo(const Triple & /*TheTriple*/) {
+LanaiMCAsmInfo::LanaiMCAsmInfo(const Triple & /*TheTriple*/,
+ const MCTargetOptions &Options) {
IsLittleEndian = false;
PrivateGlobalPrefix = ".L";
WeakRefDirective = "\t.weak\t";
diff --git a/llvm/lib/Target/Lanai/MCTargetDesc/LanaiMCAsmInfo.h b/llvm/lib/Target/Lanai/MCTargetDesc/LanaiMCAsmInfo.h
index 265af425d037..f0352d021291 100644
--- a/llvm/lib/Target/Lanai/MCTargetDesc/LanaiMCAsmInfo.h
+++ b/llvm/lib/Target/Lanai/MCTargetDesc/LanaiMCAsmInfo.h
@@ -22,7 +22,8 @@ class LanaiMCAsmInfo : public MCAsmInfoELF {
void anchor() override;
public:
- explicit LanaiMCAsmInfo(const Triple &TheTriple);
+ explicit LanaiMCAsmInfo(const Triple &TheTriple,
+ const MCTargetOptions &Options);
};
} // namespace llvm
diff --git a/llvm/lib/Target/MSP430/MCTargetDesc/MSP430MCAsmInfo.cpp b/llvm/lib/Target/MSP430/MCTargetDesc/MSP430MCAsmInfo.cpp
index db5a49dd22a7..cfdc44ada771 100644
--- a/llvm/lib/Target/MSP430/MCTargetDesc/MSP430MCAsmInfo.cpp
+++ b/llvm/lib/Target/MSP430/MCTargetDesc/MSP430MCAsmInfo.cpp
@@ -15,7 +15,8 @@ using namespace llvm;
void MSP430MCAsmInfo::anchor() { }
-MSP430MCAsmInfo::MSP430MCAsmInfo(const Triple &TT) {
+MSP430MCAsmInfo::MSP430MCAsmInfo(const Triple &TT,
+ const MCTargetOptions &Options) {
CodePointerSize = CalleeSaveStackSlotSize = 2;
CommentString = ";";
diff --git a/llvm/lib/Target/MSP430/MCTargetDesc/MSP430MCAsmInfo.h b/llvm/lib/Target/MSP430/MCTargetDesc/MSP430MCAsmInfo.h
index 93979df037e6..c4ff4a9eefb1 100644
--- a/llvm/lib/Target/MSP430/MCTargetDesc/MSP430MCAsmInfo.h
+++ b/llvm/lib/Target/MSP430/MCTargetDesc/MSP430MCAsmInfo.h
@@ -22,7 +22,7 @@ class MSP430MCAsmInfo : public MCAsmInfoELF {
void anchor() override;
public:
- explicit MSP430MCAsmInfo(const Triple &TT);
+ explicit MSP430MCAsmInfo(const Triple &TT, const MCTargetOptions &Options);
};
} // namespace llvm
diff --git a/llvm/lib/Target/Mips/MCTargetDesc/MipsMCAsmInfo.cpp b/llvm/lib/Target/Mips/MCTargetDesc/MipsMCAsmInfo.cpp
index ec78158d387d..5182205edaea 100644
--- a/llvm/lib/Target/Mips/MCTargetDesc/MipsMCAsmInfo.cpp
+++ b/llvm/lib/Target/Mips/MCTargetDesc/MipsMCAsmInfo.cpp
@@ -11,25 +11,27 @@
//===----------------------------------------------------------------------===//
#include "MipsMCAsmInfo.h"
+#include "MipsABIInfo.h"
#include "llvm/ADT/Triple.h"
using namespace llvm;
void MipsMCAsmInfo::anchor() { }
-MipsMCAsmInfo::MipsMCAsmInfo(const Triple &TheTriple) {
+MipsMCAsmInfo::MipsMCAsmInfo(const Triple &TheTriple,
+ const MCTargetOptions &Options) {
IsLittleEndian = TheTriple.isLittleEndian();
- if (TheTriple.isMIPS64() && TheTriple.getEnvironment() != Triple::GNUABIN32)
+ MipsABIInfo ABI = MipsABIInfo::computeTargetABI(TheTriple, "", Options);
+
+ if (TheTriple.isMIPS64() && !ABI.IsN32())
CodePointerSize = CalleeSaveStackSlotSize = 8;
- // FIXME: This condition isn't quite right but it's the best we can do until
- // this object can identify the ABI. It will misbehave when using O32
- // on a mips64*-* triple.
- if (TheTriple.isMIPS32()) {
+ if (ABI.IsO32())
PrivateGlobalPrefix = "$";
- PrivateLabelPrefix = "$";
- }
+ else if (ABI.IsN32() || ABI.IsN64())
+ PrivateGlobalPrefix = ".L";
+ PrivateLabelPrefix = PrivateGlobalPrefix;
AlignmentIsInBytes = false;
Data16bitsDirective = "\t.2byte\t";
diff --git a/llvm/lib/Target/Mips/MCTargetDesc/MipsMCAsmInfo.h b/llvm/lib/Target/Mips/MCTargetDesc/MipsMCAsmInfo.h
index 867f4d223de4..d8bfe58d24a8 100644
--- a/llvm/lib/Target/Mips/MCTargetDesc/MipsMCAsmInfo.h
+++ b/llvm/lib/Target/Mips/MCTargetDesc/MipsMCAsmInfo.h
@@ -22,7 +22,8 @@ class MipsMCAsmInfo : public MCAsmInfoELF {
void anchor() override;
public:
- explicit MipsMCAsmInfo(const Triple &TheTriple);
+ explicit MipsMCAsmInfo(const Triple &TheTriple,
+ const MCTargetOptions &Options);
};
} // namespace llvm
diff --git a/llvm/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.cpp b/llvm/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.cpp
index 79c47d1b6508..2aee3e8956bc 100644
--- a/llvm/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.cpp
+++ b/llvm/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.cpp
@@ -81,8 +81,9 @@ static MCSubtargetInfo *createMipsMCSubtargetInfo(const Triple &TT,
}
static MCAsmInfo *createMipsMCAsmInfo(const MCRegisterInfo &MRI,
- const Triple &TT) {
- MCAsmInfo *MAI = new MipsMCAsmInfo(TT);
+ const Triple &TT,
+ const MCTargetOptions &Options) {
+ MCAsmInfo *MAI = new MipsMCAsmInfo(TT, Options);
unsigned SP = MRI.getDwarfRegNum(Mips::SP, true);
MCCFIInstruction Inst = MCCFIInstruction::createDefCfaRegister(nullptr, SP);
diff --git a/llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXMCAsmInfo.cpp b/llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXMCAsmInfo.cpp
index 556745825a15..7e1da9b7a94b 100644
--- a/llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXMCAsmInfo.cpp
+++ b/llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXMCAsmInfo.cpp
@@ -17,7 +17,8 @@ using namespace llvm;
void NVPTXMCAsmInfo::anchor() {}
-NVPTXMCAsmInfo::NVPTXMCAsmInfo(const Triple &TheTriple) {
+NVPTXMCAsmInfo::NVPTXMCAsmInfo(const Triple &TheTriple,
+ const MCTargetOptions &Options) {
if (TheTriple.getArch() == Triple::nvptx64) {
CodePointerSize = CalleeSaveStackSlotSize = 8;
}
diff --git a/llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXMCAsmInfo.h b/llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXMCAsmInfo.h
index e888526da898..ce5ca99c5397 100644
--- a/llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXMCAsmInfo.h
+++ b/llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXMCAsmInfo.h
@@ -23,7 +23,8 @@ class NVPTXMCAsmInfo : public MCAsmInfo {
virtual void anchor();
public:
- explicit NVPTXMCAsmInfo(const Triple &TheTriple);
+ explicit NVPTXMCAsmInfo(const Triple &TheTriple,
+ const MCTargetOptions &Options);
/// Return true if the .section directive should be omitted when
/// emitting \p SectionName. For example:
diff --git a/llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp b/llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp
index 90c3c8d20edb..a9717bfc3082 100644
--- a/llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp
+++ b/llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp
@@ -76,7 +76,8 @@ static MCSubtargetInfo *createPPCMCSubtargetInfo(const Triple &TT,
}
static MCAsmInfo *createPPCMCAsmInfo(const MCRegisterInfo &MRI,
- const Triple &TheTriple) {
+ const Triple &TheTriple,
+ const MCTargetOptions &Options) {
bool isPPC64 = (TheTriple.getArch() == Triple::ppc64 ||
TheTriple.getArch() == Triple::ppc64le);
diff --git a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCTargetDesc.cpp b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCTargetDesc.cpp
index 5a4c86e48f1e..2e44b5ebb5bc 100644
--- a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCTargetDesc.cpp
+++ b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCTargetDesc.cpp
@@ -51,7 +51,8 @@ static MCRegisterInfo *createRISCVMCRegisterInfo(const Triple &TT) {
}
static MCAsmInfo *createRISCVMCAsmInfo(const MCRegisterInfo &MRI,
- const Triple &TT) {
+ const Triple &TT,
+ const MCTargetOptions &Options) {
MCAsmInfo *MAI = new RISCVMCAsmInfo(TT);
Register SP = MRI.getDwarfRegNum(RISCV::X2, true);
diff --git a/llvm/lib/Target/Sparc/MCTargetDesc/SparcMCTargetDesc.cpp b/llvm/lib/Target/Sparc/MCTargetDesc/SparcMCTargetDesc.cpp
index ce593bb66770..e4b1f0bc9bc0 100644
--- a/llvm/lib/Target/Sparc/MCTargetDesc/SparcMCTargetDesc.cpp
+++ b/llvm/lib/Target/Sparc/MCTargetDesc/SparcMCTargetDesc.cpp
@@ -33,7 +33,8 @@ using namespace llvm;
#include "SparcGenRegisterInfo.inc"
static MCAsmInfo *createSparcMCAsmInfo(const MCRegisterInfo &MRI,
- const Triple &TT) {
+ const Triple &TT,
+ const MCTargetOptions &Options) {
MCAsmInfo *MAI = new SparcELFMCAsmInfo(TT);
unsigned Reg = MRI.getDwarfRegNum(SP::O6, true);
MCCFIInstruction Inst = MCCFIInstruction::createDefCfa(nullptr, Reg, 0);
@@ -42,7 +43,8 @@ static MCAsmInfo *createSparcMCAsmInfo(const MCRegisterInfo &MRI,
}
static MCAsmInfo *createSparcV9MCAsmInfo(const MCRegisterInfo &MRI,
- const Triple &TT) {
+ const Triple &TT,
+ const MCTargetOptions &Options) {
MCAsmInfo *MAI = new SparcELFMCAsmInfo(TT);
unsigned Reg = MRI.getDwarfRegNum(SP::O6, true);
MCCFIInstruction Inst = MCCFIInstruction::createDefCfa(nullptr, Reg, 2047);
diff --git a/llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCTargetDesc.cpp b/llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCTargetDesc.cpp
index 3c0300cfd8f0..e40d0f110686 100644
--- a/llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCTargetDesc.cpp
+++ b/llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCTargetDesc.cpp
@@ -147,7 +147,8 @@ unsigned SystemZMC::getFirstReg(unsigned Reg) {
}
static MCAsmInfo *createSystemZMCAsmInfo(const MCRegisterInfo &MRI,
- const Triple &TT) {
+ const Triple &TT,
+ const MCTargetOptions &Options) {
MCAsmInfo *MAI = new SystemZMCAsmInfo(TT);
MCCFIInstruction Inst =
MCCFIInstruction::createDefCfa(nullptr,
diff --git a/llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCAsmInfo.cpp b/llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCAsmInfo.cpp
index 8f6531563e1b..c3d259e6ff20 100644
--- a/llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCAsmInfo.cpp
+++ b/llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCAsmInfo.cpp
@@ -21,7 +21,8 @@ using namespace llvm;
WebAssemblyMCAsmInfo::~WebAssemblyMCAsmInfo() = default; // anchor.
-WebAssemblyMCAsmInfo::WebAssemblyMCAsmInfo(const Triple &T) {
+WebAssemblyMCAsmInfo::WebAssemblyMCAsmInfo(const Triple &T,
+ const MCTargetOptions &Options) {
CodePointerSize = CalleeSaveStackSlotSize = T.isArch64Bit() ? 8 : 4;
// TODO: What should MaxInstLength be?
diff --git a/llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCAsmInfo.h b/llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCAsmInfo.h
index 9efbbf881f59..5ba4dcf8c4b3 100644
--- a/llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCAsmInfo.h
+++ b/llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCAsmInfo.h
@@ -22,7 +22,8 @@ class Triple;
class WebAssemblyMCAsmInfo final : public MCAsmInfoWasm {
public:
- explicit WebAssemblyMCAsmInfo(const Triple &T);
+ explicit WebAssemblyMCAsmInfo(const Triple &T,
+ const MCTargetOptions &Options);
~WebAssemblyMCAsmInfo() override;
};
diff --git a/llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCTargetDesc.cpp b/llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCTargetDesc.cpp
index 9c8ca1f13b18..0eccbbf78f84 100644
--- a/llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCTargetDesc.cpp
+++ b/llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCTargetDesc.cpp
@@ -35,8 +35,9 @@ using namespace llvm;
#include "WebAssemblyGenRegisterInfo.inc"
static MCAsmInfo *createMCAsmInfo(const MCRegisterInfo & /*MRI*/,
- const Triple &TT) {
- return new WebAssemblyMCAsmInfo(TT);
+ const Triple &TT,
+ const MCTargetOptions &Options) {
+ return new WebAssemblyMCAsmInfo(TT, Options);
}
static MCInstrInfo *createMCInstrInfo() {
diff --git a/llvm/lib/Target/X86/MCTargetDesc/X86MCTargetDesc.cpp b/llvm/lib/Target/X86/MCTargetDesc/X86MCTargetDesc.cpp
index ced9eacc8b97..56a7615850cc 100644
--- a/llvm/lib/Target/X86/MCTargetDesc/X86MCTargetDesc.cpp
+++ b/llvm/lib/Target/X86/MCTargetDesc/X86MCTargetDesc.cpp
@@ -323,7 +323,8 @@ static MCRegisterInfo *createX86MCRegisterInfo(const Triple &TT) {
}
static MCAsmInfo *createX86MCAsmInfo(const MCRegisterInfo &MRI,
- const Triple &TheTriple) {
+ const Triple &TheTriple,
+ const MCTargetOptions &Options) {
bool is64Bit = TheTriple.getArch() == Triple::x86_64;
MCAsmInfo *MAI;
diff --git a/llvm/lib/Target/XCore/MCTargetDesc/XCoreMCTargetDesc.cpp b/llvm/lib/Target/XCore/MCTargetDesc/XCoreMCTargetDesc.cpp
index 877f38e22f9b..02519864854c 100644
--- a/llvm/lib/Target/XCore/MCTargetDesc/XCoreMCTargetDesc.cpp
+++ b/llvm/lib/Target/XCore/MCTargetDesc/XCoreMCTargetDesc.cpp
@@ -55,7 +55,8 @@ createXCoreMCSubtargetInfo(const Triple &TT, StringRef CPU, StringRef FS) {
}
static MCAsmInfo *createXCoreMCAsmInfo(const MCRegisterInfo &MRI,
- const Triple &TT) {
+ const Triple &TT,
+ const MCTargetOptions &Options) {
MCAsmInfo *MAI = new XCoreMCAsmInfo(TT);
// Initial state of the frame pointer is SP.
diff --git a/llvm/test/CodeGen/Mips/compactbranches/no-beqzc-bnezc.ll b/llvm/test/CodeGen/Mips/compactbranches/no-beqzc-bnezc.ll
index 7a9f287c1b4c..2bda921d57a3 100644
--- a/llvm/test/CodeGen/Mips/compactbranches/no-beqzc-bnezc.ll
+++ b/llvm/test/CodeGen/Mips/compactbranches/no-beqzc-bnezc.ll
@@ -103,7 +103,7 @@ define i64 @f5(i64 %a, i64 %b) {
define i32 @f6(i32 %a) {
; CHECK-LABEL: f6:
-; CHECK: beqzc ${{[0-9]+}}, $BB
+; CHECK: beqzc ${{[0-9]+}}, {{((\$)|(\.L))}}BB
%cmp = icmp eq i32 %a, 0
br i1 %cmp, label %if.then, label %if.end
@@ -117,7 +117,7 @@ define i32 @f6(i32 %a) {
define i32 @f7(i32 %a) {
; CHECK-LABEL: f7:
-; CHECK: bnezc ${{[0-9]+}}, $BB
+; CHECK: bnezc ${{[0-9]+}}, {{((\$)|(\.L))}}BB
%cmp = icmp eq i32 0, %a
br i1 %cmp, label %if.then, label %if.end
diff --git a/llvm/test/MC/Mips/macro-li.d.s b/llvm/test/MC/Mips/macro-li.d.s
index fae5b3d6ec7c..89fd7e93839b 100644
--- a/llvm/test/MC/Mips/macro-li.d.s
+++ b/llvm/test/MC/Mips/macro-li.d.s
@@ -18,7 +18,7 @@ li.d $4, 0.0
li.d $4, 1.12345
# ALL: .section .rodata,"a", at progbits
-# ALL-NEXT: [[LABEL:\$tmp[0-9]+]]:
+# ALL-NEXT: [[LABEL:((\$)|(\.L))tmp[0-9]+]]:
# ALL-NEXT: .p2align 3
# ALL-NEXT: .8byte 4607738388174016296
# ALL-NEXT: .text
@@ -62,7 +62,7 @@ li.d $4, 1.0
li.d $4, 12345678910
# ALL: .section .rodata,"a", at progbits
-# ALL-NEXT: [[LABEL:\$tmp[0-9]+]]:
+# ALL-NEXT: [[LABEL:((\$)|(\.L))tmp[0-9]+]]:
# ALL-NEXT: .p2align 3
# ALL-NEXT: .8byte 4757770298180239360
# ALL-NEXT: .text
@@ -94,7 +94,7 @@ li.d $4, 12345678910
li.d $4, 12345678910.0
# ALL: .section .rodata,"a", at progbits
-# ALL-NEXT: [[LABEL:\$tmp[0-9]+]]:
+# ALL-NEXT: [[LABEL:((\$)|(\.L))tmp[0-9]+]]:
# ALL-NEXT: .p2align 3
# ALL-NEXT: .8byte 4757770298180239360
# ALL-NEXT: .text
@@ -126,7 +126,7 @@ li.d $4, 12345678910.0
li.d $4, 0.4
# ALL: .section .rodata,"a", at progbits
-# ALL-NEXT: [[LABEL:\$tmp[0-9]+]]:
+# ALL-NEXT: [[LABEL:((\$)|(\.L))tmp[0-9]+]]:
# ALL-NEXT: .p2align 3
# ALL-NEXT: .8byte 4600877379321698714
# ALL-NEXT: .text
@@ -164,7 +164,7 @@ li.d $4, 1.5
li.d $4, 12345678910.12345678910
# ALL: .section .rodata,"a", at progbits
-# ALL-NEXT: [[LABEL:\$tmp[0-9]+]]:
+# ALL-NEXT: [[LABEL:((\$)|(\.L))tmp[0-9]+]]:
# ALL-NEXT: .p2align 3
# ALL-NEXT: .8byte 4757770298180304087
# ALL-NEXT: .text
@@ -197,7 +197,7 @@ li.d $4, 12345678910.12345678910
li.d $4, 12345678910123456789.12345678910
# ALL: .section .rodata,"a", at progbits
-# ALL-NEXT: [[LABEL:\$tmp[0-9]+]]:
+# ALL-NEXT: [[LABEL:((\$)|(\.L))tmp[0-9]+]]:
# ALL-NEXT: .p2align 3
# ALL-NEXT: .8byte 4892433759227321879
# ALL-NEXT: .text
@@ -243,7 +243,7 @@ li.d $f4, 0.0
li.d $f4, 1.12345
# ALL: .section .rodata,"a", at progbits
-# ALL-NEXT: [[LABEL:\$tmp[0-9]+]]:
+# ALL-NEXT: [[LABEL:((\$)|(\.L))tmp[0-9]+]]:
# ALL-NEXT: .p2align 3
# ALL-NEXT: .8byte 4607738388174016296
# ALL-NEXT: .text
@@ -288,7 +288,7 @@ li.d $f4, 1.0
li.d $f4, 12345678910
# ALL: .section .rodata,"a", at progbits
-# ALL-NEXT: [[LABEL:\$tmp[0-9]+]]:
+# ALL-NEXT: [[LABEL:((\$)|(\.L))tmp[0-9]+]]:
# ALL-NEXT: .p2align 3
# ALL-NEXT: .8byte 4757770298180239360
# ALL-NEXT: .text
@@ -311,7 +311,7 @@ li.d $f4, 12345678910
li.d $f4, 12345678910.0
# ALL: .section .rodata,"a", at progbits
-# ALL-NEXT: [[LABEL:\$tmp[0-9]+]]:
+# ALL-NEXT: [[LABEL:((\$)|(\.L))tmp[0-9]+]]:
# ALL-NEXT: .p2align 3
# ALL-NEXT: .8byte 4757770298180239360
# ALL-NEXT: .text
@@ -334,7 +334,7 @@ li.d $f4, 12345678910.0
li.d $f4, 0.4
# ALL: .section .rodata,"a", at progbits
-# ALL-NEXT: [[LABEL:\$tmp[0-9]+]]:
+# ALL-NEXT: [[LABEL:((\$)|(\.L))tmp[0-9]+]]:
# ALL-NEXT: .p2align 3
# ALL-NEXT: .8byte 4600877379321698714
# ALL-NEXT: .text
@@ -379,7 +379,7 @@ li.d $f4, 2.5
li.d $f4, 2.515625
# ALL: .section .rodata,"a", at progbits
-# ALL-NEXT: [[LABEL:\$tmp[0-9]+]]:
+# ALL-NEXT: [[LABEL:((\$)|(\.L))tmp[0-9]+]]:
# ALL-NEXT: .p2align 3
# ALL-NEXT: .8byte 4612847102706319360
# ALL-NEXT: .text
@@ -402,7 +402,7 @@ li.d $f4, 2.515625
li.d $f4, 12345678910.12345678910
# ALL: .section .rodata,"a", at progbits
-# ALL-NEXT: [[LABEL:\$tmp[0-9]+]]:
+# ALL-NEXT: [[LABEL:((\$)|(\.L))tmp[0-9]+]]:
# ALL-NEXT: .p2align 3
# ALL-NEXT: .8byte 4757770298180304087
# ALL-NEXT: .text
@@ -425,7 +425,7 @@ li.d $f4, 12345678910.12345678910
li.d $f4, 12345678910123456789.12345678910
# ALL: .section .rodata,"a", at progbits
-# ALL-NEXT: [[LABEL:\$tmp[0-9]+]]:
+# ALL-NEXT: [[LABEL:((\$)|(\.L))tmp[0-9]+]]:
# ALL-NEXT: .p2align 3
# ALL-NEXT: .8byte 4892433759227321879
# ALL-NEXT: .text
diff --git a/llvm/test/MC/Mips/macro-li.s.s b/llvm/test/MC/Mips/macro-li.s.s
index ec1bc9a1dd02..0e8b8f9c8db7 100644
--- a/llvm/test/MC/Mips/macro-li.s.s
+++ b/llvm/test/MC/Mips/macro-li.s.s
@@ -52,7 +52,7 @@ li.s $f4, 0.0
li.s $f4, 1.12345
# ALL: .section .rodata,"a", at progbits
-# ALL: [[LABEL:\$tmp[0-9]+]]:
+# ALL: [[LABEL:((\$)|(\.L))tmp[0-9]+]]:
# ALL: .4byte 1066388790
# ALL: .text
# O32-N32-PIC: lw $1, %got([[LABEL]])($gp) # encoding: [A,A,0x81,0x8f]
@@ -82,7 +82,7 @@ li.s $f4, 1.0
li.s $f4, 12345678910
# ALL: .section .rodata,"a", at progbits
-# ALL: [[LABEL:\$tmp[0-9]+]]:
+# ALL: [[LABEL:((\$)|(\.L))tmp[0-9]+]]:
# ALL: .4byte 1345844999
# ALL: .text
# O32-N32-PIC: lw $1, %got([[LABEL]])($gp) # encoding: [A,A,0x81,0x8f]
@@ -104,7 +104,7 @@ li.s $f4, 12345678910
li.s $f4, 12345678910.0
# ALL: .section .rodata,"a", at progbits
-# ALL: [[LABEL:\$tmp[0-9]+]]:
+# ALL: [[LABEL:((\$)|(\.L))tmp[0-9]+]]:
# ALL: .4byte 1345844999
# ALL: .text
# O32-N32-PIC: lw $1, %got([[LABEL]])($gp) # encoding: [A,A,0x81,0x8f]
@@ -127,7 +127,7 @@ li.s $f4, 12345678910.0
li.s $f4, 0.4
# ALL: .section .rodata,"a", at progbits
-# ALL: [[LABEL:\$tmp[0-9]+]]:
+# ALL: [[LABEL:((\$)|(\.L))tmp[0-9]+]]:
# ALL: .4byte 1053609165
# ALL: .text
# O32-N32-PIC: lw $1, %got([[LABEL]])($gp) # encoding: [A,A,0x81,0x8f]
@@ -153,7 +153,7 @@ li.s $f4, 1.5
li.s $f4, 12345678910.12345678910
# ALL: .section .rodata,"a", at progbits
-# ALL: [[LABEL:\$tmp[0-9]+]]:
+# ALL: [[LABEL:((\$)|(\.L))tmp[0-9]+]]:
# ALL: .4byte 1345844999
# ALL: .text
# O32-N32-PIC: lw $1, %got([[LABEL]])($gp) # encoding: [A,A,0x81,0x8f]
@@ -175,7 +175,7 @@ li.s $f4, 12345678910.12345678910
li.s $f4, 12345678910123456789.12345678910
# ALL: .section .rodata,"a", at progbits
-# ALL: [[LABEL:\$tmp[0-9]+]]:
+# ALL: [[LABEL:((\$)|(\.L))tmp[0-9]+]]:
# ALL: .4byte 1596675242
# ALL: .text
# O32-N32-PIC: lw $1, %got([[LABEL]])($gp) # encoding: [A,A,0x81,0x8f]
diff --git a/llvm/test/MC/Mips/private-prefix.s b/llvm/test/MC/Mips/private-prefix.s
new file mode 100644
index 000000000000..c2f295ac5920
--- /dev/null
+++ b/llvm/test/MC/Mips/private-prefix.s
@@ -0,0 +1,22 @@
+# RUN: llvm-mc %s -triple=mips --target-abi=o32 | FileCheck %s --check-prefix=O32
+# RUN: llvm-mc %s -triple=mips --target-abi=n32 | FileCheck %s --check-prefix=N32
+# RUN: llvm-mc %s -triple=mips --target-abi=n64 | FileCheck %s --check-prefix=N64
+# RUN: llvm-mc %s -triple=mips64 --target-abi=o32 | FileCheck %s --check-prefix=O32
+# RUN: llvm-mc %s -triple=mips64 --target-abi=n32 | FileCheck %s --check-prefix=N32
+# RUN: llvm-mc %s -triple=mips64 --target-abi=n64 | FileCheck %s --check-prefix=N64
+# RUN: llvm-mc %s -triple=mips | FileCheck %s --check-prefix=O32
+# RUN: llvm-mc %s -triple=mips-gnu | FileCheck %s --check-prefix=O32
+# RUN: llvm-mc %s -triple=mips-gnuabin32 | FileCheck %s --check-prefix=N32
+# RUN: llvm-mc %s -triple=mips-gnuabi64 | FileCheck %s --check-prefix=O32
+# RUN: llvm-mc %s -triple=mips64 | FileCheck %s --check-prefix=N64
+# RUN: llvm-mc %s -triple=mips64-gnu | FileCheck %s --check-prefix=N64
+# RUN: llvm-mc %s -triple=mips64-gnuabin32 | FileCheck %s --check-prefix=N32
+# RUN: llvm-mc %s -triple=mips64-gnuabi64 | FileCheck %s --check-prefix=N64
+
+# Checks if correct private global and label prefixes are used based on target
+# options.
+
+# O32: $tmp0:
+# N32: .Ltmp0:
+# N64: .Ltmp0:
+li.d $4, 1.12345
diff --git a/llvm/tools/dsymutil/DwarfStreamer.cpp b/llvm/tools/dsymutil/DwarfStreamer.cpp
index 88ca4b34a3e7..8747aee458fd 100644
--- a/llvm/tools/dsymutil/DwarfStreamer.cpp
+++ b/llvm/tools/dsymutil/DwarfStreamer.cpp
@@ -61,7 +61,8 @@ bool DwarfStreamer::init(Triple TheTriple) {
if (!MRI)
return error(Twine("no register info for target ") + TripleName, Context);
- MAI.reset(TheTarget->createMCAsmInfo(*MRI, TripleName));
+ MCTargetOptions MCOptions = InitMCTargetOptionsFromFlags();
+ MAI.reset(TheTarget->createMCAsmInfo(*MRI, TripleName, MCOptions));
if (!MAI)
return error("no asm info for target " + TripleName, Context);
@@ -73,7 +74,6 @@ bool DwarfStreamer::init(Triple TheTriple) {
if (!MSTI)
return error("no subtarget info for target " + TripleName, Context);
- MCTargetOptions MCOptions = InitMCTargetOptionsFromFlags();
MAB = TheTarget->createMCAsmBackend(*MSTI, *MRI, MCOptions);
if (!MAB)
return error("no asm backend for target " + TripleName, Context);
diff --git a/llvm/tools/llvm-cfi-verify/lib/FileAnalysis.cpp b/llvm/tools/llvm-cfi-verify/lib/FileAnalysis.cpp
index 03f6e3f8a114..9ef894b40c43 100644
--- a/llvm/tools/llvm-cfi-verify/lib/FileAnalysis.cpp
+++ b/llvm/tools/llvm-cfi-verify/lib/FileAnalysis.cpp
@@ -22,6 +22,7 @@
#include "llvm/MC/MCObjectFileInfo.h"
#include "llvm/MC/MCRegisterInfo.h"
#include "llvm/MC/MCSubtargetInfo.h"
+#include "llvm/MC/MCTargetOptions.h"
#include "llvm/Object/Binary.h"
#include "llvm/Object/COFF.h"
#include "llvm/Object/ELFObjectFile.h"
@@ -387,7 +388,9 @@ Error FileAnalysis::initialiseDisassemblyMembers() {
return make_error<UnsupportedDisassembly>(
"Failed to initialise RegisterInfo.");
- AsmInfo.reset(ObjectTarget->createMCAsmInfo(*RegisterInfo, TripleName));
+ MCTargetOptions MCOptions;
+ AsmInfo.reset(
+ ObjectTarget->createMCAsmInfo(*RegisterInfo, TripleName, MCOptions));
if (!AsmInfo)
return make_error<UnsupportedDisassembly>("Failed to initialise AsmInfo.");
diff --git a/llvm/tools/llvm-dwp/llvm-dwp.cpp b/llvm/tools/llvm-dwp/llvm-dwp.cpp
index 0c629f506f4f..23513ef8fb4e 100644
--- a/llvm/tools/llvm-dwp/llvm-dwp.cpp
+++ b/llvm/tools/llvm-dwp/llvm-dwp.cpp
@@ -676,7 +676,9 @@ int main(int argc, char **argv) {
if (!MRI)
return error(Twine("no register info for target ") + TripleName, Context);
- std::unique_ptr<MCAsmInfo> MAI(TheTarget->createMCAsmInfo(*MRI, TripleName));
+ MCTargetOptions MCOptions = InitMCTargetOptionsFromFlags();
+ std::unique_ptr<MCAsmInfo> MAI(
+ TheTarget->createMCAsmInfo(*MRI, TripleName, MCOptions));
if (!MAI)
return error("no asm info for target " + TripleName, Context);
@@ -716,7 +718,6 @@ int main(int argc, char **argv) {
OS = BOS.getPointer();
}
- MCTargetOptions MCOptions = InitMCTargetOptionsFromFlags();
std::unique_ptr<MCStreamer> MS(TheTarget->createMCObjectStreamer(
TheTriple, MC, std::unique_ptr<MCAsmBackend>(MAB),
MAB->createObjectWriter(*OS), std::unique_ptr<MCCodeEmitter>(MCE), *MSTI,
diff --git a/llvm/tools/llvm-exegesis/lib/Analysis.cpp b/llvm/tools/llvm-exegesis/lib/Analysis.cpp
index 0fa0767b71d8..62f3d652de21 100644
--- a/llvm/tools/llvm-exegesis/lib/Analysis.cpp
+++ b/llvm/tools/llvm-exegesis/lib/Analysis.cpp
@@ -10,6 +10,7 @@
#include "BenchmarkResult.h"
#include "llvm/ADT/STLExtras.h"
#include "llvm/MC/MCAsmInfo.h"
+#include "llvm/MC/MCTargetOptions.h"
#include "llvm/Support/FormatVariadic.h"
#include <limits>
#include <unordered_set>
@@ -163,7 +164,9 @@ Analysis::Analysis(const Target &Target, std::unique_ptr<MCInstrInfo> InstrInfo,
const InstructionBenchmark &FirstPoint = Clustering.getPoints().front();
RegInfo_.reset(Target.createMCRegInfo(FirstPoint.LLVMTriple));
- AsmInfo_.reset(Target.createMCAsmInfo(*RegInfo_, FirstPoint.LLVMTriple));
+ MCTargetOptions MCOptions;
+ AsmInfo_.reset(
+ Target.createMCAsmInfo(*RegInfo_, FirstPoint.LLVMTriple, MCOptions));
SubtargetInfo_.reset(Target.createMCSubtargetInfo(FirstPoint.LLVMTriple,
FirstPoint.CpuName, ""));
InstPrinter_.reset(Target.createMCInstPrinter(
diff --git a/llvm/tools/llvm-jitlink/llvm-jitlink.cpp b/llvm/tools/llvm-jitlink/llvm-jitlink.cpp
index 7edbea23a044..251e79cf56d1 100644
--- a/llvm/tools/llvm-jitlink/llvm-jitlink.cpp
+++ b/llvm/tools/llvm-jitlink/llvm-jitlink.cpp
@@ -23,6 +23,7 @@
#include "llvm/MC/MCInstrInfo.h"
#include "llvm/MC/MCRegisterInfo.h"
#include "llvm/MC/MCSubtargetInfo.h"
+#include "llvm/MC/MCTargetOptions.h"
#include "llvm/Object/COFF.h"
#include "llvm/Object/MachO.h"
#include "llvm/Object/ObjectFile.h"
@@ -693,7 +694,9 @@ Error runChecks(Session &S) {
TripleName,
inconvertibleErrorCode()));
- std::unique_ptr<MCAsmInfo> MAI(TheTarget->createMCAsmInfo(*MRI, TripleName));
+ MCTargetOptions MCOptions;
+ std::unique_ptr<MCAsmInfo> MAI(
+ TheTarget->createMCAsmInfo(*MRI, TripleName, MCOptions));
if (!MAI)
ExitOnErr(make_error<StringError>("Unable to create target asm info " +
TripleName,
diff --git a/llvm/tools/llvm-mc-assemble-fuzzer/llvm-mc-assemble-fuzzer.cpp b/llvm/tools/llvm-mc-assemble-fuzzer/llvm-mc-assemble-fuzzer.cpp
index d59229e6496c..6c5961f7027c 100644
--- a/llvm/tools/llvm-mc-assemble-fuzzer/llvm-mc-assemble-fuzzer.cpp
+++ b/llvm/tools/llvm-mc-assemble-fuzzer/llvm-mc-assemble-fuzzer.cpp
@@ -161,7 +161,9 @@ int AssembleOneInput(const uint8_t *Data, size_t Size) {
abort();
}
- std::unique_ptr<MCAsmInfo> MAI(TheTarget->createMCAsmInfo(*MRI, TripleName));
+ MCTargetOptions MCOptions = InitMCTargetOptionsFromFlags();
+ std::unique_ptr<MCAsmInfo> MAI(
+ TheTarget->createMCAsmInfo(*MRI, TripleName, MCOptions));
if (!MAI) {
errs() << "Unable to create target asm info!";
abort();
@@ -193,8 +195,6 @@ int AssembleOneInput(const uint8_t *Data, size_t Size) {
std::unique_ptr<MCCodeEmitter> CE = nullptr;
std::unique_ptr<MCAsmBackend> MAB = nullptr;
- MCTargetOptions MCOptions = InitMCTargetOptionsFromFlags();
-
std::string OutputString;
raw_string_ostream Out(OutputString);
auto FOut = std::make_unique<formatted_raw_ostream>(Out);
diff --git a/llvm/tools/llvm-mc/Disassembler.cpp b/llvm/tools/llvm-mc/Disassembler.cpp
index 1ddbddfa1846..07fe0d589b59 100644
--- a/llvm/tools/llvm-mc/Disassembler.cpp
+++ b/llvm/tools/llvm-mc/Disassembler.cpp
@@ -133,7 +133,8 @@ static bool ByteArrayFromString(ByteArrayTy &ByteArray,
int Disassembler::disassemble(const Target &T, const std::string &Triple,
MCSubtargetInfo &STI, MCStreamer &Streamer,
MemoryBuffer &Buffer, SourceMgr &SM,
- MCContext &Ctx, raw_ostream &Out) {
+ MCContext &Ctx, raw_ostream &Out,
+ const MCTargetOptions &MCOptions) {
std::unique_ptr<const MCRegisterInfo> MRI(T.createMCRegInfo(Triple));
if (!MRI) {
@@ -141,7 +142,8 @@ int Disassembler::disassemble(const Target &T, const std::string &Triple,
return -1;
}
- std::unique_ptr<const MCAsmInfo> MAI(T.createMCAsmInfo(*MRI, Triple));
+ std::unique_ptr<const MCAsmInfo> MAI(
+ T.createMCAsmInfo(*MRI, Triple, MCOptions));
if (!MAI) {
errs() << "error: no assembly info for target " << Triple << "\n";
return -1;
diff --git a/llvm/tools/llvm-mc/Disassembler.h b/llvm/tools/llvm-mc/Disassembler.h
index dcd8c279c91a..a1603e584980 100644
--- a/llvm/tools/llvm-mc/Disassembler.h
+++ b/llvm/tools/llvm-mc/Disassembler.h
@@ -25,13 +25,14 @@ class SourceMgr;
class MCContext;
class MCSubtargetInfo;
class MCStreamer;
+class MCTargetOptions;
class Disassembler {
public:
static int disassemble(const Target &T, const std::string &Triple,
MCSubtargetInfo &STI, MCStreamer &Streamer,
MemoryBuffer &Buffer, SourceMgr &SM, MCContext &Ctx,
- raw_ostream &Out);
+ raw_ostream &Out, const MCTargetOptions &MCOptions);
};
} // namespace llvm
diff --git a/llvm/tools/llvm-mc/llvm-mc.cpp b/llvm/tools/llvm-mc/llvm-mc.cpp
index c23740a3094d..6aa347d98be2 100644
--- a/llvm/tools/llvm-mc/llvm-mc.cpp
+++ b/llvm/tools/llvm-mc/llvm-mc.cpp
@@ -351,7 +351,8 @@ int main(int argc, char **argv) {
std::unique_ptr<MCRegisterInfo> MRI(TheTarget->createMCRegInfo(TripleName));
assert(MRI && "Unable to create target register info!");
- std::unique_ptr<MCAsmInfo> MAI(TheTarget->createMCAsmInfo(*MRI, TripleName));
+ std::unique_ptr<MCAsmInfo> MAI(
+ TheTarget->createMCAsmInfo(*MRI, TripleName, MCOptions));
assert(MAI && "Unable to create target asm info!");
MAI->setRelaxELFRelocations(RelaxELFRel);
@@ -518,7 +519,7 @@ int main(int argc, char **argv) {
}
if (disassemble)
Res = Disassembler::disassemble(*TheTarget, TripleName, *STI, *Str, *Buffer,
- SrcMgr, Ctx, Out->os());
+ SrcMgr, Ctx, Out->os(), MCOptions);
// Keep output if no errors.
if (Res == 0) {
diff --git a/llvm/tools/llvm-mca/llvm-mca.cpp b/llvm/tools/llvm-mca/llvm-mca.cpp
index 99c45eebdd88..ccb8fd2e9578 100644
--- a/llvm/tools/llvm-mca/llvm-mca.cpp
+++ b/llvm/tools/llvm-mca/llvm-mca.cpp
@@ -353,7 +353,9 @@ int main(int argc, char **argv) {
std::unique_ptr<MCRegisterInfo> MRI(TheTarget->createMCRegInfo(TripleName));
assert(MRI && "Unable to create target register info!");
- std::unique_ptr<MCAsmInfo> MAI(TheTarget->createMCAsmInfo(*MRI, TripleName));
+ MCTargetOptions MCOptions = InitMCTargetOptionsFromFlags();
+ std::unique_ptr<MCAsmInfo> MAI(
+ TheTarget->createMCAsmInfo(*MRI, TripleName, MCOptions));
assert(MAI && "Unable to create target asm info!");
MCObjectFileInfo MOFI;
diff --git a/llvm/tools/llvm-objdump/MachODump.cpp b/llvm/tools/llvm-objdump/MachODump.cpp
index e4684d0f1601..fc3503dd0ec8 100644
--- a/llvm/tools/llvm-objdump/MachODump.cpp
+++ b/llvm/tools/llvm-objdump/MachODump.cpp
@@ -29,6 +29,7 @@
#include "llvm/MC/MCInstrInfo.h"
#include "llvm/MC/MCRegisterInfo.h"
#include "llvm/MC/MCSubtargetInfo.h"
+#include "llvm/MC/MCTargetOptions.h"
#include "llvm/Object/MachO.h"
#include "llvm/Object/MachOUniversal.h"
#include "llvm/Support/Casting.h"
@@ -7208,11 +7209,12 @@ static void DisassembleMachO(StringRef Filename, MachOObjectFile *MachOOF,
FeaturesStr = Features.getString();
}
+ MCTargetOptions MCOptions;
// Set up disassembler.
std::unique_ptr<const MCRegisterInfo> MRI(
TheTarget->createMCRegInfo(TripleName));
std::unique_ptr<const MCAsmInfo> AsmInfo(
- TheTarget->createMCAsmInfo(*MRI, TripleName));
+ TheTarget->createMCAsmInfo(*MRI, TripleName, MCOptions));
std::unique_ptr<const MCSubtargetInfo> STI(
TheTarget->createMCSubtargetInfo(TripleName, MachOMCPU, FeaturesStr));
MCContext Ctx(AsmInfo.get(), MRI.get(), nullptr);
@@ -7262,7 +7264,7 @@ static void DisassembleMachO(StringRef Filename, MachOObjectFile *MachOOF,
if (ThumbTarget) {
ThumbMRI.reset(ThumbTarget->createMCRegInfo(ThumbTripleName));
ThumbAsmInfo.reset(
- ThumbTarget->createMCAsmInfo(*ThumbMRI, ThumbTripleName));
+ ThumbTarget->createMCAsmInfo(*ThumbMRI, ThumbTripleName, MCOptions));
ThumbSTI.reset(
ThumbTarget->createMCSubtargetInfo(ThumbTripleName, MachOMCPU,
FeaturesStr));
@@ -7405,7 +7407,7 @@ static void DisassembleMachO(StringRef Filename, MachOObjectFile *MachOOF,
reportError(MachDSYM.takeError(), DSYMPath);
return;
}
-
+
// We need to keep the Binary alive with the buffer
DbgObj = &*MachDSYM.get();
DSYMBinary = std::move(*MachDSYM);
@@ -7827,7 +7829,7 @@ static void findUnwindRelocNameAddend(const MachOObjectFile *Obj,
auto Sym = Symbols.upper_bound(Addr);
if (Sym == Symbols.begin()) {
// The first symbol in the object is after this reference, the best we can
- // do is section-relative notation.
+ // do is section-relative notation.
if (Expected<StringRef> NameOrErr = RelocSection.getName())
Name = *NameOrErr;
else
diff --git a/llvm/tools/llvm-objdump/llvm-objdump.cpp b/llvm/tools/llvm-objdump/llvm-objdump.cpp
index 34a44b3b7fa9..a9014caf4bda 100644
--- a/llvm/tools/llvm-objdump/llvm-objdump.cpp
+++ b/llvm/tools/llvm-objdump/llvm-objdump.cpp
@@ -37,6 +37,7 @@
#include "llvm/MC/MCObjectFileInfo.h"
#include "llvm/MC/MCRegisterInfo.h"
#include "llvm/MC/MCSubtargetInfo.h"
+#include "llvm/MC/MCTargetOptions.h"
#include "llvm/Object/Archive.h"
#include "llvm/Object/COFF.h"
#include "llvm/Object/COFFImportFile.h"
@@ -1539,8 +1540,9 @@ static void disassembleObject(const ObjectFile *Obj, bool InlineRelocs) {
"no register info for target " + TripleName);
// Set up disassembler.
+ MCTargetOptions MCOptions;
std::unique_ptr<const MCAsmInfo> AsmInfo(
- TheTarget->createMCAsmInfo(*MRI, TripleName));
+ TheTarget->createMCAsmInfo(*MRI, TripleName, MCOptions));
if (!AsmInfo)
reportError(Obj->getFileName(),
"no assembly info for target " + TripleName);
diff --git a/llvm/tools/llvm-rtdyld/llvm-rtdyld.cpp b/llvm/tools/llvm-rtdyld/llvm-rtdyld.cpp
index 3a36e7709483..9b84c46d3901 100644
--- a/llvm/tools/llvm-rtdyld/llvm-rtdyld.cpp
+++ b/llvm/tools/llvm-rtdyld/llvm-rtdyld.cpp
@@ -23,6 +23,7 @@
#include "llvm/MC/MCInstrInfo.h"
#include "llvm/MC/MCRegisterInfo.h"
#include "llvm/MC/MCSubtargetInfo.h"
+#include "llvm/MC/MCTargetOptions.h"
#include "llvm/Object/SymbolSize.h"
#include "llvm/Support/CommandLine.h"
#include "llvm/Support/DynamicLibrary.h"
@@ -749,7 +750,9 @@ static int linkAndVerify() {
if (!MRI)
ErrorAndExit("Unable to create target register info!");
- std::unique_ptr<MCAsmInfo> MAI(TheTarget->createMCAsmInfo(*MRI, TripleName));
+ MCTargetOptions MCOptions;
+ std::unique_ptr<MCAsmInfo> MAI(
+ TheTarget->createMCAsmInfo(*MRI, TripleName, MCOptions));
if (!MAI)
ErrorAndExit("Unable to create target asm info!");
diff --git a/llvm/tools/sancov/sancov.cpp b/llvm/tools/sancov/sancov.cpp
index e0cc8a7cf849..1e6d92f6be86 100644
--- a/llvm/tools/sancov/sancov.cpp
+++ b/llvm/tools/sancov/sancov.cpp
@@ -21,6 +21,7 @@
#include "llvm/MC/MCObjectFileInfo.h"
#include "llvm/MC/MCRegisterInfo.h"
#include "llvm/MC/MCSubtargetInfo.h"
+#include "llvm/MC/MCTargetOptions.h"
#include "llvm/Object/Archive.h"
#include "llvm/Object/Binary.h"
#include "llvm/Object/COFF.h"
@@ -717,8 +718,9 @@ static void getObjectCoveragePoints(const object::ObjectFile &O,
TheTarget->createMCRegInfo(TripleName));
failIfEmpty(MRI, "no register info for target " + TripleName);
+ MCTargetOptions MCOptions;
std::unique_ptr<const MCAsmInfo> AsmInfo(
- TheTarget->createMCAsmInfo(*MRI, TripleName));
+ TheTarget->createMCAsmInfo(*MRI, TripleName, MCOptions));
failIfEmpty(AsmInfo, "no asm info for target " + TripleName);
std::unique_ptr<const MCObjectFileInfo> MOFI(new MCObjectFileInfo);
diff --git a/llvm/unittests/DebugInfo/DWARF/DwarfGenerator.cpp b/llvm/unittests/DebugInfo/DWARF/DwarfGenerator.cpp
index 2e062e8fe962..11bc084ca6f1 100644
--- a/llvm/unittests/DebugInfo/DWARF/DwarfGenerator.cpp
+++ b/llvm/unittests/DebugInfo/DWARF/DwarfGenerator.cpp
@@ -409,7 +409,8 @@ llvm::Error dwarfgen::Generator::init(Triple TheTriple, uint16_t V) {
TripleName,
inconvertibleErrorCode());
- MAI.reset(TheTarget->createMCAsmInfo(*MRI, TripleName));
+ MCTargetOptions MCOptions = InitMCTargetOptionsFromFlags();
+ MAI.reset(TheTarget->createMCAsmInfo(*MRI, TripleName, MCOptions));
if (!MAI)
return make_error<StringError>("no asm info for target " + TripleName,
inconvertibleErrorCode());
@@ -419,7 +420,6 @@ llvm::Error dwarfgen::Generator::init(Triple TheTriple, uint16_t V) {
return make_error<StringError>("no subtarget info for target " + TripleName,
inconvertibleErrorCode());
- MCTargetOptions MCOptions = InitMCTargetOptionsFromFlags();
MAB = TheTarget->createMCAsmBackend(*MSTI, *MRI, MCOptions);
if (!MAB)
return make_error<StringError>("no asm backend for target " + TripleName,
diff --git a/llvm/unittests/ExecutionEngine/JITLink/JITLinkTestCommon.cpp b/llvm/unittests/ExecutionEngine/JITLink/JITLinkTestCommon.cpp
index c5d7dc2fdc9c..bbf88e11d806 100644
--- a/llvm/unittests/ExecutionEngine/JITLink/JITLinkTestCommon.cpp
+++ b/llvm/unittests/ExecutionEngine/JITLink/JITLinkTestCommon.cpp
@@ -10,6 +10,7 @@
#include "llvm/MC/MCCodeEmitter.h"
#include "llvm/MC/MCObjectWriter.h"
#include "llvm/MC/MCParser/MCTargetAsmParser.h"
+#include "llvm/MC/MCTargetOptions.h"
#include "llvm/Support/TargetSelect.h"
using namespace llvm::jitlink;
@@ -59,7 +60,8 @@ Error JITLinkTestCommon::TestResources::initializeTripleSpecifics(Triple &TT) {
if (!MRI)
report_fatal_error("Could not build MCRegisterInfo for triple");
- MAI.reset(TheTarget->createMCAsmInfo(*MRI, TT.getTriple()));
+ MCTargetOptions MCOptions;
+ MAI.reset(TheTarget->createMCAsmInfo(*MRI, TT.getTriple(), MCOptions));
if (!MAI)
report_fatal_error("Could not build MCAsmInfo for triple");
diff --git a/llvm/unittests/MC/DwarfLineTables.cpp b/llvm/unittests/MC/DwarfLineTables.cpp
index 88e9565e1ca2..635c2c389e66 100644
--- a/llvm/unittests/MC/DwarfLineTables.cpp
+++ b/llvm/unittests/MC/DwarfLineTables.cpp
@@ -12,6 +12,7 @@
#include "llvm/MC/MCContext.h"
#include "llvm/MC/MCDwarf.h"
#include "llvm/MC/MCRegisterInfo.h"
+#include "llvm/MC/MCTargetOptions.h"
#include "llvm/Support/TargetRegistry.h"
#include "llvm/Support/TargetSelect.h"
#include "gtest/gtest.h"
@@ -37,7 +38,8 @@ struct Context {
return;
MRI.reset(TheTarget->createMCRegInfo(Triple));
- MAI.reset(TheTarget->createMCAsmInfo(*MRI, Triple));
+ MCTargetOptions MCOptions;
+ MAI.reset(TheTarget->createMCAsmInfo(*MRI, Triple, MCOptions));
Ctx = std::make_unique<MCContext>(MAI.get(), MRI.get(), nullptr);
}
diff --git a/llvm/unittests/MC/MCInstPrinter.cpp b/llvm/unittests/MC/MCInstPrinter.cpp
index 069437d97a73..14bbb03ee1da 100644
--- a/llvm/unittests/MC/MCInstPrinter.cpp
+++ b/llvm/unittests/MC/MCInstPrinter.cpp
@@ -9,6 +9,7 @@
#include "llvm/MC/MCInstPrinter.h"
#include "llvm/MC/MCAsmInfo.h"
#include "llvm/MC/MCInstrInfo.h"
+#include "llvm/MC/MCTargetOptions.h"
#include "llvm/Support/TargetRegistry.h"
#include "llvm/Support/TargetSelect.h"
#include "llvm/Target/TargetMachine.h"
@@ -40,7 +41,8 @@ class MCInstPrinterTest : public ::testing::Test {
return;
MRI.reset(TheTarget->createMCRegInfo(TripleName));
- MAI.reset(TheTarget->createMCAsmInfo(*MRI, TripleName));
+ MCTargetOptions MCOptions;
+ MAI.reset(TheTarget->createMCAsmInfo(*MRI, TripleName, MCOptions));
MII.reset(TheTarget->createMCInstrInfo());
Printer.reset(TheTarget->createMCInstPrinter(
Triple(TripleName), MAI->getAssemblerDialect(), *MAI, *MII, *MRI));
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