[Lldb-commits] [lldb] r361451 - [ARM64][AArch64] Update disassembler attributes to ARMv8.5 ISA with SVE extensions

Omair Javaid via lldb-commits lldb-commits at lists.llvm.org
Wed May 22 17:46:35 PDT 2019


Author: omjavaid
Date: Wed May 22 17:46:34 2019
New Revision: 361451

URL: http://llvm.org/viewvc/llvm-project?rev=361451&view=rev
Log:
[ARM64][AArch64] Update disassembler attributes to ARMv8.5 ISA with SVE extensions

This patch updates assembler attributes for AArch64 targets so we can disassemble newer instructions supported in ISA version 8.5 and SVE extensions.

Differential Revision: https://reviews.llvm.org/D62235



Modified:
    lldb/trunk/source/Plugins/Disassembler/llvm/DisassemblerLLVMC.cpp

Modified: lldb/trunk/source/Plugins/Disassembler/llvm/DisassemblerLLVMC.cpp
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/source/Plugins/Disassembler/llvm/DisassemblerLLVMC.cpp?rev=361451&r1=361450&r2=361451&view=diff
==============================================================================
--- lldb/trunk/source/Plugins/Disassembler/llvm/DisassemblerLLVMC.cpp (original)
+++ lldb/trunk/source/Plugins/Disassembler/llvm/DisassemblerLLVMC.cpp Wed May 22 17:46:34 2019
@@ -1188,10 +1188,10 @@ DisassemblerLLVMC::DisassemblerLLVMC(con
       features_str += "+dspr2,";
   }
 
-  // If any AArch64 variant, enable the ARMv8.2 ISA extensions so we can
-  // disassemble newer instructions.
+  // If any AArch64 variant, enable the ARMv8.5 ISA with SVE extensions so we
+  // can disassemble newer instructions.
   if (triple.getArch() == llvm::Triple::aarch64)
-    features_str += "+v8.2a";
+    features_str += "+v8.5a,+sve2";
 
   if (triple.getArch() == llvm::Triple::aarch64
       && triple.getVendor() == llvm::Triple::Apple) {




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