[Lldb-commits] [lldb] r285885 - Test for YMMRegisters.

Ravitheja Addepally via lldb-commits lldb-commits at lists.llvm.org
Thu Nov 3 01:35:55 PDT 2016


Author: ravitheja
Date: Thu Nov  3 03:35:55 2016
New Revision: 285885

URL: http://llvm.org/viewvc/llvm-project?rev=285885&view=rev
Log:
Test for YMMRegisters.

Summary:
This patch contains test for reading YMM Registers. The test basically
contains an inferior that loads the ymm registers with a bit pattern
and the python test executes register read to check if the bit pattern
is correctly written in the registers. This test is repeated twice for
each register with a different pattern for better sanity.

Reviewers: tberghammer, zturner, clayborg

Subscribers: tberghammer, danalbert, srhines

Differential Revision: https://reviews.llvm.org/D26242

Added:
    lldb/trunk/packages/Python/lldbsuite/test/functionalities/register/intel_avx/
    lldb/trunk/packages/Python/lldbsuite/test/functionalities/register/intel_avx/Makefile
    lldb/trunk/packages/Python/lldbsuite/test/functionalities/register/intel_avx/TestYMMRegister.py
    lldb/trunk/packages/Python/lldbsuite/test/functionalities/register/intel_avx/main.c

Added: lldb/trunk/packages/Python/lldbsuite/test/functionalities/register/intel_avx/Makefile
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/packages/Python/lldbsuite/test/functionalities/register/intel_avx/Makefile?rev=285885&view=auto
==============================================================================
--- lldb/trunk/packages/Python/lldbsuite/test/functionalities/register/intel_avx/Makefile (added)
+++ lldb/trunk/packages/Python/lldbsuite/test/functionalities/register/intel_avx/Makefile Thu Nov  3 03:35:55 2016
@@ -0,0 +1,7 @@
+LEVEL = ../../../make
+
+C_SOURCES := main.c
+
+CFLAGS_EXTRAS ?= -g -O1
+
+include $(LEVEL)/Makefile.rules

Added: lldb/trunk/packages/Python/lldbsuite/test/functionalities/register/intel_avx/TestYMMRegister.py
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/packages/Python/lldbsuite/test/functionalities/register/intel_avx/TestYMMRegister.py?rev=285885&view=auto
==============================================================================
--- lldb/trunk/packages/Python/lldbsuite/test/functionalities/register/intel_avx/TestYMMRegister.py (added)
+++ lldb/trunk/packages/Python/lldbsuite/test/functionalities/register/intel_avx/TestYMMRegister.py Thu Nov  3 03:35:55 2016
@@ -0,0 +1,75 @@
+"""
+Test that we correctly read the YMM registers.
+"""
+
+from __future__ import print_function
+
+
+import os
+import time
+import lldb
+from lldbsuite.test.decorators import *
+from lldbsuite.test.lldbtest import *
+from lldbsuite.test import lldbutil
+
+
+class TestYMMRegister(TestBase):
+    mydir = TestBase.compute_mydir(__file__)
+
+    @skipIfFreeBSD
+    @skipIfiOSSimulator
+    @skipIfTargetAndroid()
+    @skipIf(archs=no_match(['i386', 'x86_64']))
+    def test(self):
+        self.build()
+        self.setTearDownCleanup()
+
+        exe = os.path.join(os.getcwd(), "a.out")
+        target = self.dbg.CreateTarget(exe)
+
+        self.assertTrue(target, VALID_TARGET)
+
+        byte_pattern1 = 0x80
+        byte_pattern2 = 0xFF
+
+        # Launch the process and stop.
+        self.expect("run", PROCESS_STOPPED, substrs=['stopped'])
+
+        # Check stop reason; Should be either signal SIGTRAP or EXC_BREAKPOINT
+        output = self.res.GetOutput()
+        matched = False
+        substrs = [
+            'stop reason = EXC_BREAKPOINT',
+            'stop reason = signal SIGTRAP']
+        for str1 in substrs:
+            matched = output.find(str1) != -1
+            with recording(self, False) as sbuf:
+                print("%s sub string: %s" % ('Expecting', str1), file=sbuf)
+                print("Matched" if matched else "Not Matched", file=sbuf)
+            if matched:
+                break
+        self.assertTrue(matched, STOPPED_DUE_TO_SIGNAL)
+
+        if self.getArchitecture() == 'x86_64':
+            register_range = 16
+        else:
+            register_range = 8
+        for i in range(register_range):
+            self.runCmd("thread step-inst")
+
+            register_byte = (byte_pattern1 | i)
+            pattern = "ymm" + str(i) + " = " + str('{') + (
+                str(hex(register_byte)) + ' ') * 31 + str(hex(register_byte)) + str('}')
+
+            self.expect(
+                "register read ymm" + str(i),
+                substrs=[pattern])
+
+            register_byte = (byte_pattern2 | i)
+            pattern = "ymm" + str(i) + " = " + str('{') + (
+                str(hex(register_byte)) + ' ') * 31 + str(hex(register_byte)) + str('}')
+
+            self.runCmd("thread step-inst")
+            self.expect(
+                "register read ymm" + str(i),
+                substrs=[pattern])

Added: lldb/trunk/packages/Python/lldbsuite/test/functionalities/register/intel_avx/main.c
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/packages/Python/lldbsuite/test/functionalities/register/intel_avx/main.c?rev=285885&view=auto
==============================================================================
--- lldb/trunk/packages/Python/lldbsuite/test/functionalities/register/intel_avx/main.c (added)
+++ lldb/trunk/packages/Python/lldbsuite/test/functionalities/register/intel_avx/main.c Thu Nov  3 03:35:55 2016
@@ -0,0 +1,67 @@
+//===-- main.c ------------------------------------------------*- C -*-===//
+//
+//                     The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+
+void func() {
+  unsigned int ymmvalues[16];
+  unsigned char val;
+  unsigned char i;
+  for (i = 0 ; i < 16 ; i++)
+  {
+    val = (0x80 | i);
+    ymmvalues[i] = (val << 24) | (val << 16) | (val << 8) | val;
+  }
+
+  unsigned int ymmallones = 0xFFFFFFFF;
+  __asm__("int3;"
+          "vbroadcastss %1, %%ymm0;"
+          "vbroadcastss %0, %%ymm0;"
+          "vbroadcastss %2, %%ymm1;"
+          "vbroadcastss %0, %%ymm1;"
+          "vbroadcastss %3, %%ymm2;"
+          "vbroadcastss %0, %%ymm2;"
+          "vbroadcastss %4, %%ymm3;"
+          "vbroadcastss %0, %%ymm3;"
+          "vbroadcastss %5, %%ymm4;"
+          "vbroadcastss %0, %%ymm4;"
+          "vbroadcastss %6, %%ymm5;"
+          "vbroadcastss %0, %%ymm5;"
+          "vbroadcastss %7, %%ymm6;"
+          "vbroadcastss %0, %%ymm6;"
+          "vbroadcastss %8, %%ymm7;"
+          "vbroadcastss %0, %%ymm7;"
+#if defined(__x86_64__)
+          "vbroadcastss %9, %%ymm8;"
+          "vbroadcastss %0, %%ymm8;"
+          "vbroadcastss %10, %%ymm9;"
+          "vbroadcastss %0, %%ymm9;"
+          "vbroadcastss %11, %%ymm10;"
+          "vbroadcastss %0, %%ymm10;"
+          "vbroadcastss %12, %%ymm11;"
+          "vbroadcastss %0, %%ymm11;"
+          "vbroadcastss %13, %%ymm12;"
+          "vbroadcastss %0, %%ymm12;"
+          "vbroadcastss %14, %%ymm13;"
+          "vbroadcastss %0, %%ymm13;"
+          "vbroadcastss %15, %%ymm14;"
+          "vbroadcastss %0, %%ymm14;"
+          "vbroadcastss %16, %%ymm15;"
+          "vbroadcastss %0, %%ymm15;"
+#endif
+          ::"m"(ymmallones),
+          "m"(ymmvalues[0]), "m"(ymmvalues[1]), "m"(ymmvalues[2]), "m"(ymmvalues[3]),
+          "m"(ymmvalues[4]), "m"(ymmvalues[5]), "m"(ymmvalues[6]), "m"(ymmvalues[7])
+#if defined(__x86_64__)
+          ,
+          "m"(ymmvalues[8]), "m"(ymmvalues[9]), "m"(ymmvalues[10]), "m"(ymmvalues[11]),
+          "m"(ymmvalues[12]), "m"(ymmvalues[13]), "m"(ymmvalues[14]), "m"(ymmvalues[15])
+#endif
+              );
+}
+
+int main(int argc, char const *argv[]) { func(); }




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