[Lldb-commits] [lldb] r280751 - *** This commit represents a complete reformatting of the LLDB source code
Kate Stone via lldb-commits
lldb-commits at lists.llvm.org
Tue Sep 6 13:58:36 PDT 2016
Modified: lldb/trunk/source/Plugins/Process/Utility/RegisterContextDarwin_arm64.cpp
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/source/Plugins/Process/Utility/RegisterContextDarwin_arm64.cpp?rev=280751&r1=280750&r2=280751&view=diff
==============================================================================
--- lldb/trunk/source/Plugins/Process/Utility/RegisterContextDarwin_arm64.cpp (original)
+++ lldb/trunk/source/Plugins/Process/Utility/RegisterContextDarwin_arm64.cpp Tue Sep 6 15:57:50 2016
@@ -1,4 +1,5 @@
-//===-- RegisterContextDarwin_arm64.cpp ---------------------------*- C++ -*-===//
+//===-- RegisterContextDarwin_arm64.cpp ---------------------------*- C++
+//-*-===//
//
// The LLVM Compiler Infrastructure
//
@@ -41,18 +42,36 @@
using namespace lldb;
using namespace lldb_private;
-
-#define GPR_OFFSET(idx) ((idx) * 8)
-#define GPR_OFFSET_NAME(reg) (LLVM_EXTENSION offsetof (RegisterContextDarwin_arm64::GPR, reg))
-
-#define FPU_OFFSET(idx) ((idx) * 16 + sizeof (RegisterContextDarwin_arm64::GPR))
-#define FPU_OFFSET_NAME(reg) (LLVM_EXTENSION offsetof (RegisterContextDarwin_arm64::FPU, reg))
-
-#define EXC_OFFSET_NAME(reg) (LLVM_EXTENSION offsetof (RegisterContextDarwin_arm64::EXC, reg) + sizeof (RegisterContextDarwin_arm64::GPR) + sizeof (RegisterContextDarwin_arm64::FPU))
-#define DBG_OFFSET_NAME(reg) (LLVM_EXTENSION offsetof (RegisterContextDarwin_arm64::DBG, reg) + sizeof (RegisterContextDarwin_arm64::GPR) + sizeof (RegisterContextDarwin_arm64::FPU) + sizeof (RegisterContextDarwin_arm64::EXC))
-
-#define DEFINE_DBG(reg, i) #reg, NULL, sizeof(((RegisterContextDarwin_arm64::DBG *)NULL)->reg[i]), DBG_OFFSET_NAME(reg[i]), eEncodingUint, eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM }, NULL, NULL, NULL, 0
-#define REG_CONTEXT_SIZE (sizeof (RegisterContextDarwin_arm64::GPR) + sizeof (RegisterContextDarwin_arm64::FPU) + sizeof (RegisterContextDarwin_arm64::EXC))
+#define GPR_OFFSET(idx) ((idx)*8)
+#define GPR_OFFSET_NAME(reg) \
+ (LLVM_EXTENSION offsetof(RegisterContextDarwin_arm64::GPR, reg))
+
+#define FPU_OFFSET(idx) ((idx)*16 + sizeof(RegisterContextDarwin_arm64::GPR))
+#define FPU_OFFSET_NAME(reg) \
+ (LLVM_EXTENSION offsetof(RegisterContextDarwin_arm64::FPU, reg))
+
+#define EXC_OFFSET_NAME(reg) \
+ (LLVM_EXTENSION offsetof(RegisterContextDarwin_arm64::EXC, reg) + \
+ sizeof(RegisterContextDarwin_arm64::GPR) + \
+ sizeof(RegisterContextDarwin_arm64::FPU))
+#define DBG_OFFSET_NAME(reg) \
+ (LLVM_EXTENSION offsetof(RegisterContextDarwin_arm64::DBG, reg) + \
+ sizeof(RegisterContextDarwin_arm64::GPR) + \
+ sizeof(RegisterContextDarwin_arm64::FPU) + \
+ sizeof(RegisterContextDarwin_arm64::EXC))
+
+#define DEFINE_DBG(reg, i) \
+ #reg, NULL, \
+ sizeof(((RegisterContextDarwin_arm64::DBG *) NULL)->reg[i]), \
+ DBG_OFFSET_NAME(reg[i]), eEncodingUint, eFormatHex, \
+ {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \
+ LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \
+ LLDB_INVALID_REGNUM }, \
+ NULL, NULL, NULL, 0
+#define REG_CONTEXT_SIZE \
+ (sizeof(RegisterContextDarwin_arm64::GPR) + \
+ sizeof(RegisterContextDarwin_arm64::FPU) + \
+ sizeof(RegisterContextDarwin_arm64::EXC))
//-----------------------------------------------------------------------------
// Include RegisterInfos_arm64 to declare our g_register_infos_arm64 structure.
@@ -62,153 +81,66 @@ using namespace lldb_private;
#undef DECLARE_REGISTER_INFOS_ARM64_STRUCT
// General purpose registers
-static uint32_t
-g_gpr_regnums[] =
-{
- gpr_x0,
- gpr_x1,
- gpr_x2,
- gpr_x3,
- gpr_x4,
- gpr_x5,
- gpr_x6,
- gpr_x7,
- gpr_x8,
- gpr_x9,
- gpr_x10,
- gpr_x11,
- gpr_x12,
- gpr_x13,
- gpr_x14,
- gpr_x15,
- gpr_x16,
- gpr_x17,
- gpr_x18,
- gpr_x19,
- gpr_x20,
- gpr_x21,
- gpr_x22,
- gpr_x23,
- gpr_x24,
- gpr_x25,
- gpr_x26,
- gpr_x27,
- gpr_x28,
- gpr_fp,
- gpr_lr,
- gpr_sp,
- gpr_pc,
- gpr_cpsr
-};
+static uint32_t g_gpr_regnums[] = {
+ gpr_x0, gpr_x1, gpr_x2, gpr_x3, gpr_x4, gpr_x5, gpr_x6,
+ gpr_x7, gpr_x8, gpr_x9, gpr_x10, gpr_x11, gpr_x12, gpr_x13,
+ gpr_x14, gpr_x15, gpr_x16, gpr_x17, gpr_x18, gpr_x19, gpr_x20,
+ gpr_x21, gpr_x22, gpr_x23, gpr_x24, gpr_x25, gpr_x26, gpr_x27,
+ gpr_x28, gpr_fp, gpr_lr, gpr_sp, gpr_pc, gpr_cpsr};
// Floating point registers
-static uint32_t
-g_fpu_regnums[] =
-{
- fpu_v0,
- fpu_v1,
- fpu_v2,
- fpu_v3,
- fpu_v4,
- fpu_v5,
- fpu_v6,
- fpu_v7,
- fpu_v8,
- fpu_v9,
- fpu_v10,
- fpu_v11,
- fpu_v12,
- fpu_v13,
- fpu_v14,
- fpu_v15,
- fpu_v16,
- fpu_v17,
- fpu_v18,
- fpu_v19,
- fpu_v20,
- fpu_v21,
- fpu_v22,
- fpu_v23,
- fpu_v24,
- fpu_v25,
- fpu_v26,
- fpu_v27,
- fpu_v28,
- fpu_v29,
- fpu_v30,
- fpu_v31,
- fpu_fpsr,
- fpu_fpcr
-};
+static uint32_t g_fpu_regnums[] = {
+ fpu_v0, fpu_v1, fpu_v2, fpu_v3, fpu_v4, fpu_v5, fpu_v6,
+ fpu_v7, fpu_v8, fpu_v9, fpu_v10, fpu_v11, fpu_v12, fpu_v13,
+ fpu_v14, fpu_v15, fpu_v16, fpu_v17, fpu_v18, fpu_v19, fpu_v20,
+ fpu_v21, fpu_v22, fpu_v23, fpu_v24, fpu_v25, fpu_v26, fpu_v27,
+ fpu_v28, fpu_v29, fpu_v30, fpu_v31, fpu_fpsr, fpu_fpcr};
// Exception registers
-static uint32_t
-g_exc_regnums[] =
-{
- exc_far,
- exc_esr,
- exc_exception
-};
-
-static size_t k_num_register_infos = llvm::array_lengthof(g_register_infos_arm64);
-
-RegisterContextDarwin_arm64::RegisterContextDarwin_arm64(Thread &thread, uint32_t concrete_frame_idx) :
- RegisterContext(thread, concrete_frame_idx),
- gpr(),
- fpu(),
- exc()
-{
- uint32_t i;
- for (i=0; i<kNumErrors; i++)
- {
- gpr_errs[i] = -1;
- fpu_errs[i] = -1;
- exc_errs[i] = -1;
- }
-}
+static uint32_t g_exc_regnums[] = {exc_far, exc_esr, exc_exception};
-RegisterContextDarwin_arm64::~RegisterContextDarwin_arm64()
-{
+static size_t k_num_register_infos =
+ llvm::array_lengthof(g_register_infos_arm64);
+
+RegisterContextDarwin_arm64::RegisterContextDarwin_arm64(
+ Thread &thread, uint32_t concrete_frame_idx)
+ : RegisterContext(thread, concrete_frame_idx), gpr(), fpu(), exc() {
+ uint32_t i;
+ for (i = 0; i < kNumErrors; i++) {
+ gpr_errs[i] = -1;
+ fpu_errs[i] = -1;
+ exc_errs[i] = -1;
+ }
}
+RegisterContextDarwin_arm64::~RegisterContextDarwin_arm64() {}
-void
-RegisterContextDarwin_arm64::InvalidateAllRegisters ()
-{
- InvalidateAllRegisterStates();
+void RegisterContextDarwin_arm64::InvalidateAllRegisters() {
+ InvalidateAllRegisterStates();
}
-
-size_t
-RegisterContextDarwin_arm64::GetRegisterCount ()
-{
- assert(k_num_register_infos == k_num_registers);
- return k_num_registers;
+size_t RegisterContextDarwin_arm64::GetRegisterCount() {
+ assert(k_num_register_infos == k_num_registers);
+ return k_num_registers;
}
const RegisterInfo *
-RegisterContextDarwin_arm64::GetRegisterInfoAtIndex (size_t reg)
-{
- assert(k_num_register_infos == k_num_registers);
- if (reg < k_num_registers)
- return &g_register_infos_arm64[reg];
- return NULL;
+RegisterContextDarwin_arm64::GetRegisterInfoAtIndex(size_t reg) {
+ assert(k_num_register_infos == k_num_registers);
+ if (reg < k_num_registers)
+ return &g_register_infos_arm64[reg];
+ return NULL;
}
-size_t
-RegisterContextDarwin_arm64::GetRegisterInfosCount ()
-{
- return k_num_register_infos;
+size_t RegisterContextDarwin_arm64::GetRegisterInfosCount() {
+ return k_num_register_infos;
}
-const RegisterInfo *
-RegisterContextDarwin_arm64::GetRegisterInfos ()
-{
- return g_register_infos_arm64;
+const RegisterInfo *RegisterContextDarwin_arm64::GetRegisterInfos() {
+ return g_register_infos_arm64;
}
-
// Number of registers in each register set
const size_t k_num_gpr_registers = llvm::array_lengthof(g_gpr_regnums);
const size_t k_num_fpu_registers = llvm::array_lengthof(g_fpu_regnums);
@@ -219,726 +151,773 @@ const size_t k_num_exc_registers = llvm:
// of zero is for all registers, followed by other registers sets. The
// register information for the all register set need not be filled in.
//----------------------------------------------------------------------
-static const RegisterSet g_reg_sets[] =
-{
- { "General Purpose Registers", "gpr", k_num_gpr_registers, g_gpr_regnums, },
- { "Floating Point Registers", "fpu", k_num_fpu_registers, g_fpu_regnums },
- { "Exception State Registers", "exc", k_num_exc_registers, g_exc_regnums }
-};
+static const RegisterSet g_reg_sets[] = {
+ {
+ "General Purpose Registers", "gpr", k_num_gpr_registers, g_gpr_regnums,
+ },
+ {"Floating Point Registers", "fpu", k_num_fpu_registers, g_fpu_regnums},
+ {"Exception State Registers", "exc", k_num_exc_registers, g_exc_regnums}};
const size_t k_num_regsets = llvm::array_lengthof(g_reg_sets);
-
-size_t
-RegisterContextDarwin_arm64::GetRegisterSetCount ()
-{
- return k_num_regsets;
+size_t RegisterContextDarwin_arm64::GetRegisterSetCount() {
+ return k_num_regsets;
}
-const RegisterSet *
-RegisterContextDarwin_arm64::GetRegisterSet (size_t reg_set)
-{
- if (reg_set < k_num_regsets)
- return &g_reg_sets[reg_set];
- return NULL;
+const RegisterSet *RegisterContextDarwin_arm64::GetRegisterSet(size_t reg_set) {
+ if (reg_set < k_num_regsets)
+ return &g_reg_sets[reg_set];
+ return NULL;
}
-
//----------------------------------------------------------------------
// Register information definitions for arm64
//----------------------------------------------------------------------
-int
-RegisterContextDarwin_arm64::GetSetForNativeRegNum (int reg)
-{
- if (reg < fpu_v0)
- return GPRRegSet;
- else if (reg < exc_far)
- return FPURegSet;
- else if (reg < k_num_registers)
- return EXCRegSet;
- return -1;
-}
-
-int
-RegisterContextDarwin_arm64::ReadGPR (bool force)
-{
- int set = GPRRegSet;
- if (force || !RegisterSetIsCached(set))
- {
- SetError(set, Read, DoReadGPR(GetThreadID(), set, gpr));
- }
- return GetError(GPRRegSet, Read);
-}
-
-int
-RegisterContextDarwin_arm64::ReadFPU (bool force)
-{
- int set = FPURegSet;
- if (force || !RegisterSetIsCached(set))
- {
- SetError(set, Read, DoReadFPU(GetThreadID(), set, fpu));
- }
- return GetError(FPURegSet, Read);
-}
-
-int
-RegisterContextDarwin_arm64::ReadEXC (bool force)
-{
- int set = EXCRegSet;
- if (force || !RegisterSetIsCached(set))
- {
- SetError(set, Read, DoReadEXC(GetThreadID(), set, exc));
- }
- return GetError(EXCRegSet, Read);
-}
-
-int
-RegisterContextDarwin_arm64::ReadDBG (bool force)
-{
- int set = DBGRegSet;
- if (force || !RegisterSetIsCached(set))
- {
- SetError(set, Read, DoReadDBG(GetThreadID(), set, dbg));
- }
- return GetError(DBGRegSet, Read);
-}
-
-int
-RegisterContextDarwin_arm64::WriteGPR ()
-{
- int set = GPRRegSet;
- if (!RegisterSetIsCached(set))
- {
- SetError (set, Write, -1);
- return KERN_INVALID_ARGUMENT;
- }
- SetError (set, Write, DoWriteGPR(GetThreadID(), set, gpr));
- SetError (set, Read, -1);
- return GetError(GPRRegSet, Write);
-}
-
-int
-RegisterContextDarwin_arm64::WriteFPU ()
-{
- int set = FPURegSet;
- if (!RegisterSetIsCached(set))
- {
- SetError (set, Write, -1);
- return KERN_INVALID_ARGUMENT;
- }
- SetError (set, Write, DoWriteFPU(GetThreadID(), set, fpu));
- SetError (set, Read, -1);
- return GetError(FPURegSet, Write);
-}
-
-int
-RegisterContextDarwin_arm64::WriteEXC ()
-{
- int set = EXCRegSet;
- if (!RegisterSetIsCached(set))
- {
- SetError (set, Write, -1);
- return KERN_INVALID_ARGUMENT;
- }
- SetError (set, Write, DoWriteEXC(GetThreadID(), set, exc));
- SetError (set, Read, -1);
- return GetError(EXCRegSet, Write);
-}
-
-int
-RegisterContextDarwin_arm64::WriteDBG ()
-{
- int set = DBGRegSet;
- if (!RegisterSetIsCached(set))
- {
- SetError (set, Write, -1);
- return KERN_INVALID_ARGUMENT;
- }
- SetError (set, Write, DoWriteDBG(GetThreadID(), set, dbg));
- SetError (set, Read, -1);
- return GetError(DBGRegSet, Write);
+int RegisterContextDarwin_arm64::GetSetForNativeRegNum(int reg) {
+ if (reg < fpu_v0)
+ return GPRRegSet;
+ else if (reg < exc_far)
+ return FPURegSet;
+ else if (reg < k_num_registers)
+ return EXCRegSet;
+ return -1;
+}
+
+int RegisterContextDarwin_arm64::ReadGPR(bool force) {
+ int set = GPRRegSet;
+ if (force || !RegisterSetIsCached(set)) {
+ SetError(set, Read, DoReadGPR(GetThreadID(), set, gpr));
+ }
+ return GetError(GPRRegSet, Read);
+}
+
+int RegisterContextDarwin_arm64::ReadFPU(bool force) {
+ int set = FPURegSet;
+ if (force || !RegisterSetIsCached(set)) {
+ SetError(set, Read, DoReadFPU(GetThreadID(), set, fpu));
+ }
+ return GetError(FPURegSet, Read);
+}
+
+int RegisterContextDarwin_arm64::ReadEXC(bool force) {
+ int set = EXCRegSet;
+ if (force || !RegisterSetIsCached(set)) {
+ SetError(set, Read, DoReadEXC(GetThreadID(), set, exc));
+ }
+ return GetError(EXCRegSet, Read);
+}
+
+int RegisterContextDarwin_arm64::ReadDBG(bool force) {
+ int set = DBGRegSet;
+ if (force || !RegisterSetIsCached(set)) {
+ SetError(set, Read, DoReadDBG(GetThreadID(), set, dbg));
+ }
+ return GetError(DBGRegSet, Read);
+}
+
+int RegisterContextDarwin_arm64::WriteGPR() {
+ int set = GPRRegSet;
+ if (!RegisterSetIsCached(set)) {
+ SetError(set, Write, -1);
+ return KERN_INVALID_ARGUMENT;
+ }
+ SetError(set, Write, DoWriteGPR(GetThreadID(), set, gpr));
+ SetError(set, Read, -1);
+ return GetError(GPRRegSet, Write);
}
-
-int
-RegisterContextDarwin_arm64::ReadRegisterSet (uint32_t set, bool force)
-{
- switch (set)
- {
- case GPRRegSet: return ReadGPR(force);
- case FPURegSet: return ReadFPU(force);
- case EXCRegSet: return ReadEXC(force);
- case DBGRegSet: return ReadDBG(force);
- default: break;
- }
+int RegisterContextDarwin_arm64::WriteFPU() {
+ int set = FPURegSet;
+ if (!RegisterSetIsCached(set)) {
+ SetError(set, Write, -1);
return KERN_INVALID_ARGUMENT;
+ }
+ SetError(set, Write, DoWriteFPU(GetThreadID(), set, fpu));
+ SetError(set, Read, -1);
+ return GetError(FPURegSet, Write);
}
-int
-RegisterContextDarwin_arm64::WriteRegisterSet (uint32_t set)
-{
- // Make sure we have a valid context to set.
- if (RegisterSetIsCached(set))
- {
- switch (set)
- {
- case GPRRegSet: return WriteGPR();
- case FPURegSet: return WriteFPU();
- case EXCRegSet: return WriteEXC();
- case DBGRegSet: return WriteDBG();
- default: break;
- }
- }
+int RegisterContextDarwin_arm64::WriteEXC() {
+ int set = EXCRegSet;
+ if (!RegisterSetIsCached(set)) {
+ SetError(set, Write, -1);
return KERN_INVALID_ARGUMENT;
+ }
+ SetError(set, Write, DoWriteEXC(GetThreadID(), set, exc));
+ SetError(set, Read, -1);
+ return GetError(EXCRegSet, Write);
}
-void
-RegisterContextDarwin_arm64::LogDBGRegisters (Log *log, const DBG& dbg)
-{
- if (log)
- {
- for (uint32_t i=0; i<16; i++)
- log->Printf("BVR%-2u/BCR%-2u = { 0x%8.8llx, 0x%8.8llx } WVR%-2u/WCR%-2u = { 0x%8.8llx, 0x%8.8llx }",
- i, i, dbg.bvr[i], dbg.bcr[i],
- i, i, dbg.wvr[i], dbg.wcr[i]);
+int RegisterContextDarwin_arm64::WriteDBG() {
+ int set = DBGRegSet;
+ if (!RegisterSetIsCached(set)) {
+ SetError(set, Write, -1);
+ return KERN_INVALID_ARGUMENT;
+ }
+ SetError(set, Write, DoWriteDBG(GetThreadID(), set, dbg));
+ SetError(set, Read, -1);
+ return GetError(DBGRegSet, Write);
+}
+
+int RegisterContextDarwin_arm64::ReadRegisterSet(uint32_t set, bool force) {
+ switch (set) {
+ case GPRRegSet:
+ return ReadGPR(force);
+ case FPURegSet:
+ return ReadFPU(force);
+ case EXCRegSet:
+ return ReadEXC(force);
+ case DBGRegSet:
+ return ReadDBG(force);
+ default:
+ break;
+ }
+ return KERN_INVALID_ARGUMENT;
+}
+
+int RegisterContextDarwin_arm64::WriteRegisterSet(uint32_t set) {
+ // Make sure we have a valid context to set.
+ if (RegisterSetIsCached(set)) {
+ switch (set) {
+ case GPRRegSet:
+ return WriteGPR();
+ case FPURegSet:
+ return WriteFPU();
+ case EXCRegSet:
+ return WriteEXC();
+ case DBGRegSet:
+ return WriteDBG();
+ default:
+ break;
}
+ }
+ return KERN_INVALID_ARGUMENT;
}
+void RegisterContextDarwin_arm64::LogDBGRegisters(Log *log, const DBG &dbg) {
+ if (log) {
+ for (uint32_t i = 0; i < 16; i++)
+ log->Printf("BVR%-2u/BCR%-2u = { 0x%8.8llx, 0x%8.8llx } WVR%-2u/WCR%-2u "
+ "= { 0x%8.8llx, 0x%8.8llx }",
+ i, i, dbg.bvr[i], dbg.bcr[i], i, i, dbg.wvr[i], dbg.wcr[i]);
+ }
+}
-bool
-RegisterContextDarwin_arm64::ReadRegister (const RegisterInfo *reg_info, RegisterValue &value)
-{
- const uint32_t reg = reg_info->kinds[eRegisterKindLLDB];
- int set = RegisterContextDarwin_arm64::GetSetForNativeRegNum (reg);
-
- if (set == -1)
- return false;
+bool RegisterContextDarwin_arm64::ReadRegister(const RegisterInfo *reg_info,
+ RegisterValue &value) {
+ const uint32_t reg = reg_info->kinds[eRegisterKindLLDB];
+ int set = RegisterContextDarwin_arm64::GetSetForNativeRegNum(reg);
- if (ReadRegisterSet(set, false) != KERN_SUCCESS)
- return false;
+ if (set == -1)
+ return false;
- switch (reg)
- {
- case gpr_x0:
- case gpr_x1:
- case gpr_x2:
- case gpr_x3:
- case gpr_x4:
- case gpr_x5:
- case gpr_x6:
- case gpr_x7:
- case gpr_x8:
- case gpr_x9:
- case gpr_x10:
- case gpr_x11:
- case gpr_x12:
- case gpr_x13:
- case gpr_x14:
- case gpr_x15:
- case gpr_x16:
- case gpr_x17:
- case gpr_x18:
- case gpr_x19:
- case gpr_x20:
- case gpr_x21:
- case gpr_x22:
- case gpr_x23:
- case gpr_x24:
- case gpr_x25:
- case gpr_x26:
- case gpr_x27:
- case gpr_x28:
- case gpr_fp:
- case gpr_sp:
- case gpr_lr:
- case gpr_pc:
- case gpr_cpsr:
- value.SetUInt64 (gpr.x[reg - gpr_x0]);
- break;
-
- case fpu_v0:
- case fpu_v1:
- case fpu_v2:
- case fpu_v3:
- case fpu_v4:
- case fpu_v5:
- case fpu_v6:
- case fpu_v7:
- case fpu_v8:
- case fpu_v9:
- case fpu_v10:
- case fpu_v11:
- case fpu_v12:
- case fpu_v13:
- case fpu_v14:
- case fpu_v15:
- case fpu_v16:
- case fpu_v17:
- case fpu_v18:
- case fpu_v19:
- case fpu_v20:
- case fpu_v21:
- case fpu_v22:
- case fpu_v23:
- case fpu_v24:
- case fpu_v25:
- case fpu_v26:
- case fpu_v27:
- case fpu_v28:
- case fpu_v29:
- case fpu_v30:
- case fpu_v31:
- value.SetBytes(fpu.v[reg].bytes, reg_info->byte_size, endian::InlHostByteOrder());
- break;
-
- case fpu_fpsr:
- value.SetUInt32 (fpu.fpsr);
- break;
-
- case fpu_fpcr:
- value.SetUInt32 (fpu.fpcr);
- break;
-
- case exc_exception:
- value.SetUInt32 (exc.exception);
- break;
- case exc_esr:
- value.SetUInt32 (exc.esr);
- break;
- case exc_far:
- value.SetUInt64 (exc.far);
- break;
+ if (ReadRegisterSet(set, false) != KERN_SUCCESS)
+ return false;
- default:
- value.SetValueToInvalid();
- return false;
+ switch (reg) {
+ case gpr_x0:
+ case gpr_x1:
+ case gpr_x2:
+ case gpr_x3:
+ case gpr_x4:
+ case gpr_x5:
+ case gpr_x6:
+ case gpr_x7:
+ case gpr_x8:
+ case gpr_x9:
+ case gpr_x10:
+ case gpr_x11:
+ case gpr_x12:
+ case gpr_x13:
+ case gpr_x14:
+ case gpr_x15:
+ case gpr_x16:
+ case gpr_x17:
+ case gpr_x18:
+ case gpr_x19:
+ case gpr_x20:
+ case gpr_x21:
+ case gpr_x22:
+ case gpr_x23:
+ case gpr_x24:
+ case gpr_x25:
+ case gpr_x26:
+ case gpr_x27:
+ case gpr_x28:
+ case gpr_fp:
+ case gpr_sp:
+ case gpr_lr:
+ case gpr_pc:
+ case gpr_cpsr:
+ value.SetUInt64(gpr.x[reg - gpr_x0]);
+ break;
+
+ case fpu_v0:
+ case fpu_v1:
+ case fpu_v2:
+ case fpu_v3:
+ case fpu_v4:
+ case fpu_v5:
+ case fpu_v6:
+ case fpu_v7:
+ case fpu_v8:
+ case fpu_v9:
+ case fpu_v10:
+ case fpu_v11:
+ case fpu_v12:
+ case fpu_v13:
+ case fpu_v14:
+ case fpu_v15:
+ case fpu_v16:
+ case fpu_v17:
+ case fpu_v18:
+ case fpu_v19:
+ case fpu_v20:
+ case fpu_v21:
+ case fpu_v22:
+ case fpu_v23:
+ case fpu_v24:
+ case fpu_v25:
+ case fpu_v26:
+ case fpu_v27:
+ case fpu_v28:
+ case fpu_v29:
+ case fpu_v30:
+ case fpu_v31:
+ value.SetBytes(fpu.v[reg].bytes, reg_info->byte_size,
+ endian::InlHostByteOrder());
+ break;
+
+ case fpu_fpsr:
+ value.SetUInt32(fpu.fpsr);
+ break;
+
+ case fpu_fpcr:
+ value.SetUInt32(fpu.fpcr);
+ break;
+
+ case exc_exception:
+ value.SetUInt32(exc.exception);
+ break;
+ case exc_esr:
+ value.SetUInt32(exc.esr);
+ break;
+ case exc_far:
+ value.SetUInt64(exc.far);
+ break;
- }
- return true;
+ default:
+ value.SetValueToInvalid();
+ return false;
+ }
+ return true;
}
+bool RegisterContextDarwin_arm64::WriteRegister(const RegisterInfo *reg_info,
+ const RegisterValue &value) {
+ const uint32_t reg = reg_info->kinds[eRegisterKindLLDB];
+ int set = GetSetForNativeRegNum(reg);
-bool
-RegisterContextDarwin_arm64::WriteRegister (const RegisterInfo *reg_info,
- const RegisterValue &value)
-{
- const uint32_t reg = reg_info->kinds[eRegisterKindLLDB];
- int set = GetSetForNativeRegNum (reg);
-
- if (set == -1)
- return false;
-
- if (ReadRegisterSet(set, false) != KERN_SUCCESS)
- return false;
+ if (set == -1)
+ return false;
- switch (reg)
- {
- case gpr_x0:
- case gpr_x1:
- case gpr_x2:
- case gpr_x3:
- case gpr_x4:
- case gpr_x5:
- case gpr_x6:
- case gpr_x7:
- case gpr_x8:
- case gpr_x9:
- case gpr_x10:
- case gpr_x11:
- case gpr_x12:
- case gpr_x13:
- case gpr_x14:
- case gpr_x15:
- case gpr_x16:
- case gpr_x17:
- case gpr_x18:
- case gpr_x19:
- case gpr_x20:
- case gpr_x21:
- case gpr_x22:
- case gpr_x23:
- case gpr_x24:
- case gpr_x25:
- case gpr_x26:
- case gpr_x27:
- case gpr_x28:
- case gpr_fp:
- case gpr_sp:
- case gpr_lr:
- case gpr_pc:
- case gpr_cpsr:
- gpr.x[reg - gpr_x0] = value.GetAsUInt64();
- break;
-
- case fpu_v0:
- case fpu_v1:
- case fpu_v2:
- case fpu_v3:
- case fpu_v4:
- case fpu_v5:
- case fpu_v6:
- case fpu_v7:
- case fpu_v8:
- case fpu_v9:
- case fpu_v10:
- case fpu_v11:
- case fpu_v12:
- case fpu_v13:
- case fpu_v14:
- case fpu_v15:
- case fpu_v16:
- case fpu_v17:
- case fpu_v18:
- case fpu_v19:
- case fpu_v20:
- case fpu_v21:
- case fpu_v22:
- case fpu_v23:
- case fpu_v24:
- case fpu_v25:
- case fpu_v26:
- case fpu_v27:
- case fpu_v28:
- case fpu_v29:
- case fpu_v30:
- case fpu_v31:
- ::memcpy (fpu.v[reg].bytes, value.GetBytes(), value.GetByteSize());
- break;
-
- case fpu_fpsr:
- fpu.fpsr = value.GetAsUInt32();
- break;
-
- case fpu_fpcr:
- fpu.fpcr = value.GetAsUInt32();
- break;
-
- case exc_exception:
- exc.exception = value.GetAsUInt32();
- break;
- case exc_esr:
- exc.esr = value.GetAsUInt32();
- break;
- case exc_far:
- exc.far = value.GetAsUInt64();
- break;
+ if (ReadRegisterSet(set, false) != KERN_SUCCESS)
+ return false;
- default:
- return false;
+ switch (reg) {
+ case gpr_x0:
+ case gpr_x1:
+ case gpr_x2:
+ case gpr_x3:
+ case gpr_x4:
+ case gpr_x5:
+ case gpr_x6:
+ case gpr_x7:
+ case gpr_x8:
+ case gpr_x9:
+ case gpr_x10:
+ case gpr_x11:
+ case gpr_x12:
+ case gpr_x13:
+ case gpr_x14:
+ case gpr_x15:
+ case gpr_x16:
+ case gpr_x17:
+ case gpr_x18:
+ case gpr_x19:
+ case gpr_x20:
+ case gpr_x21:
+ case gpr_x22:
+ case gpr_x23:
+ case gpr_x24:
+ case gpr_x25:
+ case gpr_x26:
+ case gpr_x27:
+ case gpr_x28:
+ case gpr_fp:
+ case gpr_sp:
+ case gpr_lr:
+ case gpr_pc:
+ case gpr_cpsr:
+ gpr.x[reg - gpr_x0] = value.GetAsUInt64();
+ break;
+
+ case fpu_v0:
+ case fpu_v1:
+ case fpu_v2:
+ case fpu_v3:
+ case fpu_v4:
+ case fpu_v5:
+ case fpu_v6:
+ case fpu_v7:
+ case fpu_v8:
+ case fpu_v9:
+ case fpu_v10:
+ case fpu_v11:
+ case fpu_v12:
+ case fpu_v13:
+ case fpu_v14:
+ case fpu_v15:
+ case fpu_v16:
+ case fpu_v17:
+ case fpu_v18:
+ case fpu_v19:
+ case fpu_v20:
+ case fpu_v21:
+ case fpu_v22:
+ case fpu_v23:
+ case fpu_v24:
+ case fpu_v25:
+ case fpu_v26:
+ case fpu_v27:
+ case fpu_v28:
+ case fpu_v29:
+ case fpu_v30:
+ case fpu_v31:
+ ::memcpy(fpu.v[reg].bytes, value.GetBytes(), value.GetByteSize());
+ break;
+
+ case fpu_fpsr:
+ fpu.fpsr = value.GetAsUInt32();
+ break;
+
+ case fpu_fpcr:
+ fpu.fpcr = value.GetAsUInt32();
+ break;
+
+ case exc_exception:
+ exc.exception = value.GetAsUInt32();
+ break;
+ case exc_esr:
+ exc.esr = value.GetAsUInt32();
+ break;
+ case exc_far:
+ exc.far = value.GetAsUInt64();
+ break;
- }
- return WriteRegisterSet(set) == KERN_SUCCESS;
+ default:
+ return false;
+ }
+ return WriteRegisterSet(set) == KERN_SUCCESS;
}
-bool
-RegisterContextDarwin_arm64::ReadAllRegisterValues (lldb::DataBufferSP &data_sp)
-{
- data_sp.reset (new DataBufferHeap (REG_CONTEXT_SIZE, 0));
- if (data_sp &&
- ReadGPR (false) == KERN_SUCCESS &&
- ReadFPU (false) == KERN_SUCCESS &&
- ReadEXC (false) == KERN_SUCCESS)
- {
- uint8_t *dst = data_sp->GetBytes();
- ::memcpy (dst, &gpr, sizeof(gpr));
- dst += sizeof(gpr);
+bool RegisterContextDarwin_arm64::ReadAllRegisterValues(
+ lldb::DataBufferSP &data_sp) {
+ data_sp.reset(new DataBufferHeap(REG_CONTEXT_SIZE, 0));
+ if (data_sp && ReadGPR(false) == KERN_SUCCESS &&
+ ReadFPU(false) == KERN_SUCCESS && ReadEXC(false) == KERN_SUCCESS) {
+ uint8_t *dst = data_sp->GetBytes();
+ ::memcpy(dst, &gpr, sizeof(gpr));
+ dst += sizeof(gpr);
- ::memcpy (dst, &fpu, sizeof(fpu));
- dst += sizeof(gpr);
+ ::memcpy(dst, &fpu, sizeof(fpu));
+ dst += sizeof(gpr);
- ::memcpy (dst, &exc, sizeof(exc));
- return true;
- }
- return false;
+ ::memcpy(dst, &exc, sizeof(exc));
+ return true;
+ }
+ return false;
}
-bool
-RegisterContextDarwin_arm64::WriteAllRegisterValues (const lldb::DataBufferSP &data_sp)
-{
- if (data_sp && data_sp->GetByteSize() == REG_CONTEXT_SIZE)
- {
- const uint8_t *src = data_sp->GetBytes();
- ::memcpy (&gpr, src, sizeof(gpr));
- src += sizeof(gpr);
-
- ::memcpy (&fpu, src, sizeof(fpu));
- src += sizeof(gpr);
-
- ::memcpy (&exc, src, sizeof(exc));
- uint32_t success_count = 0;
- if (WriteGPR() == KERN_SUCCESS)
- ++success_count;
- if (WriteFPU() == KERN_SUCCESS)
- ++success_count;
- if (WriteEXC() == KERN_SUCCESS)
- ++success_count;
- return success_count == 3;
+bool RegisterContextDarwin_arm64::WriteAllRegisterValues(
+ const lldb::DataBufferSP &data_sp) {
+ if (data_sp && data_sp->GetByteSize() == REG_CONTEXT_SIZE) {
+ const uint8_t *src = data_sp->GetBytes();
+ ::memcpy(&gpr, src, sizeof(gpr));
+ src += sizeof(gpr);
+
+ ::memcpy(&fpu, src, sizeof(fpu));
+ src += sizeof(gpr);
+
+ ::memcpy(&exc, src, sizeof(exc));
+ uint32_t success_count = 0;
+ if (WriteGPR() == KERN_SUCCESS)
+ ++success_count;
+ if (WriteFPU() == KERN_SUCCESS)
+ ++success_count;
+ if (WriteEXC() == KERN_SUCCESS)
+ ++success_count;
+ return success_count == 3;
+ }
+ return false;
+}
+
+uint32_t RegisterContextDarwin_arm64::ConvertRegisterKindToRegisterNumber(
+ RegisterKind kind, uint32_t reg) {
+ if (kind == eRegisterKindGeneric) {
+ switch (reg) {
+ case LLDB_REGNUM_GENERIC_PC:
+ return gpr_pc;
+ case LLDB_REGNUM_GENERIC_SP:
+ return gpr_sp;
+ case LLDB_REGNUM_GENERIC_FP:
+ return gpr_fp;
+ case LLDB_REGNUM_GENERIC_RA:
+ return gpr_lr;
+ case LLDB_REGNUM_GENERIC_FLAGS:
+ return gpr_cpsr;
+ default:
+ break;
}
- return false;
-}
+ } else if (kind == eRegisterKindDWARF) {
+ switch (reg) {
+ case arm64_dwarf::x0:
+ return gpr_x0;
+ case arm64_dwarf::x1:
+ return gpr_x1;
+ case arm64_dwarf::x2:
+ return gpr_x2;
+ case arm64_dwarf::x3:
+ return gpr_x3;
+ case arm64_dwarf::x4:
+ return gpr_x4;
+ case arm64_dwarf::x5:
+ return gpr_x5;
+ case arm64_dwarf::x6:
+ return gpr_x6;
+ case arm64_dwarf::x7:
+ return gpr_x7;
+ case arm64_dwarf::x8:
+ return gpr_x8;
+ case arm64_dwarf::x9:
+ return gpr_x9;
+ case arm64_dwarf::x10:
+ return gpr_x10;
+ case arm64_dwarf::x11:
+ return gpr_x11;
+ case arm64_dwarf::x12:
+ return gpr_x12;
+ case arm64_dwarf::x13:
+ return gpr_x13;
+ case arm64_dwarf::x14:
+ return gpr_x14;
+ case arm64_dwarf::x15:
+ return gpr_x15;
+ case arm64_dwarf::x16:
+ return gpr_x16;
+ case arm64_dwarf::x17:
+ return gpr_x17;
+ case arm64_dwarf::x18:
+ return gpr_x18;
+ case arm64_dwarf::x19:
+ return gpr_x19;
+ case arm64_dwarf::x20:
+ return gpr_x20;
+ case arm64_dwarf::x21:
+ return gpr_x21;
+ case arm64_dwarf::x22:
+ return gpr_x22;
+ case arm64_dwarf::x23:
+ return gpr_x23;
+ case arm64_dwarf::x24:
+ return gpr_x24;
+ case arm64_dwarf::x25:
+ return gpr_x25;
+ case arm64_dwarf::x26:
+ return gpr_x26;
+ case arm64_dwarf::x27:
+ return gpr_x27;
+ case arm64_dwarf::x28:
+ return gpr_x28;
+
+ case arm64_dwarf::fp:
+ return gpr_fp;
+ case arm64_dwarf::sp:
+ return gpr_sp;
+ case arm64_dwarf::lr:
+ return gpr_lr;
+ case arm64_dwarf::pc:
+ return gpr_pc;
+ case arm64_dwarf::cpsr:
+ return gpr_cpsr;
+
+ case arm64_dwarf::v0:
+ return fpu_v0;
+ case arm64_dwarf::v1:
+ return fpu_v1;
+ case arm64_dwarf::v2:
+ return fpu_v2;
+ case arm64_dwarf::v3:
+ return fpu_v3;
+ case arm64_dwarf::v4:
+ return fpu_v4;
+ case arm64_dwarf::v5:
+ return fpu_v5;
+ case arm64_dwarf::v6:
+ return fpu_v6;
+ case arm64_dwarf::v7:
+ return fpu_v7;
+ case arm64_dwarf::v8:
+ return fpu_v8;
+ case arm64_dwarf::v9:
+ return fpu_v9;
+ case arm64_dwarf::v10:
+ return fpu_v10;
+ case arm64_dwarf::v11:
+ return fpu_v11;
+ case arm64_dwarf::v12:
+ return fpu_v12;
+ case arm64_dwarf::v13:
+ return fpu_v13;
+ case arm64_dwarf::v14:
+ return fpu_v14;
+ case arm64_dwarf::v15:
+ return fpu_v15;
+ case arm64_dwarf::v16:
+ return fpu_v16;
+ case arm64_dwarf::v17:
+ return fpu_v17;
+ case arm64_dwarf::v18:
+ return fpu_v18;
+ case arm64_dwarf::v19:
+ return fpu_v19;
+ case arm64_dwarf::v20:
+ return fpu_v20;
+ case arm64_dwarf::v21:
+ return fpu_v21;
+ case arm64_dwarf::v22:
+ return fpu_v22;
+ case arm64_dwarf::v23:
+ return fpu_v23;
+ case arm64_dwarf::v24:
+ return fpu_v24;
+ case arm64_dwarf::v25:
+ return fpu_v25;
+ case arm64_dwarf::v26:
+ return fpu_v26;
+ case arm64_dwarf::v27:
+ return fpu_v27;
+ case arm64_dwarf::v28:
+ return fpu_v28;
+ case arm64_dwarf::v29:
+ return fpu_v29;
+ case arm64_dwarf::v30:
+ return fpu_v30;
+ case arm64_dwarf::v31:
+ return fpu_v31;
-uint32_t
-RegisterContextDarwin_arm64::ConvertRegisterKindToRegisterNumber (RegisterKind kind, uint32_t reg)
-{
- if (kind == eRegisterKindGeneric)
- {
- switch (reg)
- {
- case LLDB_REGNUM_GENERIC_PC: return gpr_pc;
- case LLDB_REGNUM_GENERIC_SP: return gpr_sp;
- case LLDB_REGNUM_GENERIC_FP: return gpr_fp;
- case LLDB_REGNUM_GENERIC_RA: return gpr_lr;
- case LLDB_REGNUM_GENERIC_FLAGS: return gpr_cpsr;
- default:
- break;
- }
- }
- else if (kind == eRegisterKindDWARF)
- {
- switch (reg)
- {
- case arm64_dwarf::x0: return gpr_x0;
- case arm64_dwarf::x1: return gpr_x1;
- case arm64_dwarf::x2: return gpr_x2;
- case arm64_dwarf::x3: return gpr_x3;
- case arm64_dwarf::x4: return gpr_x4;
- case arm64_dwarf::x5: return gpr_x5;
- case arm64_dwarf::x6: return gpr_x6;
- case arm64_dwarf::x7: return gpr_x7;
- case arm64_dwarf::x8: return gpr_x8;
- case arm64_dwarf::x9: return gpr_x9;
- case arm64_dwarf::x10: return gpr_x10;
- case arm64_dwarf::x11: return gpr_x11;
- case arm64_dwarf::x12: return gpr_x12;
- case arm64_dwarf::x13: return gpr_x13;
- case arm64_dwarf::x14: return gpr_x14;
- case arm64_dwarf::x15: return gpr_x15;
- case arm64_dwarf::x16: return gpr_x16;
- case arm64_dwarf::x17: return gpr_x17;
- case arm64_dwarf::x18: return gpr_x18;
- case arm64_dwarf::x19: return gpr_x19;
- case arm64_dwarf::x20: return gpr_x20;
- case arm64_dwarf::x21: return gpr_x21;
- case arm64_dwarf::x22: return gpr_x22;
- case arm64_dwarf::x23: return gpr_x23;
- case arm64_dwarf::x24: return gpr_x24;
- case arm64_dwarf::x25: return gpr_x25;
- case arm64_dwarf::x26: return gpr_x26;
- case arm64_dwarf::x27: return gpr_x27;
- case arm64_dwarf::x28: return gpr_x28;
-
- case arm64_dwarf::fp: return gpr_fp;
- case arm64_dwarf::sp: return gpr_sp;
- case arm64_dwarf::lr: return gpr_lr;
- case arm64_dwarf::pc: return gpr_pc;
- case arm64_dwarf::cpsr: return gpr_cpsr;
-
- case arm64_dwarf::v0: return fpu_v0;
- case arm64_dwarf::v1: return fpu_v1;
- case arm64_dwarf::v2: return fpu_v2;
- case arm64_dwarf::v3: return fpu_v3;
- case arm64_dwarf::v4: return fpu_v4;
- case arm64_dwarf::v5: return fpu_v5;
- case arm64_dwarf::v6: return fpu_v6;
- case arm64_dwarf::v7: return fpu_v7;
- case arm64_dwarf::v8: return fpu_v8;
- case arm64_dwarf::v9: return fpu_v9;
- case arm64_dwarf::v10: return fpu_v10;
- case arm64_dwarf::v11: return fpu_v11;
- case arm64_dwarf::v12: return fpu_v12;
- case arm64_dwarf::v13: return fpu_v13;
- case arm64_dwarf::v14: return fpu_v14;
- case arm64_dwarf::v15: return fpu_v15;
- case arm64_dwarf::v16: return fpu_v16;
- case arm64_dwarf::v17: return fpu_v17;
- case arm64_dwarf::v18: return fpu_v18;
- case arm64_dwarf::v19: return fpu_v19;
- case arm64_dwarf::v20: return fpu_v20;
- case arm64_dwarf::v21: return fpu_v21;
- case arm64_dwarf::v22: return fpu_v22;
- case arm64_dwarf::v23: return fpu_v23;
- case arm64_dwarf::v24: return fpu_v24;
- case arm64_dwarf::v25: return fpu_v25;
- case arm64_dwarf::v26: return fpu_v26;
- case arm64_dwarf::v27: return fpu_v27;
- case arm64_dwarf::v28: return fpu_v28;
- case arm64_dwarf::v29: return fpu_v29;
- case arm64_dwarf::v30: return fpu_v30;
- case arm64_dwarf::v31: return fpu_v31;
-
- default:
- break;
- }
- }
- else if (kind == eRegisterKindEHFrame)
- {
- switch (reg)
- {
- case arm64_ehframe::x0: return gpr_x0;
- case arm64_ehframe::x1: return gpr_x1;
- case arm64_ehframe::x2: return gpr_x2;
- case arm64_ehframe::x3: return gpr_x3;
- case arm64_ehframe::x4: return gpr_x4;
- case arm64_ehframe::x5: return gpr_x5;
- case arm64_ehframe::x6: return gpr_x6;
- case arm64_ehframe::x7: return gpr_x7;
- case arm64_ehframe::x8: return gpr_x8;
- case arm64_ehframe::x9: return gpr_x9;
- case arm64_ehframe::x10: return gpr_x10;
- case arm64_ehframe::x11: return gpr_x11;
- case arm64_ehframe::x12: return gpr_x12;
- case arm64_ehframe::x13: return gpr_x13;
- case arm64_ehframe::x14: return gpr_x14;
- case arm64_ehframe::x15: return gpr_x15;
- case arm64_ehframe::x16: return gpr_x16;
- case arm64_ehframe::x17: return gpr_x17;
- case arm64_ehframe::x18: return gpr_x18;
- case arm64_ehframe::x19: return gpr_x19;
- case arm64_ehframe::x20: return gpr_x20;
- case arm64_ehframe::x21: return gpr_x21;
- case arm64_ehframe::x22: return gpr_x22;
- case arm64_ehframe::x23: return gpr_x23;
- case arm64_ehframe::x24: return gpr_x24;
- case arm64_ehframe::x25: return gpr_x25;
- case arm64_ehframe::x26: return gpr_x26;
- case arm64_ehframe::x27: return gpr_x27;
- case arm64_ehframe::x28: return gpr_x28;
- case arm64_ehframe::fp: return gpr_fp;
- case arm64_ehframe::sp: return gpr_sp;
- case arm64_ehframe::lr: return gpr_lr;
- case arm64_ehframe::pc: return gpr_pc;
- case arm64_ehframe::cpsr: return gpr_cpsr;
- }
- }
- else if (kind == eRegisterKindLLDB)
- {
- return reg;
+ default:
+ break;
}
- return LLDB_INVALID_REGNUM;
-}
-
-
-uint32_t
-RegisterContextDarwin_arm64::NumSupportedHardwareWatchpoints ()
-{
-#if defined (__arm64__) || defined (__aarch64__)
- // autodetect how many watchpoints are supported dynamically...
- static uint32_t g_num_supported_hw_watchpoints = UINT32_MAX;
- if (g_num_supported_hw_watchpoints == UINT32_MAX)
- {
- size_t len;
- uint32_t n = 0;
- len = sizeof (n);
- if (::sysctlbyname("hw.optional.watchpoint", &n, &len, NULL, 0) == 0)
- {
- g_num_supported_hw_watchpoints = n;
- }
+ } else if (kind == eRegisterKindEHFrame) {
+ switch (reg) {
+ case arm64_ehframe::x0:
+ return gpr_x0;
+ case arm64_ehframe::x1:
+ return gpr_x1;
+ case arm64_ehframe::x2:
+ return gpr_x2;
+ case arm64_ehframe::x3:
+ return gpr_x3;
+ case arm64_ehframe::x4:
+ return gpr_x4;
+ case arm64_ehframe::x5:
+ return gpr_x5;
+ case arm64_ehframe::x6:
+ return gpr_x6;
+ case arm64_ehframe::x7:
+ return gpr_x7;
+ case arm64_ehframe::x8:
+ return gpr_x8;
+ case arm64_ehframe::x9:
+ return gpr_x9;
+ case arm64_ehframe::x10:
+ return gpr_x10;
+ case arm64_ehframe::x11:
+ return gpr_x11;
+ case arm64_ehframe::x12:
+ return gpr_x12;
+ case arm64_ehframe::x13:
+ return gpr_x13;
+ case arm64_ehframe::x14:
+ return gpr_x14;
+ case arm64_ehframe::x15:
+ return gpr_x15;
+ case arm64_ehframe::x16:
+ return gpr_x16;
+ case arm64_ehframe::x17:
+ return gpr_x17;
+ case arm64_ehframe::x18:
+ return gpr_x18;
+ case arm64_ehframe::x19:
+ return gpr_x19;
+ case arm64_ehframe::x20:
+ return gpr_x20;
+ case arm64_ehframe::x21:
+ return gpr_x21;
+ case arm64_ehframe::x22:
+ return gpr_x22;
+ case arm64_ehframe::x23:
+ return gpr_x23;
+ case arm64_ehframe::x24:
+ return gpr_x24;
+ case arm64_ehframe::x25:
+ return gpr_x25;
+ case arm64_ehframe::x26:
+ return gpr_x26;
+ case arm64_ehframe::x27:
+ return gpr_x27;
+ case arm64_ehframe::x28:
+ return gpr_x28;
+ case arm64_ehframe::fp:
+ return gpr_fp;
+ case arm64_ehframe::sp:
+ return gpr_sp;
+ case arm64_ehframe::lr:
+ return gpr_lr;
+ case arm64_ehframe::pc:
+ return gpr_pc;
+ case arm64_ehframe::cpsr:
+ return gpr_cpsr;
+ }
+ } else if (kind == eRegisterKindLLDB) {
+ return reg;
+ }
+ return LLDB_INVALID_REGNUM;
+}
+
+uint32_t RegisterContextDarwin_arm64::NumSupportedHardwareWatchpoints() {
+#if defined(__arm64__) || defined(__aarch64__)
+ // autodetect how many watchpoints are supported dynamically...
+ static uint32_t g_num_supported_hw_watchpoints = UINT32_MAX;
+ if (g_num_supported_hw_watchpoints == UINT32_MAX) {
+ size_t len;
+ uint32_t n = 0;
+ len = sizeof(n);
+ if (::sysctlbyname("hw.optional.watchpoint", &n, &len, NULL, 0) == 0) {
+ g_num_supported_hw_watchpoints = n;
}
- return g_num_supported_hw_watchpoints;
+ }
+ return g_num_supported_hw_watchpoints;
#else
- // TODO: figure out remote case here!
- return 2;
+ // TODO: figure out remote case here!
+ return 2;
#endif
}
+uint32_t RegisterContextDarwin_arm64::SetHardwareWatchpoint(lldb::addr_t addr,
+ size_t size,
+ bool read,
+ bool write) {
+ // if (log) log->Printf
+ // ("RegisterContextDarwin_arm64::EnableHardwareWatchpoint(addr = %8.8p,
+ // size = %u, read = %u, write = %u)", addr, size, read, write);
-uint32_t
-RegisterContextDarwin_arm64::SetHardwareWatchpoint (lldb::addr_t addr, size_t size, bool read, bool write)
-{
-// if (log) log->Printf ("RegisterContextDarwin_arm64::EnableHardwareWatchpoint(addr = %8.8p, size = %u, read = %u, write = %u)", addr, size, read, write);
-
- const uint32_t num_hw_watchpoints = NumSupportedHardwareWatchpoints();
-
- // Can't watch zero bytes
- if (size == 0)
- return LLDB_INVALID_INDEX32;
-
- // We must watch for either read or write
- if (read == false && write == false)
- return LLDB_INVALID_INDEX32;
-
- // Can't watch more than 4 bytes per WVR/WCR pair
- if (size > 4)
- return LLDB_INVALID_INDEX32;
-
- // We can only watch up to four bytes that follow a 4 byte aligned address
- // per watchpoint register pair. Since we have at most so we can only watch
- // until the next 4 byte boundary and we need to make sure we can properly
- // encode this.
- uint32_t addr_word_offset = addr % 4;
-// if (log) log->Printf ("RegisterContextDarwin_arm64::EnableHardwareWatchpoint() - addr_word_offset = 0x%8.8x", addr_word_offset);
-
- uint32_t byte_mask = ((1u << size) - 1u) << addr_word_offset;
-// if (log) log->Printf ("RegisterContextDarwin_arm64::EnableHardwareWatchpoint() - byte_mask = 0x%8.8x", byte_mask);
- if (byte_mask > 0xfu)
- return LLDB_INVALID_INDEX32;
+ const uint32_t num_hw_watchpoints = NumSupportedHardwareWatchpoints();
- // Read the debug state
- int kret = ReadDBG (false);
+ // Can't watch zero bytes
+ if (size == 0)
+ return LLDB_INVALID_INDEX32;
- if (kret == KERN_SUCCESS)
- {
- // Check to make sure we have the needed hardware support
- uint32_t i = 0;
+ // We must watch for either read or write
+ if (read == false && write == false)
+ return LLDB_INVALID_INDEX32;
- for (i=0; i<num_hw_watchpoints; ++i)
- {
- if ((dbg.wcr[i] & WCR_ENABLE) == 0)
- break; // We found an available hw breakpoint slot (in i)
- }
-
- // See if we found an available hw breakpoint slot above
- if (i < num_hw_watchpoints)
- {
- // Make the byte_mask into a valid Byte Address Select mask
- uint32_t byte_address_select = byte_mask << 5;
- // Make sure bits 1:0 are clear in our address
- dbg.wvr[i] = addr & ~((lldb::addr_t)3);
- dbg.wcr[i] = byte_address_select | // Which bytes that follow the IMVA that we will watch
- S_USER | // Stop only in user mode
- (read ? WCR_LOAD : 0) | // Stop on read access?
- (write ? WCR_STORE : 0) | // Stop on write access?
- WCR_ENABLE; // Enable this watchpoint;
-
- kret = WriteDBG();
-// if (log) log->Printf ("RegisterContextDarwin_arm64::EnableHardwareWatchpoint() WriteDBG() => 0x%8.8x.", kret);
-
- if (kret == KERN_SUCCESS)
- return i;
- }
- else
- {
-// if (log) log->Printf ("RegisterContextDarwin_arm64::EnableHardwareWatchpoint(): All hardware resources (%u) are in use.", num_hw_watchpoints);
- }
- }
+ // Can't watch more than 4 bytes per WVR/WCR pair
+ if (size > 4)
+ return LLDB_INVALID_INDEX32;
+
+ // We can only watch up to four bytes that follow a 4 byte aligned address
+ // per watchpoint register pair. Since we have at most so we can only watch
+ // until the next 4 byte boundary and we need to make sure we can properly
+ // encode this.
+ uint32_t addr_word_offset = addr % 4;
+ // if (log) log->Printf
+ // ("RegisterContextDarwin_arm64::EnableHardwareWatchpoint() -
+ // addr_word_offset = 0x%8.8x", addr_word_offset);
+
+ uint32_t byte_mask = ((1u << size) - 1u) << addr_word_offset;
+ // if (log) log->Printf
+ // ("RegisterContextDarwin_arm64::EnableHardwareWatchpoint() - byte_mask =
+ // 0x%8.8x", byte_mask);
+ if (byte_mask > 0xfu)
return LLDB_INVALID_INDEX32;
-}
-bool
-RegisterContextDarwin_arm64::ClearHardwareWatchpoint (uint32_t hw_index)
-{
- int kret = ReadDBG (false);
+ // Read the debug state
+ int kret = ReadDBG(false);
- const uint32_t num_hw_points = NumSupportedHardwareWatchpoints();
- if (kret == KERN_SUCCESS)
- {
- if (hw_index < num_hw_points)
- {
- dbg.wcr[hw_index] = 0;
-// if (log) log->Printf ("RegisterContextDarwin_arm64::ClearHardwareWatchpoint( %u ) - WVR%u = 0x%8.8x WCR%u = 0x%8.8x",
-// hw_index,
-// hw_index,
-// dbg.wvr[hw_index],
-// hw_index,
-// dbg.wcr[hw_index]);
-
- kret = WriteDBG();
-
- if (kret == KERN_SUCCESS)
- return true;
- }
+ if (kret == KERN_SUCCESS) {
+ // Check to make sure we have the needed hardware support
+ uint32_t i = 0;
+
+ for (i = 0; i < num_hw_watchpoints; ++i) {
+ if ((dbg.wcr[i] & WCR_ENABLE) == 0)
+ break; // We found an available hw breakpoint slot (in i)
+ }
+
+ // See if we found an available hw breakpoint slot above
+ if (i < num_hw_watchpoints) {
+ // Make the byte_mask into a valid Byte Address Select mask
+ uint32_t byte_address_select = byte_mask << 5;
+ // Make sure bits 1:0 are clear in our address
+ dbg.wvr[i] = addr & ~((lldb::addr_t)3);
+ dbg.wcr[i] = byte_address_select | // Which bytes that follow the IMVA
+ // that we will watch
+ S_USER | // Stop only in user mode
+ (read ? WCR_LOAD : 0) | // Stop on read access?
+ (write ? WCR_STORE : 0) | // Stop on write access?
+ WCR_ENABLE; // Enable this watchpoint;
+
+ kret = WriteDBG();
+ // if (log) log->Printf
+ // ("RegisterContextDarwin_arm64::EnableHardwareWatchpoint()
+ // WriteDBG() => 0x%8.8x.", kret);
+
+ if (kret == KERN_SUCCESS)
+ return i;
+ } else {
+ // if (log) log->Printf
+ // ("RegisterContextDarwin_arm64::EnableHardwareWatchpoint():
+ // All hardware resources (%u) are in use.",
+ // num_hw_watchpoints);
+ }
+ }
+ return LLDB_INVALID_INDEX32;
+}
+
+bool RegisterContextDarwin_arm64::ClearHardwareWatchpoint(uint32_t hw_index) {
+ int kret = ReadDBG(false);
+
+ const uint32_t num_hw_points = NumSupportedHardwareWatchpoints();
+ if (kret == KERN_SUCCESS) {
+ if (hw_index < num_hw_points) {
+ dbg.wcr[hw_index] = 0;
+ // if (log) log->Printf
+ // ("RegisterContextDarwin_arm64::ClearHardwareWatchpoint( %u )
+ // - WVR%u = 0x%8.8x WCR%u = 0x%8.8x",
+ // hw_index,
+ // hw_index,
+ // dbg.wvr[hw_index],
+ // hw_index,
+ // dbg.wcr[hw_index]);
+
+ kret = WriteDBG();
+
+ if (kret == KERN_SUCCESS)
+ return true;
}
- return false;
+ }
+ return false;
}
#endif
Modified: lldb/trunk/source/Plugins/Process/Utility/RegisterContextDarwin_arm64.h
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/source/Plugins/Process/Utility/RegisterContextDarwin_arm64.h?rev=280751&r1=280750&r2=280751&view=diff
==============================================================================
--- lldb/trunk/source/Plugins/Process/Utility/RegisterContextDarwin_arm64.h (original)
+++ lldb/trunk/source/Plugins/Process/Utility/RegisterContextDarwin_arm64.h Tue Sep 6 15:57:50 2016
@@ -1,4 +1,5 @@
-//===-- RegisterContextDarwin_arm64.h -----------------------------*- C++ -*-===//
+//===-- RegisterContextDarwin_arm64.h -----------------------------*- C++
+//-*-===//
//
// The LLVM Compiler Infrastructure
//
@@ -14,279 +15,222 @@
// C++ Includes
// Other libraries and framework includes
// Project includes
-#include "lldb/lldb-private.h"
#include "lldb/Target/RegisterContext.h"
+#include "lldb/lldb-private.h"
// Break only in privileged or user mode
-#define S_RSVD ((uint32_t)(0u << 1))
-#define S_PRIV ((uint32_t)(1u << 1))
-#define S_USER ((uint32_t)(2u << 1))
-#define S_PRIV_USER ((S_PRIV) | (S_USER))
+#define S_RSVD ((uint32_t)(0u << 1))
+#define S_PRIV ((uint32_t)(1u << 1))
+#define S_USER ((uint32_t)(2u << 1))
+#define S_PRIV_USER ((S_PRIV) | (S_USER))
-#define WCR_ENABLE ((uint32_t)(1u))
+#define WCR_ENABLE ((uint32_t)(1u))
// Watchpoint load/store
-#define WCR_LOAD ((uint32_t)(1u << 3))
-#define WCR_STORE ((uint32_t)(1u << 4))
+#define WCR_LOAD ((uint32_t)(1u << 3))
+#define WCR_STORE ((uint32_t)(1u << 4))
-class RegisterContextDarwin_arm64 : public lldb_private::RegisterContext
-{
+class RegisterContextDarwin_arm64 : public lldb_private::RegisterContext {
public:
- RegisterContextDarwin_arm64(lldb_private::Thread &thread, uint32_t concrete_frame_idx);
+ RegisterContextDarwin_arm64(lldb_private::Thread &thread,
+ uint32_t concrete_frame_idx);
+
+ ~RegisterContextDarwin_arm64() override;
+
+ void InvalidateAllRegisters() override;
+
+ size_t GetRegisterCount() override;
+
+ const lldb_private::RegisterInfo *GetRegisterInfoAtIndex(size_t reg) override;
+
+ size_t GetRegisterSetCount() override;
+
+ const lldb_private::RegisterSet *GetRegisterSet(size_t set) override;
+
+ bool ReadRegister(const lldb_private::RegisterInfo *reg_info,
+ lldb_private::RegisterValue ®_value) override;
+
+ bool WriteRegister(const lldb_private::RegisterInfo *reg_info,
+ const lldb_private::RegisterValue ®_value) override;
+
+ bool ReadAllRegisterValues(lldb::DataBufferSP &data_sp) override;
+
+ bool WriteAllRegisterValues(const lldb::DataBufferSP &data_sp) override;
+
+ uint32_t ConvertRegisterKindToRegisterNumber(lldb::RegisterKind kind,
+ uint32_t num) override;
+
+ uint32_t NumSupportedHardwareWatchpoints() override;
+
+ uint32_t SetHardwareWatchpoint(lldb::addr_t addr, size_t size, bool read,
+ bool write) override;
- ~RegisterContextDarwin_arm64() override;
+ bool ClearHardwareWatchpoint(uint32_t hw_index) override;
- void
- InvalidateAllRegisters() override;
+ // mirrors <mach/arm/thread_status.h> arm_thread_state64_t
+ struct GPR {
+ uint64_t x[29]; // x0-x28
+ uint64_t fp; // x29
+ uint64_t lr; // x30
+ uint64_t sp; // x31
+ uint64_t pc; // pc
+ uint32_t cpsr; // cpsr
+ };
- size_t
- GetRegisterCount() override;
-
- const lldb_private::RegisterInfo *
- GetRegisterInfoAtIndex(size_t reg) override;
-
- size_t
- GetRegisterSetCount() override;
-
- const lldb_private::RegisterSet *
- GetRegisterSet(size_t set) override;
-
- bool
- ReadRegister(const lldb_private::RegisterInfo *reg_info,
- lldb_private::RegisterValue ®_value) override;
-
- bool
- WriteRegister(const lldb_private::RegisterInfo *reg_info,
- const lldb_private::RegisterValue ®_value) override;
-
- bool
- ReadAllRegisterValues(lldb::DataBufferSP &data_sp) override;
-
- bool
- WriteAllRegisterValues(const lldb::DataBufferSP &data_sp) override;
-
- uint32_t
- ConvertRegisterKindToRegisterNumber(lldb::RegisterKind kind, uint32_t num) override;
-
- uint32_t
- NumSupportedHardwareWatchpoints() override;
-
- uint32_t
- SetHardwareWatchpoint(lldb::addr_t addr, size_t size, bool read, bool write) override;
-
- bool
- ClearHardwareWatchpoint(uint32_t hw_index) override;
-
- // mirrors <mach/arm/thread_status.h> arm_thread_state64_t
- struct GPR
- {
- uint64_t x[29]; // x0-x28
- uint64_t fp; // x29
- uint64_t lr; // x30
- uint64_t sp; // x31
- uint64_t pc; // pc
- uint32_t cpsr; // cpsr
- };
-
- struct VReg
- {
- uint8_t bytes[16];
- };
-
- // mirrors <mach/arm/thread_status.h> arm_neon_state64_t
- struct FPU
- {
- VReg v[32];
- uint32_t fpsr;
- uint32_t fpcr;
- };
-
- // mirrors <mach/arm/thread_status.h> arm_exception_state64_t
- struct EXC
- {
- uint64_t far; // Virtual Fault Address
- uint32_t esr; // Exception syndrome
- uint32_t exception; // number of arm exception token
- };
-
- // mirrors <mach/arm/thread_status.h> arm_debug_state64_t
- struct DBG
- {
- uint64_t bvr[16];
- uint64_t bcr[16];
- uint64_t wvr[16];
- uint64_t wcr[16];
- uint64_t mdscr_el1;
- };
+ struct VReg {
+ uint8_t bytes[16];
+ };
- static void
- LogDBGRegisters (lldb_private::Log *log, const DBG& dbg);
+ // mirrors <mach/arm/thread_status.h> arm_neon_state64_t
+ struct FPU {
+ VReg v[32];
+ uint32_t fpsr;
+ uint32_t fpcr;
+ };
+
+ // mirrors <mach/arm/thread_status.h> arm_exception_state64_t
+ struct EXC {
+ uint64_t far; // Virtual Fault Address
+ uint32_t esr; // Exception syndrome
+ uint32_t exception; // number of arm exception token
+ };
+
+ // mirrors <mach/arm/thread_status.h> arm_debug_state64_t
+ struct DBG {
+ uint64_t bvr[16];
+ uint64_t bcr[16];
+ uint64_t wvr[16];
+ uint64_t wcr[16];
+ uint64_t mdscr_el1;
+ };
+
+ static void LogDBGRegisters(lldb_private::Log *log, const DBG &dbg);
protected:
- enum
- {
- GPRRegSet = 6, // ARM_THREAD_STATE64
- FPURegSet = 17, // ARM_NEON_STATE64
- EXCRegSet = 7, // ARM_EXCEPTION_STATE64
- DBGRegSet = 15 // ARM_DEBUG_STATE64
- };
-
- enum
- {
- GPRWordCount = sizeof(GPR)/sizeof(uint32_t), // ARM_THREAD_STATE64_COUNT
- FPUWordCount = sizeof(FPU)/sizeof(uint32_t), // ARM_NEON_STATE64_COUNT
- EXCWordCount = sizeof(EXC)/sizeof(uint32_t), // ARM_EXCEPTION_STATE64_COUNT
- DBGWordCount = sizeof(DBG)/sizeof(uint32_t) // ARM_DEBUG_STATE64_COUNT
- };
-
- enum
- {
- Read = 0,
- Write = 1,
- kNumErrors = 2
- };
-
- GPR gpr;
- FPU fpu;
- EXC exc;
- DBG dbg;
- int gpr_errs[2]; // Read/Write errors
- int fpu_errs[2]; // Read/Write errors
- int exc_errs[2]; // Read/Write errors
- int dbg_errs[2]; // Read/Write errors
-
- void
- InvalidateAllRegisterStates()
- {
- SetError (GPRRegSet, Read, -1);
- SetError (FPURegSet, Read, -1);
- SetError (EXCRegSet, Read, -1);
+ enum {
+ GPRRegSet = 6, // ARM_THREAD_STATE64
+ FPURegSet = 17, // ARM_NEON_STATE64
+ EXCRegSet = 7, // ARM_EXCEPTION_STATE64
+ DBGRegSet = 15 // ARM_DEBUG_STATE64
+ };
+
+ enum {
+ GPRWordCount = sizeof(GPR) / sizeof(uint32_t), // ARM_THREAD_STATE64_COUNT
+ FPUWordCount = sizeof(FPU) / sizeof(uint32_t), // ARM_NEON_STATE64_COUNT
+ EXCWordCount =
+ sizeof(EXC) / sizeof(uint32_t), // ARM_EXCEPTION_STATE64_COUNT
+ DBGWordCount = sizeof(DBG) / sizeof(uint32_t) // ARM_DEBUG_STATE64_COUNT
+ };
+
+ enum { Read = 0, Write = 1, kNumErrors = 2 };
+
+ GPR gpr;
+ FPU fpu;
+ EXC exc;
+ DBG dbg;
+ int gpr_errs[2]; // Read/Write errors
+ int fpu_errs[2]; // Read/Write errors
+ int exc_errs[2]; // Read/Write errors
+ int dbg_errs[2]; // Read/Write errors
+
+ void InvalidateAllRegisterStates() {
+ SetError(GPRRegSet, Read, -1);
+ SetError(FPURegSet, Read, -1);
+ SetError(EXCRegSet, Read, -1);
+ }
+
+ int GetError(int flavor, uint32_t err_idx) const {
+ if (err_idx < kNumErrors) {
+ switch (flavor) {
+ // When getting all errors, just OR all values together to see if
+ // we got any kind of error.
+ case GPRRegSet:
+ return gpr_errs[err_idx];
+ case FPURegSet:
+ return fpu_errs[err_idx];
+ case EXCRegSet:
+ return exc_errs[err_idx];
+ case DBGRegSet:
+ return dbg_errs[err_idx];
+ default:
+ break;
+ }
}
+ return -1;
+ }
- int
- GetError (int flavor, uint32_t err_idx) const
- {
- if (err_idx < kNumErrors)
- {
- switch (flavor)
- {
- // When getting all errors, just OR all values together to see if
- // we got any kind of error.
- case GPRRegSet: return gpr_errs[err_idx];
- case FPURegSet: return fpu_errs[err_idx];
- case EXCRegSet: return exc_errs[err_idx];
- case DBGRegSet: return dbg_errs[err_idx];
- default: break;
- }
- }
- return -1;
+ bool SetError(int flavor, uint32_t err_idx, int err) {
+ if (err_idx < kNumErrors) {
+ switch (flavor) {
+ case GPRRegSet:
+ gpr_errs[err_idx] = err;
+ return true;
+
+ case FPURegSet:
+ fpu_errs[err_idx] = err;
+ return true;
+
+ case EXCRegSet:
+ exc_errs[err_idx] = err;
+ return true;
+
+ case DBGRegSet:
+ exc_errs[err_idx] = err;
+ return true;
+
+ default:
+ break;
+ }
}
+ return false;
+ }
- bool
- SetError (int flavor, uint32_t err_idx, int err)
- {
- if (err_idx < kNumErrors)
- {
- switch (flavor)
- {
- case GPRRegSet:
- gpr_errs[err_idx] = err;
- return true;
-
- case FPURegSet:
- fpu_errs[err_idx] = err;
- return true;
-
- case EXCRegSet:
- exc_errs[err_idx] = err;
- return true;
-
- case DBGRegSet:
- exc_errs[err_idx] = err;
- return true;
-
- default: break;
- }
- }
- return false;
- }
+ bool RegisterSetIsCached(int set) const { return GetError(set, Read) == 0; }
- bool
- RegisterSetIsCached (int set) const
- {
- return GetError(set, Read) == 0;
- }
+ int ReadGPR(bool force);
- int
- ReadGPR (bool force);
+ int ReadFPU(bool force);
- int
- ReadFPU (bool force);
+ int ReadEXC(bool force);
- int
- ReadEXC (bool force);
+ int ReadDBG(bool force);
- int
- ReadDBG (bool force);
+ int WriteGPR();
- int
- WriteGPR ();
+ int WriteFPU();
- int
- WriteFPU ();
+ int WriteEXC();
- int
- WriteEXC ();
+ int WriteDBG();
- int
- WriteDBG ();
+ // Subclasses override these to do the actual reading.
+ virtual int DoReadGPR(lldb::tid_t tid, int flavor, GPR &gpr) { return -1; }
-
- // Subclasses override these to do the actual reading.
- virtual int
- DoReadGPR (lldb::tid_t tid, int flavor, GPR &gpr)
- {
- return -1;
- }
-
- virtual int
- DoReadFPU (lldb::tid_t tid, int flavor, FPU &fpu) = 0;
-
- virtual int
- DoReadEXC (lldb::tid_t tid, int flavor, EXC &exc) = 0;
-
- virtual int
- DoReadDBG (lldb::tid_t tid, int flavor, DBG &dbg) = 0;
-
- virtual int
- DoWriteGPR (lldb::tid_t tid, int flavor, const GPR &gpr) = 0;
-
- virtual int
- DoWriteFPU (lldb::tid_t tid, int flavor, const FPU &fpu) = 0;
-
- virtual int
- DoWriteEXC (lldb::tid_t tid, int flavor, const EXC &exc) = 0;
-
- virtual int
- DoWriteDBG (lldb::tid_t tid, int flavor, const DBG &dbg) = 0;
-
- int
- ReadRegisterSet (uint32_t set, bool force);
-
- int
- WriteRegisterSet (uint32_t set);
-
- static uint32_t
- GetRegisterNumber (uint32_t reg_kind, uint32_t reg_num);
+ virtual int DoReadFPU(lldb::tid_t tid, int flavor, FPU &fpu) = 0;
+
+ virtual int DoReadEXC(lldb::tid_t tid, int flavor, EXC &exc) = 0;
+
+ virtual int DoReadDBG(lldb::tid_t tid, int flavor, DBG &dbg) = 0;
+
+ virtual int DoWriteGPR(lldb::tid_t tid, int flavor, const GPR &gpr) = 0;
+
+ virtual int DoWriteFPU(lldb::tid_t tid, int flavor, const FPU &fpu) = 0;
+
+ virtual int DoWriteEXC(lldb::tid_t tid, int flavor, const EXC &exc) = 0;
+
+ virtual int DoWriteDBG(lldb::tid_t tid, int flavor, const DBG &dbg) = 0;
+
+ int ReadRegisterSet(uint32_t set, bool force);
+
+ int WriteRegisterSet(uint32_t set);
+
+ static uint32_t GetRegisterNumber(uint32_t reg_kind, uint32_t reg_num);
- static int
- GetSetForNativeRegNum (int reg_num);
+ static int GetSetForNativeRegNum(int reg_num);
- static size_t
- GetRegisterInfosCount ();
+ static size_t GetRegisterInfosCount();
- static const lldb_private::RegisterInfo *
- GetRegisterInfos ();
+ static const lldb_private::RegisterInfo *GetRegisterInfos();
};
#endif // liblldb_RegisterContextDarwin_arm64_h_
Modified: lldb/trunk/source/Plugins/Process/Utility/RegisterContextDarwin_i386.cpp
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/source/Plugins/Process/Utility/RegisterContextDarwin_i386.cpp?rev=280751&r1=280750&r2=280751&view=diff
==============================================================================
--- lldb/trunk/source/Plugins/Process/Utility/RegisterContextDarwin_i386.cpp (original)
+++ lldb/trunk/source/Plugins/Process/Utility/RegisterContextDarwin_i386.cpp Tue Sep 6 15:57:50 2016
@@ -7,9 +7,8 @@
//
//===----------------------------------------------------------------------===//
-
// C Includes
-#include <stddef.h> // offsetof
+#include <stddef.h> // offsetof
// C++ Includes
// Other libraries and framework includes
@@ -34,302 +33,430 @@
using namespace lldb;
using namespace lldb_private;
-enum
-{
- gpr_eax = 0,
- gpr_ebx,
- gpr_ecx,
- gpr_edx,
- gpr_edi,
- gpr_esi,
- gpr_ebp,
- gpr_esp,
- gpr_ss,
- gpr_eflags,
- gpr_eip,
- gpr_cs,
- gpr_ds,
- gpr_es,
- gpr_fs,
- gpr_gs,
-
- fpu_fcw,
- fpu_fsw,
- fpu_ftw,
- fpu_fop,
- fpu_ip,
- fpu_cs,
- fpu_dp,
- fpu_ds,
- fpu_mxcsr,
- fpu_mxcsrmask,
- fpu_stmm0,
- fpu_stmm1,
- fpu_stmm2,
- fpu_stmm3,
- fpu_stmm4,
- fpu_stmm5,
- fpu_stmm6,
- fpu_stmm7,
- fpu_xmm0,
- fpu_xmm1,
- fpu_xmm2,
- fpu_xmm3,
- fpu_xmm4,
- fpu_xmm5,
- fpu_xmm6,
- fpu_xmm7,
-
- exc_trapno,
- exc_err,
- exc_faultvaddr,
-
- k_num_registers,
-
- // Aliases
- fpu_fctrl = fpu_fcw,
- fpu_fstat = fpu_fsw,
- fpu_ftag = fpu_ftw,
- fpu_fiseg = fpu_cs,
- fpu_fioff = fpu_ip,
- fpu_foseg = fpu_ds,
- fpu_fooff = fpu_dp
+enum {
+ gpr_eax = 0,
+ gpr_ebx,
+ gpr_ecx,
+ gpr_edx,
+ gpr_edi,
+ gpr_esi,
+ gpr_ebp,
+ gpr_esp,
+ gpr_ss,
+ gpr_eflags,
+ gpr_eip,
+ gpr_cs,
+ gpr_ds,
+ gpr_es,
+ gpr_fs,
+ gpr_gs,
+
+ fpu_fcw,
+ fpu_fsw,
+ fpu_ftw,
+ fpu_fop,
+ fpu_ip,
+ fpu_cs,
+ fpu_dp,
+ fpu_ds,
+ fpu_mxcsr,
+ fpu_mxcsrmask,
+ fpu_stmm0,
+ fpu_stmm1,
+ fpu_stmm2,
+ fpu_stmm3,
+ fpu_stmm4,
+ fpu_stmm5,
+ fpu_stmm6,
+ fpu_stmm7,
+ fpu_xmm0,
+ fpu_xmm1,
+ fpu_xmm2,
+ fpu_xmm3,
+ fpu_xmm4,
+ fpu_xmm5,
+ fpu_xmm6,
+ fpu_xmm7,
+
+ exc_trapno,
+ exc_err,
+ exc_faultvaddr,
+
+ k_num_registers,
+
+ // Aliases
+ fpu_fctrl = fpu_fcw,
+ fpu_fstat = fpu_fsw,
+ fpu_ftag = fpu_ftw,
+ fpu_fiseg = fpu_cs,
+ fpu_fioff = fpu_ip,
+ fpu_foseg = fpu_ds,
+ fpu_fooff = fpu_dp
};
-enum
-{
- ehframe_eax = 0,
- ehframe_ecx,
- ehframe_edx,
- ehframe_ebx,
- ehframe_ebp,
- ehframe_esp,
- ehframe_esi,
- ehframe_edi,
- ehframe_eip,
- ehframe_eflags
+enum {
+ ehframe_eax = 0,
+ ehframe_ecx,
+ ehframe_edx,
+ ehframe_ebx,
+ ehframe_ebp,
+ ehframe_esp,
+ ehframe_esi,
+ ehframe_edi,
+ ehframe_eip,
+ ehframe_eflags
};
-enum
-{
- dwarf_eax = 0,
- dwarf_ecx,
- dwarf_edx,
- dwarf_ebx,
- dwarf_esp,
- dwarf_ebp,
- dwarf_esi,
- dwarf_edi,
- dwarf_eip,
- dwarf_eflags,
- dwarf_stmm0 = 11,
- dwarf_stmm1,
- dwarf_stmm2,
- dwarf_stmm3,
- dwarf_stmm4,
- dwarf_stmm5,
- dwarf_stmm6,
- dwarf_stmm7,
- dwarf_xmm0 = 21,
- dwarf_xmm1,
- dwarf_xmm2,
- dwarf_xmm3,
- dwarf_xmm4,
- dwarf_xmm5,
- dwarf_xmm6,
- dwarf_xmm7
+enum {
+ dwarf_eax = 0,
+ dwarf_ecx,
+ dwarf_edx,
+ dwarf_ebx,
+ dwarf_esp,
+ dwarf_ebp,
+ dwarf_esi,
+ dwarf_edi,
+ dwarf_eip,
+ dwarf_eflags,
+ dwarf_stmm0 = 11,
+ dwarf_stmm1,
+ dwarf_stmm2,
+ dwarf_stmm3,
+ dwarf_stmm4,
+ dwarf_stmm5,
+ dwarf_stmm6,
+ dwarf_stmm7,
+ dwarf_xmm0 = 21,
+ dwarf_xmm1,
+ dwarf_xmm2,
+ dwarf_xmm3,
+ dwarf_xmm4,
+ dwarf_xmm5,
+ dwarf_xmm6,
+ dwarf_xmm7
};
-
-#define GPR_OFFSET(reg) (LLVM_EXTENSION offsetof (RegisterContextDarwin_i386::GPR, reg))
-#define FPU_OFFSET(reg) (LLVM_EXTENSION offsetof (RegisterContextDarwin_i386::FPU, reg) + sizeof (RegisterContextDarwin_i386::GPR))
-#define EXC_OFFSET(reg) (LLVM_EXTENSION offsetof (RegisterContextDarwin_i386::EXC, reg) + sizeof (RegisterContextDarwin_i386::GPR) + sizeof (RegisterContextDarwin_i386::FPU))
+#define GPR_OFFSET(reg) \
+ (LLVM_EXTENSION offsetof(RegisterContextDarwin_i386::GPR, reg))
+#define FPU_OFFSET(reg) \
+ (LLVM_EXTENSION offsetof(RegisterContextDarwin_i386::FPU, reg) + \
+ sizeof(RegisterContextDarwin_i386::GPR))
+#define EXC_OFFSET(reg) \
+ (LLVM_EXTENSION offsetof(RegisterContextDarwin_i386::EXC, reg) + \
+ sizeof(RegisterContextDarwin_i386::GPR) + \
+ sizeof(RegisterContextDarwin_i386::FPU))
// These macros will auto define the register name, alt name, register size,
// register offset, encoding, format and native register. This ensures that
// the register state structures are defined correctly and have the correct
// sizes and offsets.
-#define DEFINE_GPR(reg, alt) #reg, alt, sizeof(((RegisterContextDarwin_i386::GPR *)NULL)->reg), GPR_OFFSET(reg), eEncodingUint, eFormatHex
-#define DEFINE_FPU_UINT(reg) #reg, NULL, sizeof(((RegisterContextDarwin_i386::FPU *)NULL)->reg), FPU_OFFSET(reg), eEncodingUint, eFormatHex
-#define DEFINE_FPU_VECT(reg, i) #reg#i, NULL, sizeof(((RegisterContextDarwin_i386::FPU *)NULL)->reg[i].bytes), FPU_OFFSET(reg[i]), eEncodingVector, eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_##reg##i, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_##reg##i }, nullptr, nullptr, nullptr, 0
-
-#define DEFINE_EXC(reg) #reg, NULL, sizeof(((RegisterContextDarwin_i386::EXC *)NULL)->reg), EXC_OFFSET(reg), eEncodingUint, eFormatHex
-#define REG_CONTEXT_SIZE (sizeof (RegisterContextDarwin_i386::GPR) + sizeof (RegisterContextDarwin_i386::FPU) + sizeof (RegisterContextDarwin_i386::EXC))
-
-static RegisterInfo g_register_infos[] =
-{
-// Macro auto defines most stuff eh_frame DWARF GENERIC PROCESS PLUGIN LLDB
-// =============================== ======================= =================== ========================= ================== =================
- { DEFINE_GPR(eax , NULL) , { ehframe_eax , dwarf_eax , LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, gpr_eax }, nullptr, nullptr, nullptr, 0},
- { DEFINE_GPR(ebx , NULL) , { ehframe_ebx , dwarf_ebx , LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, gpr_ebx }, nullptr, nullptr, nullptr, 0},
- { DEFINE_GPR(ecx , NULL) , { ehframe_ecx , dwarf_ecx , LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, gpr_ecx }, nullptr, nullptr, nullptr, 0},
- { DEFINE_GPR(edx , NULL) , { ehframe_edx , dwarf_edx , LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, gpr_edx }, nullptr, nullptr, nullptr, 0},
- { DEFINE_GPR(edi , NULL) , { ehframe_edi , dwarf_edi , LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, gpr_edi }, nullptr, nullptr, nullptr, 0},
- { DEFINE_GPR(esi , NULL) , { ehframe_esi , dwarf_esi , LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, gpr_esi }, nullptr, nullptr, nullptr, 0},
- { DEFINE_GPR(ebp , "fp") , { ehframe_ebp , dwarf_ebp , LLDB_REGNUM_GENERIC_FP , LLDB_INVALID_REGNUM, gpr_ebp }, nullptr, nullptr, nullptr, 0},
- { DEFINE_GPR(esp , "sp") , { ehframe_esp , dwarf_esp , LLDB_REGNUM_GENERIC_SP , LLDB_INVALID_REGNUM, gpr_esp }, nullptr, nullptr, nullptr, 0},
- { DEFINE_GPR(ss , NULL) , { LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, gpr_ss }, nullptr, nullptr, nullptr, 0},
- { DEFINE_GPR(eflags , "flags") , { ehframe_eflags , dwarf_eflags , LLDB_REGNUM_GENERIC_FLAGS , LLDB_INVALID_REGNUM, gpr_eflags }, nullptr, nullptr, nullptr, 0},
- { DEFINE_GPR(eip , "pc") , { ehframe_eip , dwarf_eip , LLDB_REGNUM_GENERIC_PC , LLDB_INVALID_REGNUM, gpr_eip }, nullptr, nullptr, nullptr, 0},
- { DEFINE_GPR(cs , NULL) , { LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, gpr_cs }, nullptr, nullptr, nullptr, 0},
- { DEFINE_GPR(ds , NULL) , { LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, gpr_ds }, nullptr, nullptr, nullptr, 0},
- { DEFINE_GPR(es , NULL) , { LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, gpr_es }, nullptr, nullptr, nullptr, 0},
- { DEFINE_GPR(fs , NULL) , { LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, gpr_fs }, nullptr, nullptr, nullptr, 0},
- { DEFINE_GPR(gs , NULL) , { LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, gpr_gs }, nullptr, nullptr, nullptr, 0},
-
- { DEFINE_FPU_UINT(fcw) , { LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, fpu_fcw }, nullptr, nullptr, nullptr, 0},
- { DEFINE_FPU_UINT(fsw) , { LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, fpu_fsw }, nullptr, nullptr, nullptr, 0},
- { DEFINE_FPU_UINT(ftw) , { LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, fpu_ftw }, nullptr, nullptr, nullptr, 0},
- { DEFINE_FPU_UINT(fop) , { LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, fpu_fop }, nullptr, nullptr, nullptr, 0},
- { DEFINE_FPU_UINT(ip) , { LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, fpu_ip }, nullptr, nullptr, nullptr, 0},
- { DEFINE_FPU_UINT(cs) , { LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, fpu_cs }, nullptr, nullptr, nullptr, 0},
- { DEFINE_FPU_UINT(dp) , { LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, fpu_dp }, nullptr, nullptr, nullptr, 0},
- { DEFINE_FPU_UINT(ds) , { LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, fpu_ds }, nullptr, nullptr, nullptr, 0},
- { DEFINE_FPU_UINT(mxcsr) , { LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, fpu_mxcsr }, nullptr, nullptr, nullptr, 0},
- { DEFINE_FPU_UINT(mxcsrmask) , { LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, fpu_mxcsrmask}, nullptr, nullptr, nullptr, 0},
- { DEFINE_FPU_VECT(stmm,0) },
- { DEFINE_FPU_VECT(stmm,1) },
- { DEFINE_FPU_VECT(stmm,2) },
- { DEFINE_FPU_VECT(stmm,3) },
- { DEFINE_FPU_VECT(stmm,4) },
- { DEFINE_FPU_VECT(stmm,5) },
- { DEFINE_FPU_VECT(stmm,6) },
- { DEFINE_FPU_VECT(stmm,7) },
- { DEFINE_FPU_VECT(xmm,0) },
- { DEFINE_FPU_VECT(xmm,1) },
- { DEFINE_FPU_VECT(xmm,2) },
- { DEFINE_FPU_VECT(xmm,3) },
- { DEFINE_FPU_VECT(xmm,4) },
- { DEFINE_FPU_VECT(xmm,5) },
- { DEFINE_FPU_VECT(xmm,6) },
- { DEFINE_FPU_VECT(xmm,7) },
-
- { DEFINE_EXC(trapno) , { LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, exc_trapno }, nullptr, nullptr, nullptr, 0},
- { DEFINE_EXC(err) , { LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, exc_err }, nullptr, nullptr, nullptr, 0},
- { DEFINE_EXC(faultvaddr) , { LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, exc_faultvaddr }, nullptr, nullptr, nullptr, 0}
-};
+#define DEFINE_GPR(reg, alt) \
+ #reg, alt, sizeof(((RegisterContextDarwin_i386::GPR *) NULL)->reg), \
+ GPR_OFFSET(reg), eEncodingUint, eFormatHex
+#define DEFINE_FPU_UINT(reg) \
+ #reg, NULL, sizeof(((RegisterContextDarwin_i386::FPU *) NULL)->reg), \
+ FPU_OFFSET(reg), eEncodingUint, eFormatHex
+#define DEFINE_FPU_VECT(reg, i) \
+ #reg #i, NULL, \
+ sizeof(((RegisterContextDarwin_i386::FPU *) NULL)->reg[i].bytes), \
+ FPU_OFFSET(reg[i]), eEncodingVector, eFormatVectorOfUInt8, \
+ {LLDB_INVALID_REGNUM, dwarf_##reg##i, \
+ LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \
+ fpu_##reg##i }, \
+ nullptr, nullptr, nullptr, 0
+
+#define DEFINE_EXC(reg) \
+ #reg, NULL, sizeof(((RegisterContextDarwin_i386::EXC *) NULL)->reg), \
+ EXC_OFFSET(reg), eEncodingUint, eFormatHex
+#define REG_CONTEXT_SIZE \
+ (sizeof(RegisterContextDarwin_i386::GPR) + \
+ sizeof(RegisterContextDarwin_i386::FPU) + \
+ sizeof(RegisterContextDarwin_i386::EXC))
+
+static RegisterInfo g_register_infos[] = {
+ // Macro auto defines most stuff eh_frame DWARF
+ // GENERIC PROCESS PLUGIN LLDB
+ // =============================== =======================
+ // =================== ========================= ==================
+ // =================
+ {DEFINE_GPR(eax, NULL),
+ {ehframe_eax, dwarf_eax, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ gpr_eax},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {DEFINE_GPR(ebx, NULL),
+ {ehframe_ebx, dwarf_ebx, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ gpr_ebx},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {DEFINE_GPR(ecx, NULL),
+ {ehframe_ecx, dwarf_ecx, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ gpr_ecx},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {DEFINE_GPR(edx, NULL),
+ {ehframe_edx, dwarf_edx, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ gpr_edx},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {DEFINE_GPR(edi, NULL),
+ {ehframe_edi, dwarf_edi, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ gpr_edi},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {DEFINE_GPR(esi, NULL),
+ {ehframe_esi, dwarf_esi, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ gpr_esi},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {DEFINE_GPR(ebp, "fp"),
+ {ehframe_ebp, dwarf_ebp, LLDB_REGNUM_GENERIC_FP, LLDB_INVALID_REGNUM,
+ gpr_ebp},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {DEFINE_GPR(esp, "sp"),
+ {ehframe_esp, dwarf_esp, LLDB_REGNUM_GENERIC_SP, LLDB_INVALID_REGNUM,
+ gpr_esp},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {DEFINE_GPR(ss, NULL),
+ {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, gpr_ss},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {DEFINE_GPR(eflags, "flags"),
+ {ehframe_eflags, dwarf_eflags, LLDB_REGNUM_GENERIC_FLAGS,
+ LLDB_INVALID_REGNUM, gpr_eflags},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {DEFINE_GPR(eip, "pc"),
+ {ehframe_eip, dwarf_eip, LLDB_REGNUM_GENERIC_PC, LLDB_INVALID_REGNUM,
+ gpr_eip},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {DEFINE_GPR(cs, NULL),
+ {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, gpr_cs},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {DEFINE_GPR(ds, NULL),
+ {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, gpr_ds},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {DEFINE_GPR(es, NULL),
+ {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, gpr_es},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {DEFINE_GPR(fs, NULL),
+ {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, gpr_fs},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {DEFINE_GPR(gs, NULL),
+ {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, gpr_gs},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+
+ {DEFINE_FPU_UINT(fcw),
+ {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, fpu_fcw},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {DEFINE_FPU_UINT(fsw),
+ {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, fpu_fsw},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {DEFINE_FPU_UINT(ftw),
+ {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, fpu_ftw},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {DEFINE_FPU_UINT(fop),
+ {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, fpu_fop},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {DEFINE_FPU_UINT(ip),
+ {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, fpu_ip},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {DEFINE_FPU_UINT(cs),
+ {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, fpu_cs},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {DEFINE_FPU_UINT(dp),
+ {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, fpu_dp},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {DEFINE_FPU_UINT(ds),
+ {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, fpu_ds},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {DEFINE_FPU_UINT(mxcsr),
+ {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, fpu_mxcsr},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {DEFINE_FPU_UINT(mxcsrmask),
+ {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, fpu_mxcsrmask},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {DEFINE_FPU_VECT(stmm, 0)},
+ {DEFINE_FPU_VECT(stmm, 1)},
+ {DEFINE_FPU_VECT(stmm, 2)},
+ {DEFINE_FPU_VECT(stmm, 3)},
+ {DEFINE_FPU_VECT(stmm, 4)},
+ {DEFINE_FPU_VECT(stmm, 5)},
+ {DEFINE_FPU_VECT(stmm, 6)},
+ {DEFINE_FPU_VECT(stmm, 7)},
+ {DEFINE_FPU_VECT(xmm, 0)},
+ {DEFINE_FPU_VECT(xmm, 1)},
+ {DEFINE_FPU_VECT(xmm, 2)},
+ {DEFINE_FPU_VECT(xmm, 3)},
+ {DEFINE_FPU_VECT(xmm, 4)},
+ {DEFINE_FPU_VECT(xmm, 5)},
+ {DEFINE_FPU_VECT(xmm, 6)},
+ {DEFINE_FPU_VECT(xmm, 7)},
+
+ {DEFINE_EXC(trapno),
+ {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, exc_trapno},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {DEFINE_EXC(err),
+ {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, exc_err},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {DEFINE_EXC(faultvaddr),
+ {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, exc_faultvaddr},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0}};
static size_t k_num_register_infos = llvm::array_lengthof(g_register_infos);
-RegisterContextDarwin_i386::RegisterContextDarwin_i386 (Thread &thread, uint32_t concrete_frame_idx) :
- RegisterContext(thread, concrete_frame_idx),
- gpr(),
- fpu(),
- exc()
-{
- uint32_t i;
- for (i=0; i<kNumErrors; i++)
- {
- gpr_errs[i] = -1;
- fpu_errs[i] = -1;
- exc_errs[i] = -1;
- }
-}
-
-RegisterContextDarwin_i386::~RegisterContextDarwin_i386()
-{
-}
-
-
-void
-RegisterContextDarwin_i386::InvalidateAllRegisters ()
-{
- InvalidateAllRegisterStates();
-}
-
-
-size_t
-RegisterContextDarwin_i386::GetRegisterCount ()
-{
- assert(k_num_register_infos == k_num_registers);
- return k_num_registers;
+RegisterContextDarwin_i386::RegisterContextDarwin_i386(
+ Thread &thread, uint32_t concrete_frame_idx)
+ : RegisterContext(thread, concrete_frame_idx), gpr(), fpu(), exc() {
+ uint32_t i;
+ for (i = 0; i < kNumErrors; i++) {
+ gpr_errs[i] = -1;
+ fpu_errs[i] = -1;
+ exc_errs[i] = -1;
+ }
+}
+
+RegisterContextDarwin_i386::~RegisterContextDarwin_i386() {}
+
+void RegisterContextDarwin_i386::InvalidateAllRegisters() {
+ InvalidateAllRegisterStates();
+}
+
+size_t RegisterContextDarwin_i386::GetRegisterCount() {
+ assert(k_num_register_infos == k_num_registers);
+ return k_num_registers;
}
const RegisterInfo *
-RegisterContextDarwin_i386::GetRegisterInfoAtIndex (size_t reg)
-{
- assert(k_num_register_infos == k_num_registers);
- if (reg < k_num_registers)
- return &g_register_infos[reg];
- return NULL;
+RegisterContextDarwin_i386::GetRegisterInfoAtIndex(size_t reg) {
+ assert(k_num_register_infos == k_num_registers);
+ if (reg < k_num_registers)
+ return &g_register_infos[reg];
+ return NULL;
}
-size_t
-RegisterContextDarwin_i386::GetRegisterInfosCount ()
-{
- return k_num_register_infos;
+size_t RegisterContextDarwin_i386::GetRegisterInfosCount() {
+ return k_num_register_infos;
}
-const RegisterInfo *
-RegisterContextDarwin_i386::GetRegisterInfos ()
-{
- return g_register_infos;
+const RegisterInfo *RegisterContextDarwin_i386::GetRegisterInfos() {
+ return g_register_infos;
}
-
// General purpose registers
-static uint32_t
-g_gpr_regnums[] =
-{
- gpr_eax,
- gpr_ebx,
- gpr_ecx,
- gpr_edx,
- gpr_edi,
- gpr_esi,
- gpr_ebp,
- gpr_esp,
- gpr_ss,
- gpr_eflags,
- gpr_eip,
- gpr_cs,
- gpr_ds,
- gpr_es,
- gpr_fs,
- gpr_gs
-};
+static uint32_t g_gpr_regnums[] = {
+ gpr_eax, gpr_ebx, gpr_ecx, gpr_edx, gpr_edi, gpr_esi, gpr_ebp, gpr_esp,
+ gpr_ss, gpr_eflags, gpr_eip, gpr_cs, gpr_ds, gpr_es, gpr_fs, gpr_gs};
// Floating point registers
-static uint32_t
-g_fpu_regnums[] =
-{
- fpu_fcw,
- fpu_fsw,
- fpu_ftw,
- fpu_fop,
- fpu_ip,
- fpu_cs,
- fpu_dp,
- fpu_ds,
- fpu_mxcsr,
- fpu_mxcsrmask,
- fpu_stmm0,
- fpu_stmm1,
- fpu_stmm2,
- fpu_stmm3,
- fpu_stmm4,
- fpu_stmm5,
- fpu_stmm6,
- fpu_stmm7,
- fpu_xmm0,
- fpu_xmm1,
- fpu_xmm2,
- fpu_xmm3,
- fpu_xmm4,
- fpu_xmm5,
- fpu_xmm6,
- fpu_xmm7
-};
+static uint32_t g_fpu_regnums[] = {
+ fpu_fcw, fpu_fsw, fpu_ftw, fpu_fop, fpu_ip, fpu_cs,
+ fpu_dp, fpu_ds, fpu_mxcsr, fpu_mxcsrmask, fpu_stmm0, fpu_stmm1,
+ fpu_stmm2, fpu_stmm3, fpu_stmm4, fpu_stmm5, fpu_stmm6, fpu_stmm7,
+ fpu_xmm0, fpu_xmm1, fpu_xmm2, fpu_xmm3, fpu_xmm4, fpu_xmm5,
+ fpu_xmm6, fpu_xmm7};
// Exception registers
-static uint32_t
-g_exc_regnums[] =
-{
- exc_trapno,
- exc_err,
- exc_faultvaddr
-};
+static uint32_t g_exc_regnums[] = {exc_trapno, exc_err, exc_faultvaddr};
// Number of registers in each register set
const size_t k_num_gpr_registers = llvm::array_lengthof(g_gpr_regnums);
@@ -341,539 +468,514 @@ const size_t k_num_exc_registers = llvm:
// of zero is for all registers, followed by other registers sets. The
// register information for the all register set need not be filled in.
//----------------------------------------------------------------------
-static const RegisterSet g_reg_sets[] =
-{
- { "General Purpose Registers", "gpr", k_num_gpr_registers, g_gpr_regnums, },
- { "Floating Point Registers", "fpu", k_num_fpu_registers, g_fpu_regnums },
- { "Exception State Registers", "exc", k_num_exc_registers, g_exc_regnums }
-};
+static const RegisterSet g_reg_sets[] = {
+ {
+ "General Purpose Registers", "gpr", k_num_gpr_registers, g_gpr_regnums,
+ },
+ {"Floating Point Registers", "fpu", k_num_fpu_registers, g_fpu_regnums},
+ {"Exception State Registers", "exc", k_num_exc_registers, g_exc_regnums}};
const size_t k_num_regsets = llvm::array_lengthof(g_reg_sets);
-
-size_t
-RegisterContextDarwin_i386::GetRegisterSetCount ()
-{
- return k_num_regsets;
+size_t RegisterContextDarwin_i386::GetRegisterSetCount() {
+ return k_num_regsets;
}
-const RegisterSet *
-RegisterContextDarwin_i386::GetRegisterSet (size_t reg_set)
-{
- if (reg_set < k_num_regsets)
- return &g_reg_sets[reg_set];
- return NULL;
+const RegisterSet *RegisterContextDarwin_i386::GetRegisterSet(size_t reg_set) {
+ if (reg_set < k_num_regsets)
+ return &g_reg_sets[reg_set];
+ return NULL;
}
-
//----------------------------------------------------------------------
// Register information definitions for 32 bit i386.
//----------------------------------------------------------------------
-int
-RegisterContextDarwin_i386::GetSetForNativeRegNum (int reg_num)
-{
- if (reg_num < fpu_fcw)
- return GPRRegSet;
- else if (reg_num < exc_trapno)
- return FPURegSet;
- else if (reg_num < k_num_registers)
- return EXCRegSet;
+int RegisterContextDarwin_i386::GetSetForNativeRegNum(int reg_num) {
+ if (reg_num < fpu_fcw)
+ return GPRRegSet;
+ else if (reg_num < exc_trapno)
+ return FPURegSet;
+ else if (reg_num < k_num_registers)
+ return EXCRegSet;
+ return -1;
+}
+
+void RegisterContextDarwin_i386::LogGPR(Log *log, const char *title) {
+ if (log) {
+ if (title)
+ log->Printf("%s", title);
+ for (uint32_t i = 0; i < k_num_gpr_registers; i++) {
+ uint32_t reg = gpr_eax + i;
+ log->Printf("%12s = 0x%8.8x", g_register_infos[reg].name,
+ (&gpr.eax)[reg]);
+ }
+ }
+}
+
+int RegisterContextDarwin_i386::ReadGPR(bool force) {
+ int set = GPRRegSet;
+ if (force || !RegisterSetIsCached(set)) {
+ SetError(set, Read, DoReadGPR(GetThreadID(), set, gpr));
+ }
+ return GetError(set, Read);
+}
+
+int RegisterContextDarwin_i386::ReadFPU(bool force) {
+ int set = FPURegSet;
+ if (force || !RegisterSetIsCached(set)) {
+ SetError(set, Read, DoReadFPU(GetThreadID(), set, fpu));
+ }
+ return GetError(set, Read);
+}
+
+int RegisterContextDarwin_i386::ReadEXC(bool force) {
+ int set = EXCRegSet;
+ if (force || !RegisterSetIsCached(set)) {
+ SetError(set, Read, DoReadEXC(GetThreadID(), set, exc));
+ }
+ return GetError(set, Read);
+}
+
+int RegisterContextDarwin_i386::WriteGPR() {
+ int set = GPRRegSet;
+ if (!RegisterSetIsCached(set)) {
+ SetError(set, Write, -1);
return -1;
+ }
+ SetError(set, Write, DoWriteGPR(GetThreadID(), set, gpr));
+ SetError(set, Read, -1);
+ return GetError(set, Write);
}
-
-void
-RegisterContextDarwin_i386::LogGPR(Log *log, const char *title)
-{
- if (log)
- {
- if (title)
- log->Printf ("%s", title);
- for (uint32_t i=0; i<k_num_gpr_registers; i++)
- {
- uint32_t reg = gpr_eax + i;
- log->Printf("%12s = 0x%8.8x", g_register_infos[reg].name, (&gpr.eax)[reg]);
- }
- }
+int RegisterContextDarwin_i386::WriteFPU() {
+ int set = FPURegSet;
+ if (!RegisterSetIsCached(set)) {
+ SetError(set, Write, -1);
+ return -1;
+ }
+ SetError(set, Write, DoWriteFPU(GetThreadID(), set, fpu));
+ SetError(set, Read, -1);
+ return GetError(set, Write);
}
-
-
-int
-RegisterContextDarwin_i386::ReadGPR (bool force)
-{
- int set = GPRRegSet;
- if (force || !RegisterSetIsCached(set))
- {
- SetError(set, Read, DoReadGPR(GetThreadID(), set, gpr));
+int RegisterContextDarwin_i386::WriteEXC() {
+ int set = EXCRegSet;
+ if (!RegisterSetIsCached(set)) {
+ SetError(set, Write, -1);
+ return -1;
+ }
+ SetError(set, Write, DoWriteEXC(GetThreadID(), set, exc));
+ SetError(set, Read, -1);
+ return GetError(set, Write);
+}
+
+int RegisterContextDarwin_i386::ReadRegisterSet(uint32_t set, bool force) {
+ switch (set) {
+ case GPRRegSet:
+ return ReadGPR(force);
+ case FPURegSet:
+ return ReadFPU(force);
+ case EXCRegSet:
+ return ReadEXC(force);
+ default:
+ break;
+ }
+ return -1;
+}
+
+int RegisterContextDarwin_i386::WriteRegisterSet(uint32_t set) {
+ // Make sure we have a valid context to set.
+ if (RegisterSetIsCached(set)) {
+ switch (set) {
+ case GPRRegSet:
+ return WriteGPR();
+ case FPURegSet:
+ return WriteFPU();
+ case EXCRegSet:
+ return WriteEXC();
+ default:
+ break;
}
- return GetError(set, Read);
+ }
+ return -1;
}
-int
-RegisterContextDarwin_i386::ReadFPU (bool force)
-{
- int set = FPURegSet;
- if (force || !RegisterSetIsCached(set))
- {
- SetError(set, Read, DoReadFPU(GetThreadID(), set, fpu));
- }
- return GetError(set, Read);
-}
+bool RegisterContextDarwin_i386::ReadRegister(const RegisterInfo *reg_info,
+ RegisterValue &value) {
+ const uint32_t reg = reg_info->kinds[eRegisterKindLLDB];
+ int set = RegisterContextDarwin_i386::GetSetForNativeRegNum(reg);
-int
-RegisterContextDarwin_i386::ReadEXC (bool force)
-{
- int set = EXCRegSet;
- if (force || !RegisterSetIsCached(set))
- {
- SetError(set, Read, DoReadEXC(GetThreadID(), set, exc));
- }
- return GetError(set, Read);
-}
+ if (set == -1)
+ return false;
-int
-RegisterContextDarwin_i386::WriteGPR ()
-{
- int set = GPRRegSet;
- if (!RegisterSetIsCached(set))
- {
- SetError (set, Write, -1);
- return -1;
- }
- SetError (set, Write, DoWriteGPR(GetThreadID(), set, gpr));
- SetError (set, Read, -1);
- return GetError(set, Write);
-}
+ if (ReadRegisterSet(set, false) != 0)
+ return false;
-int
-RegisterContextDarwin_i386::WriteFPU ()
-{
- int set = FPURegSet;
- if (!RegisterSetIsCached(set))
- {
- SetError (set, Write, -1);
- return -1;
- }
- SetError (set, Write, DoWriteFPU(GetThreadID(), set, fpu));
- SetError (set, Read, -1);
- return GetError(set, Write);
-}
+ switch (reg) {
+ case gpr_eax:
+ case gpr_ebx:
+ case gpr_ecx:
+ case gpr_edx:
+ case gpr_edi:
+ case gpr_esi:
+ case gpr_ebp:
+ case gpr_esp:
+ case gpr_ss:
+ case gpr_eflags:
+ case gpr_eip:
+ case gpr_cs:
+ case gpr_ds:
+ case gpr_es:
+ case gpr_fs:
+ case gpr_gs:
+ value = (&gpr.eax)[reg - gpr_eax];
+ break;
+
+ case fpu_fcw:
+ value = fpu.fcw;
+ break;
+
+ case fpu_fsw:
+ value = fpu.fsw;
+ break;
+
+ case fpu_ftw:
+ value = fpu.ftw;
+ break;
+
+ case fpu_fop:
+ value = fpu.fop;
+ break;
+
+ case fpu_ip:
+ value = fpu.ip;
+ break;
+
+ case fpu_cs:
+ value = fpu.cs;
+ break;
+
+ case fpu_dp:
+ value = fpu.dp;
+ break;
+
+ case fpu_ds:
+ value = fpu.ds;
+ break;
+
+ case fpu_mxcsr:
+ value = fpu.mxcsr;
+ break;
+
+ case fpu_mxcsrmask:
+ value = fpu.mxcsrmask;
+ break;
+
+ case fpu_stmm0:
+ case fpu_stmm1:
+ case fpu_stmm2:
+ case fpu_stmm3:
+ case fpu_stmm4:
+ case fpu_stmm5:
+ case fpu_stmm6:
+ case fpu_stmm7:
+ // These values don't fit into scalar types,
+ // RegisterContext::ReadRegisterBytes() must be used for these
+ // registers
+ //::memcpy (reg_value.value.vector.uint8, fpu.stmm[reg - fpu_stmm0].bytes,
+ //10);
+ return false;
-int
-RegisterContextDarwin_i386::WriteEXC ()
-{
- int set = EXCRegSet;
- if (!RegisterSetIsCached(set))
- {
- SetError (set, Write, -1);
- return -1;
- }
- SetError (set, Write, DoWriteEXC(GetThreadID(), set, exc));
- SetError (set, Read, -1);
- return GetError(set, Write);
-}
+ case fpu_xmm0:
+ case fpu_xmm1:
+ case fpu_xmm2:
+ case fpu_xmm3:
+ case fpu_xmm4:
+ case fpu_xmm5:
+ case fpu_xmm6:
+ case fpu_xmm7:
+ // These values don't fit into scalar types,
+ // RegisterContext::ReadRegisterBytes()
+ // must be used for these registers
+ //::memcpy (reg_value.value.vector.uint8, fpu.xmm[reg - fpu_xmm0].bytes,
+ //16);
+ return false;
-int
-RegisterContextDarwin_i386::ReadRegisterSet (uint32_t set, bool force)
-{
- switch (set)
- {
- case GPRRegSet: return ReadGPR(force);
- case FPURegSet: return ReadFPU(force);
- case EXCRegSet: return ReadEXC(force);
- default: break;
- }
- return -1;
-}
+ case exc_trapno:
+ value = exc.trapno;
+ break;
+
+ case exc_err:
+ value = exc.err;
+ break;
+
+ case exc_faultvaddr:
+ value = exc.faultvaddr;
+ break;
-int
-RegisterContextDarwin_i386::WriteRegisterSet (uint32_t set)
-{
- // Make sure we have a valid context to set.
- if (RegisterSetIsCached(set))
- {
- switch (set)
- {
- case GPRRegSet: return WriteGPR();
- case FPURegSet: return WriteFPU();
- case EXCRegSet: return WriteEXC();
- default: break;
- }
- }
- return -1;
+ default:
+ return false;
+ }
+ return true;
}
-bool
-RegisterContextDarwin_i386::ReadRegister (const RegisterInfo *reg_info,
- RegisterValue &value)
-{
- const uint32_t reg = reg_info->kinds[eRegisterKindLLDB];
- int set = RegisterContextDarwin_i386::GetSetForNativeRegNum (reg);
-
- if (set == -1)
- return false;
-
- if (ReadRegisterSet(set, false) != 0)
- return false;
-
- switch (reg)
- {
- case gpr_eax:
- case gpr_ebx:
- case gpr_ecx:
- case gpr_edx:
- case gpr_edi:
- case gpr_esi:
- case gpr_ebp:
- case gpr_esp:
- case gpr_ss:
- case gpr_eflags:
- case gpr_eip:
- case gpr_cs:
- case gpr_ds:
- case gpr_es:
- case gpr_fs:
- case gpr_gs:
- value = (&gpr.eax)[reg - gpr_eax];
- break;
-
- case fpu_fcw:
- value = fpu.fcw;
- break;
-
- case fpu_fsw:
- value = fpu.fsw;
- break;
-
- case fpu_ftw:
- value = fpu.ftw;
- break;
-
- case fpu_fop:
- value = fpu.fop;
- break;
-
- case fpu_ip:
- value = fpu.ip;
- break;
-
- case fpu_cs:
- value = fpu.cs;
- break;
-
- case fpu_dp:
- value = fpu.dp;
- break;
-
- case fpu_ds:
- value = fpu.ds;
- break;
-
- case fpu_mxcsr:
- value = fpu.mxcsr;
- break;
-
- case fpu_mxcsrmask:
- value = fpu.mxcsrmask;
- break;
-
- case fpu_stmm0:
- case fpu_stmm1:
- case fpu_stmm2:
- case fpu_stmm3:
- case fpu_stmm4:
- case fpu_stmm5:
- case fpu_stmm6:
- case fpu_stmm7:
- // These values don't fit into scalar types,
- // RegisterContext::ReadRegisterBytes() must be used for these
- // registers
- //::memcpy (reg_value.value.vector.uint8, fpu.stmm[reg - fpu_stmm0].bytes, 10);
- return false;
-
- case fpu_xmm0:
- case fpu_xmm1:
- case fpu_xmm2:
- case fpu_xmm3:
- case fpu_xmm4:
- case fpu_xmm5:
- case fpu_xmm6:
- case fpu_xmm7:
- // These values don't fit into scalar types, RegisterContext::ReadRegisterBytes()
- // must be used for these registers
- //::memcpy (reg_value.value.vector.uint8, fpu.xmm[reg - fpu_xmm0].bytes, 16);
- return false;
-
- case exc_trapno:
- value = exc.trapno;
- break;
-
- case exc_err:
- value = exc.err;
- break;
-
- case exc_faultvaddr:
- value = exc.faultvaddr;
- break;
-
- default:
- return false;
- }
- return true;
-}
+bool RegisterContextDarwin_i386::WriteRegister(const RegisterInfo *reg_info,
+ const RegisterValue &value) {
+ const uint32_t reg = reg_info->kinds[eRegisterKindLLDB];
+ int set = GetSetForNativeRegNum(reg);
+ if (set == -1)
+ return false;
-bool
-RegisterContextDarwin_i386::WriteRegister (const RegisterInfo *reg_info,
- const RegisterValue &value)
-{
- const uint32_t reg = reg_info->kinds[eRegisterKindLLDB];
- int set = GetSetForNativeRegNum (reg);
+ if (ReadRegisterSet(set, false) != 0)
+ return false;
- if (set == -1)
- return false;
+ switch (reg) {
+ case gpr_eax:
+ case gpr_ebx:
+ case gpr_ecx:
+ case gpr_edx:
+ case gpr_edi:
+ case gpr_esi:
+ case gpr_ebp:
+ case gpr_esp:
+ case gpr_ss:
+ case gpr_eflags:
+ case gpr_eip:
+ case gpr_cs:
+ case gpr_ds:
+ case gpr_es:
+ case gpr_fs:
+ case gpr_gs:
+ (&gpr.eax)[reg - gpr_eax] = value.GetAsUInt32();
+ break;
+
+ case fpu_fcw:
+ fpu.fcw = value.GetAsUInt16();
+ break;
+
+ case fpu_fsw:
+ fpu.fsw = value.GetAsUInt16();
+ break;
+
+ case fpu_ftw:
+ fpu.ftw = value.GetAsUInt8();
+ break;
+
+ case fpu_fop:
+ fpu.fop = value.GetAsUInt16();
+ break;
+
+ case fpu_ip:
+ fpu.ip = value.GetAsUInt32();
+ break;
+
+ case fpu_cs:
+ fpu.cs = value.GetAsUInt16();
+ break;
+
+ case fpu_dp:
+ fpu.dp = value.GetAsUInt32();
+ break;
+
+ case fpu_ds:
+ fpu.ds = value.GetAsUInt16();
+ break;
+
+ case fpu_mxcsr:
+ fpu.mxcsr = value.GetAsUInt32();
+ break;
+
+ case fpu_mxcsrmask:
+ fpu.mxcsrmask = value.GetAsUInt32();
+ break;
+
+ case fpu_stmm0:
+ case fpu_stmm1:
+ case fpu_stmm2:
+ case fpu_stmm3:
+ case fpu_stmm4:
+ case fpu_stmm5:
+ case fpu_stmm6:
+ case fpu_stmm7:
+ // These values don't fit into scalar types,
+ // RegisterContext::ReadRegisterBytes()
+ // must be used for these registers
+ ::memcpy(fpu.stmm[reg - fpu_stmm0].bytes, value.GetBytes(),
+ value.GetByteSize());
+ return false;
- if (ReadRegisterSet(set, false) != 0)
- return false;
+ case fpu_xmm0:
+ case fpu_xmm1:
+ case fpu_xmm2:
+ case fpu_xmm3:
+ case fpu_xmm4:
+ case fpu_xmm5:
+ case fpu_xmm6:
+ case fpu_xmm7:
+ // These values don't fit into scalar types,
+ // RegisterContext::ReadRegisterBytes()
+ // must be used for these registers
+ ::memcpy(fpu.xmm[reg - fpu_xmm0].bytes, value.GetBytes(),
+ value.GetByteSize());
+ return false;
- switch (reg)
- {
- case gpr_eax:
- case gpr_ebx:
- case gpr_ecx:
- case gpr_edx:
- case gpr_edi:
- case gpr_esi:
- case gpr_ebp:
- case gpr_esp:
- case gpr_ss:
- case gpr_eflags:
- case gpr_eip:
- case gpr_cs:
- case gpr_ds:
- case gpr_es:
- case gpr_fs:
- case gpr_gs:
- (&gpr.eax)[reg - gpr_eax] = value.GetAsUInt32();
- break;
-
- case fpu_fcw:
- fpu.fcw = value.GetAsUInt16();
- break;
-
- case fpu_fsw:
- fpu.fsw = value.GetAsUInt16();
- break;
-
- case fpu_ftw:
- fpu.ftw = value.GetAsUInt8();
- break;
-
- case fpu_fop:
- fpu.fop = value.GetAsUInt16();
- break;
-
- case fpu_ip:
- fpu.ip = value.GetAsUInt32();
- break;
-
- case fpu_cs:
- fpu.cs = value.GetAsUInt16();
- break;
-
- case fpu_dp:
- fpu.dp = value.GetAsUInt32();
- break;
-
- case fpu_ds:
- fpu.ds = value.GetAsUInt16();
- break;
-
- case fpu_mxcsr:
- fpu.mxcsr = value.GetAsUInt32();
- break;
-
- case fpu_mxcsrmask:
- fpu.mxcsrmask = value.GetAsUInt32();
- break;
-
- case fpu_stmm0:
- case fpu_stmm1:
- case fpu_stmm2:
- case fpu_stmm3:
- case fpu_stmm4:
- case fpu_stmm5:
- case fpu_stmm6:
- case fpu_stmm7:
- // These values don't fit into scalar types, RegisterContext::ReadRegisterBytes()
- // must be used for these registers
- ::memcpy (fpu.stmm[reg - fpu_stmm0].bytes, value.GetBytes(), value.GetByteSize());
- return false;
-
- case fpu_xmm0:
- case fpu_xmm1:
- case fpu_xmm2:
- case fpu_xmm3:
- case fpu_xmm4:
- case fpu_xmm5:
- case fpu_xmm6:
- case fpu_xmm7:
- // These values don't fit into scalar types, RegisterContext::ReadRegisterBytes()
- // must be used for these registers
- ::memcpy (fpu.xmm[reg - fpu_xmm0].bytes, value.GetBytes(), value.GetByteSize());
- return false;
-
- case exc_trapno:
- exc.trapno = value.GetAsUInt32();
- break;
-
- case exc_err:
- exc.err = value.GetAsUInt32();
- break;
-
- case exc_faultvaddr:
- exc.faultvaddr = value.GetAsUInt32();
- break;
+ case exc_trapno:
+ exc.trapno = value.GetAsUInt32();
+ break;
+
+ case exc_err:
+ exc.err = value.GetAsUInt32();
+ break;
+
+ case exc_faultvaddr:
+ exc.faultvaddr = value.GetAsUInt32();
+ break;
- default:
- return false;
- }
- return WriteRegisterSet(set) == 0;
+ default:
+ return false;
+ }
+ return WriteRegisterSet(set) == 0;
}
-bool
-RegisterContextDarwin_i386::ReadAllRegisterValues (lldb::DataBufferSP &data_sp)
-{
- data_sp.reset (new DataBufferHeap (REG_CONTEXT_SIZE, 0));
- if (data_sp &&
- ReadGPR (false) == 0 &&
- ReadFPU (false) == 0 &&
- ReadEXC (false) == 0)
- {
- uint8_t *dst = data_sp->GetBytes();
- ::memcpy (dst, &gpr, sizeof(gpr));
- dst += sizeof(gpr);
-
- ::memcpy (dst, &fpu, sizeof(fpu));
- dst += sizeof(gpr);
+bool RegisterContextDarwin_i386::ReadAllRegisterValues(
+ lldb::DataBufferSP &data_sp) {
+ data_sp.reset(new DataBufferHeap(REG_CONTEXT_SIZE, 0));
+ if (data_sp && ReadGPR(false) == 0 && ReadFPU(false) == 0 &&
+ ReadEXC(false) == 0) {
+ uint8_t *dst = data_sp->GetBytes();
+ ::memcpy(dst, &gpr, sizeof(gpr));
+ dst += sizeof(gpr);
- ::memcpy (dst, &exc, sizeof(exc));
- return true;
- }
- return false;
-}
+ ::memcpy(dst, &fpu, sizeof(fpu));
+ dst += sizeof(gpr);
-bool
-RegisterContextDarwin_i386::WriteAllRegisterValues (const lldb::DataBufferSP &data_sp)
-{
- if (data_sp && data_sp->GetByteSize() == REG_CONTEXT_SIZE)
- {
- const uint8_t *src = data_sp->GetBytes();
- ::memcpy (&gpr, src, sizeof(gpr));
- src += sizeof(gpr);
-
- ::memcpy (&fpu, src, sizeof(fpu));
- src += sizeof(gpr);
-
- ::memcpy (&exc, src, sizeof(exc));
- uint32_t success_count = 0;
- if (WriteGPR() == 0)
- ++success_count;
- if (WriteFPU() == 0)
- ++success_count;
- if (WriteEXC() == 0)
- ++success_count;
- return success_count == 3;
- }
- return false;
+ ::memcpy(dst, &exc, sizeof(exc));
+ return true;
+ }
+ return false;
}
-
-uint32_t
-RegisterContextDarwin_i386::ConvertRegisterKindToRegisterNumber (lldb::RegisterKind kind, uint32_t reg)
-{
- if (kind == eRegisterKindGeneric)
- {
- switch (reg)
- {
- case LLDB_REGNUM_GENERIC_PC: return gpr_eip;
- case LLDB_REGNUM_GENERIC_SP: return gpr_esp;
- case LLDB_REGNUM_GENERIC_FP: return gpr_ebp;
- case LLDB_REGNUM_GENERIC_FLAGS: return gpr_eflags;
- case LLDB_REGNUM_GENERIC_RA:
- default:
- break;
- }
- }
- else if (kind == eRegisterKindEHFrame || kind == eRegisterKindDWARF)
- {
- switch (reg)
- {
- case dwarf_eax: return gpr_eax;
- case dwarf_ecx: return gpr_ecx;
- case dwarf_edx: return gpr_edx;
- case dwarf_ebx: return gpr_ebx;
- case dwarf_esp: return gpr_esp;
- case dwarf_ebp: return gpr_ebp;
- case dwarf_esi: return gpr_esi;
- case dwarf_edi: return gpr_edi;
- case dwarf_eip: return gpr_eip;
- case dwarf_eflags: return gpr_eflags;
- case dwarf_stmm0: return fpu_stmm0;
- case dwarf_stmm1: return fpu_stmm1;
- case dwarf_stmm2: return fpu_stmm2;
- case dwarf_stmm3: return fpu_stmm3;
- case dwarf_stmm4: return fpu_stmm4;
- case dwarf_stmm5: return fpu_stmm5;
- case dwarf_stmm6: return fpu_stmm6;
- case dwarf_stmm7: return fpu_stmm7;
- case dwarf_xmm0: return fpu_xmm0;
- case dwarf_xmm1: return fpu_xmm1;
- case dwarf_xmm2: return fpu_xmm2;
- case dwarf_xmm3: return fpu_xmm3;
- case dwarf_xmm4: return fpu_xmm4;
- case dwarf_xmm5: return fpu_xmm5;
- case dwarf_xmm6: return fpu_xmm6;
- case dwarf_xmm7: return fpu_xmm7;
- default:
- break;
- }
+bool RegisterContextDarwin_i386::WriteAllRegisterValues(
+ const lldb::DataBufferSP &data_sp) {
+ if (data_sp && data_sp->GetByteSize() == REG_CONTEXT_SIZE) {
+ const uint8_t *src = data_sp->GetBytes();
+ ::memcpy(&gpr, src, sizeof(gpr));
+ src += sizeof(gpr);
+
+ ::memcpy(&fpu, src, sizeof(fpu));
+ src += sizeof(gpr);
+
+ ::memcpy(&exc, src, sizeof(exc));
+ uint32_t success_count = 0;
+ if (WriteGPR() == 0)
+ ++success_count;
+ if (WriteFPU() == 0)
+ ++success_count;
+ if (WriteEXC() == 0)
+ ++success_count;
+ return success_count == 3;
+ }
+ return false;
+}
+
+uint32_t RegisterContextDarwin_i386::ConvertRegisterKindToRegisterNumber(
+ lldb::RegisterKind kind, uint32_t reg) {
+ if (kind == eRegisterKindGeneric) {
+ switch (reg) {
+ case LLDB_REGNUM_GENERIC_PC:
+ return gpr_eip;
+ case LLDB_REGNUM_GENERIC_SP:
+ return gpr_esp;
+ case LLDB_REGNUM_GENERIC_FP:
+ return gpr_ebp;
+ case LLDB_REGNUM_GENERIC_FLAGS:
+ return gpr_eflags;
+ case LLDB_REGNUM_GENERIC_RA:
+ default:
+ break;
}
- else if (kind == eRegisterKindLLDB)
- {
- return reg;
+ } else if (kind == eRegisterKindEHFrame || kind == eRegisterKindDWARF) {
+ switch (reg) {
+ case dwarf_eax:
+ return gpr_eax;
+ case dwarf_ecx:
+ return gpr_ecx;
+ case dwarf_edx:
+ return gpr_edx;
+ case dwarf_ebx:
+ return gpr_ebx;
+ case dwarf_esp:
+ return gpr_esp;
+ case dwarf_ebp:
+ return gpr_ebp;
+ case dwarf_esi:
+ return gpr_esi;
+ case dwarf_edi:
+ return gpr_edi;
+ case dwarf_eip:
+ return gpr_eip;
+ case dwarf_eflags:
+ return gpr_eflags;
+ case dwarf_stmm0:
+ return fpu_stmm0;
+ case dwarf_stmm1:
+ return fpu_stmm1;
+ case dwarf_stmm2:
+ return fpu_stmm2;
+ case dwarf_stmm3:
+ return fpu_stmm3;
+ case dwarf_stmm4:
+ return fpu_stmm4;
+ case dwarf_stmm5:
+ return fpu_stmm5;
+ case dwarf_stmm6:
+ return fpu_stmm6;
+ case dwarf_stmm7:
+ return fpu_stmm7;
+ case dwarf_xmm0:
+ return fpu_xmm0;
+ case dwarf_xmm1:
+ return fpu_xmm1;
+ case dwarf_xmm2:
+ return fpu_xmm2;
+ case dwarf_xmm3:
+ return fpu_xmm3;
+ case dwarf_xmm4:
+ return fpu_xmm4;
+ case dwarf_xmm5:
+ return fpu_xmm5;
+ case dwarf_xmm6:
+ return fpu_xmm6;
+ case dwarf_xmm7:
+ return fpu_xmm7;
+ default:
+ break;
}
- return LLDB_INVALID_REGNUM;
+ } else if (kind == eRegisterKindLLDB) {
+ return reg;
+ }
+ return LLDB_INVALID_REGNUM;
}
+bool RegisterContextDarwin_i386::HardwareSingleStep(bool enable) {
+ if (ReadGPR(false) != 0)
+ return false;
-bool
-RegisterContextDarwin_i386::HardwareSingleStep (bool enable)
-{
- if (ReadGPR(false) != 0)
- return false;
-
- const uint32_t trace_bit = 0x100u;
- if (enable)
- {
- // If the trace bit is already set, there is nothing to do
- if (gpr.eflags & trace_bit)
- return true;
- else
- gpr.eflags |= trace_bit;
- }
+ const uint32_t trace_bit = 0x100u;
+ if (enable) {
+ // If the trace bit is already set, there is nothing to do
+ if (gpr.eflags & trace_bit)
+ return true;
else
- {
- // If the trace bit is already cleared, there is nothing to do
- if (gpr.eflags & trace_bit)
- gpr.eflags &= ~trace_bit;
- else
- return true;
- }
+ gpr.eflags |= trace_bit;
+ } else {
+ // If the trace bit is already cleared, there is nothing to do
+ if (gpr.eflags & trace_bit)
+ gpr.eflags &= ~trace_bit;
+ else
+ return true;
+ }
- return WriteGPR() == 0;
+ return WriteGPR() == 0;
}
-
-
-
Modified: lldb/trunk/source/Plugins/Process/Utility/RegisterContextDarwin_i386.h
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/source/Plugins/Process/Utility/RegisterContextDarwin_i386.h?rev=280751&r1=280750&r2=280751&view=diff
==============================================================================
--- lldb/trunk/source/Plugins/Process/Utility/RegisterContextDarwin_i386.h (original)
+++ lldb/trunk/source/Plugins/Process/Utility/RegisterContextDarwin_i386.h Tue Sep 6 15:57:50 2016
@@ -14,255 +14,200 @@
// C++ Includes
// Other libraries and framework includes
// Project includes
-#include "lldb/lldb-private.h"
#include "lldb/Target/RegisterContext.h"
+#include "lldb/lldb-private.h"
-class RegisterContextDarwin_i386 : public lldb_private::RegisterContext
-{
+class RegisterContextDarwin_i386 : public lldb_private::RegisterContext {
public:
- RegisterContextDarwin_i386(lldb_private::Thread &thread,
- uint32_t concrete_frame_idx);
+ RegisterContextDarwin_i386(lldb_private::Thread &thread,
+ uint32_t concrete_frame_idx);
- ~RegisterContextDarwin_i386() override;
+ ~RegisterContextDarwin_i386() override;
- void
- InvalidateAllRegisters() override;
+ void InvalidateAllRegisters() override;
- size_t
- GetRegisterCount() override;
-
- const lldb_private::RegisterInfo *
- GetRegisterInfoAtIndex(size_t reg) override;
-
- size_t
- GetRegisterSetCount() override;
-
- const lldb_private::RegisterSet *
- GetRegisterSet(size_t set) override;
-
- bool
- ReadRegister(const lldb_private::RegisterInfo *reg_info,
- lldb_private::RegisterValue &value) override;
-
- bool
- WriteRegister(const lldb_private::RegisterInfo *reg_info,
- const lldb_private::RegisterValue &value) override;
-
- bool
- ReadAllRegisterValues(lldb::DataBufferSP &data_sp) override;
-
- bool
- WriteAllRegisterValues(const lldb::DataBufferSP &data_sp) override;
-
- uint32_t
- ConvertRegisterKindToRegisterNumber(lldb::RegisterKind kind, uint32_t num) override;
-
- bool
- HardwareSingleStep(bool enable) override;
-
- struct GPR
- {
- uint32_t eax;
- uint32_t ebx;
- uint32_t ecx;
- uint32_t edx;
- uint32_t edi;
- uint32_t esi;
- uint32_t ebp;
- uint32_t esp;
- uint32_t ss;
- uint32_t eflags;
- uint32_t eip;
- uint32_t cs;
- uint32_t ds;
- uint32_t es;
- uint32_t fs;
- uint32_t gs;
- };
-
- struct MMSReg
- {
- uint8_t bytes[10];
- uint8_t pad[6];
- };
-
- struct XMMReg
- {
- uint8_t bytes[16];
- };
-
- struct FPU
- {
- uint32_t pad[2];
- uint16_t fcw;
- uint16_t fsw;
- uint8_t ftw;
- uint8_t pad1;
- uint16_t fop;
- uint32_t ip;
- uint16_t cs;
- uint16_t pad2;
- uint32_t dp;
- uint16_t ds;
- uint16_t pad3;
- uint32_t mxcsr;
- uint32_t mxcsrmask;
- MMSReg stmm[8];
- XMMReg xmm[8];
- uint8_t pad4[14*16];
- int pad5;
- };
-
- struct EXC
- {
- uint32_t trapno;
- uint32_t err;
- uint32_t faultvaddr;
- };
+ size_t GetRegisterCount() override;
+
+ const lldb_private::RegisterInfo *GetRegisterInfoAtIndex(size_t reg) override;
+
+ size_t GetRegisterSetCount() override;
+
+ const lldb_private::RegisterSet *GetRegisterSet(size_t set) override;
+
+ bool ReadRegister(const lldb_private::RegisterInfo *reg_info,
+ lldb_private::RegisterValue &value) override;
+
+ bool WriteRegister(const lldb_private::RegisterInfo *reg_info,
+ const lldb_private::RegisterValue &value) override;
+
+ bool ReadAllRegisterValues(lldb::DataBufferSP &data_sp) override;
+
+ bool WriteAllRegisterValues(const lldb::DataBufferSP &data_sp) override;
+
+ uint32_t ConvertRegisterKindToRegisterNumber(lldb::RegisterKind kind,
+ uint32_t num) override;
+
+ bool HardwareSingleStep(bool enable) override;
+
+ struct GPR {
+ uint32_t eax;
+ uint32_t ebx;
+ uint32_t ecx;
+ uint32_t edx;
+ uint32_t edi;
+ uint32_t esi;
+ uint32_t ebp;
+ uint32_t esp;
+ uint32_t ss;
+ uint32_t eflags;
+ uint32_t eip;
+ uint32_t cs;
+ uint32_t ds;
+ uint32_t es;
+ uint32_t fs;
+ uint32_t gs;
+ };
+
+ struct MMSReg {
+ uint8_t bytes[10];
+ uint8_t pad[6];
+ };
+
+ struct XMMReg {
+ uint8_t bytes[16];
+ };
+
+ struct FPU {
+ uint32_t pad[2];
+ uint16_t fcw;
+ uint16_t fsw;
+ uint8_t ftw;
+ uint8_t pad1;
+ uint16_t fop;
+ uint32_t ip;
+ uint16_t cs;
+ uint16_t pad2;
+ uint32_t dp;
+ uint16_t ds;
+ uint16_t pad3;
+ uint32_t mxcsr;
+ uint32_t mxcsrmask;
+ MMSReg stmm[8];
+ XMMReg xmm[8];
+ uint8_t pad4[14 * 16];
+ int pad5;
+ };
+
+ struct EXC {
+ uint32_t trapno;
+ uint32_t err;
+ uint32_t faultvaddr;
+ };
protected:
- enum
- {
- GPRRegSet = 1,
- FPURegSet = 2,
- EXCRegSet = 3
- };
-
- enum
- {
- GPRWordCount = sizeof(GPR)/sizeof(uint32_t),
- FPUWordCount = sizeof(FPU)/sizeof(uint32_t),
- EXCWordCount = sizeof(EXC)/sizeof(uint32_t)
- };
-
- enum
- {
- Read = 0,
- Write = 1,
- kNumErrors = 2
- };
-
- GPR gpr;
- FPU fpu;
- EXC exc;
- int gpr_errs[2]; // Read/Write errors
- int fpu_errs[2]; // Read/Write errors
- int exc_errs[2]; // Read/Write errors
-
- void
- InvalidateAllRegisterStates()
- {
- SetError (GPRRegSet, Read, -1);
- SetError (FPURegSet, Read, -1);
- SetError (EXCRegSet, Read, -1);
- }
+ enum { GPRRegSet = 1, FPURegSet = 2, EXCRegSet = 3 };
- int
- GetError (int flavor, uint32_t err_idx) const
- {
- if (err_idx < kNumErrors)
- {
- switch (flavor)
- {
- // When getting all errors, just OR all values together to see if
- // we got any kind of error.
- case GPRRegSet: return gpr_errs[err_idx];
- case FPURegSet: return fpu_errs[err_idx];
- case EXCRegSet: return exc_errs[err_idx];
- default: break;
- }
- }
- return -1;
+ enum {
+ GPRWordCount = sizeof(GPR) / sizeof(uint32_t),
+ FPUWordCount = sizeof(FPU) / sizeof(uint32_t),
+ EXCWordCount = sizeof(EXC) / sizeof(uint32_t)
+ };
+
+ enum { Read = 0, Write = 1, kNumErrors = 2 };
+
+ GPR gpr;
+ FPU fpu;
+ EXC exc;
+ int gpr_errs[2]; // Read/Write errors
+ int fpu_errs[2]; // Read/Write errors
+ int exc_errs[2]; // Read/Write errors
+
+ void InvalidateAllRegisterStates() {
+ SetError(GPRRegSet, Read, -1);
+ SetError(FPURegSet, Read, -1);
+ SetError(EXCRegSet, Read, -1);
+ }
+
+ int GetError(int flavor, uint32_t err_idx) const {
+ if (err_idx < kNumErrors) {
+ switch (flavor) {
+ // When getting all errors, just OR all values together to see if
+ // we got any kind of error.
+ case GPRRegSet:
+ return gpr_errs[err_idx];
+ case FPURegSet:
+ return fpu_errs[err_idx];
+ case EXCRegSet:
+ return exc_errs[err_idx];
+ default:
+ break;
+ }
}
+ return -1;
+ }
- bool
- SetError (int flavor, uint32_t err_idx, int err)
- {
- if (err_idx < kNumErrors)
- {
- switch (flavor)
- {
- case GPRRegSet:
- gpr_errs[err_idx] = err;
- return true;
-
- case FPURegSet:
- fpu_errs[err_idx] = err;
- return true;
-
- case EXCRegSet:
- exc_errs[err_idx] = err;
- return true;
-
- default: break;
- }
- }
- return false;
+ bool SetError(int flavor, uint32_t err_idx, int err) {
+ if (err_idx < kNumErrors) {
+ switch (flavor) {
+ case GPRRegSet:
+ gpr_errs[err_idx] = err;
+ return true;
+
+ case FPURegSet:
+ fpu_errs[err_idx] = err;
+ return true;
+
+ case EXCRegSet:
+ exc_errs[err_idx] = err;
+ return true;
+
+ default:
+ break;
+ }
}
+ return false;
+ }
- bool
- RegisterSetIsCached (int set) const
- {
- return GetError(set, Read) == 0;
- }
+ bool RegisterSetIsCached(int set) const { return GetError(set, Read) == 0; }
+
+ void LogGPR(lldb_private::Log *log, const char *title);
+
+ int ReadGPR(bool force);
+
+ int ReadFPU(bool force);
- void
- LogGPR (lldb_private::Log *log, const char *title);
+ int ReadEXC(bool force);
- int
- ReadGPR (bool force);
+ int WriteGPR();
- int
- ReadFPU (bool force);
+ int WriteFPU();
- int
- ReadEXC (bool force);
+ int WriteEXC();
- int
- WriteGPR ();
+ // Subclasses override these to do the actual reading.
+ virtual int DoReadGPR(lldb::tid_t tid, int flavor, GPR &gpr) = 0;
- int
- WriteFPU ();
+ virtual int DoReadFPU(lldb::tid_t tid, int flavor, FPU &fpu) = 0;
- int
- WriteEXC ();
+ virtual int DoReadEXC(lldb::tid_t tid, int flavor, EXC &exc) = 0;
- // Subclasses override these to do the actual reading.
- virtual int
- DoReadGPR (lldb::tid_t tid, int flavor, GPR &gpr) = 0;
-
- virtual int
- DoReadFPU (lldb::tid_t tid, int flavor, FPU &fpu) = 0;
+ virtual int DoWriteGPR(lldb::tid_t tid, int flavor, const GPR &gpr) = 0;
- virtual int
- DoReadEXC (lldb::tid_t tid, int flavor, EXC &exc) = 0;
+ virtual int DoWriteFPU(lldb::tid_t tid, int flavor, const FPU &fpu) = 0;
- virtual int
- DoWriteGPR (lldb::tid_t tid, int flavor, const GPR &gpr) = 0;
-
- virtual int
- DoWriteFPU (lldb::tid_t tid, int flavor, const FPU &fpu) = 0;
-
- virtual int
- DoWriteEXC (lldb::tid_t tid, int flavor, const EXC &exc) = 0;
+ virtual int DoWriteEXC(lldb::tid_t tid, int flavor, const EXC &exc) = 0;
- int
- ReadRegisterSet (uint32_t set, bool force);
+ int ReadRegisterSet(uint32_t set, bool force);
- int
- WriteRegisterSet (uint32_t set);
+ int WriteRegisterSet(uint32_t set);
- static uint32_t
- GetRegisterNumber (uint32_t reg_kind, uint32_t reg_num);
+ static uint32_t GetRegisterNumber(uint32_t reg_kind, uint32_t reg_num);
- static int
- GetSetForNativeRegNum (int reg_num);
+ static int GetSetForNativeRegNum(int reg_num);
- static size_t
- GetRegisterInfosCount ();
+ static size_t GetRegisterInfosCount();
- static const lldb_private::RegisterInfo *
- GetRegisterInfos ();
+ static const lldb_private::RegisterInfo *GetRegisterInfos();
};
#endif // liblldb_RegisterContextDarwin_i386_h_
Modified: lldb/trunk/source/Plugins/Process/Utility/RegisterContextDarwin_x86_64.cpp
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/source/Plugins/Process/Utility/RegisterContextDarwin_x86_64.cpp?rev=280751&r1=280750&r2=280751&view=diff
==============================================================================
--- lldb/trunk/source/Plugins/Process/Utility/RegisterContextDarwin_x86_64.cpp (original)
+++ lldb/trunk/source/Plugins/Process/Utility/RegisterContextDarwin_x86_64.cpp Tue Sep 6 15:57:50 2016
@@ -7,11 +7,10 @@
//
//===----------------------------------------------------------------------===//
-
// C Includes
#include <inttypes.h> // PRIx64
#include <stdarg.h>
-#include <stddef.h> // offsetof
+#include <stddef.h> // offsetof
// C++ Includes
// Other libraries and framework includes
@@ -36,340 +35,489 @@
using namespace lldb;
using namespace lldb_private;
-enum
-{
- gpr_rax = 0,
- gpr_rbx,
- gpr_rcx,
- gpr_rdx,
- gpr_rdi,
- gpr_rsi,
- gpr_rbp,
- gpr_rsp,
- gpr_r8,
- gpr_r9,
- gpr_r10,
- gpr_r11,
- gpr_r12,
- gpr_r13,
- gpr_r14,
- gpr_r15,
- gpr_rip,
- gpr_rflags,
- gpr_cs,
- gpr_fs,
- gpr_gs,
-
- fpu_fcw,
- fpu_fsw,
- fpu_ftw,
- fpu_fop,
- fpu_ip,
- fpu_cs,
- fpu_dp,
- fpu_ds,
- fpu_mxcsr,
- fpu_mxcsrmask,
- fpu_stmm0,
- fpu_stmm1,
- fpu_stmm2,
- fpu_stmm3,
- fpu_stmm4,
- fpu_stmm5,
- fpu_stmm6,
- fpu_stmm7,
- fpu_xmm0,
- fpu_xmm1,
- fpu_xmm2,
- fpu_xmm3,
- fpu_xmm4,
- fpu_xmm5,
- fpu_xmm6,
- fpu_xmm7,
- fpu_xmm8,
- fpu_xmm9,
- fpu_xmm10,
- fpu_xmm11,
- fpu_xmm12,
- fpu_xmm13,
- fpu_xmm14,
- fpu_xmm15,
-
- exc_trapno,
- exc_err,
- exc_faultvaddr,
-
- k_num_registers,
-
- // Aliases
- fpu_fctrl = fpu_fcw,
- fpu_fstat = fpu_fsw,
- fpu_ftag = fpu_ftw,
- fpu_fiseg = fpu_cs,
- fpu_fioff = fpu_ip,
- fpu_foseg = fpu_ds,
- fpu_fooff = fpu_dp
+enum {
+ gpr_rax = 0,
+ gpr_rbx,
+ gpr_rcx,
+ gpr_rdx,
+ gpr_rdi,
+ gpr_rsi,
+ gpr_rbp,
+ gpr_rsp,
+ gpr_r8,
+ gpr_r9,
+ gpr_r10,
+ gpr_r11,
+ gpr_r12,
+ gpr_r13,
+ gpr_r14,
+ gpr_r15,
+ gpr_rip,
+ gpr_rflags,
+ gpr_cs,
+ gpr_fs,
+ gpr_gs,
+
+ fpu_fcw,
+ fpu_fsw,
+ fpu_ftw,
+ fpu_fop,
+ fpu_ip,
+ fpu_cs,
+ fpu_dp,
+ fpu_ds,
+ fpu_mxcsr,
+ fpu_mxcsrmask,
+ fpu_stmm0,
+ fpu_stmm1,
+ fpu_stmm2,
+ fpu_stmm3,
+ fpu_stmm4,
+ fpu_stmm5,
+ fpu_stmm6,
+ fpu_stmm7,
+ fpu_xmm0,
+ fpu_xmm1,
+ fpu_xmm2,
+ fpu_xmm3,
+ fpu_xmm4,
+ fpu_xmm5,
+ fpu_xmm6,
+ fpu_xmm7,
+ fpu_xmm8,
+ fpu_xmm9,
+ fpu_xmm10,
+ fpu_xmm11,
+ fpu_xmm12,
+ fpu_xmm13,
+ fpu_xmm14,
+ fpu_xmm15,
+
+ exc_trapno,
+ exc_err,
+ exc_faultvaddr,
+
+ k_num_registers,
+
+ // Aliases
+ fpu_fctrl = fpu_fcw,
+ fpu_fstat = fpu_fsw,
+ fpu_ftag = fpu_ftw,
+ fpu_fiseg = fpu_cs,
+ fpu_fioff = fpu_ip,
+ fpu_foseg = fpu_ds,
+ fpu_fooff = fpu_dp
};
-enum ehframe_dwarf_regnums
-{
- ehframe_dwarf_gpr_rax = 0,
- ehframe_dwarf_gpr_rdx,
- ehframe_dwarf_gpr_rcx,
- ehframe_dwarf_gpr_rbx,
- ehframe_dwarf_gpr_rsi,
- ehframe_dwarf_gpr_rdi,
- ehframe_dwarf_gpr_rbp,
- ehframe_dwarf_gpr_rsp,
- ehframe_dwarf_gpr_r8,
- ehframe_dwarf_gpr_r9,
- ehframe_dwarf_gpr_r10,
- ehframe_dwarf_gpr_r11,
- ehframe_dwarf_gpr_r12,
- ehframe_dwarf_gpr_r13,
- ehframe_dwarf_gpr_r14,
- ehframe_dwarf_gpr_r15,
- ehframe_dwarf_gpr_rip,
- ehframe_dwarf_fpu_xmm0,
- ehframe_dwarf_fpu_xmm1,
- ehframe_dwarf_fpu_xmm2,
- ehframe_dwarf_fpu_xmm3,
- ehframe_dwarf_fpu_xmm4,
- ehframe_dwarf_fpu_xmm5,
- ehframe_dwarf_fpu_xmm6,
- ehframe_dwarf_fpu_xmm7,
- ehframe_dwarf_fpu_xmm8,
- ehframe_dwarf_fpu_xmm9,
- ehframe_dwarf_fpu_xmm10,
- ehframe_dwarf_fpu_xmm11,
- ehframe_dwarf_fpu_xmm12,
- ehframe_dwarf_fpu_xmm13,
- ehframe_dwarf_fpu_xmm14,
- ehframe_dwarf_fpu_xmm15,
- ehframe_dwarf_fpu_stmm0,
- ehframe_dwarf_fpu_stmm1,
- ehframe_dwarf_fpu_stmm2,
- ehframe_dwarf_fpu_stmm3,
- ehframe_dwarf_fpu_stmm4,
- ehframe_dwarf_fpu_stmm5,
- ehframe_dwarf_fpu_stmm6,
- ehframe_dwarf_fpu_stmm7
+enum ehframe_dwarf_regnums {
+ ehframe_dwarf_gpr_rax = 0,
+ ehframe_dwarf_gpr_rdx,
+ ehframe_dwarf_gpr_rcx,
+ ehframe_dwarf_gpr_rbx,
+ ehframe_dwarf_gpr_rsi,
+ ehframe_dwarf_gpr_rdi,
+ ehframe_dwarf_gpr_rbp,
+ ehframe_dwarf_gpr_rsp,
+ ehframe_dwarf_gpr_r8,
+ ehframe_dwarf_gpr_r9,
+ ehframe_dwarf_gpr_r10,
+ ehframe_dwarf_gpr_r11,
+ ehframe_dwarf_gpr_r12,
+ ehframe_dwarf_gpr_r13,
+ ehframe_dwarf_gpr_r14,
+ ehframe_dwarf_gpr_r15,
+ ehframe_dwarf_gpr_rip,
+ ehframe_dwarf_fpu_xmm0,
+ ehframe_dwarf_fpu_xmm1,
+ ehframe_dwarf_fpu_xmm2,
+ ehframe_dwarf_fpu_xmm3,
+ ehframe_dwarf_fpu_xmm4,
+ ehframe_dwarf_fpu_xmm5,
+ ehframe_dwarf_fpu_xmm6,
+ ehframe_dwarf_fpu_xmm7,
+ ehframe_dwarf_fpu_xmm8,
+ ehframe_dwarf_fpu_xmm9,
+ ehframe_dwarf_fpu_xmm10,
+ ehframe_dwarf_fpu_xmm11,
+ ehframe_dwarf_fpu_xmm12,
+ ehframe_dwarf_fpu_xmm13,
+ ehframe_dwarf_fpu_xmm14,
+ ehframe_dwarf_fpu_xmm15,
+ ehframe_dwarf_fpu_stmm0,
+ ehframe_dwarf_fpu_stmm1,
+ ehframe_dwarf_fpu_stmm2,
+ ehframe_dwarf_fpu_stmm3,
+ ehframe_dwarf_fpu_stmm4,
+ ehframe_dwarf_fpu_stmm5,
+ ehframe_dwarf_fpu_stmm6,
+ ehframe_dwarf_fpu_stmm7
};
-#define GPR_OFFSET(reg) (LLVM_EXTENSION offsetof (RegisterContextDarwin_x86_64::GPR, reg))
-#define FPU_OFFSET(reg) (LLVM_EXTENSION offsetof (RegisterContextDarwin_x86_64::FPU, reg) + sizeof (RegisterContextDarwin_x86_64::GPR))
-#define EXC_OFFSET(reg) (LLVM_EXTENSION offsetof (RegisterContextDarwin_x86_64::EXC, reg) + sizeof (RegisterContextDarwin_x86_64::GPR) + sizeof (RegisterContextDarwin_x86_64::FPU))
+#define GPR_OFFSET(reg) \
+ (LLVM_EXTENSION offsetof(RegisterContextDarwin_x86_64::GPR, reg))
+#define FPU_OFFSET(reg) \
+ (LLVM_EXTENSION offsetof(RegisterContextDarwin_x86_64::FPU, reg) + \
+ sizeof(RegisterContextDarwin_x86_64::GPR))
+#define EXC_OFFSET(reg) \
+ (LLVM_EXTENSION offsetof(RegisterContextDarwin_x86_64::EXC, reg) + \
+ sizeof(RegisterContextDarwin_x86_64::GPR) + \
+ sizeof(RegisterContextDarwin_x86_64::FPU))
// These macros will auto define the register name, alt name, register size,
// register offset, encoding, format and native register. This ensures that
// the register state structures are defined correctly and have the correct
// sizes and offsets.
-#define DEFINE_GPR(reg, alt) #reg, alt, sizeof(((RegisterContextDarwin_x86_64::GPR *)NULL)->reg), GPR_OFFSET(reg), eEncodingUint, eFormatHex
-#define DEFINE_FPU_UINT(reg) #reg, NULL, sizeof(((RegisterContextDarwin_x86_64::FPU *)NULL)->reg), FPU_OFFSET(reg), eEncodingUint, eFormatHex
-#define DEFINE_FPU_VECT(reg, i) #reg#i, NULL, sizeof(((RegisterContextDarwin_x86_64::FPU *)NULL)->reg[i].bytes), FPU_OFFSET(reg[i]), eEncodingVector, eFormatVectorOfUInt8, { ehframe_dwarf_fpu_##reg##i, ehframe_dwarf_fpu_##reg##i, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_##reg##i }, nullptr, nullptr, nullptr, 0
-#define DEFINE_EXC(reg) #reg, NULL, sizeof(((RegisterContextDarwin_x86_64::EXC *)NULL)->reg), EXC_OFFSET(reg), eEncodingUint, eFormatHex
-
-#define REG_CONTEXT_SIZE (sizeof (RegisterContextDarwin_x86_64::GPR) + sizeof (RegisterContextDarwin_x86_64::FPU) + sizeof (RegisterContextDarwin_x86_64::EXC))
+#define DEFINE_GPR(reg, alt) \
+ #reg, alt, sizeof(((RegisterContextDarwin_x86_64::GPR *) NULL)->reg), \
+ GPR_OFFSET(reg), eEncodingUint, eFormatHex
+#define DEFINE_FPU_UINT(reg) \
+ #reg, NULL, sizeof(((RegisterContextDarwin_x86_64::FPU *) NULL)->reg), \
+ FPU_OFFSET(reg), eEncodingUint, eFormatHex
+#define DEFINE_FPU_VECT(reg, i) \
+ #reg #i, NULL, \
+ sizeof(((RegisterContextDarwin_x86_64::FPU *) NULL)->reg[i].bytes), \
+ FPU_OFFSET(reg[i]), eEncodingVector, eFormatVectorOfUInt8, \
+ {ehframe_dwarf_fpu_##reg##i, \
+ ehframe_dwarf_fpu_##reg##i, LLDB_INVALID_REGNUM, \
+ LLDB_INVALID_REGNUM, fpu_##reg##i }, \
+ nullptr, nullptr, nullptr, 0
+#define DEFINE_EXC(reg) \
+ #reg, NULL, sizeof(((RegisterContextDarwin_x86_64::EXC *) NULL)->reg), \
+ EXC_OFFSET(reg), eEncodingUint, eFormatHex
+
+#define REG_CONTEXT_SIZE \
+ (sizeof(RegisterContextDarwin_x86_64::GPR) + \
+ sizeof(RegisterContextDarwin_x86_64::FPU) + \
+ sizeof(RegisterContextDarwin_x86_64::EXC))
// General purpose registers for 64 bit
-static RegisterInfo g_register_infos[] =
-{
-// Macro auto defines most stuff EH_FRAME DWARF GENERIC PROCESS PLUGIN LLDB
-// =============================== ====================== =================== ========================== ==================== ===================
- { DEFINE_GPR (rax , NULL) , { ehframe_dwarf_gpr_rax , ehframe_dwarf_gpr_rax , LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, gpr_rax }, nullptr, nullptr, nullptr, 0},
- { DEFINE_GPR (rbx , NULL) , { ehframe_dwarf_gpr_rbx , ehframe_dwarf_gpr_rbx , LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, gpr_rbx }, nullptr, nullptr, nullptr, 0},
- { DEFINE_GPR (rcx , NULL) , { ehframe_dwarf_gpr_rcx , ehframe_dwarf_gpr_rcx , LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, gpr_rcx }, nullptr, nullptr, nullptr, 0},
- { DEFINE_GPR (rdx , NULL) , { ehframe_dwarf_gpr_rdx , ehframe_dwarf_gpr_rdx , LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, gpr_rdx }, nullptr, nullptr, nullptr, 0},
- { DEFINE_GPR (rdi , NULL) , { ehframe_dwarf_gpr_rdi , ehframe_dwarf_gpr_rdi , LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, gpr_rdi }, nullptr, nullptr, nullptr, 0},
- { DEFINE_GPR (rsi , NULL) , { ehframe_dwarf_gpr_rsi , ehframe_dwarf_gpr_rsi , LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, gpr_rsi }, nullptr, nullptr, nullptr, 0},
- { DEFINE_GPR (rbp , "fp") , { ehframe_dwarf_gpr_rbp , ehframe_dwarf_gpr_rbp , LLDB_REGNUM_GENERIC_FP , LLDB_INVALID_REGNUM, gpr_rbp }, nullptr, nullptr, nullptr, 0},
- { DEFINE_GPR (rsp , "sp") , { ehframe_dwarf_gpr_rsp , ehframe_dwarf_gpr_rsp , LLDB_REGNUM_GENERIC_SP , LLDB_INVALID_REGNUM, gpr_rsp }, nullptr, nullptr, nullptr, 0},
- { DEFINE_GPR (r8 , NULL) , { ehframe_dwarf_gpr_r8 , ehframe_dwarf_gpr_r8 , LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, gpr_r8 }, nullptr, nullptr, nullptr, 0},
- { DEFINE_GPR (r9 , NULL) , { ehframe_dwarf_gpr_r9 , ehframe_dwarf_gpr_r9 , LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, gpr_r9 }, nullptr, nullptr, nullptr, 0},
- { DEFINE_GPR (r10 , NULL) , { ehframe_dwarf_gpr_r10 , ehframe_dwarf_gpr_r10 , LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, gpr_r10 }, nullptr, nullptr, nullptr, 0},
- { DEFINE_GPR (r11 , NULL) , { ehframe_dwarf_gpr_r11 , ehframe_dwarf_gpr_r11 , LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, gpr_r11 }, nullptr, nullptr, nullptr, 0},
- { DEFINE_GPR (r12 , NULL) , { ehframe_dwarf_gpr_r12 , ehframe_dwarf_gpr_r12 , LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, gpr_r12 }, nullptr, nullptr, nullptr, 0},
- { DEFINE_GPR (r13 , NULL) , { ehframe_dwarf_gpr_r13 , ehframe_dwarf_gpr_r13 , LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, gpr_r13 }, nullptr, nullptr, nullptr, 0},
- { DEFINE_GPR (r14 , NULL) , { ehframe_dwarf_gpr_r14 , ehframe_dwarf_gpr_r14 , LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, gpr_r14 }, nullptr, nullptr, nullptr, 0},
- { DEFINE_GPR (r15 , NULL) , { ehframe_dwarf_gpr_r15 , ehframe_dwarf_gpr_r15 , LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, gpr_r15 }, nullptr, nullptr, nullptr, 0},
- { DEFINE_GPR (rip , "pc") , { ehframe_dwarf_gpr_rip , ehframe_dwarf_gpr_rip , LLDB_REGNUM_GENERIC_PC , LLDB_INVALID_REGNUM, gpr_rip }, nullptr, nullptr, nullptr, 0},
- { DEFINE_GPR (rflags, "flags") , { LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM , LLDB_REGNUM_GENERIC_FLAGS, LLDB_INVALID_REGNUM, gpr_rflags }, nullptr, nullptr, nullptr, 0},
- { DEFINE_GPR (cs , NULL) , { LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, gpr_cs }, nullptr, nullptr, nullptr, 0},
- { DEFINE_GPR (fs , NULL) , { LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, gpr_fs }, nullptr, nullptr, nullptr, 0},
- { DEFINE_GPR (gs , NULL) , { LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, gpr_gs }, nullptr, nullptr, nullptr, 0},
-
- { DEFINE_FPU_UINT(fcw) , { LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, fpu_fcw }, nullptr, nullptr, nullptr, 0},
- { DEFINE_FPU_UINT(fsw) , { LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, fpu_fsw }, nullptr, nullptr, nullptr, 0},
- { DEFINE_FPU_UINT(ftw) , { LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, fpu_ftw }, nullptr, nullptr, nullptr, 0},
- { DEFINE_FPU_UINT(fop) , { LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, fpu_fop }, nullptr, nullptr, nullptr, 0},
- { DEFINE_FPU_UINT(ip) , { LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, fpu_ip }, nullptr, nullptr, nullptr, 0},
- { DEFINE_FPU_UINT(cs) , { LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, fpu_cs }, nullptr, nullptr, nullptr, 0},
- { DEFINE_FPU_UINT(dp) , { LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, fpu_dp }, nullptr, nullptr, nullptr, 0},
- { DEFINE_FPU_UINT(ds) , { LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, fpu_ds }, nullptr, nullptr, nullptr, 0},
- { DEFINE_FPU_UINT(mxcsr) , { LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, fpu_mxcsr }, nullptr, nullptr, nullptr, 0},
- { DEFINE_FPU_UINT(mxcsrmask) , { LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, fpu_mxcsrmask }, nullptr, nullptr, nullptr, 0},
- { DEFINE_FPU_VECT(stmm,0) },
- { DEFINE_FPU_VECT(stmm,1) },
- { DEFINE_FPU_VECT(stmm,2) },
- { DEFINE_FPU_VECT(stmm,3) },
- { DEFINE_FPU_VECT(stmm,4) },
- { DEFINE_FPU_VECT(stmm,5) },
- { DEFINE_FPU_VECT(stmm,6) },
- { DEFINE_FPU_VECT(stmm,7) },
- { DEFINE_FPU_VECT(xmm,0) },
- { DEFINE_FPU_VECT(xmm,1) },
- { DEFINE_FPU_VECT(xmm,2) },
- { DEFINE_FPU_VECT(xmm,3) },
- { DEFINE_FPU_VECT(xmm,4) },
- { DEFINE_FPU_VECT(xmm,5) },
- { DEFINE_FPU_VECT(xmm,6) },
- { DEFINE_FPU_VECT(xmm,7) },
- { DEFINE_FPU_VECT(xmm,8) },
- { DEFINE_FPU_VECT(xmm,9) },
- { DEFINE_FPU_VECT(xmm,10) },
- { DEFINE_FPU_VECT(xmm,11) },
- { DEFINE_FPU_VECT(xmm,12) },
- { DEFINE_FPU_VECT(xmm,13) },
- { DEFINE_FPU_VECT(xmm,14) },
- { DEFINE_FPU_VECT(xmm,15) },
-
- { DEFINE_EXC(trapno) , { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, exc_trapno },nullptr, nullptr, nullptr, 0},
- { DEFINE_EXC(err) , { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, exc_err },nullptr, nullptr, nullptr, 0},
- { DEFINE_EXC(faultvaddr) , { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, exc_faultvaddr },nullptr, nullptr, nullptr, 0}
-};
+static RegisterInfo g_register_infos[] = {
+ // Macro auto defines most stuff EH_FRAME DWARF
+ // GENERIC PROCESS PLUGIN LLDB
+ // =============================== ======================
+ // =================== ========================== ====================
+ // ===================
+ {DEFINE_GPR(rax, NULL),
+ {ehframe_dwarf_gpr_rax, ehframe_dwarf_gpr_rax, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, gpr_rax},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {DEFINE_GPR(rbx, NULL),
+ {ehframe_dwarf_gpr_rbx, ehframe_dwarf_gpr_rbx, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, gpr_rbx},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {DEFINE_GPR(rcx, NULL),
+ {ehframe_dwarf_gpr_rcx, ehframe_dwarf_gpr_rcx, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, gpr_rcx},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {DEFINE_GPR(rdx, NULL),
+ {ehframe_dwarf_gpr_rdx, ehframe_dwarf_gpr_rdx, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, gpr_rdx},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {DEFINE_GPR(rdi, NULL),
+ {ehframe_dwarf_gpr_rdi, ehframe_dwarf_gpr_rdi, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, gpr_rdi},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {DEFINE_GPR(rsi, NULL),
+ {ehframe_dwarf_gpr_rsi, ehframe_dwarf_gpr_rsi, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, gpr_rsi},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {DEFINE_GPR(rbp, "fp"),
+ {ehframe_dwarf_gpr_rbp, ehframe_dwarf_gpr_rbp, LLDB_REGNUM_GENERIC_FP,
+ LLDB_INVALID_REGNUM, gpr_rbp},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {DEFINE_GPR(rsp, "sp"),
+ {ehframe_dwarf_gpr_rsp, ehframe_dwarf_gpr_rsp, LLDB_REGNUM_GENERIC_SP,
+ LLDB_INVALID_REGNUM, gpr_rsp},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {DEFINE_GPR(r8, NULL),
+ {ehframe_dwarf_gpr_r8, ehframe_dwarf_gpr_r8, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, gpr_r8},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {DEFINE_GPR(r9, NULL),
+ {ehframe_dwarf_gpr_r9, ehframe_dwarf_gpr_r9, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, gpr_r9},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {DEFINE_GPR(r10, NULL),
+ {ehframe_dwarf_gpr_r10, ehframe_dwarf_gpr_r10, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, gpr_r10},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {DEFINE_GPR(r11, NULL),
+ {ehframe_dwarf_gpr_r11, ehframe_dwarf_gpr_r11, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, gpr_r11},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {DEFINE_GPR(r12, NULL),
+ {ehframe_dwarf_gpr_r12, ehframe_dwarf_gpr_r12, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, gpr_r12},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {DEFINE_GPR(r13, NULL),
+ {ehframe_dwarf_gpr_r13, ehframe_dwarf_gpr_r13, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, gpr_r13},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {DEFINE_GPR(r14, NULL),
+ {ehframe_dwarf_gpr_r14, ehframe_dwarf_gpr_r14, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, gpr_r14},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {DEFINE_GPR(r15, NULL),
+ {ehframe_dwarf_gpr_r15, ehframe_dwarf_gpr_r15, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, gpr_r15},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {DEFINE_GPR(rip, "pc"),
+ {ehframe_dwarf_gpr_rip, ehframe_dwarf_gpr_rip, LLDB_REGNUM_GENERIC_PC,
+ LLDB_INVALID_REGNUM, gpr_rip},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {DEFINE_GPR(rflags, "flags"),
+ {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_REGNUM_GENERIC_FLAGS,
+ LLDB_INVALID_REGNUM, gpr_rflags},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {DEFINE_GPR(cs, NULL),
+ {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, gpr_cs},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {DEFINE_GPR(fs, NULL),
+ {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, gpr_fs},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {DEFINE_GPR(gs, NULL),
+ {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, gpr_gs},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+
+ {DEFINE_FPU_UINT(fcw),
+ {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, fpu_fcw},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {DEFINE_FPU_UINT(fsw),
+ {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, fpu_fsw},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {DEFINE_FPU_UINT(ftw),
+ {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, fpu_ftw},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {DEFINE_FPU_UINT(fop),
+ {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, fpu_fop},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {DEFINE_FPU_UINT(ip),
+ {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, fpu_ip},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {DEFINE_FPU_UINT(cs),
+ {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, fpu_cs},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {DEFINE_FPU_UINT(dp),
+ {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, fpu_dp},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {DEFINE_FPU_UINT(ds),
+ {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, fpu_ds},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {DEFINE_FPU_UINT(mxcsr),
+ {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, fpu_mxcsr},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {DEFINE_FPU_UINT(mxcsrmask),
+ {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, fpu_mxcsrmask},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {DEFINE_FPU_VECT(stmm, 0)},
+ {DEFINE_FPU_VECT(stmm, 1)},
+ {DEFINE_FPU_VECT(stmm, 2)},
+ {DEFINE_FPU_VECT(stmm, 3)},
+ {DEFINE_FPU_VECT(stmm, 4)},
+ {DEFINE_FPU_VECT(stmm, 5)},
+ {DEFINE_FPU_VECT(stmm, 6)},
+ {DEFINE_FPU_VECT(stmm, 7)},
+ {DEFINE_FPU_VECT(xmm, 0)},
+ {DEFINE_FPU_VECT(xmm, 1)},
+ {DEFINE_FPU_VECT(xmm, 2)},
+ {DEFINE_FPU_VECT(xmm, 3)},
+ {DEFINE_FPU_VECT(xmm, 4)},
+ {DEFINE_FPU_VECT(xmm, 5)},
+ {DEFINE_FPU_VECT(xmm, 6)},
+ {DEFINE_FPU_VECT(xmm, 7)},
+ {DEFINE_FPU_VECT(xmm, 8)},
+ {DEFINE_FPU_VECT(xmm, 9)},
+ {DEFINE_FPU_VECT(xmm, 10)},
+ {DEFINE_FPU_VECT(xmm, 11)},
+ {DEFINE_FPU_VECT(xmm, 12)},
+ {DEFINE_FPU_VECT(xmm, 13)},
+ {DEFINE_FPU_VECT(xmm, 14)},
+ {DEFINE_FPU_VECT(xmm, 15)},
+
+ {DEFINE_EXC(trapno),
+ {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, exc_trapno},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {DEFINE_EXC(err),
+ {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, exc_err},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {DEFINE_EXC(faultvaddr),
+ {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, exc_faultvaddr},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0}};
static size_t k_num_register_infos = llvm::array_lengthof(g_register_infos);
-RegisterContextDarwin_x86_64::RegisterContextDarwin_x86_64 (Thread &thread, uint32_t concrete_frame_idx) :
- RegisterContext (thread, concrete_frame_idx),
- gpr(),
- fpu(),
- exc()
-{
- uint32_t i;
- for (i=0; i<kNumErrors; i++)
- {
- gpr_errs[i] = -1;
- fpu_errs[i] = -1;
- exc_errs[i] = -1;
- }
-}
-
-RegisterContextDarwin_x86_64::~RegisterContextDarwin_x86_64()
-{
-}
-
-
-void
-RegisterContextDarwin_x86_64::InvalidateAllRegisters ()
-{
- InvalidateAllRegisterStates();
-}
-
-
-size_t
-RegisterContextDarwin_x86_64::GetRegisterCount ()
-{
- assert(k_num_register_infos == k_num_registers);
- return k_num_registers;
+RegisterContextDarwin_x86_64::RegisterContextDarwin_x86_64(
+ Thread &thread, uint32_t concrete_frame_idx)
+ : RegisterContext(thread, concrete_frame_idx), gpr(), fpu(), exc() {
+ uint32_t i;
+ for (i = 0; i < kNumErrors; i++) {
+ gpr_errs[i] = -1;
+ fpu_errs[i] = -1;
+ exc_errs[i] = -1;
+ }
+}
+
+RegisterContextDarwin_x86_64::~RegisterContextDarwin_x86_64() {}
+
+void RegisterContextDarwin_x86_64::InvalidateAllRegisters() {
+ InvalidateAllRegisterStates();
+}
+
+size_t RegisterContextDarwin_x86_64::GetRegisterCount() {
+ assert(k_num_register_infos == k_num_registers);
+ return k_num_registers;
}
-
const RegisterInfo *
-RegisterContextDarwin_x86_64::GetRegisterInfoAtIndex (size_t reg)
-{
- assert(k_num_register_infos == k_num_registers);
- if (reg < k_num_registers)
- return &g_register_infos[reg];
- return NULL;
+RegisterContextDarwin_x86_64::GetRegisterInfoAtIndex(size_t reg) {
+ assert(k_num_register_infos == k_num_registers);
+ if (reg < k_num_registers)
+ return &g_register_infos[reg];
+ return NULL;
}
-
-size_t
-RegisterContextDarwin_x86_64::GetRegisterInfosCount ()
-{
- return k_num_register_infos;
+size_t RegisterContextDarwin_x86_64::GetRegisterInfosCount() {
+ return k_num_register_infos;
}
const lldb_private::RegisterInfo *
-RegisterContextDarwin_x86_64::GetRegisterInfos ()
-{
- return g_register_infos;
+RegisterContextDarwin_x86_64::GetRegisterInfos() {
+ return g_register_infos;
}
+static uint32_t g_gpr_regnums[] = {
+ gpr_rax, gpr_rbx, gpr_rcx, gpr_rdx, gpr_rdi, gpr_rsi, gpr_rbp,
+ gpr_rsp, gpr_r8, gpr_r9, gpr_r10, gpr_r11, gpr_r12, gpr_r13,
+ gpr_r14, gpr_r15, gpr_rip, gpr_rflags, gpr_cs, gpr_fs, gpr_gs};
+
+static uint32_t g_fpu_regnums[] = {
+ fpu_fcw, fpu_fsw, fpu_ftw, fpu_fop, fpu_ip, fpu_cs,
+ fpu_dp, fpu_ds, fpu_mxcsr, fpu_mxcsrmask, fpu_stmm0, fpu_stmm1,
+ fpu_stmm2, fpu_stmm3, fpu_stmm4, fpu_stmm5, fpu_stmm6, fpu_stmm7,
+ fpu_xmm0, fpu_xmm1, fpu_xmm2, fpu_xmm3, fpu_xmm4, fpu_xmm5,
+ fpu_xmm6, fpu_xmm7, fpu_xmm8, fpu_xmm9, fpu_xmm10, fpu_xmm11,
+ fpu_xmm12, fpu_xmm13, fpu_xmm14, fpu_xmm15};
-
-static uint32_t g_gpr_regnums[] =
-{
- gpr_rax,
- gpr_rbx,
- gpr_rcx,
- gpr_rdx,
- gpr_rdi,
- gpr_rsi,
- gpr_rbp,
- gpr_rsp,
- gpr_r8,
- gpr_r9,
- gpr_r10,
- gpr_r11,
- gpr_r12,
- gpr_r13,
- gpr_r14,
- gpr_r15,
- gpr_rip,
- gpr_rflags,
- gpr_cs,
- gpr_fs,
- gpr_gs
-};
-
-static uint32_t g_fpu_regnums[] =
-{
- fpu_fcw,
- fpu_fsw,
- fpu_ftw,
- fpu_fop,
- fpu_ip,
- fpu_cs,
- fpu_dp,
- fpu_ds,
- fpu_mxcsr,
- fpu_mxcsrmask,
- fpu_stmm0,
- fpu_stmm1,
- fpu_stmm2,
- fpu_stmm3,
- fpu_stmm4,
- fpu_stmm5,
- fpu_stmm6,
- fpu_stmm7,
- fpu_xmm0,
- fpu_xmm1,
- fpu_xmm2,
- fpu_xmm3,
- fpu_xmm4,
- fpu_xmm5,
- fpu_xmm6,
- fpu_xmm7,
- fpu_xmm8,
- fpu_xmm9,
- fpu_xmm10,
- fpu_xmm11,
- fpu_xmm12,
- fpu_xmm13,
- fpu_xmm14,
- fpu_xmm15
-};
-
-static uint32_t
-g_exc_regnums[] =
-{
- exc_trapno,
- exc_err,
- exc_faultvaddr
-};
+static uint32_t g_exc_regnums[] = {exc_trapno, exc_err, exc_faultvaddr};
// Number of registers in each register set
const size_t k_num_gpr_registers = llvm::array_lengthof(g_gpr_regnums);
@@ -381,562 +529,556 @@ const size_t k_num_exc_registers = llvm:
// of zero is for all registers, followed by other registers sets. The
// register information for the all register set need not be filled in.
//----------------------------------------------------------------------
-static const RegisterSet g_reg_sets[] =
-{
- { "General Purpose Registers", "gpr", k_num_gpr_registers, g_gpr_regnums, },
- { "Floating Point Registers", "fpu", k_num_fpu_registers, g_fpu_regnums },
- { "Exception State Registers", "exc", k_num_exc_registers, g_exc_regnums }
-};
+static const RegisterSet g_reg_sets[] = {
+ {
+ "General Purpose Registers", "gpr", k_num_gpr_registers, g_gpr_regnums,
+ },
+ {"Floating Point Registers", "fpu", k_num_fpu_registers, g_fpu_regnums},
+ {"Exception State Registers", "exc", k_num_exc_registers, g_exc_regnums}};
const size_t k_num_regsets = llvm::array_lengthof(g_reg_sets);
-
-size_t
-RegisterContextDarwin_x86_64::GetRegisterSetCount ()
-{
- return k_num_regsets;
+size_t RegisterContextDarwin_x86_64::GetRegisterSetCount() {
+ return k_num_regsets;
}
const RegisterSet *
-RegisterContextDarwin_x86_64::GetRegisterSet (size_t reg_set)
-{
- if (reg_set < k_num_regsets)
- return &g_reg_sets[reg_set];
- return NULL;
-}
-
-int
-RegisterContextDarwin_x86_64::GetSetForNativeRegNum (int reg_num)
-{
- if (reg_num < fpu_fcw)
- return GPRRegSet;
- else if (reg_num < exc_trapno)
- return FPURegSet;
- else if (reg_num < k_num_registers)
- return EXCRegSet;
- return -1;
-}
-
-void
-RegisterContextDarwin_x86_64::LogGPR(Log *log, const char *format, ...)
-{
- if (log)
- {
- if (format)
- {
- va_list args;
- va_start (args, format);
- log->VAPrintf (format, args);
- va_end (args);
- }
- for (uint32_t i=0; i<k_num_gpr_registers; i++)
- {
- uint32_t reg = gpr_rax + i;
- log->Printf("%12s = 0x%16.16" PRIx64, g_register_infos[reg].name, (&gpr.rax)[reg]);
- }
- }
-}
-
-int
-RegisterContextDarwin_x86_64::ReadGPR (bool force)
-{
- int set = GPRRegSet;
- if (force || !RegisterSetIsCached(set))
- {
- SetError(set, Read, DoReadGPR(GetThreadID(), set, gpr));
- }
- return GetError(GPRRegSet, Read);
-}
-
-int
-RegisterContextDarwin_x86_64::ReadFPU (bool force)
-{
- int set = FPURegSet;
- if (force || !RegisterSetIsCached(set))
- {
- SetError(set, Read, DoReadFPU(GetThreadID(), set, fpu));
+RegisterContextDarwin_x86_64::GetRegisterSet(size_t reg_set) {
+ if (reg_set < k_num_regsets)
+ return &g_reg_sets[reg_set];
+ return NULL;
+}
+
+int RegisterContextDarwin_x86_64::GetSetForNativeRegNum(int reg_num) {
+ if (reg_num < fpu_fcw)
+ return GPRRegSet;
+ else if (reg_num < exc_trapno)
+ return FPURegSet;
+ else if (reg_num < k_num_registers)
+ return EXCRegSet;
+ return -1;
+}
+
+void RegisterContextDarwin_x86_64::LogGPR(Log *log, const char *format, ...) {
+ if (log) {
+ if (format) {
+ va_list args;
+ va_start(args, format);
+ log->VAPrintf(format, args);
+ va_end(args);
}
- return GetError(FPURegSet, Read);
-}
-
-int
-RegisterContextDarwin_x86_64::ReadEXC (bool force)
-{
- int set = EXCRegSet;
- if (force || !RegisterSetIsCached(set))
- {
- SetError(set, Read, DoReadEXC(GetThreadID(), set, exc));
+ for (uint32_t i = 0; i < k_num_gpr_registers; i++) {
+ uint32_t reg = gpr_rax + i;
+ log->Printf("%12s = 0x%16.16" PRIx64, g_register_infos[reg].name,
+ (&gpr.rax)[reg]);
}
- return GetError(EXCRegSet, Read);
+ }
}
-int
-RegisterContextDarwin_x86_64::WriteGPR ()
-{
- int set = GPRRegSet;
- if (!RegisterSetIsCached(set))
- {
- SetError (set, Write, -1);
- return -1;
- }
- SetError (set, Write, DoWriteGPR(GetThreadID(), set, gpr));
- SetError (set, Read, -1);
- return GetError (set, Write);
+int RegisterContextDarwin_x86_64::ReadGPR(bool force) {
+ int set = GPRRegSet;
+ if (force || !RegisterSetIsCached(set)) {
+ SetError(set, Read, DoReadGPR(GetThreadID(), set, gpr));
+ }
+ return GetError(GPRRegSet, Read);
}
-int
-RegisterContextDarwin_x86_64::WriteFPU ()
-{
- int set = FPURegSet;
- if (!RegisterSetIsCached(set))
- {
- SetError (set, Write, -1);
- return -1;
- }
- SetError (set, Write, DoWriteFPU(GetThreadID(), set, fpu));
- SetError (set, Read, -1);
- return GetError (set, Write);
+int RegisterContextDarwin_x86_64::ReadFPU(bool force) {
+ int set = FPURegSet;
+ if (force || !RegisterSetIsCached(set)) {
+ SetError(set, Read, DoReadFPU(GetThreadID(), set, fpu));
+ }
+ return GetError(FPURegSet, Read);
}
-int
-RegisterContextDarwin_x86_64::WriteEXC ()
-{
- int set = EXCRegSet;
- if (!RegisterSetIsCached(set))
- {
- SetError (set, Write, -1);
- return -1;
- }
- SetError (set, Write, DoWriteEXC(GetThreadID(), set, exc));
- SetError (set, Read, -1);
- return GetError (set, Write);
+int RegisterContextDarwin_x86_64::ReadEXC(bool force) {
+ int set = EXCRegSet;
+ if (force || !RegisterSetIsCached(set)) {
+ SetError(set, Read, DoReadEXC(GetThreadID(), set, exc));
+ }
+ return GetError(EXCRegSet, Read);
}
-int
-RegisterContextDarwin_x86_64::ReadRegisterSet(uint32_t set, bool force)
-{
- switch (set)
- {
- case GPRRegSet: return ReadGPR (force);
- case FPURegSet: return ReadFPU (force);
- case EXCRegSet: return ReadEXC (force);
- default: break;
- }
+int RegisterContextDarwin_x86_64::WriteGPR() {
+ int set = GPRRegSet;
+ if (!RegisterSetIsCached(set)) {
+ SetError(set, Write, -1);
return -1;
+ }
+ SetError(set, Write, DoWriteGPR(GetThreadID(), set, gpr));
+ SetError(set, Read, -1);
+ return GetError(set, Write);
}
-int
-RegisterContextDarwin_x86_64::WriteRegisterSet(uint32_t set)
-{
- // Make sure we have a valid context to set.
- switch (set)
- {
- case GPRRegSet: return WriteGPR ();
- case FPURegSet: return WriteFPU ();
- case EXCRegSet: return WriteEXC ();
- default: break;
- }
+int RegisterContextDarwin_x86_64::WriteFPU() {
+ int set = FPURegSet;
+ if (!RegisterSetIsCached(set)) {
+ SetError(set, Write, -1);
return -1;
+ }
+ SetError(set, Write, DoWriteFPU(GetThreadID(), set, fpu));
+ SetError(set, Read, -1);
+ return GetError(set, Write);
}
+int RegisterContextDarwin_x86_64::WriteEXC() {
+ int set = EXCRegSet;
+ if (!RegisterSetIsCached(set)) {
+ SetError(set, Write, -1);
+ return -1;
+ }
+ SetError(set, Write, DoWriteEXC(GetThreadID(), set, exc));
+ SetError(set, Read, -1);
+ return GetError(set, Write);
+}
+
+int RegisterContextDarwin_x86_64::ReadRegisterSet(uint32_t set, bool force) {
+ switch (set) {
+ case GPRRegSet:
+ return ReadGPR(force);
+ case FPURegSet:
+ return ReadFPU(force);
+ case EXCRegSet:
+ return ReadEXC(force);
+ default:
+ break;
+ }
+ return -1;
+}
+
+int RegisterContextDarwin_x86_64::WriteRegisterSet(uint32_t set) {
+ // Make sure we have a valid context to set.
+ switch (set) {
+ case GPRRegSet:
+ return WriteGPR();
+ case FPURegSet:
+ return WriteFPU();
+ case EXCRegSet:
+ return WriteEXC();
+ default:
+ break;
+ }
+ return -1;
+}
+
+bool RegisterContextDarwin_x86_64::ReadRegister(const RegisterInfo *reg_info,
+ RegisterValue &value) {
+ const uint32_t reg = reg_info->kinds[eRegisterKindLLDB];
+ int set = RegisterContextDarwin_x86_64::GetSetForNativeRegNum(reg);
+ if (set == -1)
+ return false;
-bool
-RegisterContextDarwin_x86_64::ReadRegister (const RegisterInfo *reg_info,
- RegisterValue &value)
-{
- const uint32_t reg = reg_info->kinds[eRegisterKindLLDB];
- int set = RegisterContextDarwin_x86_64::GetSetForNativeRegNum (reg);
- if (set == -1)
- return false;
-
- if (ReadRegisterSet(set, false) != 0)
- return false;
+ if (ReadRegisterSet(set, false) != 0)
+ return false;
- switch (reg)
- {
- case gpr_rax:
- case gpr_rbx:
- case gpr_rcx:
- case gpr_rdx:
- case gpr_rdi:
- case gpr_rsi:
- case gpr_rbp:
- case gpr_rsp:
- case gpr_r8:
- case gpr_r9:
- case gpr_r10:
- case gpr_r11:
- case gpr_r12:
- case gpr_r13:
- case gpr_r14:
- case gpr_r15:
- case gpr_rip:
- case gpr_rflags:
- case gpr_cs:
- case gpr_fs:
- case gpr_gs:
- value = (&gpr.rax)[reg - gpr_rax];
- break;
-
- case fpu_fcw:
- value = fpu.fcw;
- break;
-
- case fpu_fsw:
- value = fpu.fsw;
- break;
-
- case fpu_ftw:
- value = fpu.ftw;
- break;
-
- case fpu_fop:
- value = fpu.fop;
- break;
-
- case fpu_ip:
- value = fpu.ip;
- break;
-
- case fpu_cs:
- value = fpu.cs;
- break;
-
- case fpu_dp:
- value = fpu.dp;
- break;
-
- case fpu_ds:
- value = fpu.ds;
- break;
-
- case fpu_mxcsr:
- value = fpu.mxcsr;
- break;
-
- case fpu_mxcsrmask:
- value = fpu.mxcsrmask;
- break;
-
- case fpu_stmm0:
- case fpu_stmm1:
- case fpu_stmm2:
- case fpu_stmm3:
- case fpu_stmm4:
- case fpu_stmm5:
- case fpu_stmm6:
- case fpu_stmm7:
- value.SetBytes(fpu.stmm[reg - fpu_stmm0].bytes, reg_info->byte_size, endian::InlHostByteOrder());
- break;
-
- case fpu_xmm0:
- case fpu_xmm1:
- case fpu_xmm2:
- case fpu_xmm3:
- case fpu_xmm4:
- case fpu_xmm5:
- case fpu_xmm6:
- case fpu_xmm7:
- case fpu_xmm8:
- case fpu_xmm9:
- case fpu_xmm10:
- case fpu_xmm11:
- case fpu_xmm12:
- case fpu_xmm13:
- case fpu_xmm14:
- case fpu_xmm15:
- value.SetBytes(fpu.xmm[reg - fpu_xmm0].bytes, reg_info->byte_size, endian::InlHostByteOrder());
- break;
-
- case exc_trapno:
- value = exc.trapno;
- break;
-
- case exc_err:
- value = exc.err;
- break;
-
- case exc_faultvaddr:
- value = exc.faultvaddr;
- break;
+ switch (reg) {
+ case gpr_rax:
+ case gpr_rbx:
+ case gpr_rcx:
+ case gpr_rdx:
+ case gpr_rdi:
+ case gpr_rsi:
+ case gpr_rbp:
+ case gpr_rsp:
+ case gpr_r8:
+ case gpr_r9:
+ case gpr_r10:
+ case gpr_r11:
+ case gpr_r12:
+ case gpr_r13:
+ case gpr_r14:
+ case gpr_r15:
+ case gpr_rip:
+ case gpr_rflags:
+ case gpr_cs:
+ case gpr_fs:
+ case gpr_gs:
+ value = (&gpr.rax)[reg - gpr_rax];
+ break;
+
+ case fpu_fcw:
+ value = fpu.fcw;
+ break;
+
+ case fpu_fsw:
+ value = fpu.fsw;
+ break;
+
+ case fpu_ftw:
+ value = fpu.ftw;
+ break;
+
+ case fpu_fop:
+ value = fpu.fop;
+ break;
+
+ case fpu_ip:
+ value = fpu.ip;
+ break;
+
+ case fpu_cs:
+ value = fpu.cs;
+ break;
+
+ case fpu_dp:
+ value = fpu.dp;
+ break;
+
+ case fpu_ds:
+ value = fpu.ds;
+ break;
+
+ case fpu_mxcsr:
+ value = fpu.mxcsr;
+ break;
+
+ case fpu_mxcsrmask:
+ value = fpu.mxcsrmask;
+ break;
+
+ case fpu_stmm0:
+ case fpu_stmm1:
+ case fpu_stmm2:
+ case fpu_stmm3:
+ case fpu_stmm4:
+ case fpu_stmm5:
+ case fpu_stmm6:
+ case fpu_stmm7:
+ value.SetBytes(fpu.stmm[reg - fpu_stmm0].bytes, reg_info->byte_size,
+ endian::InlHostByteOrder());
+ break;
+
+ case fpu_xmm0:
+ case fpu_xmm1:
+ case fpu_xmm2:
+ case fpu_xmm3:
+ case fpu_xmm4:
+ case fpu_xmm5:
+ case fpu_xmm6:
+ case fpu_xmm7:
+ case fpu_xmm8:
+ case fpu_xmm9:
+ case fpu_xmm10:
+ case fpu_xmm11:
+ case fpu_xmm12:
+ case fpu_xmm13:
+ case fpu_xmm14:
+ case fpu_xmm15:
+ value.SetBytes(fpu.xmm[reg - fpu_xmm0].bytes, reg_info->byte_size,
+ endian::InlHostByteOrder());
+ break;
+
+ case exc_trapno:
+ value = exc.trapno;
+ break;
+
+ case exc_err:
+ value = exc.err;
+ break;
+
+ case exc_faultvaddr:
+ value = exc.faultvaddr;
+ break;
- default:
- return false;
- }
- return true;
+ default:
+ return false;
+ }
+ return true;
}
+bool RegisterContextDarwin_x86_64::WriteRegister(const RegisterInfo *reg_info,
+ const RegisterValue &value) {
+ const uint32_t reg = reg_info->kinds[eRegisterKindLLDB];
+ int set = RegisterContextDarwin_x86_64::GetSetForNativeRegNum(reg);
-bool
-RegisterContextDarwin_x86_64::WriteRegister (const RegisterInfo *reg_info,
- const RegisterValue &value)
-{
- const uint32_t reg = reg_info->kinds[eRegisterKindLLDB];
- int set = RegisterContextDarwin_x86_64::GetSetForNativeRegNum (reg);
+ if (set == -1)
+ return false;
- if (set == -1)
- return false;
+ if (ReadRegisterSet(set, false) != 0)
+ return false;
- if (ReadRegisterSet(set, false) != 0)
- return false;
+ switch (reg) {
+ case gpr_rax:
+ case gpr_rbx:
+ case gpr_rcx:
+ case gpr_rdx:
+ case gpr_rdi:
+ case gpr_rsi:
+ case gpr_rbp:
+ case gpr_rsp:
+ case gpr_r8:
+ case gpr_r9:
+ case gpr_r10:
+ case gpr_r11:
+ case gpr_r12:
+ case gpr_r13:
+ case gpr_r14:
+ case gpr_r15:
+ case gpr_rip:
+ case gpr_rflags:
+ case gpr_cs:
+ case gpr_fs:
+ case gpr_gs:
+ (&gpr.rax)[reg - gpr_rax] = value.GetAsUInt64();
+ break;
+
+ case fpu_fcw:
+ fpu.fcw = value.GetAsUInt16();
+ break;
+
+ case fpu_fsw:
+ fpu.fsw = value.GetAsUInt16();
+ break;
+
+ case fpu_ftw:
+ fpu.ftw = value.GetAsUInt8();
+ break;
+
+ case fpu_fop:
+ fpu.fop = value.GetAsUInt16();
+ break;
+
+ case fpu_ip:
+ fpu.ip = value.GetAsUInt32();
+ break;
+
+ case fpu_cs:
+ fpu.cs = value.GetAsUInt16();
+ break;
+
+ case fpu_dp:
+ fpu.dp = value.GetAsUInt32();
+ break;
+
+ case fpu_ds:
+ fpu.ds = value.GetAsUInt16();
+ break;
+
+ case fpu_mxcsr:
+ fpu.mxcsr = value.GetAsUInt32();
+ break;
+
+ case fpu_mxcsrmask:
+ fpu.mxcsrmask = value.GetAsUInt32();
+ break;
+
+ case fpu_stmm0:
+ case fpu_stmm1:
+ case fpu_stmm2:
+ case fpu_stmm3:
+ case fpu_stmm4:
+ case fpu_stmm5:
+ case fpu_stmm6:
+ case fpu_stmm7:
+ ::memcpy(fpu.stmm[reg - fpu_stmm0].bytes, value.GetBytes(),
+ value.GetByteSize());
+ break;
+
+ case fpu_xmm0:
+ case fpu_xmm1:
+ case fpu_xmm2:
+ case fpu_xmm3:
+ case fpu_xmm4:
+ case fpu_xmm5:
+ case fpu_xmm6:
+ case fpu_xmm7:
+ case fpu_xmm8:
+ case fpu_xmm9:
+ case fpu_xmm10:
+ case fpu_xmm11:
+ case fpu_xmm12:
+ case fpu_xmm13:
+ case fpu_xmm14:
+ case fpu_xmm15:
+ ::memcpy(fpu.xmm[reg - fpu_xmm0].bytes, value.GetBytes(),
+ value.GetByteSize());
+ return false;
- switch (reg)
- {
- case gpr_rax:
- case gpr_rbx:
- case gpr_rcx:
- case gpr_rdx:
- case gpr_rdi:
- case gpr_rsi:
- case gpr_rbp:
- case gpr_rsp:
- case gpr_r8:
- case gpr_r9:
- case gpr_r10:
- case gpr_r11:
- case gpr_r12:
- case gpr_r13:
- case gpr_r14:
- case gpr_r15:
- case gpr_rip:
- case gpr_rflags:
- case gpr_cs:
- case gpr_fs:
- case gpr_gs:
- (&gpr.rax)[reg - gpr_rax] = value.GetAsUInt64();
- break;
-
- case fpu_fcw:
- fpu.fcw = value.GetAsUInt16();
- break;
-
- case fpu_fsw:
- fpu.fsw = value.GetAsUInt16();
- break;
-
- case fpu_ftw:
- fpu.ftw = value.GetAsUInt8();
- break;
-
- case fpu_fop:
- fpu.fop = value.GetAsUInt16();
- break;
-
- case fpu_ip:
- fpu.ip = value.GetAsUInt32();
- break;
-
- case fpu_cs:
- fpu.cs = value.GetAsUInt16();
- break;
-
- case fpu_dp:
- fpu.dp = value.GetAsUInt32();
- break;
-
- case fpu_ds:
- fpu.ds = value.GetAsUInt16();
- break;
-
- case fpu_mxcsr:
- fpu.mxcsr = value.GetAsUInt32();
- break;
-
- case fpu_mxcsrmask:
- fpu.mxcsrmask = value.GetAsUInt32();
- break;
-
- case fpu_stmm0:
- case fpu_stmm1:
- case fpu_stmm2:
- case fpu_stmm3:
- case fpu_stmm4:
- case fpu_stmm5:
- case fpu_stmm6:
- case fpu_stmm7:
- ::memcpy (fpu.stmm[reg - fpu_stmm0].bytes, value.GetBytes(), value.GetByteSize());
- break;
-
- case fpu_xmm0:
- case fpu_xmm1:
- case fpu_xmm2:
- case fpu_xmm3:
- case fpu_xmm4:
- case fpu_xmm5:
- case fpu_xmm6:
- case fpu_xmm7:
- case fpu_xmm8:
- case fpu_xmm9:
- case fpu_xmm10:
- case fpu_xmm11:
- case fpu_xmm12:
- case fpu_xmm13:
- case fpu_xmm14:
- case fpu_xmm15:
- ::memcpy (fpu.xmm[reg - fpu_xmm0].bytes, value.GetBytes(), value.GetByteSize());
- return false;
-
- case exc_trapno:
- exc.trapno = value.GetAsUInt32();
- break;
-
- case exc_err:
- exc.err = value.GetAsUInt32();
- break;
-
- case exc_faultvaddr:
- exc.faultvaddr = value.GetAsUInt64();
- break;
+ case exc_trapno:
+ exc.trapno = value.GetAsUInt32();
+ break;
+
+ case exc_err:
+ exc.err = value.GetAsUInt32();
+ break;
+
+ case exc_faultvaddr:
+ exc.faultvaddr = value.GetAsUInt64();
+ break;
- default:
- return false;
- }
- return WriteRegisterSet(set) == 0;
+ default:
+ return false;
+ }
+ return WriteRegisterSet(set) == 0;
}
-bool
-RegisterContextDarwin_x86_64::ReadAllRegisterValues (lldb::DataBufferSP &data_sp)
-{
- data_sp.reset (new DataBufferHeap (REG_CONTEXT_SIZE, 0));
- if (data_sp &&
- ReadGPR (false) == 0 &&
- ReadFPU (false) == 0 &&
- ReadEXC (false) == 0)
- {
- uint8_t *dst = data_sp->GetBytes();
- ::memcpy (dst, &gpr, sizeof(gpr));
- dst += sizeof(gpr);
-
- ::memcpy (dst, &fpu, sizeof(fpu));
- dst += sizeof(gpr);
+bool RegisterContextDarwin_x86_64::ReadAllRegisterValues(
+ lldb::DataBufferSP &data_sp) {
+ data_sp.reset(new DataBufferHeap(REG_CONTEXT_SIZE, 0));
+ if (data_sp && ReadGPR(false) == 0 && ReadFPU(false) == 0 &&
+ ReadEXC(false) == 0) {
+ uint8_t *dst = data_sp->GetBytes();
+ ::memcpy(dst, &gpr, sizeof(gpr));
+ dst += sizeof(gpr);
- ::memcpy (dst, &exc, sizeof(exc));
- return true;
- }
- return false;
-}
+ ::memcpy(dst, &fpu, sizeof(fpu));
+ dst += sizeof(gpr);
-bool
-RegisterContextDarwin_x86_64::WriteAllRegisterValues (const lldb::DataBufferSP &data_sp)
-{
- if (data_sp && data_sp->GetByteSize() == REG_CONTEXT_SIZE)
- {
- const uint8_t *src = data_sp->GetBytes();
- ::memcpy (&gpr, src, sizeof(gpr));
- src += sizeof(gpr);
-
- ::memcpy (&fpu, src, sizeof(fpu));
- src += sizeof(gpr);
-
- ::memcpy (&exc, src, sizeof(exc));
- uint32_t success_count = 0;
- if (WriteGPR() == 0)
- ++success_count;
- if (WriteFPU() == 0)
- ++success_count;
- if (WriteEXC() == 0)
- ++success_count;
- return success_count == 3;
- }
- return false;
+ ::memcpy(dst, &exc, sizeof(exc));
+ return true;
+ }
+ return false;
}
-
-uint32_t
-RegisterContextDarwin_x86_64::ConvertRegisterKindToRegisterNumber (lldb::RegisterKind kind, uint32_t reg)
-{
- if (kind == eRegisterKindGeneric)
- {
- switch (reg)
- {
- case LLDB_REGNUM_GENERIC_PC: return gpr_rip;
- case LLDB_REGNUM_GENERIC_SP: return gpr_rsp;
- case LLDB_REGNUM_GENERIC_FP: return gpr_rbp;
- case LLDB_REGNUM_GENERIC_FLAGS: return gpr_rflags;
- case LLDB_REGNUM_GENERIC_RA:
- default:
- break;
- }
- }
- else if (kind == eRegisterKindEHFrame || kind == eRegisterKindDWARF)
- {
- switch (reg)
- {
- case ehframe_dwarf_gpr_rax: return gpr_rax;
- case ehframe_dwarf_gpr_rdx: return gpr_rdx;
- case ehframe_dwarf_gpr_rcx: return gpr_rcx;
- case ehframe_dwarf_gpr_rbx: return gpr_rbx;
- case ehframe_dwarf_gpr_rsi: return gpr_rsi;
- case ehframe_dwarf_gpr_rdi: return gpr_rdi;
- case ehframe_dwarf_gpr_rbp: return gpr_rbp;
- case ehframe_dwarf_gpr_rsp: return gpr_rsp;
- case ehframe_dwarf_gpr_r8: return gpr_r8;
- case ehframe_dwarf_gpr_r9: return gpr_r9;
- case ehframe_dwarf_gpr_r10: return gpr_r10;
- case ehframe_dwarf_gpr_r11: return gpr_r11;
- case ehframe_dwarf_gpr_r12: return gpr_r12;
- case ehframe_dwarf_gpr_r13: return gpr_r13;
- case ehframe_dwarf_gpr_r14: return gpr_r14;
- case ehframe_dwarf_gpr_r15: return gpr_r15;
- case ehframe_dwarf_gpr_rip: return gpr_rip;
- case ehframe_dwarf_fpu_xmm0: return fpu_xmm0;
- case ehframe_dwarf_fpu_xmm1: return fpu_xmm1;
- case ehframe_dwarf_fpu_xmm2: return fpu_xmm2;
- case ehframe_dwarf_fpu_xmm3: return fpu_xmm3;
- case ehframe_dwarf_fpu_xmm4: return fpu_xmm4;
- case ehframe_dwarf_fpu_xmm5: return fpu_xmm5;
- case ehframe_dwarf_fpu_xmm6: return fpu_xmm6;
- case ehframe_dwarf_fpu_xmm7: return fpu_xmm7;
- case ehframe_dwarf_fpu_xmm8: return fpu_xmm8;
- case ehframe_dwarf_fpu_xmm9: return fpu_xmm9;
- case ehframe_dwarf_fpu_xmm10: return fpu_xmm10;
- case ehframe_dwarf_fpu_xmm11: return fpu_xmm11;
- case ehframe_dwarf_fpu_xmm12: return fpu_xmm12;
- case ehframe_dwarf_fpu_xmm13: return fpu_xmm13;
- case ehframe_dwarf_fpu_xmm14: return fpu_xmm14;
- case ehframe_dwarf_fpu_xmm15: return fpu_xmm15;
- case ehframe_dwarf_fpu_stmm0: return fpu_stmm0;
- case ehframe_dwarf_fpu_stmm1: return fpu_stmm1;
- case ehframe_dwarf_fpu_stmm2: return fpu_stmm2;
- case ehframe_dwarf_fpu_stmm3: return fpu_stmm3;
- case ehframe_dwarf_fpu_stmm4: return fpu_stmm4;
- case ehframe_dwarf_fpu_stmm5: return fpu_stmm5;
- case ehframe_dwarf_fpu_stmm6: return fpu_stmm6;
- case ehframe_dwarf_fpu_stmm7: return fpu_stmm7;
- default:
- break;
- }
+bool RegisterContextDarwin_x86_64::WriteAllRegisterValues(
+ const lldb::DataBufferSP &data_sp) {
+ if (data_sp && data_sp->GetByteSize() == REG_CONTEXT_SIZE) {
+ const uint8_t *src = data_sp->GetBytes();
+ ::memcpy(&gpr, src, sizeof(gpr));
+ src += sizeof(gpr);
+
+ ::memcpy(&fpu, src, sizeof(fpu));
+ src += sizeof(gpr);
+
+ ::memcpy(&exc, src, sizeof(exc));
+ uint32_t success_count = 0;
+ if (WriteGPR() == 0)
+ ++success_count;
+ if (WriteFPU() == 0)
+ ++success_count;
+ if (WriteEXC() == 0)
+ ++success_count;
+ return success_count == 3;
+ }
+ return false;
+}
+
+uint32_t RegisterContextDarwin_x86_64::ConvertRegisterKindToRegisterNumber(
+ lldb::RegisterKind kind, uint32_t reg) {
+ if (kind == eRegisterKindGeneric) {
+ switch (reg) {
+ case LLDB_REGNUM_GENERIC_PC:
+ return gpr_rip;
+ case LLDB_REGNUM_GENERIC_SP:
+ return gpr_rsp;
+ case LLDB_REGNUM_GENERIC_FP:
+ return gpr_rbp;
+ case LLDB_REGNUM_GENERIC_FLAGS:
+ return gpr_rflags;
+ case LLDB_REGNUM_GENERIC_RA:
+ default:
+ break;
}
- else if (kind == eRegisterKindLLDB)
- {
- return reg;
+ } else if (kind == eRegisterKindEHFrame || kind == eRegisterKindDWARF) {
+ switch (reg) {
+ case ehframe_dwarf_gpr_rax:
+ return gpr_rax;
+ case ehframe_dwarf_gpr_rdx:
+ return gpr_rdx;
+ case ehframe_dwarf_gpr_rcx:
+ return gpr_rcx;
+ case ehframe_dwarf_gpr_rbx:
+ return gpr_rbx;
+ case ehframe_dwarf_gpr_rsi:
+ return gpr_rsi;
+ case ehframe_dwarf_gpr_rdi:
+ return gpr_rdi;
+ case ehframe_dwarf_gpr_rbp:
+ return gpr_rbp;
+ case ehframe_dwarf_gpr_rsp:
+ return gpr_rsp;
+ case ehframe_dwarf_gpr_r8:
+ return gpr_r8;
+ case ehframe_dwarf_gpr_r9:
+ return gpr_r9;
+ case ehframe_dwarf_gpr_r10:
+ return gpr_r10;
+ case ehframe_dwarf_gpr_r11:
+ return gpr_r11;
+ case ehframe_dwarf_gpr_r12:
+ return gpr_r12;
+ case ehframe_dwarf_gpr_r13:
+ return gpr_r13;
+ case ehframe_dwarf_gpr_r14:
+ return gpr_r14;
+ case ehframe_dwarf_gpr_r15:
+ return gpr_r15;
+ case ehframe_dwarf_gpr_rip:
+ return gpr_rip;
+ case ehframe_dwarf_fpu_xmm0:
+ return fpu_xmm0;
+ case ehframe_dwarf_fpu_xmm1:
+ return fpu_xmm1;
+ case ehframe_dwarf_fpu_xmm2:
+ return fpu_xmm2;
+ case ehframe_dwarf_fpu_xmm3:
+ return fpu_xmm3;
+ case ehframe_dwarf_fpu_xmm4:
+ return fpu_xmm4;
+ case ehframe_dwarf_fpu_xmm5:
+ return fpu_xmm5;
+ case ehframe_dwarf_fpu_xmm6:
+ return fpu_xmm6;
+ case ehframe_dwarf_fpu_xmm7:
+ return fpu_xmm7;
+ case ehframe_dwarf_fpu_xmm8:
+ return fpu_xmm8;
+ case ehframe_dwarf_fpu_xmm9:
+ return fpu_xmm9;
+ case ehframe_dwarf_fpu_xmm10:
+ return fpu_xmm10;
+ case ehframe_dwarf_fpu_xmm11:
+ return fpu_xmm11;
+ case ehframe_dwarf_fpu_xmm12:
+ return fpu_xmm12;
+ case ehframe_dwarf_fpu_xmm13:
+ return fpu_xmm13;
+ case ehframe_dwarf_fpu_xmm14:
+ return fpu_xmm14;
+ case ehframe_dwarf_fpu_xmm15:
+ return fpu_xmm15;
+ case ehframe_dwarf_fpu_stmm0:
+ return fpu_stmm0;
+ case ehframe_dwarf_fpu_stmm1:
+ return fpu_stmm1;
+ case ehframe_dwarf_fpu_stmm2:
+ return fpu_stmm2;
+ case ehframe_dwarf_fpu_stmm3:
+ return fpu_stmm3;
+ case ehframe_dwarf_fpu_stmm4:
+ return fpu_stmm4;
+ case ehframe_dwarf_fpu_stmm5:
+ return fpu_stmm5;
+ case ehframe_dwarf_fpu_stmm6:
+ return fpu_stmm6;
+ case ehframe_dwarf_fpu_stmm7:
+ return fpu_stmm7;
+ default:
+ break;
}
- return LLDB_INVALID_REGNUM;
+ } else if (kind == eRegisterKindLLDB) {
+ return reg;
+ }
+ return LLDB_INVALID_REGNUM;
}
-bool
-RegisterContextDarwin_x86_64::HardwareSingleStep (bool enable)
-{
- if (ReadGPR(true) != 0)
- return false;
+bool RegisterContextDarwin_x86_64::HardwareSingleStep(bool enable) {
+ if (ReadGPR(true) != 0)
+ return false;
- const uint64_t trace_bit = 0x100ull;
- if (enable)
- {
+ const uint64_t trace_bit = 0x100ull;
+ if (enable) {
- if (gpr.rflags & trace_bit)
- return true; // trace bit is already set, there is nothing to do
- else
- gpr.rflags |= trace_bit;
- }
+ if (gpr.rflags & trace_bit)
+ return true; // trace bit is already set, there is nothing to do
else
- {
- if (gpr.rflags & trace_bit)
- gpr.rflags &= ~trace_bit;
- else
- return true; // trace bit is clear, there is nothing to do
- }
+ gpr.rflags |= trace_bit;
+ } else {
+ if (gpr.rflags & trace_bit)
+ gpr.rflags &= ~trace_bit;
+ else
+ return true; // trace bit is clear, there is nothing to do
+ }
- return WriteGPR() == 0;
+ return WriteGPR() == 0;
}
-
Modified: lldb/trunk/source/Plugins/Process/Utility/RegisterContextDarwin_x86_64.h
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/source/Plugins/Process/Utility/RegisterContextDarwin_x86_64.h?rev=280751&r1=280750&r2=280751&view=diff
==============================================================================
--- lldb/trunk/source/Plugins/Process/Utility/RegisterContextDarwin_x86_64.h (original)
+++ lldb/trunk/source/Plugins/Process/Utility/RegisterContextDarwin_x86_64.h Tue Sep 6 15:57:50 2016
@@ -14,261 +14,205 @@
// C++ Includes
// Other libraries and framework includes
// Project includes
-#include "lldb/lldb-private.h"
#include "lldb/Target/RegisterContext.h"
+#include "lldb/lldb-private.h"
-class RegisterContextDarwin_x86_64 : public lldb_private::RegisterContext
-{
+class RegisterContextDarwin_x86_64 : public lldb_private::RegisterContext {
public:
- RegisterContextDarwin_x86_64 (lldb_private::Thread &thread,
- uint32_t concrete_frame_idx);
+ RegisterContextDarwin_x86_64(lldb_private::Thread &thread,
+ uint32_t concrete_frame_idx);
- ~RegisterContextDarwin_x86_64() override;
+ ~RegisterContextDarwin_x86_64() override;
- void
- InvalidateAllRegisters() override;
+ void InvalidateAllRegisters() override;
- size_t
- GetRegisterCount() override;
-
- const lldb_private::RegisterInfo *
- GetRegisterInfoAtIndex(size_t reg) override;
-
- size_t
- GetRegisterSetCount() override;
-
- const lldb_private::RegisterSet *
- GetRegisterSet(size_t set) override;
-
- bool
- ReadRegister(const lldb_private::RegisterInfo *reg_info,
- lldb_private::RegisterValue &value) override;
-
- bool
- WriteRegister(const lldb_private::RegisterInfo *reg_info,
- const lldb_private::RegisterValue &value) override;
-
- bool
- ReadAllRegisterValues(lldb::DataBufferSP &data_sp) override;
-
- bool
- WriteAllRegisterValues(const lldb::DataBufferSP &data_sp) override;
-
- uint32_t
- ConvertRegisterKindToRegisterNumber(lldb::RegisterKind kind, uint32_t num) override;
-
- bool
- HardwareSingleStep(bool enable) override;
-
- struct GPR
- {
- uint64_t rax;
- uint64_t rbx;
- uint64_t rcx;
- uint64_t rdx;
- uint64_t rdi;
- uint64_t rsi;
- uint64_t rbp;
- uint64_t rsp;
- uint64_t r8;
- uint64_t r9;
- uint64_t r10;
- uint64_t r11;
- uint64_t r12;
- uint64_t r13;
- uint64_t r14;
- uint64_t r15;
- uint64_t rip;
- uint64_t rflags;
- uint64_t cs;
- uint64_t fs;
- uint64_t gs;
- };
-
- struct MMSReg
- {
- uint8_t bytes[10];
- uint8_t pad[6];
- };
-
- struct XMMReg
- {
- uint8_t bytes[16];
- };
-
- struct FPU
- {
- uint32_t pad[2];
- uint16_t fcw; // "fctrl"
- uint16_t fsw; // "fstat"
- uint8_t ftw; // "ftag"
- uint8_t pad1;
- uint16_t fop; // "fop"
- uint32_t ip; // "fioff"
- uint16_t cs; // "fiseg"
- uint16_t pad2;
- uint32_t dp; // "fooff"
- uint16_t ds; // "foseg"
- uint16_t pad3;
- uint32_t mxcsr;
- uint32_t mxcsrmask;
- MMSReg stmm[8];
- XMMReg xmm[16];
- uint8_t pad4[6*16];
- int pad5;
- };
-
- struct EXC
- {
- uint32_t trapno;
- uint32_t err;
- uint64_t faultvaddr;
- };
+ size_t GetRegisterCount() override;
+
+ const lldb_private::RegisterInfo *GetRegisterInfoAtIndex(size_t reg) override;
+
+ size_t GetRegisterSetCount() override;
+
+ const lldb_private::RegisterSet *GetRegisterSet(size_t set) override;
+
+ bool ReadRegister(const lldb_private::RegisterInfo *reg_info,
+ lldb_private::RegisterValue &value) override;
+
+ bool WriteRegister(const lldb_private::RegisterInfo *reg_info,
+ const lldb_private::RegisterValue &value) override;
+
+ bool ReadAllRegisterValues(lldb::DataBufferSP &data_sp) override;
+
+ bool WriteAllRegisterValues(const lldb::DataBufferSP &data_sp) override;
+
+ uint32_t ConvertRegisterKindToRegisterNumber(lldb::RegisterKind kind,
+ uint32_t num) override;
+
+ bool HardwareSingleStep(bool enable) override;
+
+ struct GPR {
+ uint64_t rax;
+ uint64_t rbx;
+ uint64_t rcx;
+ uint64_t rdx;
+ uint64_t rdi;
+ uint64_t rsi;
+ uint64_t rbp;
+ uint64_t rsp;
+ uint64_t r8;
+ uint64_t r9;
+ uint64_t r10;
+ uint64_t r11;
+ uint64_t r12;
+ uint64_t r13;
+ uint64_t r14;
+ uint64_t r15;
+ uint64_t rip;
+ uint64_t rflags;
+ uint64_t cs;
+ uint64_t fs;
+ uint64_t gs;
+ };
+
+ struct MMSReg {
+ uint8_t bytes[10];
+ uint8_t pad[6];
+ };
+
+ struct XMMReg {
+ uint8_t bytes[16];
+ };
+
+ struct FPU {
+ uint32_t pad[2];
+ uint16_t fcw; // "fctrl"
+ uint16_t fsw; // "fstat"
+ uint8_t ftw; // "ftag"
+ uint8_t pad1;
+ uint16_t fop; // "fop"
+ uint32_t ip; // "fioff"
+ uint16_t cs; // "fiseg"
+ uint16_t pad2;
+ uint32_t dp; // "fooff"
+ uint16_t ds; // "foseg"
+ uint16_t pad3;
+ uint32_t mxcsr;
+ uint32_t mxcsrmask;
+ MMSReg stmm[8];
+ XMMReg xmm[16];
+ uint8_t pad4[6 * 16];
+ int pad5;
+ };
+
+ struct EXC {
+ uint32_t trapno;
+ uint32_t err;
+ uint64_t faultvaddr;
+ };
protected:
+ enum { GPRRegSet = 4, FPURegSet = 5, EXCRegSet = 6 };
- enum
- {
- GPRRegSet = 4,
- FPURegSet = 5,
- EXCRegSet = 6
- };
-
- enum
- {
- GPRWordCount = sizeof(GPR)/sizeof(uint32_t),
- FPUWordCount = sizeof(FPU)/sizeof(uint32_t),
- EXCWordCount = sizeof(EXC)/sizeof(uint32_t)
- };
-
- enum
- {
- Read = 0,
- Write = 1,
- kNumErrors = 2
- };
-
- GPR gpr;
- FPU fpu;
- EXC exc;
- int gpr_errs[2]; // Read/Write errors
- int fpu_errs[2]; // Read/Write errors
- int exc_errs[2]; // Read/Write errors
-
- void
- InvalidateAllRegisterStates()
- {
- SetError (GPRRegSet, Read, -1);
- SetError (FPURegSet, Read, -1);
- SetError (EXCRegSet, Read, -1);
+ enum {
+ GPRWordCount = sizeof(GPR) / sizeof(uint32_t),
+ FPUWordCount = sizeof(FPU) / sizeof(uint32_t),
+ EXCWordCount = sizeof(EXC) / sizeof(uint32_t)
+ };
+
+ enum { Read = 0, Write = 1, kNumErrors = 2 };
+
+ GPR gpr;
+ FPU fpu;
+ EXC exc;
+ int gpr_errs[2]; // Read/Write errors
+ int fpu_errs[2]; // Read/Write errors
+ int exc_errs[2]; // Read/Write errors
+
+ void InvalidateAllRegisterStates() {
+ SetError(GPRRegSet, Read, -1);
+ SetError(FPURegSet, Read, -1);
+ SetError(EXCRegSet, Read, -1);
+ }
+
+ int GetError(int flavor, uint32_t err_idx) const {
+ if (err_idx < kNumErrors) {
+ switch (flavor) {
+ // When getting all errors, just OR all values together to see if
+ // we got any kind of error.
+ case GPRRegSet:
+ return gpr_errs[err_idx];
+ case FPURegSet:
+ return fpu_errs[err_idx];
+ case EXCRegSet:
+ return exc_errs[err_idx];
+ default:
+ break;
+ }
}
+ return -1;
+ }
- int
- GetError (int flavor, uint32_t err_idx) const
- {
- if (err_idx < kNumErrors)
- {
- switch (flavor)
- {
- // When getting all errors, just OR all values together to see if
- // we got any kind of error.
- case GPRRegSet: return gpr_errs[err_idx];
- case FPURegSet: return fpu_errs[err_idx];
- case EXCRegSet: return exc_errs[err_idx];
- default: break;
- }
- }
- return -1;
+ bool SetError(int flavor, uint32_t err_idx, int err) {
+ if (err_idx < kNumErrors) {
+ switch (flavor) {
+ case GPRRegSet:
+ gpr_errs[err_idx] = err;
+ return true;
+
+ case FPURegSet:
+ fpu_errs[err_idx] = err;
+ return true;
+
+ case EXCRegSet:
+ exc_errs[err_idx] = err;
+ return true;
+
+ default:
+ break;
+ }
}
+ return false;
+ }
- bool
- SetError (int flavor, uint32_t err_idx, int err)
- {
- if (err_idx < kNumErrors)
- {
- switch (flavor)
- {
- case GPRRegSet:
- gpr_errs[err_idx] = err;
- return true;
-
- case FPURegSet:
- fpu_errs[err_idx] = err;
- return true;
-
- case EXCRegSet:
- exc_errs[err_idx] = err;
- return true;
-
- default: break;
- }
- }
- return false;
- }
+ bool RegisterSetIsCached(int set) const { return GetError(set, Read) == 0; }
- bool
- RegisterSetIsCached (int set) const
- {
- return GetError(set, Read) == 0;
- }
+ void LogGPR(lldb_private::Log *log, const char *format, ...);
+
+ int ReadGPR(bool force);
+
+ int ReadFPU(bool force);
+
+ int ReadEXC(bool force);
+
+ int WriteGPR();
+
+ int WriteFPU();
+
+ int WriteEXC();
+
+ // Subclasses override these to do the actual reading.
+ virtual int DoReadGPR(lldb::tid_t tid, int flavor, GPR &gpr) = 0;
+
+ virtual int DoReadFPU(lldb::tid_t tid, int flavor, FPU &fpu) = 0;
+
+ virtual int DoReadEXC(lldb::tid_t tid, int flavor, EXC &exc) = 0;
+
+ virtual int DoWriteGPR(lldb::tid_t tid, int flavor, const GPR &gpr) = 0;
+
+ virtual int DoWriteFPU(lldb::tid_t tid, int flavor, const FPU &fpu) = 0;
- void
- LogGPR (lldb_private::Log *log, const char *format, ...);
+ virtual int DoWriteEXC(lldb::tid_t tid, int flavor, const EXC &exc) = 0;
- int
- ReadGPR (bool force);
+ int ReadRegisterSet(uint32_t set, bool force);
- int
- ReadFPU (bool force);
+ int WriteRegisterSet(uint32_t set);
- int
- ReadEXC (bool force);
-
- int
- WriteGPR ();
-
- int
- WriteFPU ();
-
- int
- WriteEXC ();
-
- // Subclasses override these to do the actual reading.
- virtual int
- DoReadGPR (lldb::tid_t tid, int flavor, GPR &gpr) = 0;
-
- virtual int
- DoReadFPU (lldb::tid_t tid, int flavor, FPU &fpu) = 0;
-
- virtual int
- DoReadEXC (lldb::tid_t tid, int flavor, EXC &exc) = 0;
-
- virtual int
- DoWriteGPR (lldb::tid_t tid, int flavor, const GPR &gpr) = 0;
-
- virtual int
- DoWriteFPU (lldb::tid_t tid, int flavor, const FPU &fpu) = 0;
-
- virtual int
- DoWriteEXC (lldb::tid_t tid, int flavor, const EXC &exc) = 0;
-
- int
- ReadRegisterSet (uint32_t set, bool force);
-
- int
- WriteRegisterSet (uint32_t set);
-
- static uint32_t
- GetRegisterNumber (uint32_t reg_kind, uint32_t reg_num);
+ static uint32_t GetRegisterNumber(uint32_t reg_kind, uint32_t reg_num);
- static int
- GetSetForNativeRegNum (int reg_num);
+ static int GetSetForNativeRegNum(int reg_num);
- static size_t
- GetRegisterInfosCount ();
+ static size_t GetRegisterInfosCount();
- static const lldb_private::RegisterInfo *
- GetRegisterInfos ();
+ static const lldb_private::RegisterInfo *GetRegisterInfos();
};
#endif // liblldb_RegisterContextDarwin_x86_64_h_
Modified: lldb/trunk/source/Plugins/Process/Utility/RegisterContextDummy.cpp
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/source/Plugins/Process/Utility/RegisterContextDummy.cpp?rev=280751&r1=280750&r2=280751&view=diff
==============================================================================
--- lldb/trunk/source/Plugins/Process/Utility/RegisterContextDummy.cpp (original)
+++ lldb/trunk/source/Plugins/Process/Utility/RegisterContextDummy.cpp Tue Sep 6 15:57:50 2016
@@ -1,4 +1,5 @@
-//===-- RegisterContextDummy.cpp ---------------------------------*- C++ -*-===//
+//===-- RegisterContextDummy.cpp ---------------------------------*- C++
+//-*-===//
//
// The LLVM Compiler Infrastructure
//
@@ -7,8 +8,6 @@
//
//===----------------------------------------------------------------------===//
-
-#include "lldb/lldb-private.h"
#include "lldb/Core/Address.h"
#include "lldb/Core/AddressRange.h"
#include "lldb/Core/DataBufferHeap.h"
@@ -20,118 +19,103 @@
#include "lldb/Symbol/FuncUnwinders.h"
#include "lldb/Symbol/Function.h"
#include "lldb/Symbol/ObjectFile.h"
-#include "lldb/Symbol/SymbolContext.h"
#include "lldb/Symbol/Symbol.h"
+#include "lldb/Symbol/SymbolContext.h"
#include "lldb/Target/ABI.h"
+#include "lldb/Target/DynamicLoader.h"
#include "lldb/Target/ExecutionContext.h"
#include "lldb/Target/Process.h"
#include "lldb/Target/StackFrame.h"
#include "lldb/Target/Target.h"
#include "lldb/Target/Thread.h"
-#include "lldb/Target/DynamicLoader.h"
+#include "lldb/lldb-private.h"
#include "RegisterContextDummy.h"
using namespace lldb;
using namespace lldb_private;
-RegisterContextDummy::RegisterContextDummy (Thread &thread, uint32_t concrete_frame_idx, uint32_t address_byte_size) :
-RegisterContext (thread, concrete_frame_idx)
-{
- m_reg_set0.name = "General Purpose Registers";
- m_reg_set0.short_name = "GPR";
- m_reg_set0.num_registers = 1;
- m_reg_set0.registers = new uint32_t(0);
-
- m_pc_reg_info.name = "pc";
- m_pc_reg_info.alt_name = "pc";
- m_pc_reg_info.byte_offset = 0;
- m_pc_reg_info.byte_size = address_byte_size;
- m_pc_reg_info.encoding = eEncodingUint;
- m_pc_reg_info.format = eFormatPointer;
- m_pc_reg_info.invalidate_regs = NULL;
- m_pc_reg_info.value_regs = NULL;
- m_pc_reg_info.kinds[eRegisterKindEHFrame] = LLDB_INVALID_REGNUM;
- m_pc_reg_info.kinds[eRegisterKindDWARF] = LLDB_INVALID_REGNUM;
- m_pc_reg_info.kinds[eRegisterKindGeneric] = LLDB_REGNUM_GENERIC_PC;
- m_pc_reg_info.kinds[eRegisterKindProcessPlugin] = LLDB_INVALID_REGNUM;
- m_pc_reg_info.kinds[eRegisterKindLLDB] = LLDB_INVALID_REGNUM;
-}
-
-RegisterContextDummy::~RegisterContextDummy ()
-{
- delete m_reg_set0.registers;
- delete m_pc_reg_info.invalidate_regs;
- delete m_pc_reg_info.value_regs;
-}
-
-void
-RegisterContextDummy::InvalidateAllRegisters () {}
-
-size_t
-RegisterContextDummy::GetRegisterCount ()
-{
- return 1;
+RegisterContextDummy::RegisterContextDummy(Thread &thread,
+ uint32_t concrete_frame_idx,
+ uint32_t address_byte_size)
+ : RegisterContext(thread, concrete_frame_idx) {
+ m_reg_set0.name = "General Purpose Registers";
+ m_reg_set0.short_name = "GPR";
+ m_reg_set0.num_registers = 1;
+ m_reg_set0.registers = new uint32_t(0);
+
+ m_pc_reg_info.name = "pc";
+ m_pc_reg_info.alt_name = "pc";
+ m_pc_reg_info.byte_offset = 0;
+ m_pc_reg_info.byte_size = address_byte_size;
+ m_pc_reg_info.encoding = eEncodingUint;
+ m_pc_reg_info.format = eFormatPointer;
+ m_pc_reg_info.invalidate_regs = NULL;
+ m_pc_reg_info.value_regs = NULL;
+ m_pc_reg_info.kinds[eRegisterKindEHFrame] = LLDB_INVALID_REGNUM;
+ m_pc_reg_info.kinds[eRegisterKindDWARF] = LLDB_INVALID_REGNUM;
+ m_pc_reg_info.kinds[eRegisterKindGeneric] = LLDB_REGNUM_GENERIC_PC;
+ m_pc_reg_info.kinds[eRegisterKindProcessPlugin] = LLDB_INVALID_REGNUM;
+ m_pc_reg_info.kinds[eRegisterKindLLDB] = LLDB_INVALID_REGNUM;
+}
+
+RegisterContextDummy::~RegisterContextDummy() {
+ delete m_reg_set0.registers;
+ delete m_pc_reg_info.invalidate_regs;
+ delete m_pc_reg_info.value_regs;
}
+void RegisterContextDummy::InvalidateAllRegisters() {}
+
+size_t RegisterContextDummy::GetRegisterCount() { return 1; }
+
const lldb_private::RegisterInfo *
-RegisterContextDummy::GetRegisterInfoAtIndex (size_t reg)
-{
- if (reg)
- return NULL;
- return &m_pc_reg_info;
+RegisterContextDummy::GetRegisterInfoAtIndex(size_t reg) {
+ if (reg)
+ return NULL;
+ return &m_pc_reg_info;
}
-size_t
-RegisterContextDummy::GetRegisterSetCount ()
-{
- return 1;
-}
+size_t RegisterContextDummy::GetRegisterSetCount() { return 1; }
const lldb_private::RegisterSet *
-RegisterContextDummy::GetRegisterSet (size_t reg_set)
-{
- if (reg_set)
- return NULL;
- return &m_reg_set0;
-}
-
-bool
-RegisterContextDummy::ReadRegister (const lldb_private::RegisterInfo *reg_info, lldb_private::RegisterValue &value)
-{
- if (!reg_info)
- return false;
- uint32_t reg_number = reg_info->kinds[eRegisterKindGeneric];
- if (reg_number == LLDB_REGNUM_GENERIC_PC)
- {
- value.SetUInt(LLDB_INVALID_ADDRESS, reg_info->byte_size);
- return true;
- }
- return false;
+RegisterContextDummy::GetRegisterSet(size_t reg_set) {
+ if (reg_set)
+ return NULL;
+ return &m_reg_set0;
}
-bool
-RegisterContextDummy::WriteRegister (const lldb_private::RegisterInfo *reg_info, const lldb_private::RegisterValue &value)
-{
+bool RegisterContextDummy::ReadRegister(
+ const lldb_private::RegisterInfo *reg_info,
+ lldb_private::RegisterValue &value) {
+ if (!reg_info)
return false;
+ uint32_t reg_number = reg_info->kinds[eRegisterKindGeneric];
+ if (reg_number == LLDB_REGNUM_GENERIC_PC) {
+ value.SetUInt(LLDB_INVALID_ADDRESS, reg_info->byte_size);
+ return true;
+ }
+ return false;
}
-bool
-RegisterContextDummy::ReadAllRegisterValues (lldb::DataBufferSP &data_sp)
-{
- return false;
+bool RegisterContextDummy::WriteRegister(
+ const lldb_private::RegisterInfo *reg_info,
+ const lldb_private::RegisterValue &value) {
+ return false;
}
-bool
-RegisterContextDummy::WriteAllRegisterValues (const lldb::DataBufferSP &data_sp)
-{
- return false;
+bool RegisterContextDummy::ReadAllRegisterValues(lldb::DataBufferSP &data_sp) {
+ return false;
+}
+
+bool RegisterContextDummy::WriteAllRegisterValues(
+ const lldb::DataBufferSP &data_sp) {
+ return false;
}
-uint32_t
-RegisterContextDummy::ConvertRegisterKindToRegisterNumber (lldb::RegisterKind kind, uint32_t num)
-{
- if (kind == eRegisterKindGeneric && num == LLDB_REGNUM_GENERIC_PC)
- return 0;
- return LLDB_INVALID_REGNUM;
+uint32_t RegisterContextDummy::ConvertRegisterKindToRegisterNumber(
+ lldb::RegisterKind kind, uint32_t num) {
+ if (kind == eRegisterKindGeneric && num == LLDB_REGNUM_GENERIC_PC)
+ return 0;
+ return LLDB_INVALID_REGNUM;
}
Modified: lldb/trunk/source/Plugins/Process/Utility/RegisterContextDummy.h
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/source/Plugins/Process/Utility/RegisterContextDummy.h?rev=280751&r1=280750&r2=280751&view=diff
==============================================================================
--- lldb/trunk/source/Plugins/Process/Utility/RegisterContextDummy.h (original)
+++ lldb/trunk/source/Plugins/Process/Utility/RegisterContextDummy.h Tue Sep 6 15:57:50 2016
@@ -1,4 +1,5 @@
-//===-- RegisterContextDummy.h ----------------------------------------*- C++ -*-===//
+//===-- RegisterContextDummy.h ----------------------------------------*- C++
+//-*-===//
//
// The LLVM Compiler Infrastructure
//
@@ -16,62 +17,53 @@
// Other libraries and framework includes
// Project includes
-#include "lldb/lldb-private.h"
-#include "lldb/Target/RegisterContext.h"
#include "lldb/Symbol/SymbolContext.h"
+#include "lldb/Target/RegisterContext.h"
+#include "lldb/lldb-private.h"
namespace lldb_private {
-
-class RegisterContextDummy : public lldb_private::RegisterContext
-{
+
+class RegisterContextDummy : public lldb_private::RegisterContext {
public:
- typedef std::shared_ptr<RegisterContextDummy> SharedPtr;
-
- RegisterContextDummy (Thread &thread, uint32_t concrete_frame_idx, uint32_t address_byte_size);
-
- ~RegisterContextDummy() override;
+ typedef std::shared_ptr<RegisterContextDummy> SharedPtr;
- void
- InvalidateAllRegisters() override;
+ RegisterContextDummy(Thread &thread, uint32_t concrete_frame_idx,
+ uint32_t address_byte_size);
- size_t
- GetRegisterCount() override;
+ ~RegisterContextDummy() override;
- const lldb_private::RegisterInfo *
- GetRegisterInfoAtIndex(size_t reg) override;
+ void InvalidateAllRegisters() override;
- size_t
- GetRegisterSetCount() override;
+ size_t GetRegisterCount() override;
- const lldb_private::RegisterSet *
- GetRegisterSet(size_t reg_set) override;
+ const lldb_private::RegisterInfo *GetRegisterInfoAtIndex(size_t reg) override;
- bool
- ReadRegister(const lldb_private::RegisterInfo *reg_info,
- lldb_private::RegisterValue &value) override;
+ size_t GetRegisterSetCount() override;
- bool
- WriteRegister(const lldb_private::RegisterInfo *reg_info,
- const lldb_private::RegisterValue &value) override;
+ const lldb_private::RegisterSet *GetRegisterSet(size_t reg_set) override;
- bool
- ReadAllRegisterValues(lldb::DataBufferSP &data_sp) override;
+ bool ReadRegister(const lldb_private::RegisterInfo *reg_info,
+ lldb_private::RegisterValue &value) override;
- bool
- WriteAllRegisterValues(const lldb::DataBufferSP &data_sp) override;
+ bool WriteRegister(const lldb_private::RegisterInfo *reg_info,
+ const lldb_private::RegisterValue &value) override;
+
+ bool ReadAllRegisterValues(lldb::DataBufferSP &data_sp) override;
+
+ bool WriteAllRegisterValues(const lldb::DataBufferSP &data_sp) override;
+
+ uint32_t ConvertRegisterKindToRegisterNumber(lldb::RegisterKind kind,
+ uint32_t num) override;
- uint32_t
- ConvertRegisterKindToRegisterNumber(lldb::RegisterKind kind, uint32_t num) override;
-
private:
- //------------------------------------------------------------------
- // For RegisterContextLLDB only
- //------------------------------------------------------------------
-
- lldb_private::RegisterSet m_reg_set0; // register set 0 (PC only)
- lldb_private::RegisterInfo m_pc_reg_info;
-
- DISALLOW_COPY_AND_ASSIGN (RegisterContextDummy);
+ //------------------------------------------------------------------
+ // For RegisterContextLLDB only
+ //------------------------------------------------------------------
+
+ lldb_private::RegisterSet m_reg_set0; // register set 0 (PC only)
+ lldb_private::RegisterInfo m_pc_reg_info;
+
+ DISALLOW_COPY_AND_ASSIGN(RegisterContextDummy);
};
} // namespace lldb_private
Modified: lldb/trunk/source/Plugins/Process/Utility/RegisterContextFreeBSD_arm.cpp
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/source/Plugins/Process/Utility/RegisterContextFreeBSD_arm.cpp?rev=280751&r1=280750&r2=280751&view=diff
==============================================================================
--- lldb/trunk/source/Plugins/Process/Utility/RegisterContextFreeBSD_arm.cpp (original)
+++ lldb/trunk/source/Plugins/Process/Utility/RegisterContextFreeBSD_arm.cpp Tue Sep 6 15:57:50 2016
@@ -7,12 +7,12 @@
//
//===---------------------------------------------------------------------===//
+#include <cassert>
#include <stddef.h>
#include <vector>
-#include <cassert>
-#include "llvm/Support/Compiler.h"
#include "lldb/lldb-defines.h"
+#include "llvm/Support/Compiler.h"
#include "RegisterContextFreeBSD_arm.h"
@@ -21,14 +21,31 @@ using namespace lldb_private;
// Based on RegisterContextLinux_arm.cpp and
// http://svnweb.freebsd.org/base/head/sys/arm/include/reg.h
-#define GPR_OFFSET(idx) ((idx) * 4)
-#define FPU_OFFSET(idx) ((idx) * 4 + sizeof (RegisterContextFreeBSD_arm::GPR))
-#define FPSCR_OFFSET (LLVM_EXTENSION offsetof (RegisterContextFreeBSD_arm::FPU, fpscr) + sizeof (RegisterContextFreeBSD_arm::GPR))
-#define EXC_OFFSET(idx) ((idx) * 4 + sizeof (RegisterContextFreeBSD_arm::GPR) + sizeof (RegisterContextFreeBSD_arm::FPU))
-#define DBG_OFFSET(reg) ((LLVM_EXTENSION offsetof (RegisterContextFreeBSD_arm::DBG, reg) + sizeof (RegisterContextFreeBSD_arm::GPR) + sizeof (RegisterContextFreeBSD_arm::FPU) + sizeof (RegisterContextFreeBSD_arm::EXC)))
-
-#define DEFINE_DBG(reg, i) #reg, NULL, sizeof(((RegisterContextFreeBSD_arm::DBG *)NULL)->reg[i]), DBG_OFFSET(reg[i]), eEncodingUint, eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, dbg_##reg##i }, NULL, NULL, NULL, 0
-#define REG_CONTEXT_SIZE (sizeof (RegisterContextFreeBSD_arm::GPR) + sizeof (RegisterContextFreeBSD_arm::FPU) + sizeof (RegisterContextFreeBSD_arm::EXC))
+#define GPR_OFFSET(idx) ((idx)*4)
+#define FPU_OFFSET(idx) ((idx)*4 + sizeof(RegisterContextFreeBSD_arm::GPR))
+#define FPSCR_OFFSET \
+ (LLVM_EXTENSION offsetof(RegisterContextFreeBSD_arm::FPU, fpscr) + \
+ sizeof(RegisterContextFreeBSD_arm::GPR))
+#define EXC_OFFSET(idx) \
+ ((idx)*4 + sizeof(RegisterContextFreeBSD_arm::GPR) + \
+ sizeof(RegisterContextFreeBSD_arm::FPU))
+#define DBG_OFFSET(reg) \
+ ((LLVM_EXTENSION offsetof(RegisterContextFreeBSD_arm::DBG, reg) + \
+ sizeof(RegisterContextFreeBSD_arm::GPR) + \
+ sizeof(RegisterContextFreeBSD_arm::FPU) + \
+ sizeof(RegisterContextFreeBSD_arm::EXC)))
+
+#define DEFINE_DBG(reg, i) \
+ #reg, NULL, sizeof(((RegisterContextFreeBSD_arm::DBG *) NULL)->reg[i]), \
+ DBG_OFFSET(reg[i]), eEncodingUint, eFormatHex, \
+ {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \
+ LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \
+ dbg_##reg##i }, \
+ NULL, NULL, NULL, 0
+#define REG_CONTEXT_SIZE \
+ (sizeof(RegisterContextFreeBSD_arm::GPR) + \
+ sizeof(RegisterContextFreeBSD_arm::FPU) + \
+ sizeof(RegisterContextFreeBSD_arm::EXC))
//-----------------------------------------------------------------------------
// Include RegisterInfos_arm to declare our g_register_infos_arm structure.
@@ -38,52 +55,43 @@ using namespace lldb_private;
#undef DECLARE_REGISTER_INFOS_ARM_STRUCT
static const lldb_private::RegisterInfo *
-GetRegisterInfoPtr (const lldb_private::ArchSpec &target_arch)
-{
- switch (target_arch.GetMachine())
- {
- case llvm::Triple::arm:
- return g_register_infos_arm;
- default:
- assert(false && "Unhandled target architecture.");
- return NULL;
- }
+GetRegisterInfoPtr(const lldb_private::ArchSpec &target_arch) {
+ switch (target_arch.GetMachine()) {
+ case llvm::Triple::arm:
+ return g_register_infos_arm;
+ default:
+ assert(false && "Unhandled target architecture.");
+ return NULL;
+ }
}
static uint32_t
-GetRegisterInfoCount(const lldb_private::ArchSpec &target_arch)
-{
- switch (target_arch.GetMachine())
- {
- case llvm::Triple::arm:
- return static_cast<uint32_t>(sizeof(g_register_infos_arm) / sizeof(g_register_infos_arm[0]));
- default:
- assert(false && "Unhandled target architecture.");
- return 0;
- }
-}
-
-RegisterContextFreeBSD_arm::RegisterContextFreeBSD_arm(const lldb_private::ArchSpec &target_arch) :
- lldb_private::RegisterInfoInterface(target_arch),
- m_register_info_p(GetRegisterInfoPtr(target_arch)),
- m_register_info_count(GetRegisterInfoCount(target_arch))
-{
-}
+GetRegisterInfoCount(const lldb_private::ArchSpec &target_arch) {
+ switch (target_arch.GetMachine()) {
+ case llvm::Triple::arm:
+ return static_cast<uint32_t>(sizeof(g_register_infos_arm) /
+ sizeof(g_register_infos_arm[0]));
+ default:
+ assert(false && "Unhandled target architecture.");
+ return 0;
+ }
+}
+
+RegisterContextFreeBSD_arm::RegisterContextFreeBSD_arm(
+ const lldb_private::ArchSpec &target_arch)
+ : lldb_private::RegisterInfoInterface(target_arch),
+ m_register_info_p(GetRegisterInfoPtr(target_arch)),
+ m_register_info_count(GetRegisterInfoCount(target_arch)) {}
-size_t
-RegisterContextFreeBSD_arm::GetGPRSize() const
-{
- return sizeof(struct RegisterContextFreeBSD_arm::GPR);
+size_t RegisterContextFreeBSD_arm::GetGPRSize() const {
+ return sizeof(struct RegisterContextFreeBSD_arm::GPR);
}
const lldb_private::RegisterInfo *
-RegisterContextFreeBSD_arm::GetRegisterInfo() const
-{
- return m_register_info_p;
+RegisterContextFreeBSD_arm::GetRegisterInfo() const {
+ return m_register_info_p;
}
-uint32_t
-RegisterContextFreeBSD_arm::GetRegisterCount() const
-{
- return m_register_info_count;
+uint32_t RegisterContextFreeBSD_arm::GetRegisterCount() const {
+ return m_register_info_count;
}
Modified: lldb/trunk/source/Plugins/Process/Utility/RegisterContextFreeBSD_arm.h
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/source/Plugins/Process/Utility/RegisterContextFreeBSD_arm.h?rev=280751&r1=280750&r2=280751&view=diff
==============================================================================
--- lldb/trunk/source/Plugins/Process/Utility/RegisterContextFreeBSD_arm.h (original)
+++ lldb/trunk/source/Plugins/Process/Utility/RegisterContextFreeBSD_arm.h Tue Sep 6 15:57:50 2016
@@ -10,65 +10,53 @@
#ifndef liblldb_RegisterContextFreeBSD_arm_h_
#define liblldb_RegisterContextFreeBSD_arm_h_
-#include "lldb/lldb-private.h"
-#include "lldb/Target/RegisterContext.h"
#include "RegisterInfoInterface.h"
+#include "lldb/Target/RegisterContext.h"
+#include "lldb/lldb-private.h"
-class RegisterContextFreeBSD_arm
- : public lldb_private::RegisterInfoInterface
-{
+class RegisterContextFreeBSD_arm : public lldb_private::RegisterInfoInterface {
public:
+ struct GPR {
+ uint32_t r[16]; // R0-R15
+ uint32_t cpsr; // CPSR
+ };
+
+ struct QReg {
+ uint8_t bytes[16];
+ };
+
+ struct FPU {
+ union {
+ uint32_t s[32];
+ uint64_t d[32];
+ QReg q[16]; // the 128-bit NEON registers
+ } floats;
+ uint32_t fpscr;
+ };
+ struct EXC {
+ uint32_t exception;
+ uint32_t fsr; /* Fault status */
+ uint32_t far; /* Virtual Fault Address */
+ };
+
+ struct DBG {
+ uint32_t bvr[16];
+ uint32_t bcr[16];
+ uint32_t wvr[16];
+ uint32_t wcr[16];
+ };
- struct GPR
- {
- uint32_t r[16]; // R0-R15
- uint32_t cpsr; // CPSR
- };
-
-
- struct QReg
- {
- uint8_t bytes[16];
- };
-
- struct FPU
- {
- union {
- uint32_t s[32];
- uint64_t d[32];
- QReg q[16]; // the 128-bit NEON registers
- } floats;
- uint32_t fpscr;
- };
- struct EXC
- {
- uint32_t exception;
- uint32_t fsr; /* Fault status */
- uint32_t far; /* Virtual Fault Address */
- };
-
- struct DBG
- {
- uint32_t bvr[16];
- uint32_t bcr[16];
- uint32_t wvr[16];
- uint32_t wcr[16];
- };
-
- RegisterContextFreeBSD_arm(const lldb_private::ArchSpec &target_arch);
+ RegisterContextFreeBSD_arm(const lldb_private::ArchSpec &target_arch);
- size_t
- GetGPRSize() const override;
+ size_t GetGPRSize() const override;
- const lldb_private::RegisterInfo *
- GetRegisterInfo() const override;
+ const lldb_private::RegisterInfo *GetRegisterInfo() const override;
- uint32_t
- GetRegisterCount () const override;
+ uint32_t GetRegisterCount() const override;
private:
- const lldb_private::RegisterInfo *m_register_info_p;
- uint32_t m_register_info_count;
+ const lldb_private::RegisterInfo *m_register_info_p;
+ uint32_t m_register_info_count;
};
-#endif // liblldb_RegisterContextFreeBSD_arm_h_
+#endif // liblldb_RegisterContextFreeBSD_arm_h_
Modified: lldb/trunk/source/Plugins/Process/Utility/RegisterContextFreeBSD_arm64.cpp
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/source/Plugins/Process/Utility/RegisterContextFreeBSD_arm64.cpp?rev=280751&r1=280750&r2=280751&view=diff
==============================================================================
--- lldb/trunk/source/Plugins/Process/Utility/RegisterContextFreeBSD_arm64.cpp (original)
+++ lldb/trunk/source/Plugins/Process/Utility/RegisterContextFreeBSD_arm64.cpp Tue Sep 6 15:57:50 2016
@@ -7,24 +7,43 @@
//
//===---------------------------------------------------------------------===//
-#include <vector>
-#include "RegisterContextPOSIX_arm64.h"
#include "RegisterContextFreeBSD_arm64.h"
+#include "RegisterContextPOSIX_arm64.h"
+#include <vector>
using namespace lldb;
// Based on RegisterContextDarwin_arm64.cpp
-#define GPR_OFFSET(idx) ((idx) * 8)
-#define GPR_OFFSET_NAME(reg) (LLVM_EXTENSION offsetof (RegisterContextFreeBSD_arm64::GPR, reg))
-
-#define FPU_OFFSET(idx) ((idx) * 16 + sizeof (RegisterContextFreeBSD_arm64::GPR))
-#define FPU_OFFSET_NAME(reg) (LLVM_EXTENSION offsetof (RegisterContextFreeBSD_arm64::FPU, reg))
-
-#define EXC_OFFSET_NAME(reg) (LLVM_EXTENSION offsetof (RegisterContextFreeBSD_arm64::EXC, reg) + sizeof (RegisterContextFreeBSD_arm64::GPR) + sizeof (RegisterContextFreeBSD_arm64::FPU))
-#define DBG_OFFSET_NAME(reg) (LLVM_EXTENSION offsetof (RegisterContextFreeBSD_arm64::DBG, reg) + sizeof (RegisterContextFreeBSD_arm64::GPR) + sizeof (RegisterContextFreeBSD_arm64::FPU) + sizeof (RegisterContextFreeBSD_arm64::EXC))
-
-#define DEFINE_DBG(reg, i) #reg, NULL, sizeof(((RegisterContextFreeBSD_arm64::DBG *)NULL)->reg[i]), DBG_OFFSET_NAME(reg[i]), lldb::eEncodingUint, lldb::eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, dbg_##reg##i }, NULL, NULL, NULL, 0
-#define REG_CONTEXT_SIZE (sizeof (RegisterContextFreeBSD_arm64::GPR) + sizeof (RegisterContextFreeBSD_arm64::FPU) + sizeof (RegisterContextFreeBSD_arm64::EXC))
+#define GPR_OFFSET(idx) ((idx)*8)
+#define GPR_OFFSET_NAME(reg) \
+ (LLVM_EXTENSION offsetof(RegisterContextFreeBSD_arm64::GPR, reg))
+
+#define FPU_OFFSET(idx) ((idx)*16 + sizeof(RegisterContextFreeBSD_arm64::GPR))
+#define FPU_OFFSET_NAME(reg) \
+ (LLVM_EXTENSION offsetof(RegisterContextFreeBSD_arm64::FPU, reg))
+
+#define EXC_OFFSET_NAME(reg) \
+ (LLVM_EXTENSION offsetof(RegisterContextFreeBSD_arm64::EXC, reg) + \
+ sizeof(RegisterContextFreeBSD_arm64::GPR) + \
+ sizeof(RegisterContextFreeBSD_arm64::FPU))
+#define DBG_OFFSET_NAME(reg) \
+ (LLVM_EXTENSION offsetof(RegisterContextFreeBSD_arm64::DBG, reg) + \
+ sizeof(RegisterContextFreeBSD_arm64::GPR) + \
+ sizeof(RegisterContextFreeBSD_arm64::FPU) + \
+ sizeof(RegisterContextFreeBSD_arm64::EXC))
+
+#define DEFINE_DBG(reg, i) \
+ #reg, NULL, \
+ sizeof(((RegisterContextFreeBSD_arm64::DBG *) NULL)->reg[i]), \
+ DBG_OFFSET_NAME(reg[i]), lldb::eEncodingUint, lldb::eFormatHex, \
+ {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \
+ LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \
+ dbg_##reg##i }, \
+ NULL, NULL, NULL, 0
+#define REG_CONTEXT_SIZE \
+ (sizeof(RegisterContextFreeBSD_arm64::GPR) + \
+ sizeof(RegisterContextFreeBSD_arm64::FPU) + \
+ sizeof(RegisterContextFreeBSD_arm64::EXC))
//-----------------------------------------------------------------------------
// Include RegisterInfos_arm64 to declare our g_register_infos_arm64 structure.
@@ -34,53 +53,43 @@ using namespace lldb;
#undef DECLARE_REGISTER_INFOS_ARM64_STRUCT
static const lldb_private::RegisterInfo *
-GetRegisterInfoPtr(const lldb_private::ArchSpec &target_arch)
-{
- switch (target_arch.GetMachine())
- {
- case llvm::Triple::aarch64:
- return g_register_infos_arm64;
- default:
- assert(false && "Unhandled target architecture.");
- return nullptr;
- }
+GetRegisterInfoPtr(const lldb_private::ArchSpec &target_arch) {
+ switch (target_arch.GetMachine()) {
+ case llvm::Triple::aarch64:
+ return g_register_infos_arm64;
+ default:
+ assert(false && "Unhandled target architecture.");
+ return nullptr;
+ }
}
static uint32_t
-GetRegisterInfoCount(const lldb_private::ArchSpec &target_arch)
-{
- switch (target_arch.GetMachine())
- {
- case llvm::Triple::aarch64:
- return static_cast<uint32_t>(sizeof(g_register_infos_arm64) / sizeof(g_register_infos_arm64[0]));
- default:
- assert(false && "Unhandled target architecture.");
- return 0;
- }
-}
+GetRegisterInfoCount(const lldb_private::ArchSpec &target_arch) {
+ switch (target_arch.GetMachine()) {
+ case llvm::Triple::aarch64:
+ return static_cast<uint32_t>(sizeof(g_register_infos_arm64) /
+ sizeof(g_register_infos_arm64[0]));
+ default:
+ assert(false && "Unhandled target architecture.");
+ return 0;
+ }
+}
+
+RegisterContextFreeBSD_arm64::RegisterContextFreeBSD_arm64(
+ const lldb_private::ArchSpec &target_arch)
+ : RegisterInfoInterface(target_arch),
+ m_register_info_p(GetRegisterInfoPtr(target_arch)),
+ m_register_info_count(GetRegisterInfoCount(target_arch)) {}
-RegisterContextFreeBSD_arm64::RegisterContextFreeBSD_arm64(const lldb_private::ArchSpec &target_arch) :
- RegisterInfoInterface(target_arch),
- m_register_info_p(GetRegisterInfoPtr(target_arch)),
- m_register_info_count(GetRegisterInfoCount(target_arch))
-{
-}
-
-size_t
-RegisterContextFreeBSD_arm64::GetGPRSize() const
-{
- return sizeof(struct RegisterContextFreeBSD_arm64::GPR);
+size_t RegisterContextFreeBSD_arm64::GetGPRSize() const {
+ return sizeof(struct RegisterContextFreeBSD_arm64::GPR);
}
const lldb_private::RegisterInfo *
-RegisterContextFreeBSD_arm64::GetRegisterInfo() const
-{
- return m_register_info_p;
+RegisterContextFreeBSD_arm64::GetRegisterInfo() const {
+ return m_register_info_p;
}
-uint32_t
-RegisterContextFreeBSD_arm64::GetRegisterCount() const
-{
- return m_register_info_count;
+uint32_t RegisterContextFreeBSD_arm64::GetRegisterCount() const {
+ return m_register_info_count;
}
-
Modified: lldb/trunk/source/Plugins/Process/Utility/RegisterContextFreeBSD_arm64.h
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/source/Plugins/Process/Utility/RegisterContextFreeBSD_arm64.h?rev=280751&r1=280750&r2=280751&view=diff
==============================================================================
--- lldb/trunk/source/Plugins/Process/Utility/RegisterContextFreeBSD_arm64.h (original)
+++ lldb/trunk/source/Plugins/Process/Utility/RegisterContextFreeBSD_arm64.h Tue Sep 6 15:57:50 2016
@@ -12,67 +12,58 @@
#include "RegisterInfoInterface.h"
-class RegisterContextFreeBSD_arm64:
- public lldb_private::RegisterInfoInterface
-{
+class RegisterContextFreeBSD_arm64
+ : public lldb_private::RegisterInfoInterface {
public:
- // based on RegisterContextDarwin_arm64.h
- struct GPR
- {
- uint64_t x[29]; // x0-x28
- uint64_t fp; // x29
- uint64_t lr; // x30
- uint64_t sp; // x31
- uint64_t pc; // pc
- uint32_t cpsr; // cpsr
- };
-
- // based on RegisterContextDarwin_arm64.h
- struct VReg
- {
- uint8_t bytes[16];
- };
-
- // based on RegisterContextDarwin_arm64.h
- struct FPU
- {
- VReg v[32];
- uint32_t fpsr;
- uint32_t fpcr;
- };
-
- // based on RegisterContextDarwin_arm64.h
- struct EXC
- {
- uint64_t far; // Virtual Fault Address
- uint32_t esr; // Exception syndrome
- uint32_t exception; // number of arm exception token
- };
-
- // based on RegisterContextDarwin_arm64.h
- struct DBG
- {
- uint64_t bvr[16];
- uint64_t bcr[16];
- uint64_t wvr[16];
- uint64_t wcr[16];
- uint64_t mdscr_el1;
- };
-
- RegisterContextFreeBSD_arm64(const lldb_private::ArchSpec &target_arch);
+ // based on RegisterContextDarwin_arm64.h
+ struct GPR {
+ uint64_t x[29]; // x0-x28
+ uint64_t fp; // x29
+ uint64_t lr; // x30
+ uint64_t sp; // x31
+ uint64_t pc; // pc
+ uint32_t cpsr; // cpsr
+ };
+
+ // based on RegisterContextDarwin_arm64.h
+ struct VReg {
+ uint8_t bytes[16];
+ };
+
+ // based on RegisterContextDarwin_arm64.h
+ struct FPU {
+ VReg v[32];
+ uint32_t fpsr;
+ uint32_t fpcr;
+ };
+
+ // based on RegisterContextDarwin_arm64.h
+ struct EXC {
+ uint64_t far; // Virtual Fault Address
+ uint32_t esr; // Exception syndrome
+ uint32_t exception; // number of arm exception token
+ };
+
+ // based on RegisterContextDarwin_arm64.h
+ struct DBG {
+ uint64_t bvr[16];
+ uint64_t bcr[16];
+ uint64_t wvr[16];
+ uint64_t wcr[16];
+ uint64_t mdscr_el1;
+ };
- size_t
- GetGPRSize() const override;
+ RegisterContextFreeBSD_arm64(const lldb_private::ArchSpec &target_arch);
- const lldb_private::RegisterInfo *
- GetRegisterInfo() const override;
+ size_t GetGPRSize() const override;
- uint32_t
- GetRegisterCount () const override;
+ const lldb_private::RegisterInfo *GetRegisterInfo() const override;
+
+ uint32_t GetRegisterCount() const override;
private:
- const lldb_private::RegisterInfo *m_register_info_p;
- uint32_t m_register_info_count;
+ const lldb_private::RegisterInfo *m_register_info_p;
+ uint32_t m_register_info_count;
};
#endif
Modified: lldb/trunk/source/Plugins/Process/Utility/RegisterContextFreeBSD_i386.cpp
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/source/Plugins/Process/Utility/RegisterContextFreeBSD_i386.cpp?rev=280751&r1=280750&r2=280751&view=diff
==============================================================================
--- lldb/trunk/source/Plugins/Process/Utility/RegisterContextFreeBSD_i386.cpp (original)
+++ lldb/trunk/source/Plugins/Process/Utility/RegisterContextFreeBSD_i386.cpp Tue Sep 6 15:57:50 2016
@@ -7,55 +7,52 @@
//
//===---------------------------------------------------------------------===//
-#include "RegisterContextPOSIX_x86.h"
#include "RegisterContextFreeBSD_i386.h"
+#include "RegisterContextPOSIX_x86.h"
using namespace lldb_private;
using namespace lldb;
// http://svnweb.freebsd.org/base/head/sys/x86/include/reg.h
-struct GPR
-{
- uint32_t fs;
- uint32_t es;
- uint32_t ds;
- uint32_t edi;
- uint32_t esi;
- uint32_t ebp;
- uint32_t isp;
- uint32_t ebx;
- uint32_t edx;
- uint32_t ecx;
- uint32_t eax;
- uint32_t trapno;
- uint32_t err;
- uint32_t eip;
- uint32_t cs;
- uint32_t eflags;
- uint32_t esp;
- uint32_t ss;
- uint32_t gs;
+struct GPR {
+ uint32_t fs;
+ uint32_t es;
+ uint32_t ds;
+ uint32_t edi;
+ uint32_t esi;
+ uint32_t ebp;
+ uint32_t isp;
+ uint32_t ebx;
+ uint32_t edx;
+ uint32_t ecx;
+ uint32_t eax;
+ uint32_t trapno;
+ uint32_t err;
+ uint32_t eip;
+ uint32_t cs;
+ uint32_t eflags;
+ uint32_t esp;
+ uint32_t ss;
+ uint32_t gs;
};
struct dbreg {
- uint32_t dr[8]; /* debug registers */
- /* Index 0-3: debug address registers */
- /* Index 4-5: reserved */
- /* Index 6: debug status */
- /* Index 7: debug control */
+ uint32_t dr[8]; /* debug registers */
+ /* Index 0-3: debug address registers */
+ /* Index 4-5: reserved */
+ /* Index 6: debug status */
+ /* Index 7: debug control */
};
using FPR_i386 = FXSAVE;
-struct UserArea
-{
- GPR gpr;
- FPR_i386 i387;
+struct UserArea {
+ GPR gpr;
+ FPR_i386 i387;
};
#define DR_SIZE sizeof(uint32_t)
-#define DR_OFFSET(reg_index) \
- (LLVM_EXTENSION offsetof(dbreg, dr[reg_index]))
+#define DR_OFFSET(reg_index) (LLVM_EXTENSION offsetof(dbreg, dr[reg_index]))
//---------------------------------------------------------------------------
// Include RegisterInfos_i386 to declare our g_register_infos_i386 structure.
@@ -64,32 +61,23 @@ struct UserArea
#include "RegisterInfos_i386.h"
#undef DECLARE_REGISTER_INFOS_I386_STRUCT
-RegisterContextFreeBSD_i386::RegisterContextFreeBSD_i386(const ArchSpec &target_arch) :
- RegisterInfoInterface(target_arch)
-{
-}
-
-size_t
-RegisterContextFreeBSD_i386::GetGPRSize() const
-{
- return sizeof(GPR);
-}
-
-const RegisterInfo *
-RegisterContextFreeBSD_i386::GetRegisterInfo() const
-{
- switch (m_target_arch.GetMachine())
- {
- case llvm::Triple::x86:
- return g_register_infos_i386;
- default:
- assert(false && "Unhandled target architecture.");
- return NULL;
- }
+RegisterContextFreeBSD_i386::RegisterContextFreeBSD_i386(
+ const ArchSpec &target_arch)
+ : RegisterInfoInterface(target_arch) {}
+
+size_t RegisterContextFreeBSD_i386::GetGPRSize() const { return sizeof(GPR); }
+
+const RegisterInfo *RegisterContextFreeBSD_i386::GetRegisterInfo() const {
+ switch (m_target_arch.GetMachine()) {
+ case llvm::Triple::x86:
+ return g_register_infos_i386;
+ default:
+ assert(false && "Unhandled target architecture.");
+ return NULL;
+ }
}
-uint32_t
-RegisterContextFreeBSD_i386::GetRegisterCount () const
-{
- return static_cast<uint32_t> (sizeof (g_register_infos_i386) / sizeof (g_register_infos_i386 [0]));
+uint32_t RegisterContextFreeBSD_i386::GetRegisterCount() const {
+ return static_cast<uint32_t>(sizeof(g_register_infos_i386) /
+ sizeof(g_register_infos_i386[0]));
}
Modified: lldb/trunk/source/Plugins/Process/Utility/RegisterContextFreeBSD_i386.h
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/source/Plugins/Process/Utility/RegisterContextFreeBSD_i386.h?rev=280751&r1=280750&r2=280751&view=diff
==============================================================================
--- lldb/trunk/source/Plugins/Process/Utility/RegisterContextFreeBSD_i386.h (original)
+++ lldb/trunk/source/Plugins/Process/Utility/RegisterContextFreeBSD_i386.h Tue Sep 6 15:57:50 2016
@@ -12,20 +12,15 @@
#include "RegisterInfoInterface.h"
-class RegisterContextFreeBSD_i386
- : public lldb_private::RegisterInfoInterface
-{
+class RegisterContextFreeBSD_i386 : public lldb_private::RegisterInfoInterface {
public:
- RegisterContextFreeBSD_i386(const lldb_private::ArchSpec &target_arch);
+ RegisterContextFreeBSD_i386(const lldb_private::ArchSpec &target_arch);
- size_t
- GetGPRSize() const override;
+ size_t GetGPRSize() const override;
- const lldb_private::RegisterInfo *
- GetRegisterInfo() const override;
+ const lldb_private::RegisterInfo *GetRegisterInfo() const override;
- uint32_t
- GetRegisterCount () const override;
+ uint32_t GetRegisterCount() const override;
};
#endif
Modified: lldb/trunk/source/Plugins/Process/Utility/RegisterContextFreeBSD_mips64.cpp
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/source/Plugins/Process/Utility/RegisterContextFreeBSD_mips64.cpp?rev=280751&r1=280750&r2=280751&view=diff
==============================================================================
--- lldb/trunk/source/Plugins/Process/Utility/RegisterContextFreeBSD_mips64.cpp (original)
+++ lldb/trunk/source/Plugins/Process/Utility/RegisterContextFreeBSD_mips64.cpp Tue Sep 6 15:57:50 2016
@@ -7,87 +7,79 @@
//
//===---------------------------------------------------------------------===//
-#include <vector>
-#include "RegisterContextPOSIX_mips64.h"
#include "RegisterContextFreeBSD_mips64.h"
+#include "RegisterContextPOSIX_mips64.h"
+#include <vector>
using namespace lldb_private;
using namespace lldb;
// http://svnweb.freebsd.org/base/head/sys/mips/include/regnum.h
-typedef struct _GPR
-{
- uint64_t zero;
- uint64_t r1;
- uint64_t r2;
- uint64_t r3;
- uint64_t r4;
- uint64_t r5;
- uint64_t r6;
- uint64_t r7;
- uint64_t r8;
- uint64_t r9;
- uint64_t r10;
- uint64_t r11;
- uint64_t r12;
- uint64_t r13;
- uint64_t r14;
- uint64_t r15;
- uint64_t r16;
- uint64_t r17;
- uint64_t r18;
- uint64_t r19;
- uint64_t r20;
- uint64_t r21;
- uint64_t r22;
- uint64_t r23;
- uint64_t r24;
- uint64_t r25;
- uint64_t r26;
- uint64_t r27;
- uint64_t gp;
- uint64_t sp;
- uint64_t r30;
- uint64_t ra;
- uint64_t sr;
- uint64_t mullo;
- uint64_t mulhi;
- uint64_t badvaddr;
- uint64_t cause;
- uint64_t pc;
- uint64_t ic;
- uint64_t dummy;
+typedef struct _GPR {
+ uint64_t zero;
+ uint64_t r1;
+ uint64_t r2;
+ uint64_t r3;
+ uint64_t r4;
+ uint64_t r5;
+ uint64_t r6;
+ uint64_t r7;
+ uint64_t r8;
+ uint64_t r9;
+ uint64_t r10;
+ uint64_t r11;
+ uint64_t r12;
+ uint64_t r13;
+ uint64_t r14;
+ uint64_t r15;
+ uint64_t r16;
+ uint64_t r17;
+ uint64_t r18;
+ uint64_t r19;
+ uint64_t r20;
+ uint64_t r21;
+ uint64_t r22;
+ uint64_t r23;
+ uint64_t r24;
+ uint64_t r25;
+ uint64_t r26;
+ uint64_t r27;
+ uint64_t gp;
+ uint64_t sp;
+ uint64_t r30;
+ uint64_t ra;
+ uint64_t sr;
+ uint64_t mullo;
+ uint64_t mulhi;
+ uint64_t badvaddr;
+ uint64_t cause;
+ uint64_t pc;
+ uint64_t ic;
+ uint64_t dummy;
} GPR_freebsd_mips;
//---------------------------------------------------------------------------
-// Include RegisterInfos_mips64 to declare our g_register_infos_mips64 structure.
+// Include RegisterInfos_mips64 to declare our g_register_infos_mips64
+// structure.
//---------------------------------------------------------------------------
#define DECLARE_REGISTER_INFOS_MIPS64_STRUCT
#include "RegisterInfos_mips64.h"
#undef DECLARE_REGISTER_INFOS_MIPS64_STRUCT
-RegisterContextFreeBSD_mips64::RegisterContextFreeBSD_mips64(const ArchSpec &target_arch) :
- RegisterInfoInterface(target_arch)
-{
-}
+RegisterContextFreeBSD_mips64::RegisterContextFreeBSD_mips64(
+ const ArchSpec &target_arch)
+ : RegisterInfoInterface(target_arch) {}
-size_t
-RegisterContextFreeBSD_mips64::GetGPRSize() const
-{
- return sizeof(GPR_freebsd_mips);
+size_t RegisterContextFreeBSD_mips64::GetGPRSize() const {
+ return sizeof(GPR_freebsd_mips);
}
-const RegisterInfo *
-RegisterContextFreeBSD_mips64::GetRegisterInfo() const
-{
- assert (m_target_arch.GetCore() == ArchSpec::eCore_mips64);
- return g_register_infos_mips64;
+const RegisterInfo *RegisterContextFreeBSD_mips64::GetRegisterInfo() const {
+ assert(m_target_arch.GetCore() == ArchSpec::eCore_mips64);
+ return g_register_infos_mips64;
}
-uint32_t
-RegisterContextFreeBSD_mips64::GetRegisterCount () const
-{
- return static_cast<uint32_t> (sizeof (g_register_infos_mips64) / sizeof (g_register_infos_mips64 [0]));
+uint32_t RegisterContextFreeBSD_mips64::GetRegisterCount() const {
+ return static_cast<uint32_t>(sizeof(g_register_infos_mips64) /
+ sizeof(g_register_infos_mips64[0]));
}
-
-
Modified: lldb/trunk/source/Plugins/Process/Utility/RegisterContextFreeBSD_mips64.h
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/source/Plugins/Process/Utility/RegisterContextFreeBSD_mips64.h?rev=280751&r1=280750&r2=280751&view=diff
==============================================================================
--- lldb/trunk/source/Plugins/Process/Utility/RegisterContextFreeBSD_mips64.h (original)
+++ lldb/trunk/source/Plugins/Process/Utility/RegisterContextFreeBSD_mips64.h Tue Sep 6 15:57:50 2016
@@ -12,20 +12,16 @@
#include "RegisterInfoInterface.h"
-class RegisterContextFreeBSD_mips64:
- public lldb_private::RegisterInfoInterface
-{
+class RegisterContextFreeBSD_mips64
+ : public lldb_private::RegisterInfoInterface {
public:
- RegisterContextFreeBSD_mips64(const lldb_private::ArchSpec &target_arch);
+ RegisterContextFreeBSD_mips64(const lldb_private::ArchSpec &target_arch);
- size_t
- GetGPRSize() const override;
+ size_t GetGPRSize() const override;
- const lldb_private::RegisterInfo *
- GetRegisterInfo() const override;
+ const lldb_private::RegisterInfo *GetRegisterInfo() const override;
- uint32_t
- GetRegisterCount () const override;
+ uint32_t GetRegisterCount() const override;
};
#endif
Modified: lldb/trunk/source/Plugins/Process/Utility/RegisterContextFreeBSD_powerpc.cpp
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/source/Plugins/Process/Utility/RegisterContextFreeBSD_powerpc.cpp?rev=280751&r1=280750&r2=280751&view=diff
==============================================================================
--- lldb/trunk/source/Plugins/Process/Utility/RegisterContextFreeBSD_powerpc.cpp (original)
+++ lldb/trunk/source/Plugins/Process/Utility/RegisterContextFreeBSD_powerpc.cpp Tue Sep 6 15:57:50 2016
@@ -7,263 +7,233 @@
//
//===---------------------------------------------------------------------===//
-#include <vector>
-#include "RegisterContextPOSIX_powerpc.h"
#include "RegisterContextFreeBSD_powerpc.h"
+#include "RegisterContextPOSIX_powerpc.h"
+#include <vector>
using namespace lldb_private;
using namespace lldb;
// http://svnweb.freebsd.org/base/head/sys/powerpc/include/reg.h
-typedef struct _GPR64
-{
- uint64_t r0;
- uint64_t r1;
- uint64_t r2;
- uint64_t r3;
- uint64_t r4;
- uint64_t r5;
- uint64_t r6;
- uint64_t r7;
- uint64_t r8;
- uint64_t r9;
- uint64_t r10;
- uint64_t r11;
- uint64_t r12;
- uint64_t r13;
- uint64_t r14;
- uint64_t r15;
- uint64_t r16;
- uint64_t r17;
- uint64_t r18;
- uint64_t r19;
- uint64_t r20;
- uint64_t r21;
- uint64_t r22;
- uint64_t r23;
- uint64_t r24;
- uint64_t r25;
- uint64_t r26;
- uint64_t r27;
- uint64_t r28;
- uint64_t r29;
- uint64_t r30;
- uint64_t r31;
- uint64_t lr;
- uint64_t cr;
- uint64_t xer;
- uint64_t ctr;
- uint64_t pc;
+typedef struct _GPR64 {
+ uint64_t r0;
+ uint64_t r1;
+ uint64_t r2;
+ uint64_t r3;
+ uint64_t r4;
+ uint64_t r5;
+ uint64_t r6;
+ uint64_t r7;
+ uint64_t r8;
+ uint64_t r9;
+ uint64_t r10;
+ uint64_t r11;
+ uint64_t r12;
+ uint64_t r13;
+ uint64_t r14;
+ uint64_t r15;
+ uint64_t r16;
+ uint64_t r17;
+ uint64_t r18;
+ uint64_t r19;
+ uint64_t r20;
+ uint64_t r21;
+ uint64_t r22;
+ uint64_t r23;
+ uint64_t r24;
+ uint64_t r25;
+ uint64_t r26;
+ uint64_t r27;
+ uint64_t r28;
+ uint64_t r29;
+ uint64_t r30;
+ uint64_t r31;
+ uint64_t lr;
+ uint64_t cr;
+ uint64_t xer;
+ uint64_t ctr;
+ uint64_t pc;
} GPR64;
-typedef struct _GPR32
-{
- uint32_t r0;
- uint32_t r1;
- uint32_t r2;
- uint32_t r3;
- uint32_t r4;
- uint32_t r5;
- uint32_t r6;
- uint32_t r7;
- uint32_t r8;
- uint32_t r9;
- uint32_t r10;
- uint32_t r11;
- uint32_t r12;
- uint32_t r13;
- uint32_t r14;
- uint32_t r15;
- uint32_t r16;
- uint32_t r17;
- uint32_t r18;
- uint32_t r19;
- uint32_t r20;
- uint32_t r21;
- uint32_t r22;
- uint32_t r23;
- uint32_t r24;
- uint32_t r25;
- uint32_t r26;
- uint32_t r27;
- uint32_t r28;
- uint32_t r29;
- uint32_t r30;
- uint32_t r31;
- uint32_t lr;
- uint32_t cr;
- uint32_t xer;
- uint32_t ctr;
- uint32_t pc;
+typedef struct _GPR32 {
+ uint32_t r0;
+ uint32_t r1;
+ uint32_t r2;
+ uint32_t r3;
+ uint32_t r4;
+ uint32_t r5;
+ uint32_t r6;
+ uint32_t r7;
+ uint32_t r8;
+ uint32_t r9;
+ uint32_t r10;
+ uint32_t r11;
+ uint32_t r12;
+ uint32_t r13;
+ uint32_t r14;
+ uint32_t r15;
+ uint32_t r16;
+ uint32_t r17;
+ uint32_t r18;
+ uint32_t r19;
+ uint32_t r20;
+ uint32_t r21;
+ uint32_t r22;
+ uint32_t r23;
+ uint32_t r24;
+ uint32_t r25;
+ uint32_t r26;
+ uint32_t r27;
+ uint32_t r28;
+ uint32_t r29;
+ uint32_t r30;
+ uint32_t r31;
+ uint32_t lr;
+ uint32_t cr;
+ uint32_t xer;
+ uint32_t ctr;
+ uint32_t pc;
} GPR32;
-typedef struct _FPR
-{
- uint64_t f0;
- uint64_t f1;
- uint64_t f2;
- uint64_t f3;
- uint64_t f4;
- uint64_t f5;
- uint64_t f6;
- uint64_t f7;
- uint64_t f8;
- uint64_t f9;
- uint64_t f10;
- uint64_t f11;
- uint64_t f12;
- uint64_t f13;
- uint64_t f14;
- uint64_t f15;
- uint64_t f16;
- uint64_t f17;
- uint64_t f18;
- uint64_t f19;
- uint64_t f20;
- uint64_t f21;
- uint64_t f22;
- uint64_t f23;
- uint64_t f24;
- uint64_t f25;
- uint64_t f26;
- uint64_t f27;
- uint64_t f28;
- uint64_t f29;
- uint64_t f30;
- uint64_t f31;
- uint64_t fpscr;
+typedef struct _FPR {
+ uint64_t f0;
+ uint64_t f1;
+ uint64_t f2;
+ uint64_t f3;
+ uint64_t f4;
+ uint64_t f5;
+ uint64_t f6;
+ uint64_t f7;
+ uint64_t f8;
+ uint64_t f9;
+ uint64_t f10;
+ uint64_t f11;
+ uint64_t f12;
+ uint64_t f13;
+ uint64_t f14;
+ uint64_t f15;
+ uint64_t f16;
+ uint64_t f17;
+ uint64_t f18;
+ uint64_t f19;
+ uint64_t f20;
+ uint64_t f21;
+ uint64_t f22;
+ uint64_t f23;
+ uint64_t f24;
+ uint64_t f25;
+ uint64_t f26;
+ uint64_t f27;
+ uint64_t f28;
+ uint64_t f29;
+ uint64_t f30;
+ uint64_t f31;
+ uint64_t fpscr;
} FPR;
-typedef struct _VMX
-{
- uint32_t v0[4];
- uint32_t v1[4];
- uint32_t v2[4];
- uint32_t v3[4];
- uint32_t v4[4];
- uint32_t v5[4];
- uint32_t v6[4];
- uint32_t v7[4];
- uint32_t v8[4];
- uint32_t v9[4];
- uint32_t v10[4];
- uint32_t v11[4];
- uint32_t v12[4];
- uint32_t v13[4];
- uint32_t v14[4];
- uint32_t v15[4];
- uint32_t v16[4];
- uint32_t v17[4];
- uint32_t v18[4];
- uint32_t v19[4];
- uint32_t v20[4];
- uint32_t v21[4];
- uint32_t v22[4];
- uint32_t v23[4];
- uint32_t v24[4];
- uint32_t v25[4];
- uint32_t v26[4];
- uint32_t v27[4];
- uint32_t v28[4];
- uint32_t v29[4];
- uint32_t v30[4];
- uint32_t v31[4];
- uint32_t pad[2];
- uint32_t vrsave;
- uint32_t vscr;
+typedef struct _VMX {
+ uint32_t v0[4];
+ uint32_t v1[4];
+ uint32_t v2[4];
+ uint32_t v3[4];
+ uint32_t v4[4];
+ uint32_t v5[4];
+ uint32_t v6[4];
+ uint32_t v7[4];
+ uint32_t v8[4];
+ uint32_t v9[4];
+ uint32_t v10[4];
+ uint32_t v11[4];
+ uint32_t v12[4];
+ uint32_t v13[4];
+ uint32_t v14[4];
+ uint32_t v15[4];
+ uint32_t v16[4];
+ uint32_t v17[4];
+ uint32_t v18[4];
+ uint32_t v19[4];
+ uint32_t v20[4];
+ uint32_t v21[4];
+ uint32_t v22[4];
+ uint32_t v23[4];
+ uint32_t v24[4];
+ uint32_t v25[4];
+ uint32_t v26[4];
+ uint32_t v27[4];
+ uint32_t v28[4];
+ uint32_t v29[4];
+ uint32_t v30[4];
+ uint32_t v31[4];
+ uint32_t pad[2];
+ uint32_t vrsave;
+ uint32_t vscr;
} VMX;
//---------------------------------------------------------------------------
-// Include RegisterInfos_powerpc to declare our g_register_infos_powerpc structure.
+// Include RegisterInfos_powerpc to declare our g_register_infos_powerpc
+// structure.
//---------------------------------------------------------------------------
#define DECLARE_REGISTER_INFOS_POWERPC_STRUCT
#include "RegisterInfos_powerpc.h"
#undef DECLARE_REGISTER_INFOS_POWERPC_STRUCT
-RegisterContextFreeBSD_powerpc::RegisterContextFreeBSD_powerpc(const ArchSpec &target_arch) :
- RegisterInfoInterface(target_arch)
-{
-}
+RegisterContextFreeBSD_powerpc::RegisterContextFreeBSD_powerpc(
+ const ArchSpec &target_arch)
+ : RegisterInfoInterface(target_arch) {}
-RegisterContextFreeBSD_powerpc::~RegisterContextFreeBSD_powerpc()
-{
-}
+RegisterContextFreeBSD_powerpc::~RegisterContextFreeBSD_powerpc() {}
-size_t
-RegisterContextFreeBSD_powerpc::GetGPRSize() const
-{
- // This is an 'abstract' base, so no GPR struct.
- return 0;
+size_t RegisterContextFreeBSD_powerpc::GetGPRSize() const {
+ // This is an 'abstract' base, so no GPR struct.
+ return 0;
}
-const RegisterInfo *
-RegisterContextFreeBSD_powerpc::GetRegisterInfo() const
-{
- //assert (m_target_arch.GetCore() == ArchSpec::eCore_powerpc);
- llvm_unreachable("Abstract class!");
- return NULL;
+const RegisterInfo *RegisterContextFreeBSD_powerpc::GetRegisterInfo() const {
+ // assert (m_target_arch.GetCore() == ArchSpec::eCore_powerpc);
+ llvm_unreachable("Abstract class!");
+ return NULL;
}
-uint32_t
-RegisterContextFreeBSD_powerpc::GetRegisterCount () const
-{
- return 0;
-}
+uint32_t RegisterContextFreeBSD_powerpc::GetRegisterCount() const { return 0; }
-RegisterContextFreeBSD_powerpc32::RegisterContextFreeBSD_powerpc32(const ArchSpec &target_arch) :
- RegisterContextFreeBSD_powerpc(target_arch)
-{
-}
+RegisterContextFreeBSD_powerpc32::RegisterContextFreeBSD_powerpc32(
+ const ArchSpec &target_arch)
+ : RegisterContextFreeBSD_powerpc(target_arch) {}
-RegisterContextFreeBSD_powerpc32::~RegisterContextFreeBSD_powerpc32()
-{
-}
+RegisterContextFreeBSD_powerpc32::~RegisterContextFreeBSD_powerpc32() {}
-size_t
-RegisterContextFreeBSD_powerpc32::GetGPRSize() const
-{
- return sizeof(GPR32);
+size_t RegisterContextFreeBSD_powerpc32::GetGPRSize() const {
+ return sizeof(GPR32);
}
-const RegisterInfo *
-RegisterContextFreeBSD_powerpc32::GetRegisterInfo() const
-{
- //assert (m_target_arch.GetCore() == ArchSpec::eCore_powerpc);
- return g_register_infos_powerpc32;
+const RegisterInfo *RegisterContextFreeBSD_powerpc32::GetRegisterInfo() const {
+ // assert (m_target_arch.GetCore() == ArchSpec::eCore_powerpc);
+ return g_register_infos_powerpc32;
}
-uint32_t
-RegisterContextFreeBSD_powerpc32::GetRegisterCount () const
-{
- return static_cast<uint32_t> (sizeof (g_register_infos_powerpc32) / sizeof (g_register_infos_powerpc32 [0]));
+uint32_t RegisterContextFreeBSD_powerpc32::GetRegisterCount() const {
+ return static_cast<uint32_t>(sizeof(g_register_infos_powerpc32) /
+ sizeof(g_register_infos_powerpc32[0]));
}
-RegisterContextFreeBSD_powerpc64::RegisterContextFreeBSD_powerpc64(const ArchSpec &target_arch) :
- RegisterContextFreeBSD_powerpc(target_arch)
-{
-}
+RegisterContextFreeBSD_powerpc64::RegisterContextFreeBSD_powerpc64(
+ const ArchSpec &target_arch)
+ : RegisterContextFreeBSD_powerpc(target_arch) {}
-RegisterContextFreeBSD_powerpc64::~RegisterContextFreeBSD_powerpc64()
-{
-}
+RegisterContextFreeBSD_powerpc64::~RegisterContextFreeBSD_powerpc64() {}
-size_t
-RegisterContextFreeBSD_powerpc64::GetGPRSize() const
-{
- return sizeof(GPR64);
+size_t RegisterContextFreeBSD_powerpc64::GetGPRSize() const {
+ return sizeof(GPR64);
}
-const RegisterInfo *
-RegisterContextFreeBSD_powerpc64::GetRegisterInfo() const
-{
- //assert (m_target_arch.GetCore() == ArchSpec::eCore_powerpc);
- if (m_target_arch.GetMachine() == llvm::Triple::ppc)
- return g_register_infos_powerpc64_32;
- return g_register_infos_powerpc64;
+const RegisterInfo *RegisterContextFreeBSD_powerpc64::GetRegisterInfo() const {
+ // assert (m_target_arch.GetCore() == ArchSpec::eCore_powerpc);
+ if (m_target_arch.GetMachine() == llvm::Triple::ppc)
+ return g_register_infos_powerpc64_32;
+ return g_register_infos_powerpc64;
}
-uint32_t
-RegisterContextFreeBSD_powerpc64::GetRegisterCount () const
-{
- return static_cast<uint32_t> (sizeof (g_register_infos_powerpc64) / sizeof (g_register_infos_powerpc64 [0]));
+uint32_t RegisterContextFreeBSD_powerpc64::GetRegisterCount() const {
+ return static_cast<uint32_t>(sizeof(g_register_infos_powerpc64) /
+ sizeof(g_register_infos_powerpc64[0]));
}
Modified: lldb/trunk/source/Plugins/Process/Utility/RegisterContextFreeBSD_powerpc.h
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/source/Plugins/Process/Utility/RegisterContextFreeBSD_powerpc.h?rev=280751&r1=280750&r2=280751&view=diff
==============================================================================
--- lldb/trunk/source/Plugins/Process/Utility/RegisterContextFreeBSD_powerpc.h (original)
+++ lldb/trunk/source/Plugins/Process/Utility/RegisterContextFreeBSD_powerpc.h Tue Sep 6 15:57:50 2016
@@ -1,4 +1,5 @@
-//===-- RegisterContextFreeBSD_powerpc.h -------------------------*- C++ -*-===//
+//===-- RegisterContextFreeBSD_powerpc.h -------------------------*- C++
+//-*-===//
//
// The LLVM Compiler Infrastructure
//
@@ -16,55 +17,41 @@
// Project includes
#include "RegisterInfoInterface.h"
-class RegisterContextFreeBSD_powerpc:
- public lldb_private::RegisterInfoInterface
-{
+class RegisterContextFreeBSD_powerpc
+ : public lldb_private::RegisterInfoInterface {
public:
- RegisterContextFreeBSD_powerpc(const lldb_private::ArchSpec &target_arch);
- ~RegisterContextFreeBSD_powerpc() override;
+ RegisterContextFreeBSD_powerpc(const lldb_private::ArchSpec &target_arch);
+ ~RegisterContextFreeBSD_powerpc() override;
- size_t
- GetGPRSize() const override;
+ size_t GetGPRSize() const override;
- const lldb_private::RegisterInfo *
- GetRegisterInfo() const override;
+ const lldb_private::RegisterInfo *GetRegisterInfo() const override;
- uint32_t
- GetRegisterCount() const override;
+ uint32_t GetRegisterCount() const override;
};
-class RegisterContextFreeBSD_powerpc32:
- public RegisterContextFreeBSD_powerpc
-{
+class RegisterContextFreeBSD_powerpc32 : public RegisterContextFreeBSD_powerpc {
public:
- RegisterContextFreeBSD_powerpc32(const lldb_private::ArchSpec &target_arch);
- ~RegisterContextFreeBSD_powerpc32() override;
+ RegisterContextFreeBSD_powerpc32(const lldb_private::ArchSpec &target_arch);
+ ~RegisterContextFreeBSD_powerpc32() override;
- size_t
- GetGPRSize() const override;
+ size_t GetGPRSize() const override;
- const lldb_private::RegisterInfo *
- GetRegisterInfo() const override;
+ const lldb_private::RegisterInfo *GetRegisterInfo() const override;
- uint32_t
- GetRegisterCount() const override;
+ uint32_t GetRegisterCount() const override;
};
-class RegisterContextFreeBSD_powerpc64:
- public RegisterContextFreeBSD_powerpc
-{
+class RegisterContextFreeBSD_powerpc64 : public RegisterContextFreeBSD_powerpc {
public:
- RegisterContextFreeBSD_powerpc64(const lldb_private::ArchSpec &target_arch);
- ~RegisterContextFreeBSD_powerpc64() override;
+ RegisterContextFreeBSD_powerpc64(const lldb_private::ArchSpec &target_arch);
+ ~RegisterContextFreeBSD_powerpc64() override;
- size_t
- GetGPRSize() const override;
+ size_t GetGPRSize() const override;
- const lldb_private::RegisterInfo *
- GetRegisterInfo() const override;
+ const lldb_private::RegisterInfo *GetRegisterInfo() const override;
- uint32_t
- GetRegisterCount() const override;
+ uint32_t GetRegisterCount() const override;
};
#endif // liblldb_RegisterContextFreeBSD_powerpc_h_
Modified: lldb/trunk/source/Plugins/Process/Utility/RegisterContextFreeBSD_x86_64.cpp
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/source/Plugins/Process/Utility/RegisterContextFreeBSD_x86_64.cpp?rev=280751&r1=280750&r2=280751&view=diff
==============================================================================
--- lldb/trunk/source/Plugins/Process/Utility/RegisterContextFreeBSD_x86_64.cpp (original)
+++ lldb/trunk/source/Plugins/Process/Utility/RegisterContextFreeBSD_x86_64.cpp Tue Sep 6 15:57:50 2016
@@ -7,158 +7,142 @@
//
//===---------------------------------------------------------------------===//
-#include <vector>
-#include "RegisterContextPOSIX_x86.h"
-#include "RegisterContextFreeBSD_i386.h"
#include "RegisterContextFreeBSD_x86_64.h"
+#include "RegisterContextFreeBSD_i386.h"
+#include "RegisterContextPOSIX_x86.h"
+#include <vector>
using namespace lldb_private;
using namespace lldb;
// http://svnweb.freebsd.org/base/head/sys/x86/include/reg.h
-typedef struct _GPR
-{
- uint64_t r15;
- uint64_t r14;
- uint64_t r13;
- uint64_t r12;
- uint64_t r11;
- uint64_t r10;
- uint64_t r9;
- uint64_t r8;
- uint64_t rdi;
- uint64_t rsi;
- uint64_t rbp;
- uint64_t rbx;
- uint64_t rdx;
- uint64_t rcx;
- uint64_t rax;
- uint32_t trapno;
- uint16_t fs;
- uint16_t gs;
- uint32_t err;
- uint16_t es;
- uint16_t ds;
- uint64_t rip;
- uint64_t cs;
- uint64_t rflags;
- uint64_t rsp;
- uint64_t ss;
+typedef struct _GPR {
+ uint64_t r15;
+ uint64_t r14;
+ uint64_t r13;
+ uint64_t r12;
+ uint64_t r11;
+ uint64_t r10;
+ uint64_t r9;
+ uint64_t r8;
+ uint64_t rdi;
+ uint64_t rsi;
+ uint64_t rbp;
+ uint64_t rbx;
+ uint64_t rdx;
+ uint64_t rcx;
+ uint64_t rax;
+ uint32_t trapno;
+ uint16_t fs;
+ uint16_t gs;
+ uint32_t err;
+ uint16_t es;
+ uint16_t ds;
+ uint64_t rip;
+ uint64_t cs;
+ uint64_t rflags;
+ uint64_t rsp;
+ uint64_t ss;
} GPR;
struct DBG {
- uint64_t dr[16]; /* debug registers */
- /* Index 0-3: debug address registers */
- /* Index 4-5: reserved */
- /* Index 6: debug status */
- /* Index 7: debug control */
- /* Index 8-15: reserved */
+ uint64_t dr[16]; /* debug registers */
+ /* Index 0-3: debug address registers */
+ /* Index 4-5: reserved */
+ /* Index 6: debug status */
+ /* Index 7: debug control */
+ /* Index 8-15: reserved */
};
-struct UserArea
-{
- GPR gpr;
- FPR fpr;
- DBG dbg;
+struct UserArea {
+ GPR gpr;
+ FPR fpr;
+ DBG dbg;
};
-#define DR_OFFSET(reg_index) \
- (LLVM_EXTENSION offsetof(DBG, dr[reg_index]))
+#define DR_OFFSET(reg_index) (LLVM_EXTENSION offsetof(DBG, dr[reg_index]))
//---------------------------------------------------------------------------
-// Include RegisterInfos_x86_64 to declare our g_register_infos_x86_64 structure.
+// Include RegisterInfos_x86_64 to declare our g_register_infos_x86_64
+// structure.
//---------------------------------------------------------------------------
#define DECLARE_REGISTER_INFOS_X86_64_STRUCT
#include "RegisterInfos_x86_64.h"
#undef DECLARE_REGISTER_INFOS_X86_64_STRUCT
-static std::vector<lldb_private::RegisterInfo>&
-GetSharedRegisterInfoVector ()
-{
- static std::vector<lldb_private::RegisterInfo> register_infos;
- return register_infos;
+static std::vector<lldb_private::RegisterInfo> &GetSharedRegisterInfoVector() {
+ static std::vector<lldb_private::RegisterInfo> register_infos;
+ return register_infos;
}
static const RegisterInfo *
-GetRegisterInfo_i386(const lldb_private::ArchSpec& arch)
-{
- static std::vector<lldb_private::RegisterInfo> g_register_infos (GetSharedRegisterInfoVector ());
-
- // Allocate RegisterInfo only once
- if (g_register_infos.empty())
- {
- // Copy the register information from base class
- std::unique_ptr<RegisterContextFreeBSD_i386> reg_interface(new RegisterContextFreeBSD_i386 (arch));
- const RegisterInfo *base_info = reg_interface->GetRegisterInfo();
- g_register_infos.insert(g_register_infos.end(), &base_info[0], &base_info[k_num_registers_i386]);
-
- //---------------------------------------------------------------------------
- // Include RegisterInfos_x86_64 to update the g_register_infos structure
- // with x86_64 offsets.
- //---------------------------------------------------------------------------
- #define UPDATE_REGISTER_INFOS_I386_STRUCT_WITH_X86_64_OFFSETS
- #include "RegisterInfos_x86_64.h"
- #undef UPDATE_REGISTER_INFOS_I386_STRUCT_WITH_X86_64_OFFSETS
- }
+GetRegisterInfo_i386(const lldb_private::ArchSpec &arch) {
+ static std::vector<lldb_private::RegisterInfo> g_register_infos(
+ GetSharedRegisterInfoVector());
+
+ // Allocate RegisterInfo only once
+ if (g_register_infos.empty()) {
+ // Copy the register information from base class
+ std::unique_ptr<RegisterContextFreeBSD_i386> reg_interface(
+ new RegisterContextFreeBSD_i386(arch));
+ const RegisterInfo *base_info = reg_interface->GetRegisterInfo();
+ g_register_infos.insert(g_register_infos.end(), &base_info[0],
+ &base_info[k_num_registers_i386]);
+
+//---------------------------------------------------------------------------
+// Include RegisterInfos_x86_64 to update the g_register_infos structure
+// with x86_64 offsets.
+//---------------------------------------------------------------------------
+#define UPDATE_REGISTER_INFOS_I386_STRUCT_WITH_X86_64_OFFSETS
+#include "RegisterInfos_x86_64.h"
+#undef UPDATE_REGISTER_INFOS_I386_STRUCT_WITH_X86_64_OFFSETS
+ }
- return &g_register_infos[0];
+ return &g_register_infos[0];
}
static const RegisterInfo *
-PrivateGetRegisterInfoPtr (const lldb_private::ArchSpec& target_arch)
-{
- switch (target_arch.GetMachine())
- {
- case llvm::Triple::x86:
- return GetRegisterInfo_i386 (target_arch);
- case llvm::Triple::x86_64:
- return g_register_infos_x86_64;
- default:
- assert(false && "Unhandled target architecture.");
- return nullptr;
- }
+PrivateGetRegisterInfoPtr(const lldb_private::ArchSpec &target_arch) {
+ switch (target_arch.GetMachine()) {
+ case llvm::Triple::x86:
+ return GetRegisterInfo_i386(target_arch);
+ case llvm::Triple::x86_64:
+ return g_register_infos_x86_64;
+ default:
+ assert(false && "Unhandled target architecture.");
+ return nullptr;
+ }
}
static uint32_t
-PrivateGetRegisterCount (const lldb_private::ArchSpec& target_arch)
-{
- switch (target_arch.GetMachine())
- {
- case llvm::Triple::x86:
- // This vector should have already been filled.
- assert (!GetSharedRegisterInfoVector ().empty () && "i386 register info vector not filled.");
- return static_cast<uint32_t> (GetSharedRegisterInfoVector().size ());
- case llvm::Triple::x86_64:
- return static_cast<uint32_t> (sizeof (g_register_infos_x86_64) / sizeof (g_register_infos_x86_64 [0]));
- default:
- assert(false && "Unhandled target architecture.");
- return 0;
- }
-}
-
-RegisterContextFreeBSD_x86_64::RegisterContextFreeBSD_x86_64(const ArchSpec &target_arch) :
- lldb_private::RegisterInfoInterface(target_arch),
- m_register_info_p (PrivateGetRegisterInfoPtr (target_arch)),
- m_register_count (PrivateGetRegisterCount (target_arch))
-{
-}
-
-size_t
-RegisterContextFreeBSD_x86_64::GetGPRSize() const
-{
- return sizeof(GPR);
-}
-
-const RegisterInfo *
-RegisterContextFreeBSD_x86_64::GetRegisterInfo() const
-{
- return m_register_info_p;
-}
-
-uint32_t
-RegisterContextFreeBSD_x86_64::GetRegisterCount () const
-{
- return m_register_count;
-}
+PrivateGetRegisterCount(const lldb_private::ArchSpec &target_arch) {
+ switch (target_arch.GetMachine()) {
+ case llvm::Triple::x86:
+ // This vector should have already been filled.
+ assert(!GetSharedRegisterInfoVector().empty() &&
+ "i386 register info vector not filled.");
+ return static_cast<uint32_t>(GetSharedRegisterInfoVector().size());
+ case llvm::Triple::x86_64:
+ return static_cast<uint32_t>(sizeof(g_register_infos_x86_64) /
+ sizeof(g_register_infos_x86_64[0]));
+ default:
+ assert(false && "Unhandled target architecture.");
+ return 0;
+ }
+}
+
+RegisterContextFreeBSD_x86_64::RegisterContextFreeBSD_x86_64(
+ const ArchSpec &target_arch)
+ : lldb_private::RegisterInfoInterface(target_arch),
+ m_register_info_p(PrivateGetRegisterInfoPtr(target_arch)),
+ m_register_count(PrivateGetRegisterCount(target_arch)) {}
+size_t RegisterContextFreeBSD_x86_64::GetGPRSize() const { return sizeof(GPR); }
+const RegisterInfo *RegisterContextFreeBSD_x86_64::GetRegisterInfo() const {
+ return m_register_info_p;
+}
+
+uint32_t RegisterContextFreeBSD_x86_64::GetRegisterCount() const {
+ return m_register_count;
+}
Modified: lldb/trunk/source/Plugins/Process/Utility/RegisterContextFreeBSD_x86_64.h
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/source/Plugins/Process/Utility/RegisterContextFreeBSD_x86_64.h?rev=280751&r1=280750&r2=280751&view=diff
==============================================================================
--- lldb/trunk/source/Plugins/Process/Utility/RegisterContextFreeBSD_x86_64.h (original)
+++ lldb/trunk/source/Plugins/Process/Utility/RegisterContextFreeBSD_x86_64.h Tue Sep 6 15:57:50 2016
@@ -12,24 +12,20 @@
#include "RegisterInfoInterface.h"
-class RegisterContextFreeBSD_x86_64:
- public lldb_private::RegisterInfoInterface
-{
+class RegisterContextFreeBSD_x86_64
+ : public lldb_private::RegisterInfoInterface {
public:
- RegisterContextFreeBSD_x86_64(const lldb_private::ArchSpec &target_arch);
+ RegisterContextFreeBSD_x86_64(const lldb_private::ArchSpec &target_arch);
- size_t
- GetGPRSize() const override;
+ size_t GetGPRSize() const override;
- const lldb_private::RegisterInfo *
- GetRegisterInfo() const override;
+ const lldb_private::RegisterInfo *GetRegisterInfo() const override;
- uint32_t
- GetRegisterCount () const override;
+ uint32_t GetRegisterCount() const override;
private:
- const lldb_private::RegisterInfo *m_register_info_p;
- const uint32_t m_register_count;
+ const lldb_private::RegisterInfo *m_register_info_p;
+ const uint32_t m_register_count;
};
#endif
Modified: lldb/trunk/source/Plugins/Process/Utility/RegisterContextHistory.cpp
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/source/Plugins/Process/Utility/RegisterContextHistory.cpp?rev=280751&r1=280750&r2=280751&view=diff
==============================================================================
--- lldb/trunk/source/Plugins/Process/Utility/RegisterContextHistory.cpp (original)
+++ lldb/trunk/source/Plugins/Process/Utility/RegisterContextHistory.cpp Tue Sep 6 15:57:50 2016
@@ -1,4 +1,5 @@
-//===-- RegisterContextHistory.cpp ---------------------------------*- C++ -*-===//
+//===-- RegisterContextHistory.cpp ---------------------------------*- C++
+//-*-===//
//
// The LLVM Compiler Infrastructure
//
@@ -7,8 +8,6 @@
//
//===----------------------------------------------------------------------===//
-
-#include "lldb/lldb-private.h"
#include "lldb/Core/Address.h"
#include "lldb/Core/AddressRange.h"
#include "lldb/Core/DataBufferHeap.h"
@@ -20,119 +19,105 @@
#include "lldb/Symbol/FuncUnwinders.h"
#include "lldb/Symbol/Function.h"
#include "lldb/Symbol/ObjectFile.h"
-#include "lldb/Symbol/SymbolContext.h"
#include "lldb/Symbol/Symbol.h"
+#include "lldb/Symbol/SymbolContext.h"
#include "lldb/Target/ABI.h"
+#include "lldb/Target/DynamicLoader.h"
#include "lldb/Target/ExecutionContext.h"
#include "lldb/Target/Process.h"
#include "lldb/Target/StackFrame.h"
#include "lldb/Target/Target.h"
#include "lldb/Target/Thread.h"
-#include "lldb/Target/DynamicLoader.h"
+#include "lldb/lldb-private.h"
#include "RegisterContextHistory.h"
using namespace lldb;
using namespace lldb_private;
-RegisterContextHistory::RegisterContextHistory (Thread &thread, uint32_t concrete_frame_idx, uint32_t address_byte_size, addr_t pc_value) :
-RegisterContext (thread, concrete_frame_idx),
- m_pc_value (pc_value)
-{
- m_reg_set0.name = "General Purpose Registers";
- m_reg_set0.short_name = "GPR";
- m_reg_set0.num_registers = 1;
- m_reg_set0.registers = new uint32_t(0);
-
- m_pc_reg_info.name = "pc";
- m_pc_reg_info.alt_name = "pc";
- m_pc_reg_info.byte_offset = 0;
- m_pc_reg_info.byte_size = address_byte_size;
- m_pc_reg_info.encoding = eEncodingUint;
- m_pc_reg_info.format = eFormatPointer;
- m_pc_reg_info.invalidate_regs = NULL;
- m_pc_reg_info.value_regs = NULL;
- m_pc_reg_info.kinds[eRegisterKindEHFrame] = LLDB_INVALID_REGNUM;
- m_pc_reg_info.kinds[eRegisterKindDWARF] = LLDB_INVALID_REGNUM;
- m_pc_reg_info.kinds[eRegisterKindGeneric] = LLDB_REGNUM_GENERIC_PC;
- m_pc_reg_info.kinds[eRegisterKindProcessPlugin] = LLDB_INVALID_REGNUM;
- m_pc_reg_info.kinds[eRegisterKindLLDB] = LLDB_INVALID_REGNUM;
-}
-
-RegisterContextHistory::~RegisterContextHistory ()
-{
- delete m_reg_set0.registers;
- delete m_pc_reg_info.invalidate_regs;
- delete m_pc_reg_info.value_regs;
-}
-
-void
-RegisterContextHistory::InvalidateAllRegisters () {}
-
-size_t
-RegisterContextHistory::GetRegisterCount ()
-{
- return 1;
+RegisterContextHistory::RegisterContextHistory(Thread &thread,
+ uint32_t concrete_frame_idx,
+ uint32_t address_byte_size,
+ addr_t pc_value)
+ : RegisterContext(thread, concrete_frame_idx), m_pc_value(pc_value) {
+ m_reg_set0.name = "General Purpose Registers";
+ m_reg_set0.short_name = "GPR";
+ m_reg_set0.num_registers = 1;
+ m_reg_set0.registers = new uint32_t(0);
+
+ m_pc_reg_info.name = "pc";
+ m_pc_reg_info.alt_name = "pc";
+ m_pc_reg_info.byte_offset = 0;
+ m_pc_reg_info.byte_size = address_byte_size;
+ m_pc_reg_info.encoding = eEncodingUint;
+ m_pc_reg_info.format = eFormatPointer;
+ m_pc_reg_info.invalidate_regs = NULL;
+ m_pc_reg_info.value_regs = NULL;
+ m_pc_reg_info.kinds[eRegisterKindEHFrame] = LLDB_INVALID_REGNUM;
+ m_pc_reg_info.kinds[eRegisterKindDWARF] = LLDB_INVALID_REGNUM;
+ m_pc_reg_info.kinds[eRegisterKindGeneric] = LLDB_REGNUM_GENERIC_PC;
+ m_pc_reg_info.kinds[eRegisterKindProcessPlugin] = LLDB_INVALID_REGNUM;
+ m_pc_reg_info.kinds[eRegisterKindLLDB] = LLDB_INVALID_REGNUM;
+}
+
+RegisterContextHistory::~RegisterContextHistory() {
+ delete m_reg_set0.registers;
+ delete m_pc_reg_info.invalidate_regs;
+ delete m_pc_reg_info.value_regs;
}
+void RegisterContextHistory::InvalidateAllRegisters() {}
+
+size_t RegisterContextHistory::GetRegisterCount() { return 1; }
+
const lldb_private::RegisterInfo *
-RegisterContextHistory::GetRegisterInfoAtIndex (size_t reg)
-{
- if (reg)
- return NULL;
- return &m_pc_reg_info;
+RegisterContextHistory::GetRegisterInfoAtIndex(size_t reg) {
+ if (reg)
+ return NULL;
+ return &m_pc_reg_info;
}
-size_t
-RegisterContextHistory::GetRegisterSetCount ()
-{
- return 1;
-}
+size_t RegisterContextHistory::GetRegisterSetCount() { return 1; }
const lldb_private::RegisterSet *
-RegisterContextHistory::GetRegisterSet (size_t reg_set)
-{
- if (reg_set)
- return NULL;
- return &m_reg_set0;
-}
-
-bool
-RegisterContextHistory::ReadRegister (const lldb_private::RegisterInfo *reg_info, lldb_private::RegisterValue &value)
-{
- if (!reg_info)
- return false;
- uint32_t reg_number = reg_info->kinds[eRegisterKindGeneric];
- if (reg_number == LLDB_REGNUM_GENERIC_PC)
- {
- value.SetUInt(m_pc_value, reg_info->byte_size);
- return true;
- }
- return false;
+RegisterContextHistory::GetRegisterSet(size_t reg_set) {
+ if (reg_set)
+ return NULL;
+ return &m_reg_set0;
}
-bool
-RegisterContextHistory::WriteRegister (const lldb_private::RegisterInfo *reg_info, const lldb_private::RegisterValue &value)
-{
+bool RegisterContextHistory::ReadRegister(
+ const lldb_private::RegisterInfo *reg_info,
+ lldb_private::RegisterValue &value) {
+ if (!reg_info)
return false;
+ uint32_t reg_number = reg_info->kinds[eRegisterKindGeneric];
+ if (reg_number == LLDB_REGNUM_GENERIC_PC) {
+ value.SetUInt(m_pc_value, reg_info->byte_size);
+ return true;
+ }
+ return false;
}
-bool
-RegisterContextHistory::ReadAllRegisterValues (lldb::DataBufferSP &data_sp)
-{
- return false;
+bool RegisterContextHistory::WriteRegister(
+ const lldb_private::RegisterInfo *reg_info,
+ const lldb_private::RegisterValue &value) {
+ return false;
}
-bool
-RegisterContextHistory::WriteAllRegisterValues (const lldb::DataBufferSP &data_sp)
-{
- return false;
+bool RegisterContextHistory::ReadAllRegisterValues(
+ lldb::DataBufferSP &data_sp) {
+ return false;
+}
+
+bool RegisterContextHistory::WriteAllRegisterValues(
+ const lldb::DataBufferSP &data_sp) {
+ return false;
}
-uint32_t
-RegisterContextHistory::ConvertRegisterKindToRegisterNumber (lldb::RegisterKind kind, uint32_t num)
-{
- if (kind == eRegisterKindGeneric && num == LLDB_REGNUM_GENERIC_PC)
- return 0;
- return LLDB_INVALID_REGNUM;
+uint32_t RegisterContextHistory::ConvertRegisterKindToRegisterNumber(
+ lldb::RegisterKind kind, uint32_t num) {
+ if (kind == eRegisterKindGeneric && num == LLDB_REGNUM_GENERIC_PC)
+ return 0;
+ return LLDB_INVALID_REGNUM;
}
Modified: lldb/trunk/source/Plugins/Process/Utility/RegisterContextHistory.h
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/source/Plugins/Process/Utility/RegisterContextHistory.h?rev=280751&r1=280750&r2=280751&view=diff
==============================================================================
--- lldb/trunk/source/Plugins/Process/Utility/RegisterContextHistory.h (original)
+++ lldb/trunk/source/Plugins/Process/Utility/RegisterContextHistory.h Tue Sep 6 15:57:50 2016
@@ -1,4 +1,5 @@
-//===-- RegisterContextHistory.h ----------------------------------------*- C++ -*-===//
+//===-- RegisterContextHistory.h ----------------------------------------*- C++
+//-*-===//
//
// The LLVM Compiler Infrastructure
//
@@ -16,64 +17,55 @@
// Other libraries and framework includes
// Project includes
-#include "lldb/lldb-private.h"
-#include "lldb/Target/RegisterContext.h"
#include "lldb/Symbol/SymbolContext.h"
+#include "lldb/Target/RegisterContext.h"
+#include "lldb/lldb-private.h"
namespace lldb_private {
-
-class RegisterContextHistory : public lldb_private::RegisterContext
-{
+
+class RegisterContextHistory : public lldb_private::RegisterContext {
public:
- typedef std::shared_ptr<RegisterContextHistory> SharedPtr;
-
- RegisterContextHistory (Thread &thread, uint32_t concrete_frame_idx, uint32_t address_byte_size, lldb::addr_t pc_value);
-
- ~RegisterContextHistory() override;
+ typedef std::shared_ptr<RegisterContextHistory> SharedPtr;
+
+ RegisterContextHistory(Thread &thread, uint32_t concrete_frame_idx,
+ uint32_t address_byte_size, lldb::addr_t pc_value);
- void
- InvalidateAllRegisters() override;
+ ~RegisterContextHistory() override;
- size_t
- GetRegisterCount() override;
+ void InvalidateAllRegisters() override;
- const lldb_private::RegisterInfo *
- GetRegisterInfoAtIndex(size_t reg) override;
+ size_t GetRegisterCount() override;
- size_t
- GetRegisterSetCount() override;
+ const lldb_private::RegisterInfo *GetRegisterInfoAtIndex(size_t reg) override;
- const lldb_private::RegisterSet *
- GetRegisterSet(size_t reg_set) override;
+ size_t GetRegisterSetCount() override;
- bool
- ReadRegister(const lldb_private::RegisterInfo *reg_info,
- lldb_private::RegisterValue &value) override;
+ const lldb_private::RegisterSet *GetRegisterSet(size_t reg_set) override;
- bool
- WriteRegister(const lldb_private::RegisterInfo *reg_info,
- const lldb_private::RegisterValue &value) override;
+ bool ReadRegister(const lldb_private::RegisterInfo *reg_info,
+ lldb_private::RegisterValue &value) override;
- bool
- ReadAllRegisterValues(lldb::DataBufferSP &data_sp) override;
+ bool WriteRegister(const lldb_private::RegisterInfo *reg_info,
+ const lldb_private::RegisterValue &value) override;
- bool
- WriteAllRegisterValues(const lldb::DataBufferSP &data_sp) override;
+ bool ReadAllRegisterValues(lldb::DataBufferSP &data_sp) override;
+
+ bool WriteAllRegisterValues(const lldb::DataBufferSP &data_sp) override;
+
+ uint32_t ConvertRegisterKindToRegisterNumber(lldb::RegisterKind kind,
+ uint32_t num) override;
- uint32_t
- ConvertRegisterKindToRegisterNumber(lldb::RegisterKind kind, uint32_t num) override;
-
private:
- //------------------------------------------------------------------
- // For RegisterContextLLDB only
- //------------------------------------------------------------------
-
- lldb_private::RegisterSet m_reg_set0; // register set 0 (PC only)
- lldb_private::RegisterInfo m_pc_reg_info;
-
- lldb::addr_t m_pc_value;
-
- DISALLOW_COPY_AND_ASSIGN (RegisterContextHistory);
+ //------------------------------------------------------------------
+ // For RegisterContextLLDB only
+ //------------------------------------------------------------------
+
+ lldb_private::RegisterSet m_reg_set0; // register set 0 (PC only)
+ lldb_private::RegisterInfo m_pc_reg_info;
+
+ lldb::addr_t m_pc_value;
+
+ DISALLOW_COPY_AND_ASSIGN(RegisterContextHistory);
};
} // namespace lldb_private
Modified: lldb/trunk/source/Plugins/Process/Utility/RegisterContextLLDB.cpp
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/source/Plugins/Process/Utility/RegisterContextLLDB.cpp?rev=280751&r1=280750&r2=280751&view=diff
==============================================================================
--- lldb/trunk/source/Plugins/Process/Utility/RegisterContextLLDB.cpp (original)
+++ lldb/trunk/source/Plugins/Process/Utility/RegisterContextLLDB.cpp Tue Sep 6 15:57:50 2016
@@ -7,8 +7,6 @@
//
//===----------------------------------------------------------------------===//
-
-#include "lldb/lldb-private.h"
#include "lldb/Core/Address.h"
#include "lldb/Core/AddressRange.h"
#include "lldb/Core/DataBufferHeap.h"
@@ -33,1829 +31,1824 @@
#include "lldb/Target/StackFrame.h"
#include "lldb/Target/Target.h"
#include "lldb/Target/Thread.h"
+#include "lldb/lldb-private.h"
#include "RegisterContextLLDB.h"
using namespace lldb;
using namespace lldb_private;
-static ConstString GetSymbolOrFunctionName(const SymbolContext &sym_ctx)
-{
- if (sym_ctx.symbol)
- return sym_ctx.symbol->GetName();
- else if (sym_ctx.function)
- return sym_ctx.function->GetName();
- return ConstString();
-}
-
-RegisterContextLLDB::RegisterContextLLDB
-(
- Thread& thread,
- const SharedPtr &next_frame,
- SymbolContext& sym_ctx,
- uint32_t frame_number,
- UnwindLLDB& unwind_lldb
-) :
- RegisterContext (thread, frame_number),
- m_thread(thread),
- m_fast_unwind_plan_sp (),
- m_full_unwind_plan_sp (),
- m_fallback_unwind_plan_sp (),
- m_all_registers_available(false),
- m_frame_type (-1),
- m_cfa (LLDB_INVALID_ADDRESS),
- m_start_pc (),
- m_current_pc (),
- m_current_offset (0),
- m_current_offset_backed_up_one (0),
- m_sym_ctx(sym_ctx),
- m_sym_ctx_valid (false),
- m_frame_number (frame_number),
- m_registers(),
- m_parent_unwind (unwind_lldb)
-{
- m_sym_ctx.Clear(false);
- m_sym_ctx_valid = false;
-
- if (IsFrameZero ())
- {
- InitializeZerothFrame ();
- }
- else
- {
- InitializeNonZerothFrame ();
- }
-
- // This same code exists over in the GetFullUnwindPlanForFrame() but it may not have been executed yet
- if (IsFrameZero()
- || next_frame->m_frame_type == eTrapHandlerFrame
- || next_frame->m_frame_type == eDebuggerFrame)
- {
- m_all_registers_available = true;
- }
-}
-
-bool
-RegisterContextLLDB::IsUnwindPlanValidForCurrentPC(lldb::UnwindPlanSP unwind_plan_sp, int &valid_pc_offset)
-{
- if (!unwind_plan_sp)
- return false;
+static ConstString GetSymbolOrFunctionName(const SymbolContext &sym_ctx) {
+ if (sym_ctx.symbol)
+ return sym_ctx.symbol->GetName();
+ else if (sym_ctx.function)
+ return sym_ctx.function->GetName();
+ return ConstString();
+}
+
+RegisterContextLLDB::RegisterContextLLDB(Thread &thread,
+ const SharedPtr &next_frame,
+ SymbolContext &sym_ctx,
+ uint32_t frame_number,
+ UnwindLLDB &unwind_lldb)
+ : RegisterContext(thread, frame_number), m_thread(thread),
+ m_fast_unwind_plan_sp(), m_full_unwind_plan_sp(),
+ m_fallback_unwind_plan_sp(), m_all_registers_available(false),
+ m_frame_type(-1), m_cfa(LLDB_INVALID_ADDRESS), m_start_pc(),
+ m_current_pc(), m_current_offset(0), m_current_offset_backed_up_one(0),
+ m_sym_ctx(sym_ctx), m_sym_ctx_valid(false), m_frame_number(frame_number),
+ m_registers(), m_parent_unwind(unwind_lldb) {
+ m_sym_ctx.Clear(false);
+ m_sym_ctx_valid = false;
+
+ if (IsFrameZero()) {
+ InitializeZerothFrame();
+ } else {
+ InitializeNonZerothFrame();
+ }
+
+ // This same code exists over in the GetFullUnwindPlanForFrame() but it may
+ // not have been executed yet
+ if (IsFrameZero() || next_frame->m_frame_type == eTrapHandlerFrame ||
+ next_frame->m_frame_type == eDebuggerFrame) {
+ m_all_registers_available = true;
+ }
+}
+
+bool RegisterContextLLDB::IsUnwindPlanValidForCurrentPC(
+ lldb::UnwindPlanSP unwind_plan_sp, int &valid_pc_offset) {
+ if (!unwind_plan_sp)
+ return false;
- // check if m_current_pc is valid
- if (unwind_plan_sp->PlanValidAtAddress(m_current_pc))
- {
- // yes - current offset can be used as is
- valid_pc_offset = m_current_offset;
- return true;
- }
+ // check if m_current_pc is valid
+ if (unwind_plan_sp->PlanValidAtAddress(m_current_pc)) {
+ // yes - current offset can be used as is
+ valid_pc_offset = m_current_offset;
+ return true;
+ }
- // if m_current_offset <= 0, we've got nothing else to try
- if (m_current_offset <= 0)
- return false;
+ // if m_current_offset <= 0, we've got nothing else to try
+ if (m_current_offset <= 0)
+ return false;
- // check pc - 1 to see if it's valid
- Address pc_minus_one (m_current_pc);
- pc_minus_one.SetOffset(m_current_pc.GetOffset() - 1);
- if (unwind_plan_sp->PlanValidAtAddress(pc_minus_one))
- {
- // *valid_pc_offset = m_current_offset - 1;
- valid_pc_offset = m_current_pc.GetOffset() - 1;
- return true;
- }
+ // check pc - 1 to see if it's valid
+ Address pc_minus_one(m_current_pc);
+ pc_minus_one.SetOffset(m_current_pc.GetOffset() - 1);
+ if (unwind_plan_sp->PlanValidAtAddress(pc_minus_one)) {
+ // *valid_pc_offset = m_current_offset - 1;
+ valid_pc_offset = m_current_pc.GetOffset() - 1;
+ return true;
+ }
- return false;
+ return false;
}
-// Initialize a RegisterContextLLDB which is the first frame of a stack -- the zeroth frame or currently
+// Initialize a RegisterContextLLDB which is the first frame of a stack -- the
+// zeroth frame or currently
// executing frame.
-void
-RegisterContextLLDB::InitializeZerothFrame()
-{
- Log *log(GetLogIfAllCategoriesSet (LIBLLDB_LOG_UNWIND));
- ExecutionContext exe_ctx(m_thread.shared_from_this());
- RegisterContextSP reg_ctx_sp = m_thread.GetRegisterContext();
-
- if (reg_ctx_sp.get() == NULL)
- {
- m_frame_type = eNotAValidFrame;
- UnwindLogMsg ("frame does not have a register context");
- return;
- }
-
- addr_t current_pc = reg_ctx_sp->GetPC();
+void RegisterContextLLDB::InitializeZerothFrame() {
+ Log *log(GetLogIfAllCategoriesSet(LIBLLDB_LOG_UNWIND));
+ ExecutionContext exe_ctx(m_thread.shared_from_this());
+ RegisterContextSP reg_ctx_sp = m_thread.GetRegisterContext();
- if (current_pc == LLDB_INVALID_ADDRESS)
- {
- m_frame_type = eNotAValidFrame;
- UnwindLogMsg ("frame does not have a pc");
- return;
- }
-
- Process *process = exe_ctx.GetProcessPtr();
-
- // Let ABIs fixup code addresses to make sure they are valid. In ARM ABIs
- // this will strip bit zero in case we read a PC from memory or from the LR.
- // (which would be a no-op in frame 0 where we get it from the register set,
- // but still a good idea to make the call here for other ABIs that may exist.)
- ABI *abi = process->GetABI().get();
- if (abi)
- current_pc = abi->FixCodeAddress(current_pc);
-
- // Initialize m_current_pc, an Address object, based on current_pc, an addr_t.
- m_current_pc.SetLoadAddress (current_pc, &process->GetTarget());
-
- // If we don't have a Module for some reason, we're not going to find symbol/function information - just
- // stick in some reasonable defaults and hope we can unwind past this frame.
- ModuleSP pc_module_sp (m_current_pc.GetModule());
- if (!m_current_pc.IsValid() || !pc_module_sp)
- {
- UnwindLogMsg ("using architectural default unwind method");
- }
+ if (reg_ctx_sp.get() == NULL) {
+ m_frame_type = eNotAValidFrame;
+ UnwindLogMsg("frame does not have a register context");
+ return;
+ }
- // We require either a symbol or function in the symbols context to be successfully
- // filled in or this context is of no use to us.
- const uint32_t resolve_scope = eSymbolContextFunction | eSymbolContextSymbol;
- if (pc_module_sp.get()
- && (pc_module_sp->ResolveSymbolContextForAddress (m_current_pc, resolve_scope, m_sym_ctx) & resolve_scope))
- {
- m_sym_ctx_valid = true;
- }
+ addr_t current_pc = reg_ctx_sp->GetPC();
- if (m_sym_ctx.symbol)
- {
- UnwindLogMsg ("with pc value of 0x%" PRIx64 ", symbol name is '%s'",
- current_pc, GetSymbolOrFunctionName(m_sym_ctx).AsCString(""));
- }
- else if (m_sym_ctx.function)
- {
- UnwindLogMsg ("with pc value of 0x%" PRIx64 ", function name is '%s'",
- current_pc, GetSymbolOrFunctionName(m_sym_ctx).AsCString(""));
- }
- else
- {
- UnwindLogMsg ("with pc value of 0x%" PRIx64 ", no symbol/function name is known.", current_pc);
+ if (current_pc == LLDB_INVALID_ADDRESS) {
+ m_frame_type = eNotAValidFrame;
+ UnwindLogMsg("frame does not have a pc");
+ return;
+ }
+
+ Process *process = exe_ctx.GetProcessPtr();
+
+ // Let ABIs fixup code addresses to make sure they are valid. In ARM ABIs
+ // this will strip bit zero in case we read a PC from memory or from the LR.
+ // (which would be a no-op in frame 0 where we get it from the register set,
+ // but still a good idea to make the call here for other ABIs that may exist.)
+ ABI *abi = process->GetABI().get();
+ if (abi)
+ current_pc = abi->FixCodeAddress(current_pc);
+
+ // Initialize m_current_pc, an Address object, based on current_pc, an addr_t.
+ m_current_pc.SetLoadAddress(current_pc, &process->GetTarget());
+
+ // If we don't have a Module for some reason, we're not going to find
+ // symbol/function information - just
+ // stick in some reasonable defaults and hope we can unwind past this frame.
+ ModuleSP pc_module_sp(m_current_pc.GetModule());
+ if (!m_current_pc.IsValid() || !pc_module_sp) {
+ UnwindLogMsg("using architectural default unwind method");
+ }
+
+ // We require either a symbol or function in the symbols context to be
+ // successfully
+ // filled in or this context is of no use to us.
+ const uint32_t resolve_scope = eSymbolContextFunction | eSymbolContextSymbol;
+ if (pc_module_sp.get() && (pc_module_sp->ResolveSymbolContextForAddress(
+ m_current_pc, resolve_scope, m_sym_ctx) &
+ resolve_scope)) {
+ m_sym_ctx_valid = true;
+ }
+
+ if (m_sym_ctx.symbol) {
+ UnwindLogMsg("with pc value of 0x%" PRIx64 ", symbol name is '%s'",
+ current_pc, GetSymbolOrFunctionName(m_sym_ctx).AsCString(""));
+ } else if (m_sym_ctx.function) {
+ UnwindLogMsg("with pc value of 0x%" PRIx64 ", function name is '%s'",
+ current_pc, GetSymbolOrFunctionName(m_sym_ctx).AsCString(""));
+ } else {
+ UnwindLogMsg("with pc value of 0x%" PRIx64
+ ", no symbol/function name is known.",
+ current_pc);
+ }
+
+ AddressRange addr_range;
+ m_sym_ctx.GetAddressRange(resolve_scope, 0, false, addr_range);
+
+ if (IsTrapHandlerSymbol(process, m_sym_ctx)) {
+ m_frame_type = eTrapHandlerFrame;
+ } else {
+ // FIXME: Detect eDebuggerFrame here.
+ m_frame_type = eNormalFrame;
+ }
+
+ // If we were able to find a symbol/function, set addr_range to the bounds of
+ // that symbol/function.
+ // else treat the current pc value as the start_pc and record no offset.
+ if (addr_range.GetBaseAddress().IsValid()) {
+ m_start_pc = addr_range.GetBaseAddress();
+ if (m_current_pc.GetSection() == m_start_pc.GetSection()) {
+ m_current_offset = m_current_pc.GetOffset() - m_start_pc.GetOffset();
+ } else if (m_current_pc.GetModule() == m_start_pc.GetModule()) {
+ // This means that whatever symbol we kicked up isn't really correct
+ // --- we should not cross section boundaries ... We really should NULL
+ // out
+ // the function/symbol in this case unless there is a bad assumption
+ // here due to inlined functions?
+ m_current_offset =
+ m_current_pc.GetFileAddress() - m_start_pc.GetFileAddress();
+ }
+ m_current_offset_backed_up_one = m_current_offset;
+ } else {
+ m_start_pc = m_current_pc;
+ m_current_offset = -1;
+ m_current_offset_backed_up_one = -1;
+ }
+
+ // We've set m_frame_type and m_sym_ctx before these calls.
+
+ m_fast_unwind_plan_sp = GetFastUnwindPlanForFrame();
+ m_full_unwind_plan_sp = GetFullUnwindPlanForFrame();
+
+ UnwindPlan::RowSP active_row;
+ lldb::RegisterKind row_register_kind = eRegisterKindGeneric;
+ if (m_full_unwind_plan_sp &&
+ m_full_unwind_plan_sp->PlanValidAtAddress(m_current_pc)) {
+ active_row =
+ m_full_unwind_plan_sp->GetRowForFunctionOffset(m_current_offset);
+ row_register_kind = m_full_unwind_plan_sp->GetRegisterKind();
+ if (active_row.get() && log) {
+ StreamString active_row_strm;
+ active_row->Dump(active_row_strm, m_full_unwind_plan_sp.get(), &m_thread,
+ m_start_pc.GetLoadAddress(exe_ctx.GetTargetPtr()));
+ UnwindLogMsg("%s", active_row_strm.GetString().c_str());
}
+ }
- AddressRange addr_range;
- m_sym_ctx.GetAddressRange (resolve_scope, 0, false, addr_range);
+ if (!active_row.get()) {
+ UnwindLogMsg("could not find an unwindplan row for this frame's pc");
+ m_frame_type = eNotAValidFrame;
+ return;
+ }
- if (IsTrapHandlerSymbol (process, m_sym_ctx))
- {
- m_frame_type = eTrapHandlerFrame;
- }
- else
- {
- // FIXME: Detect eDebuggerFrame here.
- m_frame_type = eNormalFrame;
- }
+ if (!ReadCFAValueForRow(row_register_kind, active_row, m_cfa)) {
+ // Try the fall back unwind plan since the
+ // full unwind plan failed.
+ FuncUnwindersSP func_unwinders_sp;
+ UnwindPlanSP call_site_unwind_plan;
+ bool cfa_status = false;
- // If we were able to find a symbol/function, set addr_range to the bounds of that symbol/function.
- // else treat the current pc value as the start_pc and record no offset.
- if (addr_range.GetBaseAddress().IsValid())
- {
- m_start_pc = addr_range.GetBaseAddress();
- if (m_current_pc.GetSection() == m_start_pc.GetSection())
- {
- m_current_offset = m_current_pc.GetOffset() - m_start_pc.GetOffset();
- }
- else if (m_current_pc.GetModule() == m_start_pc.GetModule())
- {
- // This means that whatever symbol we kicked up isn't really correct
- // --- we should not cross section boundaries ... We really should NULL out
- // the function/symbol in this case unless there is a bad assumption
- // here due to inlined functions?
- m_current_offset = m_current_pc.GetFileAddress() - m_start_pc.GetFileAddress();
- }
- m_current_offset_backed_up_one = m_current_offset;
+ if (m_sym_ctx_valid) {
+ func_unwinders_sp =
+ pc_module_sp->GetObjectFile()
+ ->GetUnwindTable()
+ .GetFuncUnwindersContainingAddress(m_current_pc, m_sym_ctx);
}
- else
- {
- m_start_pc = m_current_pc;
- m_current_offset = -1;
- m_current_offset_backed_up_one = -1;
- }
-
- // We've set m_frame_type and m_sym_ctx before these calls.
-
- m_fast_unwind_plan_sp = GetFastUnwindPlanForFrame ();
- m_full_unwind_plan_sp = GetFullUnwindPlanForFrame ();
- UnwindPlan::RowSP active_row;
- lldb::RegisterKind row_register_kind = eRegisterKindGeneric;
- if (m_full_unwind_plan_sp && m_full_unwind_plan_sp->PlanValidAtAddress (m_current_pc))
- {
- active_row = m_full_unwind_plan_sp->GetRowForFunctionOffset (m_current_offset);
- row_register_kind = m_full_unwind_plan_sp->GetRegisterKind ();
- if (active_row.get() && log)
- {
- StreamString active_row_strm;
- active_row->Dump(active_row_strm, m_full_unwind_plan_sp.get(), &m_thread, m_start_pc.GetLoadAddress(exe_ctx.GetTargetPtr()));
- UnwindLogMsg ("%s", active_row_strm.GetString().c_str());
- }
- }
+ if (func_unwinders_sp.get() != nullptr)
+ call_site_unwind_plan = func_unwinders_sp->GetUnwindPlanAtCallSite(
+ process->GetTarget(), m_current_offset_backed_up_one);
- if (!active_row.get())
- {
- UnwindLogMsg ("could not find an unwindplan row for this frame's pc");
- m_frame_type = eNotAValidFrame;
- return;
+ if (call_site_unwind_plan.get() != nullptr) {
+ m_fallback_unwind_plan_sp = call_site_unwind_plan;
+ if (TryFallbackUnwindPlan())
+ cfa_status = true;
}
-
-
- if (!ReadCFAValueForRow (row_register_kind, active_row, m_cfa))
- {
- // Try the fall back unwind plan since the
- // full unwind plan failed.
- FuncUnwindersSP func_unwinders_sp;
- UnwindPlanSP call_site_unwind_plan;
- bool cfa_status = false;
-
- if (m_sym_ctx_valid)
- {
- func_unwinders_sp = pc_module_sp->GetObjectFile()->GetUnwindTable().GetFuncUnwindersContainingAddress (m_current_pc, m_sym_ctx);
- }
-
- if(func_unwinders_sp.get() != nullptr)
- call_site_unwind_plan = func_unwinders_sp->GetUnwindPlanAtCallSite(process->GetTarget(), m_current_offset_backed_up_one);
-
- if (call_site_unwind_plan.get() != nullptr)
- {
- m_fallback_unwind_plan_sp = call_site_unwind_plan;
- if(TryFallbackUnwindPlan())
- cfa_status = true;
- }
- if (!cfa_status)
- {
- UnwindLogMsg ("could not read CFA value for first frame.");
- m_frame_type = eNotAValidFrame;
- return;
- }
+ if (!cfa_status) {
+ UnwindLogMsg("could not read CFA value for first frame.");
+ m_frame_type = eNotAValidFrame;
+ return;
}
+ }
- UnwindLogMsg ("initialized frame current pc is 0x%" PRIx64 " cfa is 0x%" PRIx64 " using %s UnwindPlan",
- (uint64_t) m_current_pc.GetLoadAddress (exe_ctx.GetTargetPtr()),
- (uint64_t) m_cfa,
- m_full_unwind_plan_sp->GetSourceName().GetCString());
+ UnwindLogMsg("initialized frame current pc is 0x%" PRIx64 " cfa is 0x%" PRIx64
+ " using %s UnwindPlan",
+ (uint64_t)m_current_pc.GetLoadAddress(exe_ctx.GetTargetPtr()),
+ (uint64_t)m_cfa,
+ m_full_unwind_plan_sp->GetSourceName().GetCString());
}
-// Initialize a RegisterContextLLDB for the non-zeroth frame -- rely on the RegisterContextLLDB "below" it
+// Initialize a RegisterContextLLDB for the non-zeroth frame -- rely on the
+// RegisterContextLLDB "below" it
// to provide things like its current pc value.
-void
-RegisterContextLLDB::InitializeNonZerothFrame()
-{
- Log *log(GetLogIfAllCategoriesSet (LIBLLDB_LOG_UNWIND));
- if (IsFrameZero ())
- {
- m_frame_type = eNotAValidFrame;
- UnwindLogMsg ("non-zeroth frame tests positive for IsFrameZero -- that shouldn't happen.");
- return;
- }
+void RegisterContextLLDB::InitializeNonZerothFrame() {
+ Log *log(GetLogIfAllCategoriesSet(LIBLLDB_LOG_UNWIND));
+ if (IsFrameZero()) {
+ m_frame_type = eNotAValidFrame;
+ UnwindLogMsg("non-zeroth frame tests positive for IsFrameZero -- that "
+ "shouldn't happen.");
+ return;
+ }
- if (!GetNextFrame().get() || !GetNextFrame()->IsValid())
- {
- m_frame_type = eNotAValidFrame;
- UnwindLogMsg ("Could not get next frame, marking this frame as invalid.");
- return;
- }
- if (!m_thread.GetRegisterContext())
- {
- m_frame_type = eNotAValidFrame;
- UnwindLogMsg ("Could not get register context for this thread, marking this frame as invalid.");
- return;
- }
+ if (!GetNextFrame().get() || !GetNextFrame()->IsValid()) {
+ m_frame_type = eNotAValidFrame;
+ UnwindLogMsg("Could not get next frame, marking this frame as invalid.");
+ return;
+ }
+ if (!m_thread.GetRegisterContext()) {
+ m_frame_type = eNotAValidFrame;
+ UnwindLogMsg("Could not get register context for this thread, marking this "
+ "frame as invalid.");
+ return;
+ }
+
+ addr_t pc;
+ if (!ReadGPRValue(eRegisterKindGeneric, LLDB_REGNUM_GENERIC_PC, pc)) {
+ UnwindLogMsg("could not get pc value");
+ m_frame_type = eNotAValidFrame;
+ return;
+ }
- addr_t pc;
- if (!ReadGPRValue (eRegisterKindGeneric, LLDB_REGNUM_GENERIC_PC, pc))
- {
- UnwindLogMsg ("could not get pc value");
+ if (log) {
+ UnwindLogMsg("pc = 0x%" PRIx64, pc);
+ addr_t reg_val;
+ if (ReadGPRValue(eRegisterKindGeneric, LLDB_REGNUM_GENERIC_FP, reg_val))
+ UnwindLogMsg("fp = 0x%" PRIx64, reg_val);
+ if (ReadGPRValue(eRegisterKindGeneric, LLDB_REGNUM_GENERIC_SP, reg_val))
+ UnwindLogMsg("sp = 0x%" PRIx64, reg_val);
+ }
+
+ // A pc of 0x0 means it's the end of the stack crawl unless we're above a trap
+ // handler function
+ bool above_trap_handler = false;
+ if (GetNextFrame().get() && GetNextFrame()->IsValid() &&
+ GetNextFrame()->IsTrapHandlerFrame())
+ above_trap_handler = true;
+
+ if (pc == 0 || pc == 0x1) {
+ if (above_trap_handler == false) {
+ m_frame_type = eNotAValidFrame;
+ UnwindLogMsg("this frame has a pc of 0x0");
+ return;
+ }
+ }
+
+ ExecutionContext exe_ctx(m_thread.shared_from_this());
+ Process *process = exe_ctx.GetProcessPtr();
+ // Let ABIs fixup code addresses to make sure they are valid. In ARM ABIs
+ // this will strip bit zero in case we read a PC from memory or from the LR.
+ ABI *abi = process->GetABI().get();
+ if (abi)
+ pc = abi->FixCodeAddress(pc);
+
+ m_current_pc.SetLoadAddress(pc, &process->GetTarget());
+
+ // If we don't have a Module for some reason, we're not going to find
+ // symbol/function information - just
+ // stick in some reasonable defaults and hope we can unwind past this frame.
+ ModuleSP pc_module_sp(m_current_pc.GetModule());
+ if (!m_current_pc.IsValid() || !pc_module_sp) {
+ UnwindLogMsg("using architectural default unwind method");
+
+ // Test the pc value to see if we know it's in an unmapped/non-executable
+ // region of memory.
+ uint32_t permissions;
+ if (process->GetLoadAddressPermissions(pc, permissions) &&
+ (permissions & ePermissionsExecutable) == 0) {
+ // If this is the second frame off the stack, we may have unwound the
+ // first frame
+ // incorrectly. But using the architecture default unwind plan may get us
+ // back on
+ // track -- albeit possibly skipping a real frame. Give this frame a
+ // clearly-invalid
+ // pc and see if we can get any further.
+ if (GetNextFrame().get() && GetNextFrame()->IsValid() &&
+ GetNextFrame()->IsFrameZero()) {
+ UnwindLogMsg("had a pc of 0x%" PRIx64 " which is not in executable "
+ "memory but on frame 1 -- "
+ "allowing it once.",
+ (uint64_t)pc);
+ m_frame_type = eSkipFrame;
+ } else {
+ // anywhere other than the second frame, a non-executable pc means we're
+ // off in the weeds -- stop now.
m_frame_type = eNotAValidFrame;
+ UnwindLogMsg("pc is in a non-executable section of memory and this "
+ "isn't the 2nd frame in the stack walk.");
return;
+ }
}
- if (log)
- {
- UnwindLogMsg ("pc = 0x%" PRIx64, pc);
- addr_t reg_val;
- if (ReadGPRValue (eRegisterKindGeneric, LLDB_REGNUM_GENERIC_FP, reg_val))
- UnwindLogMsg ("fp = 0x%" PRIx64, reg_val);
- if (ReadGPRValue (eRegisterKindGeneric, LLDB_REGNUM_GENERIC_SP, reg_val))
- UnwindLogMsg ("sp = 0x%" PRIx64, reg_val);
- }
-
- // A pc of 0x0 means it's the end of the stack crawl unless we're above a trap handler function
- bool above_trap_handler = false;
- if (GetNextFrame().get() && GetNextFrame()->IsValid() && GetNextFrame()->IsTrapHandlerFrame())
- above_trap_handler = true;
-
- if (pc == 0 || pc == 0x1)
- {
- if (above_trap_handler == false)
- {
+ if (abi) {
+ m_fast_unwind_plan_sp.reset();
+ m_full_unwind_plan_sp.reset(new UnwindPlan(lldb::eRegisterKindGeneric));
+ abi->CreateDefaultUnwindPlan(*m_full_unwind_plan_sp);
+ if (m_frame_type != eSkipFrame) // don't override eSkipFrame
+ {
+ m_frame_type = eNormalFrame;
+ }
+ m_all_registers_available = false;
+ m_current_offset = -1;
+ m_current_offset_backed_up_one = -1;
+ RegisterKind row_register_kind = m_full_unwind_plan_sp->GetRegisterKind();
+ UnwindPlan::RowSP row = m_full_unwind_plan_sp->GetRowForFunctionOffset(0);
+ if (row.get()) {
+ if (!ReadCFAValueForRow(row_register_kind, row, m_cfa)) {
+ UnwindLogMsg("failed to get cfa value");
+ if (m_frame_type != eSkipFrame) // don't override eSkipFrame
+ {
m_frame_type = eNotAValidFrame;
- UnwindLogMsg ("this frame has a pc of 0x0");
- return;
+ }
+ return;
}
- }
-
- ExecutionContext exe_ctx(m_thread.shared_from_this());
- Process *process = exe_ctx.GetProcessPtr();
- // Let ABIs fixup code addresses to make sure they are valid. In ARM ABIs
- // this will strip bit zero in case we read a PC from memory or from the LR.
- ABI *abi = process->GetABI().get();
- if (abi)
- pc = abi->FixCodeAddress(pc);
-
- m_current_pc.SetLoadAddress (pc, &process->GetTarget());
-
- // If we don't have a Module for some reason, we're not going to find symbol/function information - just
- // stick in some reasonable defaults and hope we can unwind past this frame.
- ModuleSP pc_module_sp (m_current_pc.GetModule());
- if (!m_current_pc.IsValid() || !pc_module_sp)
- {
- UnwindLogMsg ("using architectural default unwind method");
-
- // Test the pc value to see if we know it's in an unmapped/non-executable region of memory.
- uint32_t permissions;
- if (process->GetLoadAddressPermissions(pc, permissions)
- && (permissions & ePermissionsExecutable) == 0)
- {
- // If this is the second frame off the stack, we may have unwound the first frame
- // incorrectly. But using the architecture default unwind plan may get us back on
- // track -- albeit possibly skipping a real frame. Give this frame a clearly-invalid
- // pc and see if we can get any further.
- if (GetNextFrame().get() && GetNextFrame()->IsValid() && GetNextFrame()->IsFrameZero())
- {
- UnwindLogMsg ("had a pc of 0x%" PRIx64 " which is not in executable memory but on frame 1 -- allowing it once.",
- (uint64_t) pc);
- m_frame_type = eSkipFrame;
- }
- else
- {
- // anywhere other than the second frame, a non-executable pc means we're off in the weeds -- stop now.
- m_frame_type = eNotAValidFrame;
- UnwindLogMsg ("pc is in a non-executable section of memory and this isn't the 2nd frame in the stack walk.");
- return;
- }
- }
-
- if (abi)
- {
- m_fast_unwind_plan_sp.reset ();
- m_full_unwind_plan_sp.reset (new UnwindPlan (lldb::eRegisterKindGeneric));
- abi->CreateDefaultUnwindPlan(*m_full_unwind_plan_sp);
- if (m_frame_type != eSkipFrame) // don't override eSkipFrame
- {
- m_frame_type = eNormalFrame;
- }
- m_all_registers_available = false;
- m_current_offset = -1;
- m_current_offset_backed_up_one = -1;
- RegisterKind row_register_kind = m_full_unwind_plan_sp->GetRegisterKind ();
- UnwindPlan::RowSP row = m_full_unwind_plan_sp->GetRowForFunctionOffset(0);
- if (row.get())
- {
- if (!ReadCFAValueForRow (row_register_kind, row, m_cfa))
- {
- UnwindLogMsg ("failed to get cfa value");
- if (m_frame_type != eSkipFrame) // don't override eSkipFrame
- {
- m_frame_type = eNotAValidFrame;
- }
- return;
- }
-
- // A couple of sanity checks..
- if (m_cfa == LLDB_INVALID_ADDRESS || m_cfa == 0 || m_cfa == 1)
- {
- UnwindLogMsg ("could not find a valid cfa address");
- m_frame_type = eNotAValidFrame;
- return;
- }
-
- // m_cfa should point into the stack memory; if we can query memory region permissions,
- // see if the memory is allocated & readable.
- if (process->GetLoadAddressPermissions(m_cfa, permissions)
- && (permissions & ePermissionsReadable) == 0)
- {
- m_frame_type = eNotAValidFrame;
- UnwindLogMsg ("the CFA points to a region of memory that is not readable");
- return;
- }
- }
- else
- {
- UnwindLogMsg ("could not find a row for function offset zero");
- m_frame_type = eNotAValidFrame;
- return;
- }
-
- if (CheckIfLoopingStack ())
- {
- TryFallbackUnwindPlan();
- if (CheckIfLoopingStack ())
- {
- UnwindLogMsg ("same CFA address as next frame, assuming the unwind is looping - stopping");
- m_frame_type = eNotAValidFrame;
- return;
- }
- }
- UnwindLogMsg ("initialized frame cfa is 0x%" PRIx64, (uint64_t) m_cfa);
- return;
+ // A couple of sanity checks..
+ if (m_cfa == LLDB_INVALID_ADDRESS || m_cfa == 0 || m_cfa == 1) {
+ UnwindLogMsg("could not find a valid cfa address");
+ m_frame_type = eNotAValidFrame;
+ return;
+ }
+
+ // m_cfa should point into the stack memory; if we can query memory
+ // region permissions,
+ // see if the memory is allocated & readable.
+ if (process->GetLoadAddressPermissions(m_cfa, permissions) &&
+ (permissions & ePermissionsReadable) == 0) {
+ m_frame_type = eNotAValidFrame;
+ UnwindLogMsg(
+ "the CFA points to a region of memory that is not readable");
+ return;
}
+ } else {
+ UnwindLogMsg("could not find a row for function offset zero");
m_frame_type = eNotAValidFrame;
- UnwindLogMsg ("could not find any symbol for this pc, or a default unwind plan, to continue unwind.");
return;
- }
-
- bool resolve_tail_call_address = false; // m_current_pc can be one past the address range of the function...
- // If the saved pc does not point to a function/symbol because it is
- // beyond the bounds of the correct function and there's no symbol there,
- // we do *not* want ResolveSymbolContextForAddress to back up the pc by 1,
- // because then we might not find the correct unwind information later.
- // Instead, let ResolveSymbolContextForAddress fail, and handle the case
- // via decr_pc_and_recompute_addr_range below.
- const uint32_t resolve_scope = eSymbolContextFunction | eSymbolContextSymbol;
- uint32_t resolved_scope = pc_module_sp->ResolveSymbolContextForAddress (m_current_pc,
- resolve_scope,
- m_sym_ctx, resolve_tail_call_address);
-
- // We require either a symbol or function in the symbols context to be successfully
- // filled in or this context is of no use to us.
- if (resolve_scope & resolved_scope)
- {
- m_sym_ctx_valid = true;
- }
-
- if (m_sym_ctx.symbol)
- {
- UnwindLogMsg ("with pc value of 0x%" PRIx64 ", symbol name is '%s'",
- pc, GetSymbolOrFunctionName(m_sym_ctx).AsCString(""));
- }
- else if (m_sym_ctx.function)
- {
- UnwindLogMsg ("with pc value of 0x%" PRIx64 ", function name is '%s'",
- pc, GetSymbolOrFunctionName(m_sym_ctx).AsCString(""));
- }
- else
- {
- UnwindLogMsg ("with pc value of 0x%" PRIx64 ", no symbol/function name is known.", pc);
- }
-
- AddressRange addr_range;
- if (!m_sym_ctx.GetAddressRange (resolve_scope, 0, false, addr_range))
- {
- m_sym_ctx_valid = false;
- }
-
- bool decr_pc_and_recompute_addr_range = false;
-
- // If the symbol lookup failed...
- if (m_sym_ctx_valid == false)
- decr_pc_and_recompute_addr_range = true;
-
- // Or if we're in the middle of the stack (and not "above" an asynchronous event like sigtramp),
- // and our "current" pc is the start of a function...
- if (m_sym_ctx_valid
- && GetNextFrame()->m_frame_type != eTrapHandlerFrame
- && GetNextFrame()->m_frame_type != eDebuggerFrame
- && addr_range.GetBaseAddress().IsValid()
- && addr_range.GetBaseAddress().GetSection() == m_current_pc.GetSection()
- && addr_range.GetBaseAddress().GetOffset() == m_current_pc.GetOffset())
- {
- decr_pc_and_recompute_addr_range = true;
- }
-
- // We need to back up the pc by 1 byte and re-search for the Symbol to handle the case where the "saved pc"
- // value is pointing to the next function, e.g. if a function ends with a CALL instruction.
- // FIXME this may need to be an architectural-dependent behavior; if so we'll need to add a member function
- // to the ABI plugin and consult that.
- if (decr_pc_and_recompute_addr_range)
- {
- UnwindLogMsg ("Backing up the pc value of 0x%" PRIx64 " by 1 and re-doing symbol lookup; old symbol was %s",
- pc, GetSymbolOrFunctionName(m_sym_ctx).AsCString(""));
- Address temporary_pc;
- temporary_pc.SetLoadAddress (pc - 1, &process->GetTarget());
- m_sym_ctx.Clear (false);
- m_sym_ctx_valid = false;
- uint32_t resolve_scope = eSymbolContextFunction | eSymbolContextSymbol;
-
- ModuleSP temporary_module_sp = temporary_pc.GetModule();
- if (temporary_module_sp &&
- temporary_module_sp->ResolveSymbolContextForAddress (temporary_pc, resolve_scope, m_sym_ctx) & resolve_scope)
- {
- if (m_sym_ctx.GetAddressRange (resolve_scope, 0, false, addr_range))
- m_sym_ctx_valid = true;
- }
- UnwindLogMsg ("Symbol is now %s", GetSymbolOrFunctionName(m_sym_ctx).AsCString(""));
- }
+ }
- // If we were able to find a symbol/function, set addr_range_ptr to the bounds of that symbol/function.
- // else treat the current pc value as the start_pc and record no offset.
- if (addr_range.GetBaseAddress().IsValid())
- {
- m_start_pc = addr_range.GetBaseAddress();
- m_current_offset = pc - m_start_pc.GetLoadAddress (&process->GetTarget());
- m_current_offset_backed_up_one = m_current_offset;
- if (decr_pc_and_recompute_addr_range && m_current_offset_backed_up_one > 0)
- {
- m_current_offset_backed_up_one--;
- if (m_sym_ctx_valid)
- {
- m_current_pc.SetLoadAddress (pc - 1, &process->GetTarget());
- }
+ if (CheckIfLoopingStack()) {
+ TryFallbackUnwindPlan();
+ if (CheckIfLoopingStack()) {
+ UnwindLogMsg("same CFA address as next frame, assuming the unwind is "
+ "looping - stopping");
+ m_frame_type = eNotAValidFrame;
+ return;
}
- }
- else
- {
- m_start_pc = m_current_pc;
- m_current_offset = -1;
- m_current_offset_backed_up_one = -1;
- }
+ }
- if (IsTrapHandlerSymbol (process, m_sym_ctx))
- {
- m_frame_type = eTrapHandlerFrame;
- }
- else
- {
- // FIXME: Detect eDebuggerFrame here.
- if (m_frame_type != eSkipFrame) // don't override eSkipFrame
- {
- m_frame_type = eNormalFrame;
- }
+ UnwindLogMsg("initialized frame cfa is 0x%" PRIx64, (uint64_t)m_cfa);
+ return;
}
+ m_frame_type = eNotAValidFrame;
+ UnwindLogMsg("could not find any symbol for this pc, or a default unwind "
+ "plan, to continue unwind.");
+ return;
+ }
+
+ bool resolve_tail_call_address = false; // m_current_pc can be one past the
+ // address range of the function...
+ // If the saved pc does not point to a function/symbol because it is
+ // beyond the bounds of the correct function and there's no symbol there,
+ // we do *not* want ResolveSymbolContextForAddress to back up the pc by 1,
+ // because then we might not find the correct unwind information later.
+ // Instead, let ResolveSymbolContextForAddress fail, and handle the case
+ // via decr_pc_and_recompute_addr_range below.
+ const uint32_t resolve_scope = eSymbolContextFunction | eSymbolContextSymbol;
+ uint32_t resolved_scope = pc_module_sp->ResolveSymbolContextForAddress(
+ m_current_pc, resolve_scope, m_sym_ctx, resolve_tail_call_address);
+
+ // We require either a symbol or function in the symbols context to be
+ // successfully
+ // filled in or this context is of no use to us.
+ if (resolve_scope & resolved_scope) {
+ m_sym_ctx_valid = true;
+ }
+
+ if (m_sym_ctx.symbol) {
+ UnwindLogMsg("with pc value of 0x%" PRIx64 ", symbol name is '%s'", pc,
+ GetSymbolOrFunctionName(m_sym_ctx).AsCString(""));
+ } else if (m_sym_ctx.function) {
+ UnwindLogMsg("with pc value of 0x%" PRIx64 ", function name is '%s'", pc,
+ GetSymbolOrFunctionName(m_sym_ctx).AsCString(""));
+ } else {
+ UnwindLogMsg("with pc value of 0x%" PRIx64
+ ", no symbol/function name is known.",
+ pc);
+ }
- // We've set m_frame_type and m_sym_ctx before this call.
- m_fast_unwind_plan_sp = GetFastUnwindPlanForFrame ();
+ AddressRange addr_range;
+ if (!m_sym_ctx.GetAddressRange(resolve_scope, 0, false, addr_range)) {
+ m_sym_ctx_valid = false;
+ }
- UnwindPlan::RowSP active_row;
- RegisterKind row_register_kind = eRegisterKindGeneric;
+ bool decr_pc_and_recompute_addr_range = false;
- // Try to get by with just the fast UnwindPlan if possible - the full UnwindPlan may be expensive to get
- // (e.g. if we have to parse the entire eh_frame section of an ObjectFile for the first time.)
+ // If the symbol lookup failed...
+ if (m_sym_ctx_valid == false)
+ decr_pc_and_recompute_addr_range = true;
+
+ // Or if we're in the middle of the stack (and not "above" an asynchronous
+ // event like sigtramp),
+ // and our "current" pc is the start of a function...
+ if (m_sym_ctx_valid && GetNextFrame()->m_frame_type != eTrapHandlerFrame &&
+ GetNextFrame()->m_frame_type != eDebuggerFrame &&
+ addr_range.GetBaseAddress().IsValid() &&
+ addr_range.GetBaseAddress().GetSection() == m_current_pc.GetSection() &&
+ addr_range.GetBaseAddress().GetOffset() == m_current_pc.GetOffset()) {
+ decr_pc_and_recompute_addr_range = true;
+ }
+
+ // We need to back up the pc by 1 byte and re-search for the Symbol to handle
+ // the case where the "saved pc"
+ // value is pointing to the next function, e.g. if a function ends with a CALL
+ // instruction.
+ // FIXME this may need to be an architectural-dependent behavior; if so we'll
+ // need to add a member function
+ // to the ABI plugin and consult that.
+ if (decr_pc_and_recompute_addr_range) {
+ UnwindLogMsg("Backing up the pc value of 0x%" PRIx64
+ " by 1 and re-doing symbol lookup; old symbol was %s",
+ pc, GetSymbolOrFunctionName(m_sym_ctx).AsCString(""));
+ Address temporary_pc;
+ temporary_pc.SetLoadAddress(pc - 1, &process->GetTarget());
+ m_sym_ctx.Clear(false);
+ m_sym_ctx_valid = false;
+ uint32_t resolve_scope = eSymbolContextFunction | eSymbolContextSymbol;
- if (m_fast_unwind_plan_sp && m_fast_unwind_plan_sp->PlanValidAtAddress (m_current_pc))
- {
- active_row = m_fast_unwind_plan_sp->GetRowForFunctionOffset (m_current_offset);
- row_register_kind = m_fast_unwind_plan_sp->GetRegisterKind ();
- if (active_row.get() && log)
- {
- StreamString active_row_strm;
- active_row->Dump(active_row_strm, m_fast_unwind_plan_sp.get(), &m_thread, m_start_pc.GetLoadAddress(exe_ctx.GetTargetPtr()));
- UnwindLogMsg ("active row: %s", active_row_strm.GetString().c_str());
- }
- }
- else
- {
- m_full_unwind_plan_sp = GetFullUnwindPlanForFrame ();
- int valid_offset = -1;
- if (IsUnwindPlanValidForCurrentPC(m_full_unwind_plan_sp, valid_offset))
- {
- active_row = m_full_unwind_plan_sp->GetRowForFunctionOffset (valid_offset);
- row_register_kind = m_full_unwind_plan_sp->GetRegisterKind ();
- if (active_row.get() && log)
- {
- StreamString active_row_strm;
- active_row->Dump(active_row_strm, m_full_unwind_plan_sp.get(), &m_thread, m_start_pc.GetLoadAddress(exe_ctx.GetTargetPtr()));
- UnwindLogMsg ("active row: %s", active_row_strm.GetString().c_str());
- }
- }
+ ModuleSP temporary_module_sp = temporary_pc.GetModule();
+ if (temporary_module_sp &&
+ temporary_module_sp->ResolveSymbolContextForAddress(
+ temporary_pc, resolve_scope, m_sym_ctx) &
+ resolve_scope) {
+ if (m_sym_ctx.GetAddressRange(resolve_scope, 0, false, addr_range))
+ m_sym_ctx_valid = true;
}
-
- if (!active_row.get())
- {
- m_frame_type = eNotAValidFrame;
- UnwindLogMsg ("could not find unwind row for this pc");
- return;
+ UnwindLogMsg("Symbol is now %s",
+ GetSymbolOrFunctionName(m_sym_ctx).AsCString(""));
+ }
+
+ // If we were able to find a symbol/function, set addr_range_ptr to the bounds
+ // of that symbol/function.
+ // else treat the current pc value as the start_pc and record no offset.
+ if (addr_range.GetBaseAddress().IsValid()) {
+ m_start_pc = addr_range.GetBaseAddress();
+ m_current_offset = pc - m_start_pc.GetLoadAddress(&process->GetTarget());
+ m_current_offset_backed_up_one = m_current_offset;
+ if (decr_pc_and_recompute_addr_range &&
+ m_current_offset_backed_up_one > 0) {
+ m_current_offset_backed_up_one--;
+ if (m_sym_ctx_valid) {
+ m_current_pc.SetLoadAddress(pc - 1, &process->GetTarget());
+ }
+ }
+ } else {
+ m_start_pc = m_current_pc;
+ m_current_offset = -1;
+ m_current_offset_backed_up_one = -1;
+ }
+
+ if (IsTrapHandlerSymbol(process, m_sym_ctx)) {
+ m_frame_type = eTrapHandlerFrame;
+ } else {
+ // FIXME: Detect eDebuggerFrame here.
+ if (m_frame_type != eSkipFrame) // don't override eSkipFrame
+ {
+ m_frame_type = eNormalFrame;
+ }
+ }
+
+ // We've set m_frame_type and m_sym_ctx before this call.
+ m_fast_unwind_plan_sp = GetFastUnwindPlanForFrame();
+
+ UnwindPlan::RowSP active_row;
+ RegisterKind row_register_kind = eRegisterKindGeneric;
+
+ // Try to get by with just the fast UnwindPlan if possible - the full
+ // UnwindPlan may be expensive to get
+ // (e.g. if we have to parse the entire eh_frame section of an ObjectFile for
+ // the first time.)
+
+ if (m_fast_unwind_plan_sp &&
+ m_fast_unwind_plan_sp->PlanValidAtAddress(m_current_pc)) {
+ active_row =
+ m_fast_unwind_plan_sp->GetRowForFunctionOffset(m_current_offset);
+ row_register_kind = m_fast_unwind_plan_sp->GetRegisterKind();
+ if (active_row.get() && log) {
+ StreamString active_row_strm;
+ active_row->Dump(active_row_strm, m_fast_unwind_plan_sp.get(), &m_thread,
+ m_start_pc.GetLoadAddress(exe_ctx.GetTargetPtr()));
+ UnwindLogMsg("active row: %s", active_row_strm.GetString().c_str());
}
-
- if (!ReadCFAValueForRow (row_register_kind, active_row, m_cfa))
- {
- UnwindLogMsg ("failed to get cfa");
- m_frame_type = eNotAValidFrame;
- return;
+ } else {
+ m_full_unwind_plan_sp = GetFullUnwindPlanForFrame();
+ int valid_offset = -1;
+ if (IsUnwindPlanValidForCurrentPC(m_full_unwind_plan_sp, valid_offset)) {
+ active_row = m_full_unwind_plan_sp->GetRowForFunctionOffset(valid_offset);
+ row_register_kind = m_full_unwind_plan_sp->GetRegisterKind();
+ if (active_row.get() && log) {
+ StreamString active_row_strm;
+ active_row->Dump(active_row_strm, m_full_unwind_plan_sp.get(),
+ &m_thread,
+ m_start_pc.GetLoadAddress(exe_ctx.GetTargetPtr()));
+ UnwindLogMsg("active row: %s", active_row_strm.GetString().c_str());
+ }
}
+ }
- UnwindLogMsg ("m_cfa = 0x%" PRIx64, m_cfa);
-
- if (CheckIfLoopingStack ())
- {
- TryFallbackUnwindPlan();
- if (CheckIfLoopingStack ())
- {
- UnwindLogMsg ("same CFA address as next frame, assuming the unwind is looping - stopping");
- m_frame_type = eNotAValidFrame;
- return;
- }
- }
+ if (!active_row.get()) {
+ m_frame_type = eNotAValidFrame;
+ UnwindLogMsg("could not find unwind row for this pc");
+ return;
+ }
- UnwindLogMsg ("initialized frame current pc is 0x%" PRIx64 " cfa is 0x%" PRIx64,
- (uint64_t) m_current_pc.GetLoadAddress (exe_ctx.GetTargetPtr()), (uint64_t) m_cfa);
-}
+ if (!ReadCFAValueForRow(row_register_kind, active_row, m_cfa)) {
+ UnwindLogMsg("failed to get cfa");
+ m_frame_type = eNotAValidFrame;
+ return;
+ }
-bool
-RegisterContextLLDB::CheckIfLoopingStack ()
-{
- // If we have a bad stack setup, we can get the same CFA value multiple times -- or even
- // more devious, we can actually oscillate between two CFA values. Detect that here and
- // break out to avoid a possible infinite loop in lldb trying to unwind the stack.
- // To detect when we have the same CFA value multiple times, we compare the CFA of the current
- // frame with the 2nd next frame because in some specail case (e.g. signal hanlders, hand
- // written assembly without ABI compiance) we can have 2 frames with the same CFA (in theory we
- // can have arbitrary number of frames with the same CFA, but more then 2 is very very unlikely)
+ UnwindLogMsg("m_cfa = 0x%" PRIx64, m_cfa);
- RegisterContextLLDB::SharedPtr next_frame = GetNextFrame();
- if (next_frame)
- {
- RegisterContextLLDB::SharedPtr next_next_frame = next_frame->GetNextFrame();
- addr_t next_next_frame_cfa = LLDB_INVALID_ADDRESS;
- if (next_next_frame && next_next_frame->GetCFA(next_next_frame_cfa))
- {
- if (next_next_frame_cfa == m_cfa)
- {
- // We have a loop in the stack unwind
- return true;
- }
- }
+ if (CheckIfLoopingStack()) {
+ TryFallbackUnwindPlan();
+ if (CheckIfLoopingStack()) {
+ UnwindLogMsg("same CFA address as next frame, assuming the unwind is "
+ "looping - stopping");
+ m_frame_type = eNotAValidFrame;
+ return;
+ }
+ }
+
+ UnwindLogMsg("initialized frame current pc is 0x%" PRIx64
+ " cfa is 0x%" PRIx64,
+ (uint64_t)m_current_pc.GetLoadAddress(exe_ctx.GetTargetPtr()),
+ (uint64_t)m_cfa);
+}
+
+bool RegisterContextLLDB::CheckIfLoopingStack() {
+ // If we have a bad stack setup, we can get the same CFA value multiple times
+ // -- or even
+ // more devious, we can actually oscillate between two CFA values. Detect that
+ // here and
+ // break out to avoid a possible infinite loop in lldb trying to unwind the
+ // stack.
+ // To detect when we have the same CFA value multiple times, we compare the
+ // CFA of the current
+ // frame with the 2nd next frame because in some specail case (e.g. signal
+ // hanlders, hand
+ // written assembly without ABI compiance) we can have 2 frames with the same
+ // CFA (in theory we
+ // can have arbitrary number of frames with the same CFA, but more then 2 is
+ // very very unlikely)
+
+ RegisterContextLLDB::SharedPtr next_frame = GetNextFrame();
+ if (next_frame) {
+ RegisterContextLLDB::SharedPtr next_next_frame = next_frame->GetNextFrame();
+ addr_t next_next_frame_cfa = LLDB_INVALID_ADDRESS;
+ if (next_next_frame && next_next_frame->GetCFA(next_next_frame_cfa)) {
+ if (next_next_frame_cfa == m_cfa) {
+ // We have a loop in the stack unwind
+ return true;
+ }
}
- return false;
-}
-
-bool
-RegisterContextLLDB::IsFrameZero () const
-{
- return m_frame_number == 0;
+ }
+ return false;
}
+bool RegisterContextLLDB::IsFrameZero() const { return m_frame_number == 0; }
// Find a fast unwind plan for this frame, if possible.
//
// On entry to this method,
//
-// 1. m_frame_type should already be set to eTrapHandlerFrame/eDebuggerFrame if either of those are correct,
+// 1. m_frame_type should already be set to eTrapHandlerFrame/eDebuggerFrame
+// if either of those are correct,
// 2. m_sym_ctx should already be filled in, and
// 3. m_current_pc should have the current pc value for this frame
-// 4. m_current_offset_backed_up_one should have the current byte offset into the function, maybe backed up by 1, -1 if unknown
+// 4. m_current_offset_backed_up_one should have the current byte offset into
+// the function, maybe backed up by 1, -1 if unknown
-UnwindPlanSP
-RegisterContextLLDB::GetFastUnwindPlanForFrame ()
-{
- UnwindPlanSP unwind_plan_sp;
- ModuleSP pc_module_sp (m_current_pc.GetModule());
+UnwindPlanSP RegisterContextLLDB::GetFastUnwindPlanForFrame() {
+ UnwindPlanSP unwind_plan_sp;
+ ModuleSP pc_module_sp(m_current_pc.GetModule());
- if (!m_current_pc.IsValid() || !pc_module_sp || pc_module_sp->GetObjectFile() == NULL)
- return unwind_plan_sp;
+ if (!m_current_pc.IsValid() || !pc_module_sp ||
+ pc_module_sp->GetObjectFile() == NULL)
+ return unwind_plan_sp;
- if (IsFrameZero ())
- return unwind_plan_sp;
+ if (IsFrameZero())
+ return unwind_plan_sp;
- FuncUnwindersSP func_unwinders_sp (pc_module_sp->GetObjectFile()->GetUnwindTable().GetFuncUnwindersContainingAddress (m_current_pc, m_sym_ctx));
- if (!func_unwinders_sp)
- return unwind_plan_sp;
+ FuncUnwindersSP func_unwinders_sp(
+ pc_module_sp->GetObjectFile()
+ ->GetUnwindTable()
+ .GetFuncUnwindersContainingAddress(m_current_pc, m_sym_ctx));
+ if (!func_unwinders_sp)
+ return unwind_plan_sp;
- // If we're in _sigtramp(), unwinding past this frame requires special knowledge.
- if (m_frame_type == eTrapHandlerFrame || m_frame_type == eDebuggerFrame)
- return unwind_plan_sp;
+ // If we're in _sigtramp(), unwinding past this frame requires special
+ // knowledge.
+ if (m_frame_type == eTrapHandlerFrame || m_frame_type == eDebuggerFrame)
+ return unwind_plan_sp;
- unwind_plan_sp = func_unwinders_sp->GetUnwindPlanFastUnwind (*m_thread.CalculateTarget(), m_thread);
- if (unwind_plan_sp)
- {
- if (unwind_plan_sp->PlanValidAtAddress (m_current_pc))
- {
- Log *log(GetLogIfAllCategoriesSet (LIBLLDB_LOG_UNWIND));
- if (log && log->GetVerbose())
- {
- if (m_fast_unwind_plan_sp)
- UnwindLogMsgVerbose ("frame, and has a fast UnwindPlan");
- else
- UnwindLogMsgVerbose ("frame");
- }
- m_frame_type = eNormalFrame;
- return unwind_plan_sp;
- }
+ unwind_plan_sp = func_unwinders_sp->GetUnwindPlanFastUnwind(
+ *m_thread.CalculateTarget(), m_thread);
+ if (unwind_plan_sp) {
+ if (unwind_plan_sp->PlanValidAtAddress(m_current_pc)) {
+ Log *log(GetLogIfAllCategoriesSet(LIBLLDB_LOG_UNWIND));
+ if (log && log->GetVerbose()) {
+ if (m_fast_unwind_plan_sp)
+ UnwindLogMsgVerbose("frame, and has a fast UnwindPlan");
else
- {
- unwind_plan_sp.reset();
- }
+ UnwindLogMsgVerbose("frame");
+ }
+ m_frame_type = eNormalFrame;
+ return unwind_plan_sp;
+ } else {
+ unwind_plan_sp.reset();
}
- return unwind_plan_sp;
+ }
+ return unwind_plan_sp;
}
// On entry to this method,
//
-// 1. m_frame_type should already be set to eTrapHandlerFrame/eDebuggerFrame if either of those are correct,
+// 1. m_frame_type should already be set to eTrapHandlerFrame/eDebuggerFrame
+// if either of those are correct,
// 2. m_sym_ctx should already be filled in, and
// 3. m_current_pc should have the current pc value for this frame
-// 4. m_current_offset_backed_up_one should have the current byte offset into the function, maybe backed up by 1, -1 if unknown
+// 4. m_current_offset_backed_up_one should have the current byte offset into
+// the function, maybe backed up by 1, -1 if unknown
-UnwindPlanSP
-RegisterContextLLDB::GetFullUnwindPlanForFrame ()
-{
- UnwindPlanSP unwind_plan_sp;
- UnwindPlanSP arch_default_unwind_plan_sp;
- ExecutionContext exe_ctx(m_thread.shared_from_this());
- Process *process = exe_ctx.GetProcessPtr();
- ABI *abi = process ? process->GetABI().get() : NULL;
- if (abi)
- {
- arch_default_unwind_plan_sp.reset (new UnwindPlan (lldb::eRegisterKindGeneric));
- abi->CreateDefaultUnwindPlan(*arch_default_unwind_plan_sp);
- }
- else
- {
- UnwindLogMsg ("unable to get architectural default UnwindPlan from ABI plugin");
- }
-
- bool behaves_like_zeroth_frame = false;
- if (IsFrameZero ()
- || GetNextFrame()->m_frame_type == eTrapHandlerFrame
- || GetNextFrame()->m_frame_type == eDebuggerFrame)
- {
- behaves_like_zeroth_frame = true;
- // If this frame behaves like a 0th frame (currently executing or
- // interrupted asynchronously), all registers can be retrieved.
- m_all_registers_available = true;
- }
-
- // If we've done a jmp 0x0 / bl 0x0 (called through a null function pointer) so the pc is 0x0
- // in the zeroth frame, we need to use the "unwind at first instruction" arch default UnwindPlan
- // Also, if this Process can report on memory region attributes, any non-executable region means
- // we jumped through a bad function pointer - handle the same way as 0x0.
- // Note, if we have a symbol context & a symbol, we don't want to follow this code path. This is
- // for jumping to memory regions without any information available.
-
- if ((!m_sym_ctx_valid || (m_sym_ctx.function == NULL && m_sym_ctx.symbol == NULL)) && behaves_like_zeroth_frame && m_current_pc.IsValid())
- {
- uint32_t permissions;
- addr_t current_pc_addr = m_current_pc.GetLoadAddress (exe_ctx.GetTargetPtr());
- if (current_pc_addr == 0
- || (process &&
- process->GetLoadAddressPermissions (current_pc_addr, permissions)
- && (permissions & ePermissionsExecutable) == 0))
- {
- if (abi)
- {
- unwind_plan_sp.reset (new UnwindPlan (lldb::eRegisterKindGeneric));
- abi->CreateFunctionEntryUnwindPlan(*unwind_plan_sp);
- m_frame_type = eNormalFrame;
- return unwind_plan_sp;
- }
- }
- }
-
- // No Module for the current pc, try using the architecture default unwind.
- ModuleSP pc_module_sp (m_current_pc.GetModule());
- if (!m_current_pc.IsValid() || !pc_module_sp || pc_module_sp->GetObjectFile() == NULL)
- {
- m_frame_type = eNormalFrame;
- return arch_default_unwind_plan_sp;
- }
-
- FuncUnwindersSP func_unwinders_sp;
- if (m_sym_ctx_valid)
- {
- func_unwinders_sp = pc_module_sp->GetObjectFile()->GetUnwindTable().GetFuncUnwindersContainingAddress (m_current_pc, m_sym_ctx);
- }
-
- // No FuncUnwinders available for this pc (stripped function symbols, lldb could not augment its
- // function table with another source, like LC_FUNCTION_STARTS or eh_frame in ObjectFileMachO).
- // See if eh_frame or the .ARM.exidx tables have unwind information for this address, else fall
- // back to the architectural default unwind.
- if (!func_unwinders_sp)
- {
+UnwindPlanSP RegisterContextLLDB::GetFullUnwindPlanForFrame() {
+ UnwindPlanSP unwind_plan_sp;
+ UnwindPlanSP arch_default_unwind_plan_sp;
+ ExecutionContext exe_ctx(m_thread.shared_from_this());
+ Process *process = exe_ctx.GetProcessPtr();
+ ABI *abi = process ? process->GetABI().get() : NULL;
+ if (abi) {
+ arch_default_unwind_plan_sp.reset(
+ new UnwindPlan(lldb::eRegisterKindGeneric));
+ abi->CreateDefaultUnwindPlan(*arch_default_unwind_plan_sp);
+ } else {
+ UnwindLogMsg(
+ "unable to get architectural default UnwindPlan from ABI plugin");
+ }
+
+ bool behaves_like_zeroth_frame = false;
+ if (IsFrameZero() || GetNextFrame()->m_frame_type == eTrapHandlerFrame ||
+ GetNextFrame()->m_frame_type == eDebuggerFrame) {
+ behaves_like_zeroth_frame = true;
+ // If this frame behaves like a 0th frame (currently executing or
+ // interrupted asynchronously), all registers can be retrieved.
+ m_all_registers_available = true;
+ }
+
+ // If we've done a jmp 0x0 / bl 0x0 (called through a null function pointer)
+ // so the pc is 0x0
+ // in the zeroth frame, we need to use the "unwind at first instruction" arch
+ // default UnwindPlan
+ // Also, if this Process can report on memory region attributes, any
+ // non-executable region means
+ // we jumped through a bad function pointer - handle the same way as 0x0.
+ // Note, if we have a symbol context & a symbol, we don't want to follow this
+ // code path. This is
+ // for jumping to memory regions without any information available.
+
+ if ((!m_sym_ctx_valid ||
+ (m_sym_ctx.function == NULL && m_sym_ctx.symbol == NULL)) &&
+ behaves_like_zeroth_frame && m_current_pc.IsValid()) {
+ uint32_t permissions;
+ addr_t current_pc_addr =
+ m_current_pc.GetLoadAddress(exe_ctx.GetTargetPtr());
+ if (current_pc_addr == 0 ||
+ (process &&
+ process->GetLoadAddressPermissions(current_pc_addr, permissions) &&
+ (permissions & ePermissionsExecutable) == 0)) {
+ if (abi) {
+ unwind_plan_sp.reset(new UnwindPlan(lldb::eRegisterKindGeneric));
+ abi->CreateFunctionEntryUnwindPlan(*unwind_plan_sp);
m_frame_type = eNormalFrame;
-
- if (!pc_module_sp || !pc_module_sp->GetObjectFile() || !m_current_pc.IsValid())
- return arch_default_unwind_plan_sp;
-
- // Even with -fomit-frame-pointer, we can try eh_frame to get back on track.
- DWARFCallFrameInfo *eh_frame = pc_module_sp->GetObjectFile()->GetUnwindTable().GetEHFrameInfo();
- if (eh_frame)
- {
- unwind_plan_sp.reset (new UnwindPlan (lldb::eRegisterKindGeneric));
- if (eh_frame->GetUnwindPlan (m_current_pc, *unwind_plan_sp))
- return unwind_plan_sp;
- else
- unwind_plan_sp.reset();
- }
-
- ArmUnwindInfo *arm_exidx = pc_module_sp->GetObjectFile()->GetUnwindTable().GetArmUnwindInfo();
- if (arm_exidx)
- {
- unwind_plan_sp.reset (new UnwindPlan (lldb::eRegisterKindGeneric));
- if (arm_exidx->GetUnwindPlan (exe_ctx.GetTargetRef(), m_current_pc, *unwind_plan_sp))
- return unwind_plan_sp;
- else
- unwind_plan_sp.reset();
- }
-
- return arch_default_unwind_plan_sp;
- }
-
- // If we're in _sigtramp(), unwinding past this frame requires special knowledge. On Mac OS X this knowledge
- // is properly encoded in the eh_frame section, so prefer that if available.
- // On other platforms we may need to provide a platform-specific UnwindPlan which encodes the details of
- // how to unwind out of sigtramp.
- if (m_frame_type == eTrapHandlerFrame && process)
- {
- m_fast_unwind_plan_sp.reset();
- unwind_plan_sp = func_unwinders_sp->GetEHFrameUnwindPlan (process->GetTarget(), m_current_offset_backed_up_one);
- if (unwind_plan_sp && unwind_plan_sp->PlanValidAtAddress (m_current_pc) && unwind_plan_sp->GetSourcedFromCompiler() == eLazyBoolYes)
- {
- return unwind_plan_sp;
- }
+ return unwind_plan_sp;
+ }
}
+ }
- // Ask the DynamicLoader if the eh_frame CFI should be trusted in this frame even when it's frame zero
- // This comes up if we have hand-written functions in a Module and hand-written eh_frame. The assembly
- // instruction inspection may fail and the eh_frame CFI were probably written with some care to do the
- // right thing. It'd be nice if there was a way to ask the eh_frame directly if it is asynchronous
- // (can be trusted at every instruction point) or synchronous (the normal case - only at call sites).
- // But there is not.
- if (process && process->GetDynamicLoader() && process->GetDynamicLoader()->AlwaysRelyOnEHUnwindInfo (m_sym_ctx))
- {
- // We must specifically call the GetEHFrameUnwindPlan() method here -- normally we would
- // call GetUnwindPlanAtCallSite() -- because CallSite may return an unwind plan sourced from
- // either eh_frame (that's what we intend) or compact unwind (this won't work)
- unwind_plan_sp = func_unwinders_sp->GetEHFrameUnwindPlan (process->GetTarget(), m_current_offset_backed_up_one);
- if (unwind_plan_sp && unwind_plan_sp->PlanValidAtAddress (m_current_pc))
- {
- UnwindLogMsgVerbose ("frame uses %s for full UnwindPlan because the DynamicLoader suggested we prefer it",
- unwind_plan_sp->GetSourceName().GetCString());
- return unwind_plan_sp;
- }
- }
+ // No Module for the current pc, try using the architecture default unwind.
+ ModuleSP pc_module_sp(m_current_pc.GetModule());
+ if (!m_current_pc.IsValid() || !pc_module_sp ||
+ pc_module_sp->GetObjectFile() == NULL) {
+ m_frame_type = eNormalFrame;
+ return arch_default_unwind_plan_sp;
+ }
- // Typically the NonCallSite UnwindPlan is the unwind created by inspecting the assembly language instructions
- if (behaves_like_zeroth_frame && process)
- {
- unwind_plan_sp = func_unwinders_sp->GetUnwindPlanAtNonCallSite (process->GetTarget(), m_thread, m_current_offset_backed_up_one);
- if (unwind_plan_sp && unwind_plan_sp->PlanValidAtAddress (m_current_pc))
- {
- if (unwind_plan_sp->GetSourcedFromCompiler() == eLazyBoolNo)
- {
- // We probably have an UnwindPlan created by inspecting assembly instructions. The
- // assembly profilers work really well with compiler-generated functions but hand-
- // written assembly can be problematic. We set the eh_frame based unwind plan as our
- // fallback unwind plan if instruction emulation doesn't work out even for non call
- // sites if it is available and use the architecture default unwind plan if it is
- // not available. The eh_frame unwind plan is more reliable even on non call sites
- // then the architecture default plan and for hand written assembly code it is often
- // written in a way that it valid at all location what helps in the most common
- // cases when the instruction emulation fails.
- UnwindPlanSP call_site_unwind_plan = func_unwinders_sp->GetUnwindPlanAtCallSite(process->GetTarget(), m_current_offset_backed_up_one);
- if (call_site_unwind_plan &&
- call_site_unwind_plan.get() != unwind_plan_sp.get() &&
- call_site_unwind_plan->GetSourceName() != unwind_plan_sp->GetSourceName())
- {
- m_fallback_unwind_plan_sp = call_site_unwind_plan;
- }
- else
- {
- m_fallback_unwind_plan_sp = arch_default_unwind_plan_sp;
- }
- }
- UnwindLogMsgVerbose ("frame uses %s for full UnwindPlan", unwind_plan_sp->GetSourceName().GetCString());
- return unwind_plan_sp;
- }
+ FuncUnwindersSP func_unwinders_sp;
+ if (m_sym_ctx_valid) {
+ func_unwinders_sp =
+ pc_module_sp->GetObjectFile()
+ ->GetUnwindTable()
+ .GetFuncUnwindersContainingAddress(m_current_pc, m_sym_ctx);
+ }
+
+ // No FuncUnwinders available for this pc (stripped function symbols, lldb
+ // could not augment its
+ // function table with another source, like LC_FUNCTION_STARTS or eh_frame in
+ // ObjectFileMachO).
+ // See if eh_frame or the .ARM.exidx tables have unwind information for this
+ // address, else fall
+ // back to the architectural default unwind.
+ if (!func_unwinders_sp) {
+ m_frame_type = eNormalFrame;
+
+ if (!pc_module_sp || !pc_module_sp->GetObjectFile() ||
+ !m_current_pc.IsValid())
+ return arch_default_unwind_plan_sp;
+
+ // Even with -fomit-frame-pointer, we can try eh_frame to get back on track.
+ DWARFCallFrameInfo *eh_frame =
+ pc_module_sp->GetObjectFile()->GetUnwindTable().GetEHFrameInfo();
+ if (eh_frame) {
+ unwind_plan_sp.reset(new UnwindPlan(lldb::eRegisterKindGeneric));
+ if (eh_frame->GetUnwindPlan(m_current_pc, *unwind_plan_sp))
+ return unwind_plan_sp;
+ else
+ unwind_plan_sp.reset();
}
- // Typically this is unwind info from an eh_frame section intended for exception handling; only valid at call sites
- if (process)
- {
- unwind_plan_sp = func_unwinders_sp->GetUnwindPlanAtCallSite (process->GetTarget(), m_current_offset_backed_up_one);
- }
- int valid_offset = -1;
- if (IsUnwindPlanValidForCurrentPC(unwind_plan_sp, valid_offset))
- {
- UnwindLogMsgVerbose ("frame uses %s for full UnwindPlan", unwind_plan_sp->GetSourceName().GetCString());
+ ArmUnwindInfo *arm_exidx =
+ pc_module_sp->GetObjectFile()->GetUnwindTable().GetArmUnwindInfo();
+ if (arm_exidx) {
+ unwind_plan_sp.reset(new UnwindPlan(lldb::eRegisterKindGeneric));
+ if (arm_exidx->GetUnwindPlan(exe_ctx.GetTargetRef(), m_current_pc,
+ *unwind_plan_sp))
return unwind_plan_sp;
+ else
+ unwind_plan_sp.reset();
}
- // We'd prefer to use an UnwindPlan intended for call sites when we're at a call site but if we've
- // struck out on that, fall back to using the non-call-site assembly inspection UnwindPlan if possible.
- if (process)
- {
- unwind_plan_sp = func_unwinders_sp->GetUnwindPlanAtNonCallSite (process->GetTarget(), m_thread, m_current_offset_backed_up_one);
- }
- if (unwind_plan_sp && unwind_plan_sp->GetSourcedFromCompiler() == eLazyBoolNo)
- {
- // We probably have an UnwindPlan created by inspecting assembly instructions. The assembly
- // profilers work really well with compiler-generated functions but hand- written assembly
- // can be problematic. We set the eh_frame based unwind plan as our fallback unwind plan if
- // instruction emulation doesn't work out even for non call sites if it is available and use
- // the architecture default unwind plan if it is not available. The eh_frame unwind plan is
- // more reliable even on non call sites then the architecture default plan and for hand
- // written assembly code it is often written in a way that it valid at all location what
- // helps in the most common cases when the instruction emulation fails.
- UnwindPlanSP call_site_unwind_plan = func_unwinders_sp->GetUnwindPlanAtCallSite(process->GetTarget(), m_current_offset_backed_up_one);
+ return arch_default_unwind_plan_sp;
+ }
+
+ // If we're in _sigtramp(), unwinding past this frame requires special
+ // knowledge. On Mac OS X this knowledge
+ // is properly encoded in the eh_frame section, so prefer that if available.
+ // On other platforms we may need to provide a platform-specific UnwindPlan
+ // which encodes the details of
+ // how to unwind out of sigtramp.
+ if (m_frame_type == eTrapHandlerFrame && process) {
+ m_fast_unwind_plan_sp.reset();
+ unwind_plan_sp = func_unwinders_sp->GetEHFrameUnwindPlan(
+ process->GetTarget(), m_current_offset_backed_up_one);
+ if (unwind_plan_sp && unwind_plan_sp->PlanValidAtAddress(m_current_pc) &&
+ unwind_plan_sp->GetSourcedFromCompiler() == eLazyBoolYes) {
+ return unwind_plan_sp;
+ }
+ }
+
+ // Ask the DynamicLoader if the eh_frame CFI should be trusted in this frame
+ // even when it's frame zero
+ // This comes up if we have hand-written functions in a Module and
+ // hand-written eh_frame. The assembly
+ // instruction inspection may fail and the eh_frame CFI were probably written
+ // with some care to do the
+ // right thing. It'd be nice if there was a way to ask the eh_frame directly
+ // if it is asynchronous
+ // (can be trusted at every instruction point) or synchronous (the normal case
+ // - only at call sites).
+ // But there is not.
+ if (process && process->GetDynamicLoader() &&
+ process->GetDynamicLoader()->AlwaysRelyOnEHUnwindInfo(m_sym_ctx)) {
+ // We must specifically call the GetEHFrameUnwindPlan() method here --
+ // normally we would
+ // call GetUnwindPlanAtCallSite() -- because CallSite may return an unwind
+ // plan sourced from
+ // either eh_frame (that's what we intend) or compact unwind (this won't
+ // work)
+ unwind_plan_sp = func_unwinders_sp->GetEHFrameUnwindPlan(
+ process->GetTarget(), m_current_offset_backed_up_one);
+ if (unwind_plan_sp && unwind_plan_sp->PlanValidAtAddress(m_current_pc)) {
+ UnwindLogMsgVerbose("frame uses %s for full UnwindPlan because the "
+ "DynamicLoader suggested we prefer it",
+ unwind_plan_sp->GetSourceName().GetCString());
+ return unwind_plan_sp;
+ }
+ }
+
+ // Typically the NonCallSite UnwindPlan is the unwind created by inspecting
+ // the assembly language instructions
+ if (behaves_like_zeroth_frame && process) {
+ unwind_plan_sp = func_unwinders_sp->GetUnwindPlanAtNonCallSite(
+ process->GetTarget(), m_thread, m_current_offset_backed_up_one);
+ if (unwind_plan_sp && unwind_plan_sp->PlanValidAtAddress(m_current_pc)) {
+ if (unwind_plan_sp->GetSourcedFromCompiler() == eLazyBoolNo) {
+ // We probably have an UnwindPlan created by inspecting assembly
+ // instructions. The
+ // assembly profilers work really well with compiler-generated functions
+ // but hand-
+ // written assembly can be problematic. We set the eh_frame based unwind
+ // plan as our
+ // fallback unwind plan if instruction emulation doesn't work out even
+ // for non call
+ // sites if it is available and use the architecture default unwind plan
+ // if it is
+ // not available. The eh_frame unwind plan is more reliable even on non
+ // call sites
+ // then the architecture default plan and for hand written assembly code
+ // it is often
+ // written in a way that it valid at all location what helps in the most
+ // common
+ // cases when the instruction emulation fails.
+ UnwindPlanSP call_site_unwind_plan =
+ func_unwinders_sp->GetUnwindPlanAtCallSite(
+ process->GetTarget(), m_current_offset_backed_up_one);
if (call_site_unwind_plan &&
call_site_unwind_plan.get() != unwind_plan_sp.get() &&
- call_site_unwind_plan->GetSourceName() != unwind_plan_sp->GetSourceName())
- {
- m_fallback_unwind_plan_sp = call_site_unwind_plan;
- }
- else
- {
- m_fallback_unwind_plan_sp = arch_default_unwind_plan_sp;
- }
- }
-
- if (IsUnwindPlanValidForCurrentPC(unwind_plan_sp, valid_offset))
- {
- UnwindLogMsgVerbose ("frame uses %s for full UnwindPlan", unwind_plan_sp->GetSourceName().GetCString());
- return unwind_plan_sp;
- }
-
- // If we're on the first instruction of a function, and we have an architectural default UnwindPlan
- // for the initial instruction of a function, use that.
- if (m_current_offset_backed_up_one == 0)
- {
- unwind_plan_sp = func_unwinders_sp->GetUnwindPlanArchitectureDefaultAtFunctionEntry (m_thread);
- if (unwind_plan_sp)
- {
- UnwindLogMsgVerbose ("frame uses %s for full UnwindPlan", unwind_plan_sp->GetSourceName().GetCString());
- return unwind_plan_sp;
- }
- }
+ call_site_unwind_plan->GetSourceName() !=
+ unwind_plan_sp->GetSourceName()) {
+ m_fallback_unwind_plan_sp = call_site_unwind_plan;
+ } else {
+ m_fallback_unwind_plan_sp = arch_default_unwind_plan_sp;
+ }
+ }
+ UnwindLogMsgVerbose("frame uses %s for full UnwindPlan",
+ unwind_plan_sp->GetSourceName().GetCString());
+ return unwind_plan_sp;
+ }
+ }
+
+ // Typically this is unwind info from an eh_frame section intended for
+ // exception handling; only valid at call sites
+ if (process) {
+ unwind_plan_sp = func_unwinders_sp->GetUnwindPlanAtCallSite(
+ process->GetTarget(), m_current_offset_backed_up_one);
+ }
+ int valid_offset = -1;
+ if (IsUnwindPlanValidForCurrentPC(unwind_plan_sp, valid_offset)) {
+ UnwindLogMsgVerbose("frame uses %s for full UnwindPlan",
+ unwind_plan_sp->GetSourceName().GetCString());
+ return unwind_plan_sp;
+ }
- // If nothing else, use the architectural default UnwindPlan and hope that does the job.
- if (arch_default_unwind_plan_sp)
- UnwindLogMsgVerbose ("frame uses %s for full UnwindPlan", arch_default_unwind_plan_sp->GetSourceName().GetCString());
- else
- UnwindLogMsg ("Unable to find any UnwindPlan for full unwind of this frame.");
+ // We'd prefer to use an UnwindPlan intended for call sites when we're at a
+ // call site but if we've
+ // struck out on that, fall back to using the non-call-site assembly
+ // inspection UnwindPlan if possible.
+ if (process) {
+ unwind_plan_sp = func_unwinders_sp->GetUnwindPlanAtNonCallSite(
+ process->GetTarget(), m_thread, m_current_offset_backed_up_one);
+ }
+ if (unwind_plan_sp &&
+ unwind_plan_sp->GetSourcedFromCompiler() == eLazyBoolNo) {
+ // We probably have an UnwindPlan created by inspecting assembly
+ // instructions. The assembly
+ // profilers work really well with compiler-generated functions but hand-
+ // written assembly
+ // can be problematic. We set the eh_frame based unwind plan as our fallback
+ // unwind plan if
+ // instruction emulation doesn't work out even for non call sites if it is
+ // available and use
+ // the architecture default unwind plan if it is not available. The eh_frame
+ // unwind plan is
+ // more reliable even on non call sites then the architecture default plan
+ // and for hand
+ // written assembly code it is often written in a way that it valid at all
+ // location what
+ // helps in the most common cases when the instruction emulation fails.
+ UnwindPlanSP call_site_unwind_plan =
+ func_unwinders_sp->GetUnwindPlanAtCallSite(
+ process->GetTarget(), m_current_offset_backed_up_one);
+ if (call_site_unwind_plan &&
+ call_site_unwind_plan.get() != unwind_plan_sp.get() &&
+ call_site_unwind_plan->GetSourceName() !=
+ unwind_plan_sp->GetSourceName()) {
+ m_fallback_unwind_plan_sp = call_site_unwind_plan;
+ } else {
+ m_fallback_unwind_plan_sp = arch_default_unwind_plan_sp;
+ }
+ }
+
+ if (IsUnwindPlanValidForCurrentPC(unwind_plan_sp, valid_offset)) {
+ UnwindLogMsgVerbose("frame uses %s for full UnwindPlan",
+ unwind_plan_sp->GetSourceName().GetCString());
+ return unwind_plan_sp;
+ }
- return arch_default_unwind_plan_sp;
-}
+ // If we're on the first instruction of a function, and we have an
+ // architectural default UnwindPlan
+ // for the initial instruction of a function, use that.
+ if (m_current_offset_backed_up_one == 0) {
+ unwind_plan_sp =
+ func_unwinders_sp->GetUnwindPlanArchitectureDefaultAtFunctionEntry(
+ m_thread);
+ if (unwind_plan_sp) {
+ UnwindLogMsgVerbose("frame uses %s for full UnwindPlan",
+ unwind_plan_sp->GetSourceName().GetCString());
+ return unwind_plan_sp;
+ }
+ }
+ // If nothing else, use the architectural default UnwindPlan and hope that
+ // does the job.
+ if (arch_default_unwind_plan_sp)
+ UnwindLogMsgVerbose(
+ "frame uses %s for full UnwindPlan",
+ arch_default_unwind_plan_sp->GetSourceName().GetCString());
+ else
+ UnwindLogMsg(
+ "Unable to find any UnwindPlan for full unwind of this frame.");
-void
-RegisterContextLLDB::InvalidateAllRegisters ()
-{
- m_frame_type = eNotAValidFrame;
+ return arch_default_unwind_plan_sp;
}
-size_t
-RegisterContextLLDB::GetRegisterCount ()
-{
- return m_thread.GetRegisterContext()->GetRegisterCount();
+void RegisterContextLLDB::InvalidateAllRegisters() {
+ m_frame_type = eNotAValidFrame;
}
-const RegisterInfo *
-RegisterContextLLDB::GetRegisterInfoAtIndex (size_t reg)
-{
- return m_thread.GetRegisterContext()->GetRegisterInfoAtIndex (reg);
+size_t RegisterContextLLDB::GetRegisterCount() {
+ return m_thread.GetRegisterContext()->GetRegisterCount();
}
-size_t
-RegisterContextLLDB::GetRegisterSetCount ()
-{
- return m_thread.GetRegisterContext()->GetRegisterSetCount ();
+const RegisterInfo *RegisterContextLLDB::GetRegisterInfoAtIndex(size_t reg) {
+ return m_thread.GetRegisterContext()->GetRegisterInfoAtIndex(reg);
}
-const RegisterSet *
-RegisterContextLLDB::GetRegisterSet (size_t reg_set)
-{
- return m_thread.GetRegisterContext()->GetRegisterSet (reg_set);
+size_t RegisterContextLLDB::GetRegisterSetCount() {
+ return m_thread.GetRegisterContext()->GetRegisterSetCount();
}
-uint32_t
-RegisterContextLLDB::ConvertRegisterKindToRegisterNumber (lldb::RegisterKind kind, uint32_t num)
-{
- return m_thread.GetRegisterContext()->ConvertRegisterKindToRegisterNumber (kind, num);
+const RegisterSet *RegisterContextLLDB::GetRegisterSet(size_t reg_set) {
+ return m_thread.GetRegisterContext()->GetRegisterSet(reg_set);
}
-bool
-RegisterContextLLDB::ReadRegisterValueFromRegisterLocation (lldb_private::UnwindLLDB::RegisterLocation regloc,
- const RegisterInfo *reg_info,
- RegisterValue &value)
-{
- if (!IsValid())
- return false;
- bool success = false;
-
- switch (regloc.type)
- {
- case UnwindLLDB::RegisterLocation::eRegisterInLiveRegisterContext:
- {
- const RegisterInfo *other_reg_info = GetRegisterInfoAtIndex(regloc.location.register_number);
-
- if (!other_reg_info)
- return false;
-
- success = m_thread.GetRegisterContext()->ReadRegister (other_reg_info, value);
- }
- break;
- case UnwindLLDB::RegisterLocation::eRegisterInRegister:
- {
- const RegisterInfo *other_reg_info = GetRegisterInfoAtIndex(regloc.location.register_number);
-
- if (!other_reg_info)
- return false;
-
- if (IsFrameZero ())
- {
- success = m_thread.GetRegisterContext()->ReadRegister (other_reg_info, value);
- }
- else
- {
- success = GetNextFrame()->ReadRegister (other_reg_info, value);
- }
- }
- break;
- case UnwindLLDB::RegisterLocation::eRegisterValueInferred:
- success = value.SetUInt (regloc.location.inferred_value, reg_info->byte_size);
- break;
-
- case UnwindLLDB::RegisterLocation::eRegisterNotSaved:
- break;
- case UnwindLLDB::RegisterLocation::eRegisterSavedAtHostMemoryLocation:
- assert ("FIXME debugger inferior function call unwind");
- break;
- case UnwindLLDB::RegisterLocation::eRegisterSavedAtMemoryLocation:
- {
- Error error (ReadRegisterValueFromMemory(reg_info,
- regloc.location.target_memory_location,
- reg_info->byte_size,
- value));
- success = error.Success();
- }
- break;
- default:
- assert ("Unknown RegisterLocation type.");
- break;
- }
- return success;
+uint32_t RegisterContextLLDB::ConvertRegisterKindToRegisterNumber(
+ lldb::RegisterKind kind, uint32_t num) {
+ return m_thread.GetRegisterContext()->ConvertRegisterKindToRegisterNumber(
+ kind, num);
}
-bool
-RegisterContextLLDB::WriteRegisterValueToRegisterLocation (lldb_private::UnwindLLDB::RegisterLocation regloc,
- const RegisterInfo *reg_info,
- const RegisterValue &value)
-{
- if (!IsValid())
- return false;
-
- bool success = false;
-
- switch (regloc.type)
- {
- case UnwindLLDB::RegisterLocation::eRegisterInLiveRegisterContext:
- {
- const RegisterInfo *other_reg_info = GetRegisterInfoAtIndex(regloc.location.register_number);
- success = m_thread.GetRegisterContext()->WriteRegister (other_reg_info, value);
- }
- break;
- case UnwindLLDB::RegisterLocation::eRegisterInRegister:
- {
- const RegisterInfo *other_reg_info = GetRegisterInfoAtIndex(regloc.location.register_number);
- if (IsFrameZero ())
- {
- success = m_thread.GetRegisterContext()->WriteRegister (other_reg_info, value);
- }
- else
- {
- success = GetNextFrame()->WriteRegister (other_reg_info, value);
- }
- }
- break;
- case UnwindLLDB::RegisterLocation::eRegisterValueInferred:
- case UnwindLLDB::RegisterLocation::eRegisterNotSaved:
- break;
- case UnwindLLDB::RegisterLocation::eRegisterSavedAtHostMemoryLocation:
- assert ("FIXME debugger inferior function call unwind");
- break;
- case UnwindLLDB::RegisterLocation::eRegisterSavedAtMemoryLocation:
- {
- Error error (WriteRegisterValueToMemory (reg_info,
- regloc.location.target_memory_location,
- reg_info->byte_size,
- value));
- success = error.Success();
- }
- break;
- default:
- assert ("Unknown RegisterLocation type.");
- break;
- }
- return success;
-}
+bool RegisterContextLLDB::ReadRegisterValueFromRegisterLocation(
+ lldb_private::UnwindLLDB::RegisterLocation regloc,
+ const RegisterInfo *reg_info, RegisterValue &value) {
+ if (!IsValid())
+ return false;
+ bool success = false;
+ switch (regloc.type) {
+ case UnwindLLDB::RegisterLocation::eRegisterInLiveRegisterContext: {
+ const RegisterInfo *other_reg_info =
+ GetRegisterInfoAtIndex(regloc.location.register_number);
+
+ if (!other_reg_info)
+ return false;
+
+ success =
+ m_thread.GetRegisterContext()->ReadRegister(other_reg_info, value);
+ } break;
+ case UnwindLLDB::RegisterLocation::eRegisterInRegister: {
+ const RegisterInfo *other_reg_info =
+ GetRegisterInfoAtIndex(regloc.location.register_number);
+
+ if (!other_reg_info)
+ return false;
+
+ if (IsFrameZero()) {
+ success =
+ m_thread.GetRegisterContext()->ReadRegister(other_reg_info, value);
+ } else {
+ success = GetNextFrame()->ReadRegister(other_reg_info, value);
+ }
+ } break;
+ case UnwindLLDB::RegisterLocation::eRegisterValueInferred:
+ success =
+ value.SetUInt(regloc.location.inferred_value, reg_info->byte_size);
+ break;
+
+ case UnwindLLDB::RegisterLocation::eRegisterNotSaved:
+ break;
+ case UnwindLLDB::RegisterLocation::eRegisterSavedAtHostMemoryLocation:
+ assert("FIXME debugger inferior function call unwind");
+ break;
+ case UnwindLLDB::RegisterLocation::eRegisterSavedAtMemoryLocation: {
+ Error error(ReadRegisterValueFromMemory(
+ reg_info, regloc.location.target_memory_location, reg_info->byte_size,
+ value));
+ success = error.Success();
+ } break;
+ default:
+ assert("Unknown RegisterLocation type.");
+ break;
+ }
+ return success;
+}
+
+bool RegisterContextLLDB::WriteRegisterValueToRegisterLocation(
+ lldb_private::UnwindLLDB::RegisterLocation regloc,
+ const RegisterInfo *reg_info, const RegisterValue &value) {
+ if (!IsValid())
+ return false;
-bool
-RegisterContextLLDB::IsValid () const
-{
- return m_frame_type != eNotAValidFrame;
-}
+ bool success = false;
-// After the final stack frame in a stack walk we'll get one invalid (eNotAValidFrame) stack frame --
-// one past the end of the stack walk. But higher-level code will need to tell the differnece between
-// "the unwind plan below this frame failed" versus "we successfully completed the stack walk" so
+ switch (regloc.type) {
+ case UnwindLLDB::RegisterLocation::eRegisterInLiveRegisterContext: {
+ const RegisterInfo *other_reg_info =
+ GetRegisterInfoAtIndex(regloc.location.register_number);
+ success =
+ m_thread.GetRegisterContext()->WriteRegister(other_reg_info, value);
+ } break;
+ case UnwindLLDB::RegisterLocation::eRegisterInRegister: {
+ const RegisterInfo *other_reg_info =
+ GetRegisterInfoAtIndex(regloc.location.register_number);
+ if (IsFrameZero()) {
+ success =
+ m_thread.GetRegisterContext()->WriteRegister(other_reg_info, value);
+ } else {
+ success = GetNextFrame()->WriteRegister(other_reg_info, value);
+ }
+ } break;
+ case UnwindLLDB::RegisterLocation::eRegisterValueInferred:
+ case UnwindLLDB::RegisterLocation::eRegisterNotSaved:
+ break;
+ case UnwindLLDB::RegisterLocation::eRegisterSavedAtHostMemoryLocation:
+ assert("FIXME debugger inferior function call unwind");
+ break;
+ case UnwindLLDB::RegisterLocation::eRegisterSavedAtMemoryLocation: {
+ Error error(WriteRegisterValueToMemory(
+ reg_info, regloc.location.target_memory_location, reg_info->byte_size,
+ value));
+ success = error.Success();
+ } break;
+ default:
+ assert("Unknown RegisterLocation type.");
+ break;
+ }
+ return success;
+}
+
+bool RegisterContextLLDB::IsValid() const {
+ return m_frame_type != eNotAValidFrame;
+}
+
+// After the final stack frame in a stack walk we'll get one invalid
+// (eNotAValidFrame) stack frame --
+// one past the end of the stack walk. But higher-level code will need to tell
+// the differnece between
+// "the unwind plan below this frame failed" versus "we successfully completed
+// the stack walk" so
// this method helps to disambiguate that.
-bool
-RegisterContextLLDB::IsTrapHandlerFrame () const
-{
- return m_frame_type == eTrapHandlerFrame;
+bool RegisterContextLLDB::IsTrapHandlerFrame() const {
+ return m_frame_type == eTrapHandlerFrame;
}
-// A skip frame is a bogus frame on the stack -- but one where we're likely to find a real frame farther
-// up the stack if we keep looking. It's always the second frame in an unwind (i.e. the first frame after
-// frame zero) where unwinding can be the trickiest. Ideally we'll mark up this frame in some way so the
-// user knows we're displaying bad data and we may have skipped one frame of their real program in the
+// A skip frame is a bogus frame on the stack -- but one where we're likely to
+// find a real frame farther
+// up the stack if we keep looking. It's always the second frame in an unwind
+// (i.e. the first frame after
+// frame zero) where unwinding can be the trickiest. Ideally we'll mark up this
+// frame in some way so the
+// user knows we're displaying bad data and we may have skipped one frame of
+// their real program in the
// process of getting back on track.
-bool
-RegisterContextLLDB::IsSkipFrame () const
-{
- return m_frame_type == eSkipFrame;
+bool RegisterContextLLDB::IsSkipFrame() const {
+ return m_frame_type == eSkipFrame;
}
-bool
-RegisterContextLLDB::IsTrapHandlerSymbol (lldb_private::Process *process, const lldb_private::SymbolContext &m_sym_ctx) const
-{
- PlatformSP platform_sp (process->GetTarget().GetPlatform());
- if (platform_sp)
- {
- const std::vector<ConstString> trap_handler_names (platform_sp->GetTrapHandlerSymbolNames());
- for (ConstString name : trap_handler_names)
- {
- if ((m_sym_ctx.function && m_sym_ctx.function->GetName() == name) ||
- (m_sym_ctx.symbol && m_sym_ctx.symbol->GetName() == name))
- {
- return true;
- }
- }
+bool RegisterContextLLDB::IsTrapHandlerSymbol(
+ lldb_private::Process *process,
+ const lldb_private::SymbolContext &m_sym_ctx) const {
+ PlatformSP platform_sp(process->GetTarget().GetPlatform());
+ if (platform_sp) {
+ const std::vector<ConstString> trap_handler_names(
+ platform_sp->GetTrapHandlerSymbolNames());
+ for (ConstString name : trap_handler_names) {
+ if ((m_sym_ctx.function && m_sym_ctx.function->GetName() == name) ||
+ (m_sym_ctx.symbol && m_sym_ctx.symbol->GetName() == name)) {
+ return true;
+ }
}
- const std::vector<ConstString> user_specified_trap_handler_names (m_parent_unwind.GetUserSpecifiedTrapHandlerFunctionNames());
- for (ConstString name : user_specified_trap_handler_names)
- {
- if ((m_sym_ctx.function && m_sym_ctx.function->GetName() == name) ||
- (m_sym_ctx.symbol && m_sym_ctx.symbol->GetName() == name))
- {
- return true;
- }
- }
+ }
+ const std::vector<ConstString> user_specified_trap_handler_names(
+ m_parent_unwind.GetUserSpecifiedTrapHandlerFunctionNames());
+ for (ConstString name : user_specified_trap_handler_names) {
+ if ((m_sym_ctx.function && m_sym_ctx.function->GetName() == name) ||
+ (m_sym_ctx.symbol && m_sym_ctx.symbol->GetName() == name)) {
+ return true;
+ }
+ }
- return false;
+ return false;
}
-// Answer the question: Where did THIS frame save the CALLER frame ("previous" frame)'s register value?
+// Answer the question: Where did THIS frame save the CALLER frame ("previous"
+// frame)'s register value?
enum UnwindLLDB::RegisterSearchResult
-RegisterContextLLDB::SavedLocationForRegister (uint32_t lldb_regnum, lldb_private::UnwindLLDB::RegisterLocation ®loc)
-{
- RegisterNumber regnum (m_thread, eRegisterKindLLDB, lldb_regnum);
-
- // Have we already found this register location?
- if (!m_registers.empty())
- {
- std::map<uint32_t, lldb_private::UnwindLLDB::RegisterLocation>::const_iterator iterator;
- iterator = m_registers.find (regnum.GetAsKind (eRegisterKindLLDB));
- if (iterator != m_registers.end())
- {
- regloc = iterator->second;
- UnwindLogMsg ("supplying caller's saved %s (%d)'s location, cached",
- regnum.GetName(), regnum.GetAsKind (eRegisterKindLLDB));
- return UnwindLLDB::RegisterSearchResult::eRegisterFound;
- }
- }
-
- // Look through the available UnwindPlans for the register location.
-
- UnwindPlan::Row::RegisterLocation unwindplan_regloc;
- bool have_unwindplan_regloc = false;
- RegisterKind unwindplan_registerkind = kNumRegisterKinds;
-
- if (m_fast_unwind_plan_sp)
- {
- UnwindPlan::RowSP active_row = m_fast_unwind_plan_sp->GetRowForFunctionOffset (m_current_offset);
- unwindplan_registerkind = m_fast_unwind_plan_sp->GetRegisterKind ();
- if (regnum.GetAsKind (unwindplan_registerkind) == LLDB_INVALID_REGNUM)
- {
- UnwindLogMsg ("could not convert lldb regnum %s (%d) into %d RegisterKind reg numbering scheme",
- regnum.GetName(), regnum.GetAsKind (eRegisterKindLLDB), (int) unwindplan_registerkind);
- return UnwindLLDB::RegisterSearchResult::eRegisterNotFound;
- }
- if (active_row->GetRegisterInfo (regnum.GetAsKind (unwindplan_registerkind), unwindplan_regloc))
- {
- UnwindLogMsg ("supplying caller's saved %s (%d)'s location using FastUnwindPlan",
- regnum.GetName(), regnum.GetAsKind (eRegisterKindLLDB));
- have_unwindplan_regloc = true;
- }
- }
-
- if (!have_unwindplan_regloc)
- {
- // m_full_unwind_plan_sp being NULL means that we haven't tried to find a full UnwindPlan yet
- if (!m_full_unwind_plan_sp)
- m_full_unwind_plan_sp = GetFullUnwindPlanForFrame ();
-
- if (m_full_unwind_plan_sp)
- {
- RegisterNumber pc_regnum (m_thread, eRegisterKindGeneric, LLDB_REGNUM_GENERIC_PC);
-
- UnwindPlan::RowSP active_row = m_full_unwind_plan_sp->GetRowForFunctionOffset (m_current_offset);
- unwindplan_registerkind = m_full_unwind_plan_sp->GetRegisterKind ();
-
- RegisterNumber return_address_reg;
-
- // If we're fetching the saved pc and this UnwindPlan defines a ReturnAddress register (e.g. lr on arm),
- // look for the return address register number in the UnwindPlan's row.
- if (pc_regnum.IsValid()
- && pc_regnum == regnum
- && m_full_unwind_plan_sp->GetReturnAddressRegister() != LLDB_INVALID_REGNUM)
- {
-
- return_address_reg.init (m_thread, m_full_unwind_plan_sp->GetRegisterKind(), m_full_unwind_plan_sp->GetReturnAddressRegister());
- regnum = return_address_reg;
- UnwindLogMsg ("requested caller's saved PC but this UnwindPlan uses a RA reg; getting %s (%d) instead",
- return_address_reg.GetName(), return_address_reg.GetAsKind (eRegisterKindLLDB));
- }
- else
- {
- if (regnum.GetAsKind (unwindplan_registerkind) == LLDB_INVALID_REGNUM)
- {
- if (unwindplan_registerkind == eRegisterKindGeneric)
- {
- UnwindLogMsg ("could not convert lldb regnum %s (%d) into eRegisterKindGeneric reg numbering scheme",
- regnum.GetName(), regnum.GetAsKind (eRegisterKindLLDB));
- }
- else
- {
- UnwindLogMsg ("could not convert lldb regnum %s (%d) into %d RegisterKind reg numbering scheme",
- regnum.GetName(), regnum.GetAsKind (eRegisterKindLLDB), (int) unwindplan_registerkind);
- }
- return UnwindLLDB::RegisterSearchResult::eRegisterNotFound;
- }
- }
-
- if (regnum.IsValid()
- && active_row->GetRegisterInfo (regnum.GetAsKind (unwindplan_registerkind), unwindplan_regloc))
- {
- have_unwindplan_regloc = true;
- UnwindLogMsg ("supplying caller's saved %s (%d)'s location using %s UnwindPlan",
- regnum.GetName(), regnum.GetAsKind (eRegisterKindLLDB),
- m_full_unwind_plan_sp->GetSourceName().GetCString());
- }
-
- // This is frame 0 and we're retrieving the PC and it's saved in a Return Address register and
- // it hasn't been saved anywhere yet -- that is, it's still live in the actual register.
- // Handle this specially.
-
- if (have_unwindplan_regloc == false
- && return_address_reg.IsValid()
- && IsFrameZero())
- {
- if (return_address_reg.GetAsKind (eRegisterKindLLDB) != LLDB_INVALID_REGNUM)
- {
- lldb_private::UnwindLLDB::RegisterLocation new_regloc;
- new_regloc.type = UnwindLLDB::RegisterLocation::eRegisterInLiveRegisterContext;
- new_regloc.location.register_number = return_address_reg.GetAsKind (eRegisterKindLLDB);
- m_registers[regnum.GetAsKind (eRegisterKindLLDB)] = new_regloc;
- regloc = new_regloc;
- UnwindLogMsg ("supplying caller's register %s (%d) from the live RegisterContext at frame 0, saved in %d",
- return_address_reg.GetName(), return_address_reg.GetAsKind (eRegisterKindLLDB),
- return_address_reg.GetAsKind (eRegisterKindLLDB));
- return UnwindLLDB::RegisterSearchResult::eRegisterFound;
- }
- }
-
- // If this architecture stores the return address in a register (it defines a Return Address register)
- // and we're on a non-zero stack frame and the Full UnwindPlan says that the pc is stored in the
- // RA registers (e.g. lr on arm), then we know that the full unwindplan is not trustworthy -- this
- // is an impossible situation and the instruction emulation code has likely been misled.
- // If this stack frame meets those criteria, we need to throw away the Full UnwindPlan that the
- // instruction emulation came up with and fall back to the architecture's Default UnwindPlan so
- // the stack walk can get past this point.
-
- // Special note: If the Full UnwindPlan was generated from the compiler, don't second-guess it
- // when we're at a call site location.
-
- // arch_default_ra_regnum is the return address register # in the Full UnwindPlan register numbering
- RegisterNumber arch_default_ra_regnum (m_thread, eRegisterKindGeneric, LLDB_REGNUM_GENERIC_RA);
-
- if (arch_default_ra_regnum.GetAsKind (unwindplan_registerkind) != LLDB_INVALID_REGNUM
- && pc_regnum == regnum
- && unwindplan_regloc.IsInOtherRegister()
- && unwindplan_regloc.GetRegisterNumber() == arch_default_ra_regnum.GetAsKind (unwindplan_registerkind)
- && m_full_unwind_plan_sp->GetSourcedFromCompiler() != eLazyBoolYes
- && !m_all_registers_available)
- {
- UnwindLogMsg ("%s UnwindPlan tried to restore the pc from the link register but this is a non-zero frame",
- m_full_unwind_plan_sp->GetSourceName().GetCString());
-
- // Throw away the full unwindplan; install the arch default unwindplan
- if (ForceSwitchToFallbackUnwindPlan())
- {
- // Update for the possibly new unwind plan
- unwindplan_registerkind = m_full_unwind_plan_sp->GetRegisterKind ();
- UnwindPlan::RowSP active_row = m_full_unwind_plan_sp->GetRowForFunctionOffset (m_current_offset);
-
- // Sanity check: Verify that we can fetch a pc value and CFA value with this unwind plan
-
- RegisterNumber arch_default_pc_reg (m_thread, eRegisterKindGeneric, LLDB_REGNUM_GENERIC_PC);
- bool can_fetch_pc_value = false;
- bool can_fetch_cfa = false;
- addr_t cfa_value;
- if (active_row)
- {
- if (arch_default_pc_reg.GetAsKind (unwindplan_registerkind) != LLDB_INVALID_REGNUM
- && active_row->GetRegisterInfo (arch_default_pc_reg.GetAsKind (unwindplan_registerkind), unwindplan_regloc))
- {
- can_fetch_pc_value = true;
- }
- if (ReadCFAValueForRow (unwindplan_registerkind, active_row, cfa_value))
- {
- can_fetch_cfa = true;
- }
- }
-
- if (can_fetch_pc_value && can_fetch_cfa)
- {
- have_unwindplan_regloc = true;
- }
- else
- {
- have_unwindplan_regloc = false;
- }
- }
- else
- {
- // We were unable to fall back to another unwind plan
- have_unwindplan_regloc = false;
- }
- }
- }
- }
-
- ExecutionContext exe_ctx(m_thread.shared_from_this());
- Process *process = exe_ctx.GetProcessPtr();
- if (have_unwindplan_regloc == false)
- {
- // If the UnwindPlan failed to give us an unwind location for this register, we may be able to fall back
- // to some ABI-defined default. For example, some ABIs allow to determine the caller's SP via the CFA.
- // Also, the ABI may set volatile registers to the undefined state.
- ABI *abi = process ? process->GetABI().get() : NULL;
- if (abi)
- {
- const RegisterInfo *reg_info = GetRegisterInfoAtIndex(regnum.GetAsKind (eRegisterKindLLDB));
- if (reg_info && abi->GetFallbackRegisterLocation (reg_info, unwindplan_regloc))
- {
- UnwindLogMsg ("supplying caller's saved %s (%d)'s location using ABI default",
- regnum.GetName(), regnum.GetAsKind (eRegisterKindLLDB));
- have_unwindplan_regloc = true;
- }
- }
- }
+RegisterContextLLDB::SavedLocationForRegister(
+ uint32_t lldb_regnum, lldb_private::UnwindLLDB::RegisterLocation ®loc) {
+ RegisterNumber regnum(m_thread, eRegisterKindLLDB, lldb_regnum);
+
+ // Have we already found this register location?
+ if (!m_registers.empty()) {
+ std::map<uint32_t,
+ lldb_private::UnwindLLDB::RegisterLocation>::const_iterator
+ iterator;
+ iterator = m_registers.find(regnum.GetAsKind(eRegisterKindLLDB));
+ if (iterator != m_registers.end()) {
+ regloc = iterator->second;
+ UnwindLogMsg("supplying caller's saved %s (%d)'s location, cached",
+ regnum.GetName(), regnum.GetAsKind(eRegisterKindLLDB));
+ return UnwindLLDB::RegisterSearchResult::eRegisterFound;
+ }
+ }
+
+ // Look through the available UnwindPlans for the register location.
+
+ UnwindPlan::Row::RegisterLocation unwindplan_regloc;
+ bool have_unwindplan_regloc = false;
+ RegisterKind unwindplan_registerkind = kNumRegisterKinds;
+
+ if (m_fast_unwind_plan_sp) {
+ UnwindPlan::RowSP active_row =
+ m_fast_unwind_plan_sp->GetRowForFunctionOffset(m_current_offset);
+ unwindplan_registerkind = m_fast_unwind_plan_sp->GetRegisterKind();
+ if (regnum.GetAsKind(unwindplan_registerkind) == LLDB_INVALID_REGNUM) {
+ UnwindLogMsg("could not convert lldb regnum %s (%d) into %d RegisterKind "
+ "reg numbering scheme",
+ regnum.GetName(), regnum.GetAsKind(eRegisterKindLLDB),
+ (int)unwindplan_registerkind);
+ return UnwindLLDB::RegisterSearchResult::eRegisterNotFound;
+ }
+ if (active_row->GetRegisterInfo(regnum.GetAsKind(unwindplan_registerkind),
+ unwindplan_regloc)) {
+ UnwindLogMsg(
+ "supplying caller's saved %s (%d)'s location using FastUnwindPlan",
+ regnum.GetName(), regnum.GetAsKind(eRegisterKindLLDB));
+ have_unwindplan_regloc = true;
+ }
+ }
+
+ if (!have_unwindplan_regloc) {
+ // m_full_unwind_plan_sp being NULL means that we haven't tried to find a
+ // full UnwindPlan yet
+ if (!m_full_unwind_plan_sp)
+ m_full_unwind_plan_sp = GetFullUnwindPlanForFrame();
+
+ if (m_full_unwind_plan_sp) {
+ RegisterNumber pc_regnum(m_thread, eRegisterKindGeneric,
+ LLDB_REGNUM_GENERIC_PC);
+
+ UnwindPlan::RowSP active_row =
+ m_full_unwind_plan_sp->GetRowForFunctionOffset(m_current_offset);
+ unwindplan_registerkind = m_full_unwind_plan_sp->GetRegisterKind();
+
+ RegisterNumber return_address_reg;
+
+ // If we're fetching the saved pc and this UnwindPlan defines a
+ // ReturnAddress register (e.g. lr on arm),
+ // look for the return address register number in the UnwindPlan's row.
+ if (pc_regnum.IsValid() && pc_regnum == regnum &&
+ m_full_unwind_plan_sp->GetReturnAddressRegister() !=
+ LLDB_INVALID_REGNUM) {
+
+ return_address_reg.init(
+ m_thread, m_full_unwind_plan_sp->GetRegisterKind(),
+ m_full_unwind_plan_sp->GetReturnAddressRegister());
+ regnum = return_address_reg;
+ UnwindLogMsg("requested caller's saved PC but this UnwindPlan uses a "
+ "RA reg; getting %s (%d) instead",
+ return_address_reg.GetName(),
+ return_address_reg.GetAsKind(eRegisterKindLLDB));
+ } else {
+ if (regnum.GetAsKind(unwindplan_registerkind) == LLDB_INVALID_REGNUM) {
+ if (unwindplan_registerkind == eRegisterKindGeneric) {
+ UnwindLogMsg("could not convert lldb regnum %s (%d) into "
+ "eRegisterKindGeneric reg numbering scheme",
+ regnum.GetName(), regnum.GetAsKind(eRegisterKindLLDB));
+ } else {
+ UnwindLogMsg("could not convert lldb regnum %s (%d) into %d "
+ "RegisterKind reg numbering scheme",
+ regnum.GetName(), regnum.GetAsKind(eRegisterKindLLDB),
+ (int)unwindplan_registerkind);
+ }
+ return UnwindLLDB::RegisterSearchResult::eRegisterNotFound;
+ }
+ }
+
+ if (regnum.IsValid() &&
+ active_row->GetRegisterInfo(regnum.GetAsKind(unwindplan_registerkind),
+ unwindplan_regloc)) {
+ have_unwindplan_regloc = true;
+ UnwindLogMsg(
+ "supplying caller's saved %s (%d)'s location using %s UnwindPlan",
+ regnum.GetName(), regnum.GetAsKind(eRegisterKindLLDB),
+ m_full_unwind_plan_sp->GetSourceName().GetCString());
+ }
- if (have_unwindplan_regloc == false)
- {
- if (IsFrameZero ())
- {
- // This is frame 0 - we should return the actual live register context value
- lldb_private::UnwindLLDB::RegisterLocation new_regloc;
- new_regloc.type = UnwindLLDB::RegisterLocation::eRegisterInLiveRegisterContext;
- new_regloc.location.register_number = regnum.GetAsKind (eRegisterKindLLDB);
- m_registers[regnum.GetAsKind (eRegisterKindLLDB)] = new_regloc;
- regloc = new_regloc;
- UnwindLogMsg ("supplying caller's register %s (%d) from the live RegisterContext at frame 0",
- regnum.GetName(), regnum.GetAsKind (eRegisterKindLLDB));
- return UnwindLLDB::RegisterSearchResult::eRegisterFound;
- }
- else
- {
- std::string unwindplan_name ("");
- if (m_full_unwind_plan_sp)
- {
- unwindplan_name += "via '";
- unwindplan_name += m_full_unwind_plan_sp->GetSourceName().AsCString();
- unwindplan_name += "'";
+ // This is frame 0 and we're retrieving the PC and it's saved in a Return
+ // Address register and
+ // it hasn't been saved anywhere yet -- that is, it's still live in the
+ // actual register.
+ // Handle this specially.
+
+ if (have_unwindplan_regloc == false && return_address_reg.IsValid() &&
+ IsFrameZero()) {
+ if (return_address_reg.GetAsKind(eRegisterKindLLDB) !=
+ LLDB_INVALID_REGNUM) {
+ lldb_private::UnwindLLDB::RegisterLocation new_regloc;
+ new_regloc.type =
+ UnwindLLDB::RegisterLocation::eRegisterInLiveRegisterContext;
+ new_regloc.location.register_number =
+ return_address_reg.GetAsKind(eRegisterKindLLDB);
+ m_registers[regnum.GetAsKind(eRegisterKindLLDB)] = new_regloc;
+ regloc = new_regloc;
+ UnwindLogMsg("supplying caller's register %s (%d) from the live "
+ "RegisterContext at frame 0, saved in %d",
+ return_address_reg.GetName(),
+ return_address_reg.GetAsKind(eRegisterKindLLDB),
+ return_address_reg.GetAsKind(eRegisterKindLLDB));
+ return UnwindLLDB::RegisterSearchResult::eRegisterFound;
+ }
+ }
+
+ // If this architecture stores the return address in a register (it
+ // defines a Return Address register)
+ // and we're on a non-zero stack frame and the Full UnwindPlan says that
+ // the pc is stored in the
+ // RA registers (e.g. lr on arm), then we know that the full unwindplan is
+ // not trustworthy -- this
+ // is an impossible situation and the instruction emulation code has
+ // likely been misled.
+ // If this stack frame meets those criteria, we need to throw away the
+ // Full UnwindPlan that the
+ // instruction emulation came up with and fall back to the architecture's
+ // Default UnwindPlan so
+ // the stack walk can get past this point.
+
+ // Special note: If the Full UnwindPlan was generated from the compiler,
+ // don't second-guess it
+ // when we're at a call site location.
+
+ // arch_default_ra_regnum is the return address register # in the Full
+ // UnwindPlan register numbering
+ RegisterNumber arch_default_ra_regnum(m_thread, eRegisterKindGeneric,
+ LLDB_REGNUM_GENERIC_RA);
+
+ if (arch_default_ra_regnum.GetAsKind(unwindplan_registerkind) !=
+ LLDB_INVALID_REGNUM &&
+ pc_regnum == regnum && unwindplan_regloc.IsInOtherRegister() &&
+ unwindplan_regloc.GetRegisterNumber() ==
+ arch_default_ra_regnum.GetAsKind(unwindplan_registerkind) &&
+ m_full_unwind_plan_sp->GetSourcedFromCompiler() != eLazyBoolYes &&
+ !m_all_registers_available) {
+ UnwindLogMsg("%s UnwindPlan tried to restore the pc from the link "
+ "register but this is a non-zero frame",
+ m_full_unwind_plan_sp->GetSourceName().GetCString());
+
+ // Throw away the full unwindplan; install the arch default unwindplan
+ if (ForceSwitchToFallbackUnwindPlan()) {
+ // Update for the possibly new unwind plan
+ unwindplan_registerkind = m_full_unwind_plan_sp->GetRegisterKind();
+ UnwindPlan::RowSP active_row =
+ m_full_unwind_plan_sp->GetRowForFunctionOffset(m_current_offset);
+
+ // Sanity check: Verify that we can fetch a pc value and CFA value
+ // with this unwind plan
+
+ RegisterNumber arch_default_pc_reg(m_thread, eRegisterKindGeneric,
+ LLDB_REGNUM_GENERIC_PC);
+ bool can_fetch_pc_value = false;
+ bool can_fetch_cfa = false;
+ addr_t cfa_value;
+ if (active_row) {
+ if (arch_default_pc_reg.GetAsKind(unwindplan_registerkind) !=
+ LLDB_INVALID_REGNUM &&
+ active_row->GetRegisterInfo(
+ arch_default_pc_reg.GetAsKind(unwindplan_registerkind),
+ unwindplan_regloc)) {
+ can_fetch_pc_value = true;
+ }
+ if (ReadCFAValueForRow(unwindplan_registerkind, active_row,
+ cfa_value)) {
+ can_fetch_cfa = true;
}
- UnwindLogMsg ("no save location for %s (%d) %s",
- regnum.GetName(), regnum.GetAsKind (eRegisterKindLLDB),
- unwindplan_name.c_str());
- }
- return UnwindLLDB::RegisterSearchResult::eRegisterNotFound;
- }
-
- // unwindplan_regloc has valid contents about where to retrieve the register
- if (unwindplan_regloc.IsUnspecified())
- {
- lldb_private::UnwindLLDB::RegisterLocation new_regloc;
- new_regloc.type = UnwindLLDB::RegisterLocation::eRegisterNotSaved;
- m_registers[regnum.GetAsKind (eRegisterKindLLDB)] = new_regloc;
- UnwindLogMsg ("save location for %s (%d) is unspecified, continue searching",
- regnum.GetName(), regnum.GetAsKind (eRegisterKindLLDB));
- return UnwindLLDB::RegisterSearchResult::eRegisterNotFound;
- }
+ }
- if (unwindplan_regloc.IsUndefined())
- {
- UnwindLogMsg ("did not supply reg location for %s (%d) because it is volatile",
- regnum.GetName(), regnum.GetAsKind (eRegisterKindLLDB));
- return UnwindLLDB::RegisterSearchResult::eRegisterIsVolatile;
+ if (can_fetch_pc_value && can_fetch_cfa) {
+ have_unwindplan_regloc = true;
+ } else {
+ have_unwindplan_regloc = false;
+ }
+ } else {
+ // We were unable to fall back to another unwind plan
+ have_unwindplan_regloc = false;
+ }
+ }
+ }
+ }
+
+ ExecutionContext exe_ctx(m_thread.shared_from_this());
+ Process *process = exe_ctx.GetProcessPtr();
+ if (have_unwindplan_regloc == false) {
+ // If the UnwindPlan failed to give us an unwind location for this register,
+ // we may be able to fall back
+ // to some ABI-defined default. For example, some ABIs allow to determine
+ // the caller's SP via the CFA.
+ // Also, the ABI may set volatile registers to the undefined state.
+ ABI *abi = process ? process->GetABI().get() : NULL;
+ if (abi) {
+ const RegisterInfo *reg_info =
+ GetRegisterInfoAtIndex(regnum.GetAsKind(eRegisterKindLLDB));
+ if (reg_info &&
+ abi->GetFallbackRegisterLocation(reg_info, unwindplan_regloc)) {
+ UnwindLogMsg(
+ "supplying caller's saved %s (%d)'s location using ABI default",
+ regnum.GetName(), regnum.GetAsKind(eRegisterKindLLDB));
+ have_unwindplan_regloc = true;
+ }
+ }
+ }
+
+ if (have_unwindplan_regloc == false) {
+ if (IsFrameZero()) {
+ // This is frame 0 - we should return the actual live register context
+ // value
+ lldb_private::UnwindLLDB::RegisterLocation new_regloc;
+ new_regloc.type =
+ UnwindLLDB::RegisterLocation::eRegisterInLiveRegisterContext;
+ new_regloc.location.register_number = regnum.GetAsKind(eRegisterKindLLDB);
+ m_registers[regnum.GetAsKind(eRegisterKindLLDB)] = new_regloc;
+ regloc = new_regloc;
+ UnwindLogMsg("supplying caller's register %s (%d) from the live "
+ "RegisterContext at frame 0",
+ regnum.GetName(), regnum.GetAsKind(eRegisterKindLLDB));
+ return UnwindLLDB::RegisterSearchResult::eRegisterFound;
+ } else {
+ std::string unwindplan_name("");
+ if (m_full_unwind_plan_sp) {
+ unwindplan_name += "via '";
+ unwindplan_name += m_full_unwind_plan_sp->GetSourceName().AsCString();
+ unwindplan_name += "'";
+ }
+ UnwindLogMsg("no save location for %s (%d) %s", regnum.GetName(),
+ regnum.GetAsKind(eRegisterKindLLDB),
+ unwindplan_name.c_str());
}
+ return UnwindLLDB::RegisterSearchResult::eRegisterNotFound;
+ }
- if (unwindplan_regloc.IsSame())
- {
- if (IsFrameZero() == false
- && (regnum.GetAsKind (eRegisterKindGeneric) == LLDB_REGNUM_GENERIC_PC
- || regnum.GetAsKind (eRegisterKindGeneric) == LLDB_REGNUM_GENERIC_RA))
- {
- UnwindLogMsg ("register %s (%d) is marked as 'IsSame' - it is a pc or return address reg on a non-zero frame -- treat as if we have no information",
- regnum.GetName(), regnum.GetAsKind (eRegisterKindLLDB));
- return UnwindLLDB::RegisterSearchResult::eRegisterNotFound;
- }
- else
- {
- regloc.type = UnwindLLDB::RegisterLocation::eRegisterInRegister;
- regloc.location.register_number = regnum.GetAsKind (eRegisterKindLLDB);
- m_registers[regnum.GetAsKind (eRegisterKindLLDB)] = regloc;
- UnwindLogMsg ("supplying caller's register %s (%d), saved in register %s (%d)",
- regnum.GetName(), regnum.GetAsKind (eRegisterKindLLDB),
- regnum.GetName(), regnum.GetAsKind (eRegisterKindLLDB));
- return UnwindLLDB::RegisterSearchResult::eRegisterFound;
- }
- }
+ // unwindplan_regloc has valid contents about where to retrieve the register
+ if (unwindplan_regloc.IsUnspecified()) {
+ lldb_private::UnwindLLDB::RegisterLocation new_regloc;
+ new_regloc.type = UnwindLLDB::RegisterLocation::eRegisterNotSaved;
+ m_registers[regnum.GetAsKind(eRegisterKindLLDB)] = new_regloc;
+ UnwindLogMsg("save location for %s (%d) is unspecified, continue searching",
+ regnum.GetName(), regnum.GetAsKind(eRegisterKindLLDB));
+ return UnwindLLDB::RegisterSearchResult::eRegisterNotFound;
+ }
- if (unwindplan_regloc.IsCFAPlusOffset())
- {
- int offset = unwindplan_regloc.GetOffset();
+ if (unwindplan_regloc.IsUndefined()) {
+ UnwindLogMsg(
+ "did not supply reg location for %s (%d) because it is volatile",
+ regnum.GetName(), regnum.GetAsKind(eRegisterKindLLDB));
+ return UnwindLLDB::RegisterSearchResult::eRegisterIsVolatile;
+ }
+
+ if (unwindplan_regloc.IsSame()) {
+ if (IsFrameZero() == false &&
+ (regnum.GetAsKind(eRegisterKindGeneric) == LLDB_REGNUM_GENERIC_PC ||
+ regnum.GetAsKind(eRegisterKindGeneric) == LLDB_REGNUM_GENERIC_RA)) {
+ UnwindLogMsg("register %s (%d) is marked as 'IsSame' - it is a pc or "
+ "return address reg on a non-zero frame -- treat as if we "
+ "have no information",
+ regnum.GetName(), regnum.GetAsKind(eRegisterKindLLDB));
+ return UnwindLLDB::RegisterSearchResult::eRegisterNotFound;
+ } else {
+ regloc.type = UnwindLLDB::RegisterLocation::eRegisterInRegister;
+ regloc.location.register_number = regnum.GetAsKind(eRegisterKindLLDB);
+ m_registers[regnum.GetAsKind(eRegisterKindLLDB)] = regloc;
+ UnwindLogMsg(
+ "supplying caller's register %s (%d), saved in register %s (%d)",
+ regnum.GetName(), regnum.GetAsKind(eRegisterKindLLDB),
+ regnum.GetName(), regnum.GetAsKind(eRegisterKindLLDB));
+ return UnwindLLDB::RegisterSearchResult::eRegisterFound;
+ }
+ }
+
+ if (unwindplan_regloc.IsCFAPlusOffset()) {
+ int offset = unwindplan_regloc.GetOffset();
+ regloc.type = UnwindLLDB::RegisterLocation::eRegisterValueInferred;
+ regloc.location.inferred_value = m_cfa + offset;
+ m_registers[regnum.GetAsKind(eRegisterKindLLDB)] = regloc;
+ UnwindLogMsg("supplying caller's register %s (%d), value is CFA plus "
+ "offset %d [value is 0x%" PRIx64 "]",
+ regnum.GetName(), regnum.GetAsKind(eRegisterKindLLDB), offset,
+ regloc.location.inferred_value);
+ return UnwindLLDB::RegisterSearchResult::eRegisterFound;
+ }
+
+ if (unwindplan_regloc.IsAtCFAPlusOffset()) {
+ int offset = unwindplan_regloc.GetOffset();
+ regloc.type = UnwindLLDB::RegisterLocation::eRegisterSavedAtMemoryLocation;
+ regloc.location.target_memory_location = m_cfa + offset;
+ m_registers[regnum.GetAsKind(eRegisterKindLLDB)] = regloc;
+ UnwindLogMsg("supplying caller's register %s (%d) from the stack, saved at "
+ "CFA plus offset %d [saved at 0x%" PRIx64 "]",
+ regnum.GetName(), regnum.GetAsKind(eRegisterKindLLDB), offset,
+ regloc.location.target_memory_location);
+ return UnwindLLDB::RegisterSearchResult::eRegisterFound;
+ }
+
+ if (unwindplan_regloc.IsInOtherRegister()) {
+ uint32_t unwindplan_regnum = unwindplan_regloc.GetRegisterNumber();
+ RegisterNumber row_regnum(m_thread, unwindplan_registerkind,
+ unwindplan_regnum);
+ if (row_regnum.GetAsKind(eRegisterKindLLDB) == LLDB_INVALID_REGNUM) {
+ UnwindLogMsg("could not supply caller's %s (%d) location - was saved in "
+ "another reg but couldn't convert that regnum",
+ regnum.GetName(), regnum.GetAsKind(eRegisterKindLLDB));
+ return UnwindLLDB::RegisterSearchResult::eRegisterNotFound;
+ }
+ regloc.type = UnwindLLDB::RegisterLocation::eRegisterInRegister;
+ regloc.location.register_number = row_regnum.GetAsKind(eRegisterKindLLDB);
+ m_registers[regnum.GetAsKind(eRegisterKindLLDB)] = regloc;
+ UnwindLogMsg(
+ "supplying caller's register %s (%d), saved in register %s (%d)",
+ regnum.GetName(), regnum.GetAsKind(eRegisterKindLLDB),
+ row_regnum.GetName(), row_regnum.GetAsKind(eRegisterKindLLDB));
+ return UnwindLLDB::RegisterSearchResult::eRegisterFound;
+ }
+
+ if (unwindplan_regloc.IsDWARFExpression() ||
+ unwindplan_regloc.IsAtDWARFExpression()) {
+ DataExtractor dwarfdata(unwindplan_regloc.GetDWARFExpressionBytes(),
+ unwindplan_regloc.GetDWARFExpressionLength(),
+ process->GetByteOrder(),
+ process->GetAddressByteSize());
+ ModuleSP opcode_ctx;
+ DWARFExpression dwarfexpr(opcode_ctx, dwarfdata, nullptr, 0,
+ unwindplan_regloc.GetDWARFExpressionLength());
+ dwarfexpr.SetRegisterKind(unwindplan_registerkind);
+ Value result;
+ Error error;
+ if (dwarfexpr.Evaluate(&exe_ctx, nullptr, nullptr, this, 0, nullptr,
+ nullptr, result, &error)) {
+ addr_t val;
+ val = result.GetScalar().ULongLong();
+ if (unwindplan_regloc.IsDWARFExpression()) {
regloc.type = UnwindLLDB::RegisterLocation::eRegisterValueInferred;
- regloc.location.inferred_value = m_cfa + offset;
- m_registers[regnum.GetAsKind (eRegisterKindLLDB)] = regloc;
- UnwindLogMsg ("supplying caller's register %s (%d), value is CFA plus offset %d [value is 0x%" PRIx64 "]",
- regnum.GetName(), regnum.GetAsKind (eRegisterKindLLDB),
- offset, regloc.location.inferred_value);
- return UnwindLLDB::RegisterSearchResult::eRegisterFound;
- }
-
- if (unwindplan_regloc.IsAtCFAPlusOffset())
- {
- int offset = unwindplan_regloc.GetOffset();
- regloc.type = UnwindLLDB::RegisterLocation::eRegisterSavedAtMemoryLocation;
- regloc.location.target_memory_location = m_cfa + offset;
- m_registers[regnum.GetAsKind (eRegisterKindLLDB)] = regloc;
- UnwindLogMsg ("supplying caller's register %s (%d) from the stack, saved at CFA plus offset %d [saved at 0x%" PRIx64 "]",
- regnum.GetName(), regnum.GetAsKind (eRegisterKindLLDB),
- offset, regloc.location.target_memory_location);
+ regloc.location.inferred_value = val;
+ m_registers[regnum.GetAsKind(eRegisterKindLLDB)] = regloc;
+ UnwindLogMsg("supplying caller's register %s (%d) via DWARF expression "
+ "(IsDWARFExpression)",
+ regnum.GetName(), regnum.GetAsKind(eRegisterKindLLDB));
return UnwindLLDB::RegisterSearchResult::eRegisterFound;
- }
-
- if (unwindplan_regloc.IsInOtherRegister())
- {
- uint32_t unwindplan_regnum = unwindplan_regloc.GetRegisterNumber();
- RegisterNumber row_regnum (m_thread, unwindplan_registerkind, unwindplan_regnum);
- if (row_regnum.GetAsKind (eRegisterKindLLDB) == LLDB_INVALID_REGNUM)
- {
- UnwindLogMsg ("could not supply caller's %s (%d) location - was saved in another reg but couldn't convert that regnum",
- regnum.GetName(), regnum.GetAsKind (eRegisterKindLLDB));
- return UnwindLLDB::RegisterSearchResult::eRegisterNotFound;
- }
- regloc.type = UnwindLLDB::RegisterLocation::eRegisterInRegister;
- regloc.location.register_number = row_regnum.GetAsKind (eRegisterKindLLDB);
- m_registers[regnum.GetAsKind (eRegisterKindLLDB)] = regloc;
- UnwindLogMsg ("supplying caller's register %s (%d), saved in register %s (%d)",
- regnum.GetName(), regnum.GetAsKind (eRegisterKindLLDB),
- row_regnum.GetName(), row_regnum.GetAsKind (eRegisterKindLLDB));
+ } else {
+ regloc.type =
+ UnwindLLDB::RegisterLocation::eRegisterSavedAtMemoryLocation;
+ regloc.location.target_memory_location = val;
+ m_registers[regnum.GetAsKind(eRegisterKindLLDB)] = regloc;
+ UnwindLogMsg("supplying caller's register %s (%d) via DWARF expression "
+ "(IsAtDWARFExpression)",
+ regnum.GetName(), regnum.GetAsKind(eRegisterKindLLDB));
return UnwindLLDB::RegisterSearchResult::eRegisterFound;
+ }
}
+ UnwindLogMsg("tried to use IsDWARFExpression or IsAtDWARFExpression for %s "
+ "(%d) but failed",
+ regnum.GetName(), regnum.GetAsKind(eRegisterKindLLDB));
+ return UnwindLLDB::RegisterSearchResult::eRegisterNotFound;
+ }
- if (unwindplan_regloc.IsDWARFExpression() || unwindplan_regloc.IsAtDWARFExpression())
- {
- DataExtractor dwarfdata (unwindplan_regloc.GetDWARFExpressionBytes(),
- unwindplan_regloc.GetDWARFExpressionLength(),
- process->GetByteOrder(), process->GetAddressByteSize());
- ModuleSP opcode_ctx;
- DWARFExpression dwarfexpr (opcode_ctx,
- dwarfdata,
- nullptr,
- 0,
- unwindplan_regloc.GetDWARFExpressionLength());
- dwarfexpr.SetRegisterKind (unwindplan_registerkind);
- Value result;
- Error error;
- if (dwarfexpr.Evaluate (&exe_ctx, nullptr, nullptr, this, 0, nullptr, nullptr, result, &error))
- {
- addr_t val;
- val = result.GetScalar().ULongLong();
- if (unwindplan_regloc.IsDWARFExpression())
- {
- regloc.type = UnwindLLDB::RegisterLocation::eRegisterValueInferred;
- regloc.location.inferred_value = val;
- m_registers[regnum.GetAsKind (eRegisterKindLLDB)] = regloc;
- UnwindLogMsg ("supplying caller's register %s (%d) via DWARF expression (IsDWARFExpression)",
- regnum.GetName(), regnum.GetAsKind (eRegisterKindLLDB));
- return UnwindLLDB::RegisterSearchResult::eRegisterFound;
- }
- else
- {
- regloc.type = UnwindLLDB::RegisterLocation::eRegisterSavedAtMemoryLocation;
- regloc.location.target_memory_location = val;
- m_registers[regnum.GetAsKind (eRegisterKindLLDB)] = regloc;
- UnwindLogMsg ("supplying caller's register %s (%d) via DWARF expression (IsAtDWARFExpression)",
- regnum.GetName(), regnum.GetAsKind (eRegisterKindLLDB));
- return UnwindLLDB::RegisterSearchResult::eRegisterFound;
- }
- }
- UnwindLogMsg ("tried to use IsDWARFExpression or IsAtDWARFExpression for %s (%d) but failed",
- regnum.GetName(), regnum.GetAsKind (eRegisterKindLLDB));
- return UnwindLLDB::RegisterSearchResult::eRegisterNotFound;
- }
-
- UnwindLogMsg ("no save location for %s (%d) in this stack frame",
- regnum.GetName(), regnum.GetAsKind (eRegisterKindLLDB));
+ UnwindLogMsg("no save location for %s (%d) in this stack frame",
+ regnum.GetName(), regnum.GetAsKind(eRegisterKindLLDB));
- // FIXME UnwindPlan::Row types atDWARFExpression and isDWARFExpression are unsupported.
+ // FIXME UnwindPlan::Row types atDWARFExpression and isDWARFExpression are
+ // unsupported.
- return UnwindLLDB::RegisterSearchResult::eRegisterNotFound;
+ return UnwindLLDB::RegisterSearchResult::eRegisterNotFound;
}
// TryFallbackUnwindPlan() -- this method is a little tricky.
-//
-// When this is called, the frame above -- the caller frame, the "previous" frame --
-// is invalid or bad.
//
-// Instead of stopping the stack walk here, we'll try a different UnwindPlan and see
-// if we can get a valid frame above us.
+// When this is called, the frame above -- the caller frame, the "previous"
+// frame --
+// is invalid or bad.
+//
+// Instead of stopping the stack walk here, we'll try a different UnwindPlan and
+// see
+// if we can get a valid frame above us.
//
-// This most often happens when an unwind plan based on assembly instruction inspection
-// is not correct -- mostly with hand-written assembly functions or functions where the
-// stack frame is set up "out of band", e.g. the kernel saved the register context and
+// This most often happens when an unwind plan based on assembly instruction
+// inspection
+// is not correct -- mostly with hand-written assembly functions or functions
+// where the
+// stack frame is set up "out of band", e.g. the kernel saved the register
+// context and
// then called an asynchronous trap handler like _sigtramp.
//
-// Often in these cases, if we just do a dumb stack walk we'll get past this tricky
+// Often in these cases, if we just do a dumb stack walk we'll get past this
+// tricky
// frame and our usual techniques can continue to be used.
-bool
-RegisterContextLLDB::TryFallbackUnwindPlan ()
-{
- if (m_fallback_unwind_plan_sp.get() == nullptr)
- return false;
+bool RegisterContextLLDB::TryFallbackUnwindPlan() {
+ if (m_fallback_unwind_plan_sp.get() == nullptr)
+ return false;
- if (m_full_unwind_plan_sp.get() == nullptr)
- return false;
+ if (m_full_unwind_plan_sp.get() == nullptr)
+ return false;
- if (m_full_unwind_plan_sp.get() == m_fallback_unwind_plan_sp.get()
- || m_full_unwind_plan_sp->GetSourceName() == m_fallback_unwind_plan_sp->GetSourceName())
- {
- return false;
- }
+ if (m_full_unwind_plan_sp.get() == m_fallback_unwind_plan_sp.get() ||
+ m_full_unwind_plan_sp->GetSourceName() ==
+ m_fallback_unwind_plan_sp->GetSourceName()) {
+ return false;
+ }
- // If a compiler generated unwind plan failed, trying the arch default unwindplan
- // isn't going to do any better.
- if (m_full_unwind_plan_sp->GetSourcedFromCompiler() == eLazyBoolYes)
- return false;
+ // If a compiler generated unwind plan failed, trying the arch default
+ // unwindplan
+ // isn't going to do any better.
+ if (m_full_unwind_plan_sp->GetSourcedFromCompiler() == eLazyBoolYes)
+ return false;
+ // Get the caller's pc value and our own CFA value.
+ // Swap in the fallback unwind plan, re-fetch the caller's pc value and CFA
+ // value.
+ // If they're the same, then the fallback unwind plan provides no benefit.
+
+ RegisterNumber pc_regnum(m_thread, eRegisterKindGeneric,
+ LLDB_REGNUM_GENERIC_PC);
+
+ addr_t old_caller_pc_value = LLDB_INVALID_ADDRESS;
+ addr_t new_caller_pc_value = LLDB_INVALID_ADDRESS;
+ addr_t old_this_frame_cfa_value = m_cfa;
+ UnwindLLDB::RegisterLocation regloc;
+ if (SavedLocationForRegister(pc_regnum.GetAsKind(eRegisterKindLLDB),
+ regloc) ==
+ UnwindLLDB::RegisterSearchResult::eRegisterFound) {
+ const RegisterInfo *reg_info =
+ GetRegisterInfoAtIndex(pc_regnum.GetAsKind(eRegisterKindLLDB));
+ if (reg_info) {
+ RegisterValue reg_value;
+ if (ReadRegisterValueFromRegisterLocation(regloc, reg_info, reg_value)) {
+ old_caller_pc_value = reg_value.GetAsUInt64();
+ }
+ }
+ }
+
+ // This is a tricky wrinkle! If SavedLocationForRegister() detects a really
+ // impossible
+ // register location for the full unwind plan, it may call
+ // ForceSwitchToFallbackUnwindPlan()
+ // which in turn replaces the full unwindplan with the fallback... in short,
+ // we're done,
+ // we're using the fallback UnwindPlan.
+ // We checked if m_fallback_unwind_plan_sp was nullptr at the top -- the only
+ // way it
+ // became nullptr since then is via SavedLocationForRegister().
+ if (m_fallback_unwind_plan_sp.get() == nullptr)
+ return true;
- // Get the caller's pc value and our own CFA value.
- // Swap in the fallback unwind plan, re-fetch the caller's pc value and CFA value.
- // If they're the same, then the fallback unwind plan provides no benefit.
-
- RegisterNumber pc_regnum (m_thread, eRegisterKindGeneric, LLDB_REGNUM_GENERIC_PC);
-
- addr_t old_caller_pc_value = LLDB_INVALID_ADDRESS;
- addr_t new_caller_pc_value = LLDB_INVALID_ADDRESS;
- addr_t old_this_frame_cfa_value = m_cfa;
- UnwindLLDB::RegisterLocation regloc;
- if (SavedLocationForRegister (pc_regnum.GetAsKind (eRegisterKindLLDB), regloc) == UnwindLLDB::RegisterSearchResult::eRegisterFound)
- {
- const RegisterInfo *reg_info = GetRegisterInfoAtIndex(pc_regnum.GetAsKind (eRegisterKindLLDB));
- if (reg_info)
- {
- RegisterValue reg_value;
- if (ReadRegisterValueFromRegisterLocation (regloc, reg_info, reg_value))
- {
- old_caller_pc_value = reg_value.GetAsUInt64();
- }
- }
+ // Switch the full UnwindPlan to be the fallback UnwindPlan. If we decide
+ // this isn't
+ // working, we need to restore.
+ // We'll also need to save & restore the value of the m_cfa ivar. Save is
+ // down below a bit in 'old_cfa'.
+ UnwindPlanSP original_full_unwind_plan_sp = m_full_unwind_plan_sp;
+ addr_t old_cfa = m_cfa;
+
+ m_registers.clear();
+
+ m_full_unwind_plan_sp = m_fallback_unwind_plan_sp;
+
+ UnwindPlan::RowSP active_row =
+ m_fallback_unwind_plan_sp->GetRowForFunctionOffset(m_current_offset);
+
+ if (active_row &&
+ active_row->GetCFAValue().GetValueType() !=
+ UnwindPlan::Row::CFAValue::unspecified) {
+ addr_t new_cfa;
+ if (!ReadCFAValueForRow(m_fallback_unwind_plan_sp->GetRegisterKind(),
+ active_row, new_cfa) ||
+ new_cfa == 0 || new_cfa == 1 || new_cfa == LLDB_INVALID_ADDRESS) {
+ UnwindLogMsg("failed to get cfa with fallback unwindplan");
+ m_fallback_unwind_plan_sp.reset();
+ m_full_unwind_plan_sp = original_full_unwind_plan_sp;
+ m_cfa = old_cfa;
+ return false;
+ }
+ m_cfa = new_cfa;
+
+ if (SavedLocationForRegister(pc_regnum.GetAsKind(eRegisterKindLLDB),
+ regloc) ==
+ UnwindLLDB::RegisterSearchResult::eRegisterFound) {
+ const RegisterInfo *reg_info =
+ GetRegisterInfoAtIndex(pc_regnum.GetAsKind(eRegisterKindLLDB));
+ if (reg_info) {
+ RegisterValue reg_value;
+ if (ReadRegisterValueFromRegisterLocation(regloc, reg_info,
+ reg_value)) {
+ new_caller_pc_value = reg_value.GetAsUInt64();
+ }
+ }
+ }
+
+ if (new_caller_pc_value == LLDB_INVALID_ADDRESS) {
+ UnwindLogMsg("failed to get a pc value for the caller frame with the "
+ "fallback unwind plan");
+ m_fallback_unwind_plan_sp.reset();
+ m_full_unwind_plan_sp = original_full_unwind_plan_sp;
+ m_cfa = old_cfa;
+ return false;
+ }
+
+ if (old_caller_pc_value != LLDB_INVALID_ADDRESS) {
+ if (old_caller_pc_value == new_caller_pc_value &&
+ new_cfa == old_this_frame_cfa_value) {
+ UnwindLogMsg("fallback unwind plan got the same values for this frame "
+ "CFA and caller frame pc, not using");
+ m_fallback_unwind_plan_sp.reset();
+ m_full_unwind_plan_sp = original_full_unwind_plan_sp;
+ m_cfa = old_cfa;
+ return false;
+ }
}
- // This is a tricky wrinkle! If SavedLocationForRegister() detects a really impossible
- // register location for the full unwind plan, it may call ForceSwitchToFallbackUnwindPlan()
- // which in turn replaces the full unwindplan with the fallback... in short, we're done,
- // we're using the fallback UnwindPlan.
- // We checked if m_fallback_unwind_plan_sp was nullptr at the top -- the only way it
- // became nullptr since then is via SavedLocationForRegister().
- if (m_fallback_unwind_plan_sp.get() == nullptr)
- return true;
-
-
- // Switch the full UnwindPlan to be the fallback UnwindPlan. If we decide this isn't
- // working, we need to restore.
- // We'll also need to save & restore the value of the m_cfa ivar. Save is down below a bit in 'old_cfa'.
- UnwindPlanSP original_full_unwind_plan_sp = m_full_unwind_plan_sp;
- addr_t old_cfa = m_cfa;
-
- m_registers.clear();
-
- m_full_unwind_plan_sp = m_fallback_unwind_plan_sp;
-
- UnwindPlan::RowSP active_row = m_fallback_unwind_plan_sp->GetRowForFunctionOffset (m_current_offset);
-
- if (active_row && active_row->GetCFAValue().GetValueType() != UnwindPlan::Row::CFAValue::unspecified)
- {
- addr_t new_cfa;
- if (!ReadCFAValueForRow (m_fallback_unwind_plan_sp->GetRegisterKind(), active_row, new_cfa)
- || new_cfa == 0 || new_cfa == 1 || new_cfa == LLDB_INVALID_ADDRESS)
- {
- UnwindLogMsg ("failed to get cfa with fallback unwindplan");
- m_fallback_unwind_plan_sp.reset();
- m_full_unwind_plan_sp = original_full_unwind_plan_sp;
- m_cfa = old_cfa;
- return false;
- }
- m_cfa = new_cfa;
-
- if (SavedLocationForRegister (pc_regnum.GetAsKind (eRegisterKindLLDB), regloc) == UnwindLLDB::RegisterSearchResult::eRegisterFound)
- {
- const RegisterInfo *reg_info = GetRegisterInfoAtIndex(pc_regnum.GetAsKind (eRegisterKindLLDB));
- if (reg_info)
- {
- RegisterValue reg_value;
- if (ReadRegisterValueFromRegisterLocation (regloc, reg_info, reg_value))
- {
- new_caller_pc_value = reg_value.GetAsUInt64();
- }
- }
- }
-
-
- if (new_caller_pc_value == LLDB_INVALID_ADDRESS)
- {
- UnwindLogMsg ("failed to get a pc value for the caller frame with the fallback unwind plan");
- m_fallback_unwind_plan_sp.reset();
- m_full_unwind_plan_sp = original_full_unwind_plan_sp;
- m_cfa = old_cfa;
- return false;
- }
+ UnwindLogMsg("trying to unwind from this function with the UnwindPlan '%s' "
+ "because UnwindPlan '%s' failed.",
+ m_fallback_unwind_plan_sp->GetSourceName().GetCString(),
+ original_full_unwind_plan_sp->GetSourceName().GetCString());
- if (old_caller_pc_value != LLDB_INVALID_ADDRESS)
- {
- if (old_caller_pc_value == new_caller_pc_value && new_cfa == old_this_frame_cfa_value)
- {
- UnwindLogMsg ("fallback unwind plan got the same values for this frame CFA and caller frame pc, not using");
- m_fallback_unwind_plan_sp.reset();
- m_full_unwind_plan_sp = original_full_unwind_plan_sp;
- m_cfa = old_cfa;
- return false;
- }
- }
+ // We've copied the fallback unwind plan into the full - now clear the
+ // fallback.
+ m_fallback_unwind_plan_sp.reset();
+ }
- UnwindLogMsg ("trying to unwind from this function with the UnwindPlan '%s' because UnwindPlan '%s' failed.",
- m_fallback_unwind_plan_sp->GetSourceName().GetCString(),
- original_full_unwind_plan_sp->GetSourceName().GetCString());
+ return true;
+}
- // We've copied the fallback unwind plan into the full - now clear the fallback.
- m_fallback_unwind_plan_sp.reset();
- }
+bool RegisterContextLLDB::ForceSwitchToFallbackUnwindPlan() {
+ if (m_fallback_unwind_plan_sp.get() == NULL)
+ return false;
- return true;
-}
+ if (m_full_unwind_plan_sp.get() == NULL)
+ return false;
-bool
-RegisterContextLLDB::ForceSwitchToFallbackUnwindPlan ()
-{
- if (m_fallback_unwind_plan_sp.get() == NULL)
- return false;
+ if (m_full_unwind_plan_sp.get() == m_fallback_unwind_plan_sp.get() ||
+ m_full_unwind_plan_sp->GetSourceName() ==
+ m_fallback_unwind_plan_sp->GetSourceName()) {
+ return false;
+ }
- if (m_full_unwind_plan_sp.get() == NULL)
- return false;
+ UnwindPlan::RowSP active_row =
+ m_fallback_unwind_plan_sp->GetRowForFunctionOffset(m_current_offset);
- if (m_full_unwind_plan_sp.get() == m_fallback_unwind_plan_sp.get()
- || m_full_unwind_plan_sp->GetSourceName() == m_fallback_unwind_plan_sp->GetSourceName())
- {
- return false;
+ if (active_row &&
+ active_row->GetCFAValue().GetValueType() !=
+ UnwindPlan::Row::CFAValue::unspecified) {
+ addr_t new_cfa;
+ if (!ReadCFAValueForRow(m_fallback_unwind_plan_sp->GetRegisterKind(),
+ active_row, new_cfa) ||
+ new_cfa == 0 || new_cfa == 1 || new_cfa == LLDB_INVALID_ADDRESS) {
+ UnwindLogMsg("failed to get cfa with fallback unwindplan");
+ m_fallback_unwind_plan_sp.reset();
+ return false;
}
- UnwindPlan::RowSP active_row = m_fallback_unwind_plan_sp->GetRowForFunctionOffset (m_current_offset);
-
- if (active_row && active_row->GetCFAValue().GetValueType() != UnwindPlan::Row::CFAValue::unspecified)
- {
- addr_t new_cfa;
- if (!ReadCFAValueForRow (m_fallback_unwind_plan_sp->GetRegisterKind(), active_row, new_cfa)
- || new_cfa == 0 || new_cfa == 1 || new_cfa == LLDB_INVALID_ADDRESS)
- {
- UnwindLogMsg ("failed to get cfa with fallback unwindplan");
- m_fallback_unwind_plan_sp.reset();
- return false;
- }
-
- m_full_unwind_plan_sp = m_fallback_unwind_plan_sp;
- m_fallback_unwind_plan_sp.reset();
+ m_full_unwind_plan_sp = m_fallback_unwind_plan_sp;
+ m_fallback_unwind_plan_sp.reset();
- m_registers.clear();
+ m_registers.clear();
- m_cfa = new_cfa;
+ m_cfa = new_cfa;
- UnwindLogMsg ("switched unconditionally to the fallback unwindplan %s", m_full_unwind_plan_sp->GetSourceName().GetCString());
- return true;
- }
- return false;
+ UnwindLogMsg("switched unconditionally to the fallback unwindplan %s",
+ m_full_unwind_plan_sp->GetSourceName().GetCString());
+ return true;
+ }
+ return false;
}
-bool
-RegisterContextLLDB::ReadCFAValueForRow (lldb::RegisterKind row_register_kind,
- const UnwindPlan::RowSP &row,
- addr_t &cfa_value)
-{
- RegisterValue reg_value;
-
- cfa_value = LLDB_INVALID_ADDRESS;
- addr_t cfa_reg_contents;
-
- switch (row->GetCFAValue().GetValueType())
- {
- case UnwindPlan::Row::CFAValue::isRegisterDereferenced:
- {
- RegisterNumber cfa_reg (m_thread, row_register_kind, row->GetCFAValue().GetRegisterNumber());
- if (ReadGPRValue (cfa_reg, cfa_reg_contents))
- {
- const RegisterInfo *reg_info = GetRegisterInfoAtIndex (cfa_reg.GetAsKind (eRegisterKindLLDB));
- RegisterValue reg_value;
- if (reg_info)
- {
- Error error = ReadRegisterValueFromMemory(reg_info,
- cfa_reg_contents,
- reg_info->byte_size,
- reg_value);
- if (error.Success ())
- {
- cfa_value = reg_value.GetAsUInt64();
- UnwindLogMsg ("CFA value via dereferencing reg %s (%d): reg has val 0x%" PRIx64 ", CFA value is 0x%" PRIx64,
- cfa_reg.GetName(), cfa_reg.GetAsKind (eRegisterKindLLDB),
- cfa_reg_contents, cfa_value);
- return true;
- }
- else
- {
- UnwindLogMsg ("Tried to deref reg %s (%d) [0x%" PRIx64 "] but memory read failed.",
- cfa_reg.GetName(), cfa_reg.GetAsKind (eRegisterKindLLDB),
- cfa_reg_contents);
- }
- }
- }
- break;
- }
- case UnwindPlan::Row::CFAValue::isRegisterPlusOffset:
- {
- RegisterNumber cfa_reg (m_thread, row_register_kind, row->GetCFAValue().GetRegisterNumber());
- if (ReadGPRValue (cfa_reg, cfa_reg_contents))
- {
- if (cfa_reg_contents == LLDB_INVALID_ADDRESS || cfa_reg_contents == 0 || cfa_reg_contents == 1)
- {
- UnwindLogMsg ("Got an invalid CFA register value - reg %s (%d), value 0x%" PRIx64,
- cfa_reg.GetName(), cfa_reg.GetAsKind (eRegisterKindLLDB),
- cfa_reg_contents);
- cfa_reg_contents = LLDB_INVALID_ADDRESS;
- return false;
- }
- cfa_value = cfa_reg_contents + row->GetCFAValue().GetOffset();
- UnwindLogMsg ("CFA is 0x%" PRIx64 ": Register %s (%d) contents are 0x%" PRIx64 ", offset is %d",
- cfa_value,
- cfa_reg.GetName(), cfa_reg.GetAsKind (eRegisterKindLLDB),
- cfa_reg_contents, row->GetCFAValue().GetOffset());
- return true;
- }
- break;
- }
- case UnwindPlan::Row::CFAValue::isDWARFExpression:
- {
- ExecutionContext exe_ctx(m_thread.shared_from_this());
- Process *process = exe_ctx.GetProcessPtr();
- DataExtractor dwarfdata (row->GetCFAValue().GetDWARFExpressionBytes(),
- row->GetCFAValue().GetDWARFExpressionLength(),
- process->GetByteOrder(), process->GetAddressByteSize());
- ModuleSP opcode_ctx;
- DWARFExpression dwarfexpr (opcode_ctx,
- dwarfdata,
- nullptr,
- 0,
- row->GetCFAValue().GetDWARFExpressionLength());
- dwarfexpr.SetRegisterKind (row_register_kind);
- Value result;
- Error error;
- if (dwarfexpr.Evaluate (&exe_ctx, nullptr, nullptr, this, 0, nullptr, nullptr, result, &error))
- {
- cfa_value = result.GetScalar().ULongLong();
-
- UnwindLogMsg ("CFA value set by DWARF expression is 0x%" PRIx64, cfa_value);
- return true;
- }
- UnwindLogMsg ("Failed to set CFA value via DWARF expression: %s", error.AsCString());
- break;
- }
- default:
- return false;
- }
+bool RegisterContextLLDB::ReadCFAValueForRow(
+ lldb::RegisterKind row_register_kind, const UnwindPlan::RowSP &row,
+ addr_t &cfa_value) {
+ RegisterValue reg_value;
+
+ cfa_value = LLDB_INVALID_ADDRESS;
+ addr_t cfa_reg_contents;
+
+ switch (row->GetCFAValue().GetValueType()) {
+ case UnwindPlan::Row::CFAValue::isRegisterDereferenced: {
+ RegisterNumber cfa_reg(m_thread, row_register_kind,
+ row->GetCFAValue().GetRegisterNumber());
+ if (ReadGPRValue(cfa_reg, cfa_reg_contents)) {
+ const RegisterInfo *reg_info =
+ GetRegisterInfoAtIndex(cfa_reg.GetAsKind(eRegisterKindLLDB));
+ RegisterValue reg_value;
+ if (reg_info) {
+ Error error = ReadRegisterValueFromMemory(
+ reg_info, cfa_reg_contents, reg_info->byte_size, reg_value);
+ if (error.Success()) {
+ cfa_value = reg_value.GetAsUInt64();
+ UnwindLogMsg(
+ "CFA value via dereferencing reg %s (%d): reg has val 0x%" PRIx64
+ ", CFA value is 0x%" PRIx64,
+ cfa_reg.GetName(), cfa_reg.GetAsKind(eRegisterKindLLDB),
+ cfa_reg_contents, cfa_value);
+ return true;
+ } else {
+ UnwindLogMsg("Tried to deref reg %s (%d) [0x%" PRIx64
+ "] but memory read failed.",
+ cfa_reg.GetName(), cfa_reg.GetAsKind(eRegisterKindLLDB),
+ cfa_reg_contents);
+ }
+ }
+ }
+ break;
+ }
+ case UnwindPlan::Row::CFAValue::isRegisterPlusOffset: {
+ RegisterNumber cfa_reg(m_thread, row_register_kind,
+ row->GetCFAValue().GetRegisterNumber());
+ if (ReadGPRValue(cfa_reg, cfa_reg_contents)) {
+ if (cfa_reg_contents == LLDB_INVALID_ADDRESS || cfa_reg_contents == 0 ||
+ cfa_reg_contents == 1) {
+ UnwindLogMsg(
+ "Got an invalid CFA register value - reg %s (%d), value 0x%" PRIx64,
+ cfa_reg.GetName(), cfa_reg.GetAsKind(eRegisterKindLLDB),
+ cfa_reg_contents);
+ cfa_reg_contents = LLDB_INVALID_ADDRESS;
+ return false;
+ }
+ cfa_value = cfa_reg_contents + row->GetCFAValue().GetOffset();
+ UnwindLogMsg(
+ "CFA is 0x%" PRIx64 ": Register %s (%d) contents are 0x%" PRIx64
+ ", offset is %d",
+ cfa_value, cfa_reg.GetName(), cfa_reg.GetAsKind(eRegisterKindLLDB),
+ cfa_reg_contents, row->GetCFAValue().GetOffset());
+ return true;
+ }
+ break;
+ }
+ case UnwindPlan::Row::CFAValue::isDWARFExpression: {
+ ExecutionContext exe_ctx(m_thread.shared_from_this());
+ Process *process = exe_ctx.GetProcessPtr();
+ DataExtractor dwarfdata(row->GetCFAValue().GetDWARFExpressionBytes(),
+ row->GetCFAValue().GetDWARFExpressionLength(),
+ process->GetByteOrder(),
+ process->GetAddressByteSize());
+ ModuleSP opcode_ctx;
+ DWARFExpression dwarfexpr(opcode_ctx, dwarfdata, nullptr, 0,
+ row->GetCFAValue().GetDWARFExpressionLength());
+ dwarfexpr.SetRegisterKind(row_register_kind);
+ Value result;
+ Error error;
+ if (dwarfexpr.Evaluate(&exe_ctx, nullptr, nullptr, this, 0, nullptr,
+ nullptr, result, &error)) {
+ cfa_value = result.GetScalar().ULongLong();
+
+ UnwindLogMsg("CFA value set by DWARF expression is 0x%" PRIx64,
+ cfa_value);
+ return true;
+ }
+ UnwindLogMsg("Failed to set CFA value via DWARF expression: %s",
+ error.AsCString());
+ break;
+ }
+ default:
return false;
+ }
+ return false;
}
-// Retrieve a general purpose register value for THIS frame, as saved by the NEXT frame, i.e. the frame that
+// Retrieve a general purpose register value for THIS frame, as saved by the
+// NEXT frame, i.e. the frame that
// this frame called. e.g.
//
// foo () { }
@@ -1866,278 +1859,241 @@ RegisterContextLLDB::ReadCFAValueForRow
// frame 0 - foo
// frame 1 - bar
// frame 2 - main
-// and this RegisterContext is for frame 1 (bar) - if we want to get the pc value for frame 1, we need to ask
+// and this RegisterContext is for frame 1 (bar) - if we want to get the pc
+// value for frame 1, we need to ask
// where frame 0 (the "next" frame) saved that and retrieve the value.
-bool
-RegisterContextLLDB::ReadGPRValue (lldb::RegisterKind register_kind, uint32_t regnum, addr_t &value)
-{
- if (!IsValid())
- return false;
-
- uint32_t lldb_regnum;
- if (register_kind == eRegisterKindLLDB)
- {
- lldb_regnum = regnum;
- }
- else if (!m_thread.GetRegisterContext()->ConvertBetweenRegisterKinds (register_kind, regnum, eRegisterKindLLDB, lldb_regnum))
- {
- return false;
- }
+bool RegisterContextLLDB::ReadGPRValue(lldb::RegisterKind register_kind,
+ uint32_t regnum, addr_t &value) {
+ if (!IsValid())
+ return false;
- const RegisterInfo *reg_info = GetRegisterInfoAtIndex(lldb_regnum);
- RegisterValue reg_value;
- // if this is frame 0 (currently executing frame), get the requested reg contents from the actual thread registers
- if (IsFrameZero ())
- {
- if (m_thread.GetRegisterContext()->ReadRegister (reg_info, reg_value))
- {
- value = reg_value.GetAsUInt64();
- return true;
- }
- return false;
- }
+ uint32_t lldb_regnum;
+ if (register_kind == eRegisterKindLLDB) {
+ lldb_regnum = regnum;
+ } else if (!m_thread.GetRegisterContext()->ConvertBetweenRegisterKinds(
+ register_kind, regnum, eRegisterKindLLDB, lldb_regnum)) {
+ return false;
+ }
- bool pc_register = false;
- uint32_t generic_regnum;
- if (register_kind == eRegisterKindGeneric
- && (regnum == LLDB_REGNUM_GENERIC_PC || regnum == LLDB_REGNUM_GENERIC_RA))
- {
- pc_register = true;
- }
- else if (m_thread.GetRegisterContext()->ConvertBetweenRegisterKinds (register_kind, regnum, eRegisterKindGeneric, generic_regnum)
- && (generic_regnum == LLDB_REGNUM_GENERIC_PC || generic_regnum == LLDB_REGNUM_GENERIC_RA))
- {
- pc_register = true;
+ const RegisterInfo *reg_info = GetRegisterInfoAtIndex(lldb_regnum);
+ RegisterValue reg_value;
+ // if this is frame 0 (currently executing frame), get the requested reg
+ // contents from the actual thread registers
+ if (IsFrameZero()) {
+ if (m_thread.GetRegisterContext()->ReadRegister(reg_info, reg_value)) {
+ value = reg_value.GetAsUInt64();
+ return true;
}
+ return false;
+ }
- lldb_private::UnwindLLDB::RegisterLocation regloc;
- if (!m_parent_unwind.SearchForSavedLocationForRegister (lldb_regnum, regloc, m_frame_number - 1, pc_register))
- {
- return false;
- }
- if (ReadRegisterValueFromRegisterLocation (regloc, reg_info, reg_value))
- {
- value = reg_value.GetAsUInt64();
- return true;
- }
+ bool pc_register = false;
+ uint32_t generic_regnum;
+ if (register_kind == eRegisterKindGeneric &&
+ (regnum == LLDB_REGNUM_GENERIC_PC || regnum == LLDB_REGNUM_GENERIC_RA)) {
+ pc_register = true;
+ } else if (m_thread.GetRegisterContext()->ConvertBetweenRegisterKinds(
+ register_kind, regnum, eRegisterKindGeneric, generic_regnum) &&
+ (generic_regnum == LLDB_REGNUM_GENERIC_PC ||
+ generic_regnum == LLDB_REGNUM_GENERIC_RA)) {
+ pc_register = true;
+ }
+
+ lldb_private::UnwindLLDB::RegisterLocation regloc;
+ if (!m_parent_unwind.SearchForSavedLocationForRegister(
+ lldb_regnum, regloc, m_frame_number - 1, pc_register)) {
return false;
+ }
+ if (ReadRegisterValueFromRegisterLocation(regloc, reg_info, reg_value)) {
+ value = reg_value.GetAsUInt64();
+ return true;
+ }
+ return false;
}
-bool
-RegisterContextLLDB::ReadGPRValue (const RegisterNumber ®num, addr_t &value)
-{
- return ReadGPRValue (regnum.GetRegisterKind(), regnum.GetRegisterNumber(), value);
+bool RegisterContextLLDB::ReadGPRValue(const RegisterNumber ®num,
+ addr_t &value) {
+ return ReadGPRValue(regnum.GetRegisterKind(), regnum.GetRegisterNumber(),
+ value);
}
// Find the value of a register in THIS frame
-bool
-RegisterContextLLDB::ReadRegister (const RegisterInfo *reg_info, RegisterValue &value)
-{
- if (!IsValid())
- return false;
-
- const uint32_t lldb_regnum = reg_info->kinds[eRegisterKindLLDB];
- UnwindLogMsgVerbose ("looking for register saved location for reg %d", lldb_regnum);
-
- // If this is the 0th frame, hand this over to the live register context
- if (IsFrameZero ())
- {
- UnwindLogMsgVerbose ("passing along to the live register context for reg %d", lldb_regnum);
- return m_thread.GetRegisterContext()->ReadRegister (reg_info, value);
- }
-
- bool is_pc_regnum = false;
- if (reg_info->kinds[eRegisterKindGeneric] == LLDB_REGNUM_GENERIC_PC
- || reg_info->kinds[eRegisterKindGeneric] == LLDB_REGNUM_GENERIC_RA)
- {
- is_pc_regnum = true;
- }
+bool RegisterContextLLDB::ReadRegister(const RegisterInfo *reg_info,
+ RegisterValue &value) {
+ if (!IsValid())
+ return false;
- lldb_private::UnwindLLDB::RegisterLocation regloc;
- // Find out where the NEXT frame saved THIS frame's register contents
- if (!m_parent_unwind.SearchForSavedLocationForRegister (lldb_regnum, regloc, m_frame_number - 1, is_pc_regnum))
- return false;
+ const uint32_t lldb_regnum = reg_info->kinds[eRegisterKindLLDB];
+ UnwindLogMsgVerbose("looking for register saved location for reg %d",
+ lldb_regnum);
+
+ // If this is the 0th frame, hand this over to the live register context
+ if (IsFrameZero()) {
+ UnwindLogMsgVerbose("passing along to the live register context for reg %d",
+ lldb_regnum);
+ return m_thread.GetRegisterContext()->ReadRegister(reg_info, value);
+ }
+
+ bool is_pc_regnum = false;
+ if (reg_info->kinds[eRegisterKindGeneric] == LLDB_REGNUM_GENERIC_PC ||
+ reg_info->kinds[eRegisterKindGeneric] == LLDB_REGNUM_GENERIC_RA) {
+ is_pc_regnum = true;
+ }
+
+ lldb_private::UnwindLLDB::RegisterLocation regloc;
+ // Find out where the NEXT frame saved THIS frame's register contents
+ if (!m_parent_unwind.SearchForSavedLocationForRegister(
+ lldb_regnum, regloc, m_frame_number - 1, is_pc_regnum))
+ return false;
- return ReadRegisterValueFromRegisterLocation (regloc, reg_info, value);
+ return ReadRegisterValueFromRegisterLocation(regloc, reg_info, value);
}
-bool
-RegisterContextLLDB::WriteRegister (const RegisterInfo *reg_info, const RegisterValue &value)
-{
- if (!IsValid())
- return false;
-
- const uint32_t lldb_regnum = reg_info->kinds[eRegisterKindLLDB];
- UnwindLogMsgVerbose ("looking for register saved location for reg %d", lldb_regnum);
-
- // If this is the 0th frame, hand this over to the live register context
- if (IsFrameZero ())
- {
- UnwindLogMsgVerbose ("passing along to the live register context for reg %d", lldb_regnum);
- return m_thread.GetRegisterContext()->WriteRegister (reg_info, value);
- }
+bool RegisterContextLLDB::WriteRegister(const RegisterInfo *reg_info,
+ const RegisterValue &value) {
+ if (!IsValid())
+ return false;
- lldb_private::UnwindLLDB::RegisterLocation regloc;
- // Find out where the NEXT frame saved THIS frame's register contents
- if (!m_parent_unwind.SearchForSavedLocationForRegister (lldb_regnum, regloc, m_frame_number - 1, false))
- return false;
+ const uint32_t lldb_regnum = reg_info->kinds[eRegisterKindLLDB];
+ UnwindLogMsgVerbose("looking for register saved location for reg %d",
+ lldb_regnum);
+
+ // If this is the 0th frame, hand this over to the live register context
+ if (IsFrameZero()) {
+ UnwindLogMsgVerbose("passing along to the live register context for reg %d",
+ lldb_regnum);
+ return m_thread.GetRegisterContext()->WriteRegister(reg_info, value);
+ }
+
+ lldb_private::UnwindLLDB::RegisterLocation regloc;
+ // Find out where the NEXT frame saved THIS frame's register contents
+ if (!m_parent_unwind.SearchForSavedLocationForRegister(
+ lldb_regnum, regloc, m_frame_number - 1, false))
+ return false;
- return WriteRegisterValueToRegisterLocation (regloc, reg_info, value);
+ return WriteRegisterValueToRegisterLocation(regloc, reg_info, value);
}
// Don't need to implement this one
-bool
-RegisterContextLLDB::ReadAllRegisterValues (lldb::DataBufferSP &data_sp)
-{
- return false;
+bool RegisterContextLLDB::ReadAllRegisterValues(lldb::DataBufferSP &data_sp) {
+ return false;
}
// Don't need to implement this one
-bool
-RegisterContextLLDB::WriteAllRegisterValues (const lldb::DataBufferSP& data_sp)
-{
- return false;
+bool RegisterContextLLDB::WriteAllRegisterValues(
+ const lldb::DataBufferSP &data_sp) {
+ return false;
}
// Retrieve the pc value for THIS from
-bool
-RegisterContextLLDB::GetCFA (addr_t& cfa)
-{
- if (!IsValid())
- {
- return false;
- }
- if (m_cfa == LLDB_INVALID_ADDRESS)
- {
- return false;
- }
- cfa = m_cfa;
- return true;
+bool RegisterContextLLDB::GetCFA(addr_t &cfa) {
+ if (!IsValid()) {
+ return false;
+ }
+ if (m_cfa == LLDB_INVALID_ADDRESS) {
+ return false;
+ }
+ cfa = m_cfa;
+ return true;
}
-
-RegisterContextLLDB::SharedPtr
-RegisterContextLLDB::GetNextFrame () const
-{
- RegisterContextLLDB::SharedPtr regctx;
- if (m_frame_number == 0)
- return regctx;
- return m_parent_unwind.GetRegisterContextForFrameNum (m_frame_number - 1);
+RegisterContextLLDB::SharedPtr RegisterContextLLDB::GetNextFrame() const {
+ RegisterContextLLDB::SharedPtr regctx;
+ if (m_frame_number == 0)
+ return regctx;
+ return m_parent_unwind.GetRegisterContextForFrameNum(m_frame_number - 1);
}
-RegisterContextLLDB::SharedPtr
-RegisterContextLLDB::GetPrevFrame () const
-{
- RegisterContextLLDB::SharedPtr regctx;
- return m_parent_unwind.GetRegisterContextForFrameNum (m_frame_number + 1);
+RegisterContextLLDB::SharedPtr RegisterContextLLDB::GetPrevFrame() const {
+ RegisterContextLLDB::SharedPtr regctx;
+ return m_parent_unwind.GetRegisterContextForFrameNum(m_frame_number + 1);
}
// Retrieve the address of the start of the function of THIS frame
-bool
-RegisterContextLLDB::GetStartPC (addr_t& start_pc)
-{
- if (!IsValid())
- return false;
+bool RegisterContextLLDB::GetStartPC(addr_t &start_pc) {
+ if (!IsValid())
+ return false;
- if (!m_start_pc.IsValid())
- {
- return ReadPC (start_pc);
- }
- start_pc = m_start_pc.GetLoadAddress (CalculateTarget().get());
- return true;
+ if (!m_start_pc.IsValid()) {
+ return ReadPC(start_pc);
+ }
+ start_pc = m_start_pc.GetLoadAddress(CalculateTarget().get());
+ return true;
}
// Retrieve the current pc value for THIS frame, as saved by the NEXT frame.
-bool
-RegisterContextLLDB::ReadPC (addr_t& pc)
-{
- if (!IsValid())
- return false;
-
- bool above_trap_handler = false;
- if (GetNextFrame().get() && GetNextFrame()->IsValid() && GetNextFrame()->IsTrapHandlerFrame())
- above_trap_handler = true;
-
- if (ReadGPRValue (eRegisterKindGeneric, LLDB_REGNUM_GENERIC_PC, pc))
- {
- // A pc value of 0 or 1 is impossible in the middle of the stack -- it indicates the end of a stack walk.
- // On the currently executing frame (or such a frame interrupted asynchronously by sigtramp et al) this may
- // occur if code has jumped through a NULL pointer -- we want to be able to unwind past that frame to help
- // find the bug.
-
- if (m_all_registers_available == false
- && above_trap_handler == false
- && (pc == 0 || pc == 1))
- {
- return false;
- }
- else
- {
- return true;
- }
- }
- else
- {
- return false;
- }
-}
-
-
-void
-RegisterContextLLDB::UnwindLogMsg (const char *fmt, ...)
-{
- Log *log(GetLogIfAllCategoriesSet (LIBLLDB_LOG_UNWIND));
- if (log)
- {
- va_list args;
- va_start (args, fmt);
-
- char *logmsg;
- if (vasprintf (&logmsg, fmt, args) == -1 || logmsg == NULL)
- {
- if (logmsg)
- free (logmsg);
- va_end (args);
- return;
- }
- va_end (args);
+bool RegisterContextLLDB::ReadPC(addr_t &pc) {
+ if (!IsValid())
+ return false;
- log->Printf ("%*sth%d/fr%u %s",
- m_frame_number < 100 ? m_frame_number : 100, "", m_thread.GetIndexID(), m_frame_number,
- logmsg);
- free (logmsg);
+ bool above_trap_handler = false;
+ if (GetNextFrame().get() && GetNextFrame()->IsValid() &&
+ GetNextFrame()->IsTrapHandlerFrame())
+ above_trap_handler = true;
+
+ if (ReadGPRValue(eRegisterKindGeneric, LLDB_REGNUM_GENERIC_PC, pc)) {
+ // A pc value of 0 or 1 is impossible in the middle of the stack -- it
+ // indicates the end of a stack walk.
+ // On the currently executing frame (or such a frame interrupted
+ // asynchronously by sigtramp et al) this may
+ // occur if code has jumped through a NULL pointer -- we want to be able to
+ // unwind past that frame to help
+ // find the bug.
+
+ if (m_all_registers_available == false && above_trap_handler == false &&
+ (pc == 0 || pc == 1)) {
+ return false;
+ } else {
+ return true;
}
+ } else {
+ return false;
+ }
}
-void
-RegisterContextLLDB::UnwindLogMsgVerbose (const char *fmt, ...)
-{
- Log *log(GetLogIfAllCategoriesSet (LIBLLDB_LOG_UNWIND));
- if (log && log->GetVerbose())
- {
- va_list args;
- va_start (args, fmt);
-
- char *logmsg;
- if (vasprintf (&logmsg, fmt, args) == -1 || logmsg == NULL)
- {
- if (logmsg)
- free (logmsg);
- va_end (args);
- return;
- }
- va_end (args);
-
- log->Printf ("%*sth%d/fr%u %s",
- m_frame_number < 100 ? m_frame_number : 100, "", m_thread.GetIndexID(), m_frame_number,
- logmsg);
- free (logmsg);
- }
+void RegisterContextLLDB::UnwindLogMsg(const char *fmt, ...) {
+ Log *log(GetLogIfAllCategoriesSet(LIBLLDB_LOG_UNWIND));
+ if (log) {
+ va_list args;
+ va_start(args, fmt);
+
+ char *logmsg;
+ if (vasprintf(&logmsg, fmt, args) == -1 || logmsg == NULL) {
+ if (logmsg)
+ free(logmsg);
+ va_end(args);
+ return;
+ }
+ va_end(args);
+
+ log->Printf("%*sth%d/fr%u %s", m_frame_number < 100 ? m_frame_number : 100,
+ "", m_thread.GetIndexID(), m_frame_number, logmsg);
+ free(logmsg);
+ }
+}
+
+void RegisterContextLLDB::UnwindLogMsgVerbose(const char *fmt, ...) {
+ Log *log(GetLogIfAllCategoriesSet(LIBLLDB_LOG_UNWIND));
+ if (log && log->GetVerbose()) {
+ va_list args;
+ va_start(args, fmt);
+
+ char *logmsg;
+ if (vasprintf(&logmsg, fmt, args) == -1 || logmsg == NULL) {
+ if (logmsg)
+ free(logmsg);
+ va_end(args);
+ return;
+ }
+ va_end(args);
+
+ log->Printf("%*sth%d/fr%u %s", m_frame_number < 100 ? m_frame_number : 100,
+ "", m_thread.GetIndexID(), m_frame_number, logmsg);
+ free(logmsg);
+ }
}
-
-
Modified: lldb/trunk/source/Plugins/Process/Utility/RegisterContextLLDB.h
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/source/Plugins/Process/Utility/RegisterContextLLDB.h?rev=280751&r1=280750&r2=280751&view=diff
==============================================================================
--- lldb/trunk/source/Plugins/Process/Utility/RegisterContextLLDB.h (original)
+++ lldb/trunk/source/Plugins/Process/Utility/RegisterContextLLDB.h Tue Sep 6 15:57:50 2016
@@ -1,4 +1,5 @@
-//===-- RegisterContextLLDB.h --------------------------------------------*- C++ -*-===//
+//===-- RegisterContextLLDB.h --------------------------------------------*- C++
+//-*-===//
//
// The LLVM Compiler Infrastructure
//
@@ -16,253 +17,247 @@
// Other libraries and framework includes
// Project includes
-#include "lldb/lldb-private.h"
-#include "lldb/Target/RegisterContext.h"
-#include "lldb/Symbol/UnwindPlan.h"
+#include "UnwindLLDB.h"
#include "lldb/Symbol/SymbolContext.h"
+#include "lldb/Symbol/UnwindPlan.h"
+#include "lldb/Target/RegisterContext.h"
#include "lldb/Utility/RegisterNumber.h"
-#include "UnwindLLDB.h"
+#include "lldb/lldb-private.h"
namespace lldb_private {
class UnwindLLDB;
-class RegisterContextLLDB : public lldb_private::RegisterContext
-{
+class RegisterContextLLDB : public lldb_private::RegisterContext {
public:
- typedef std::shared_ptr<RegisterContextLLDB> SharedPtr;
+ typedef std::shared_ptr<RegisterContextLLDB> SharedPtr;
- RegisterContextLLDB (lldb_private::Thread &thread,
- const SharedPtr& next_frame,
- lldb_private::SymbolContext& sym_ctx,
- uint32_t frame_number, lldb_private::UnwindLLDB& unwind_lldb);
+ RegisterContextLLDB(lldb_private::Thread &thread, const SharedPtr &next_frame,
+ lldb_private::SymbolContext &sym_ctx,
+ uint32_t frame_number,
+ lldb_private::UnwindLLDB &unwind_lldb);
- ~RegisterContextLLDB() override = default;
+ ~RegisterContextLLDB() override = default;
- void
- InvalidateAllRegisters() override;
+ void InvalidateAllRegisters() override;
- size_t
- GetRegisterCount() override;
+ size_t GetRegisterCount() override;
- const lldb_private::RegisterInfo *
- GetRegisterInfoAtIndex(size_t reg) override;
+ const lldb_private::RegisterInfo *GetRegisterInfoAtIndex(size_t reg) override;
- size_t
- GetRegisterSetCount() override;
+ size_t GetRegisterSetCount() override;
- const lldb_private::RegisterSet *
- GetRegisterSet(size_t reg_set) override;
+ const lldb_private::RegisterSet *GetRegisterSet(size_t reg_set) override;
- bool
- ReadRegister(const lldb_private::RegisterInfo *reg_info,
- lldb_private::RegisterValue &value) override;
+ bool ReadRegister(const lldb_private::RegisterInfo *reg_info,
+ lldb_private::RegisterValue &value) override;
- bool
- WriteRegister(const lldb_private::RegisterInfo *reg_info,
- const lldb_private::RegisterValue &value) override;
+ bool WriteRegister(const lldb_private::RegisterInfo *reg_info,
+ const lldb_private::RegisterValue &value) override;
- bool
- ReadAllRegisterValues(lldb::DataBufferSP &data_sp) override;
+ bool ReadAllRegisterValues(lldb::DataBufferSP &data_sp) override;
- bool
- WriteAllRegisterValues(const lldb::DataBufferSP &data_sp) override;
+ bool WriteAllRegisterValues(const lldb::DataBufferSP &data_sp) override;
- uint32_t
- ConvertRegisterKindToRegisterNumber(lldb::RegisterKind kind, uint32_t num) override;
+ uint32_t ConvertRegisterKindToRegisterNumber(lldb::RegisterKind kind,
+ uint32_t num) override;
- bool
- IsValid () const;
+ bool IsValid() const;
- bool
- IsTrapHandlerFrame () const;
+ bool IsTrapHandlerFrame() const;
- bool
- GetCFA (lldb::addr_t& cfa);
+ bool GetCFA(lldb::addr_t &cfa);
- bool
- GetStartPC (lldb::addr_t& start_pc);
+ bool GetStartPC(lldb::addr_t &start_pc);
- bool
- ReadPC (lldb::addr_t& start_pc);
+ bool ReadPC(lldb::addr_t &start_pc);
private:
+ enum FrameType {
+ eNormalFrame,
+ eTrapHandlerFrame,
+ eDebuggerFrame, // a debugger inferior function call frame; we get caller's
+ // registers from debugger
+ eSkipFrame, // The unwind resulted in a bogus frame but may get back on
+ // track so we don't want to give up yet
+ eNotAValidFrame // this frame is invalid for some reason - most likely it is
+ // past the top (end) of the stack
+ };
+
+ // UnwindLLDB needs to pass around references to RegisterLocations
+ friend class UnwindLLDB;
+
+ // Returns true if we have an unwind loop -- the same stack frame unwinding
+ // multiple times.
+ bool CheckIfLoopingStack();
+
+ // Indicates whether this frame is frame zero -- the currently
+ // executing frame -- or not.
+ bool IsFrameZero() const;
+
+ void InitializeZerothFrame();
+
+ void InitializeNonZerothFrame();
+
+ SharedPtr GetNextFrame() const;
+
+ SharedPtr GetPrevFrame() const;
+
+ // A SkipFrame occurs when the unwind out of frame 0 didn't go right -- we've
+ // got one bogus frame at frame #1.
+ // There is a good chance we'll get back on track if we follow the frame
+ // pointer chain (or whatever is appropriate
+ // on this ABI) so we allow one invalid frame to be in the stack. Ideally
+ // we'll mark this frame specially at some
+ // point and indicate to the user that the unwinder had a hiccup. Often when
+ // this happens we will miss a frame of
+ // the program's actual stack in the unwind and we want to flag that for the
+ // user somehow.
+ bool IsSkipFrame() const;
+
+ //------------------------------------------------------------------
+ /// Determines if a SymbolContext is a trap handler or not
+ ///
+ /// Given a SymbolContext, determines if this is a trap handler function
+ /// aka asynchronous signal handler.
+ ///
+ /// @return
+ /// Returns true if the SymbolContext is a trap handler.
+ //------------------------------------------------------------------
+ bool IsTrapHandlerSymbol(lldb_private::Process *process,
+ const lldb_private::SymbolContext &m_sym_ctx) const;
+
+ // Provide a location for where THIS function saved the CALLER's register
+ // value
+ // Or a frame "below" this one saved it, i.e. a function called by this one,
+ // preserved a register that this
+ // function didn't modify/use.
+ //
+ // The RegisterLocation type may be set to eRegisterNotAvailable -- this will
+ // happen for a volatile register
+ // being queried mid-stack. Instead of floating frame 0's contents of that
+ // register up the stack (which may
+ // or may not be the value of that reg when the function was executing), we
+ // won't return any value.
+ //
+ // If a non-volatile register (a "preserved" register) is requested mid-stack
+ // and no frames "below" the requested
+ // stack have saved the register anywhere, it is safe to assume that frame 0's
+ // register values are still the same
+ // as the requesting frame's.
+ lldb_private::UnwindLLDB::RegisterSearchResult
+ SavedLocationForRegister(uint32_t lldb_regnum,
+ lldb_private::UnwindLLDB::RegisterLocation ®loc);
+
+ bool ReadRegisterValueFromRegisterLocation(
+ lldb_private::UnwindLLDB::RegisterLocation regloc,
+ const lldb_private::RegisterInfo *reg_info,
+ lldb_private::RegisterValue &value);
+
+ bool WriteRegisterValueToRegisterLocation(
+ lldb_private::UnwindLLDB::RegisterLocation regloc,
+ const lldb_private::RegisterInfo *reg_info,
+ const lldb_private::RegisterValue &value);
+
+ //------------------------------------------------------------------
+ /// If the unwind has to the caller frame has failed, try something else
+ ///
+ /// If lldb is using an assembly language based UnwindPlan for a frame and
+ /// the unwind to the caller frame fails, try falling back to a generic
+ /// UnwindPlan (architecture default unwindplan) to see if that might work
+ /// better. This is mostly helping to work around problems where the
+ /// assembly language inspection fails on hand-written assembly code.
+ ///
+ /// @return
+ /// Returns true if a fallback unwindplan was found & was installed.
+ //------------------------------------------------------------------
+ bool TryFallbackUnwindPlan();
+
+ //------------------------------------------------------------------
+ /// Switch to the fallback unwind plan unconditionally without any safety
+ /// checks that it is providing better results than the normal unwind plan.
+ ///
+ /// The only time it is valid to call this method is if the full unwindplan is
+ /// found to be fundamentally incorrect/impossible.
+ ///
+ /// Returns true if it was able to install the fallback unwind plan.
+ //------------------------------------------------------------------
+ bool ForceSwitchToFallbackUnwindPlan();
+
+ // Get the contents of a general purpose (address-size) register for this
+ // frame
+ // (usually retrieved from the next frame)
+ bool ReadGPRValue(lldb::RegisterKind register_kind, uint32_t regnum,
+ lldb::addr_t &value);
+
+ bool ReadGPRValue(const RegisterNumber ®_num, lldb::addr_t &value);
+
+ // Get the CFA register for a given frame.
+ bool ReadCFAValueForRow(lldb::RegisterKind register_kind,
+ const UnwindPlan::RowSP &row, lldb::addr_t &value);
+
+ lldb::UnwindPlanSP GetFastUnwindPlanForFrame();
+
+ lldb::UnwindPlanSP GetFullUnwindPlanForFrame();
+
+ void UnwindLogMsg(const char *fmt, ...) __attribute__((format(printf, 2, 3)));
+
+ void UnwindLogMsgVerbose(const char *fmt, ...)
+ __attribute__((format(printf, 2, 3)));
+
+ bool IsUnwindPlanValidForCurrentPC(lldb::UnwindPlanSP unwind_plan_sp,
+ int &valid_pc_offset);
+
+ lldb_private::Thread &m_thread;
+
+ ///
+ // The following tell us how to retrieve the CALLER's register values (ie the
+ // "previous" frame, aka the frame above)
+ // i.e. where THIS frame saved them
+ ///
+
+ lldb::UnwindPlanSP m_fast_unwind_plan_sp; // may be NULL
+ lldb::UnwindPlanSP m_full_unwind_plan_sp;
+ lldb::UnwindPlanSP m_fallback_unwind_plan_sp; // may be NULL
+
+ bool m_all_registers_available; // Can we retrieve all regs or just
+ // nonvolatile regs?
+ int m_frame_type; // enum FrameType
+
+ lldb::addr_t m_cfa;
+ lldb_private::Address m_start_pc;
+ lldb_private::Address m_current_pc;
+
+ int m_current_offset; // how far into the function we've executed; -1 if
+ // unknown
+ // 0 if no instructions have been executed yet.
+
+ int m_current_offset_backed_up_one; // how far into the function we've
+ // executed; -1 if unknown
+ // 0 if no instructions have been executed yet.
+ // On architectures where the return address on the stack points
+ // to the instruction after the CALL, this value will have 1
+ // subtracted from it. Else a function that ends in a CALL will
+ // have an offset pointing into the next function's address range.
+ // m_current_pc has the actual address of the "current" pc.
+
+ lldb_private::SymbolContext &m_sym_ctx;
+ bool m_sym_ctx_valid; // if ResolveSymbolContextForAddress fails, don't try to
+ // use m_sym_ctx
+
+ uint32_t m_frame_number; // What stack frame this RegisterContext is
+
+ std::map<uint32_t, lldb_private::UnwindLLDB::RegisterLocation>
+ m_registers; // where to find reg values for this frame
+
+ lldb_private::UnwindLLDB &m_parent_unwind; // The UnwindLLDB that is creating
+ // this RegisterContextLLDB
+
+ //------------------------------------------------------------------
+ // For RegisterContextLLDB only
+ //------------------------------------------------------------------
- enum FrameType
- {
- eNormalFrame,
- eTrapHandlerFrame,
- eDebuggerFrame, // a debugger inferior function call frame; we get caller's registers from debugger
- eSkipFrame, // The unwind resulted in a bogus frame but may get back on track so we don't want to give up yet
- eNotAValidFrame // this frame is invalid for some reason - most likely it is past the top (end) of the stack
- };
-
- // UnwindLLDB needs to pass around references to RegisterLocations
- friend class UnwindLLDB;
-
- // Returns true if we have an unwind loop -- the same stack frame unwinding
- // multiple times.
- bool
- CheckIfLoopingStack ();
-
- // Indicates whether this frame is frame zero -- the currently
- // executing frame -- or not.
- bool
- IsFrameZero () const;
-
- void
- InitializeZerothFrame ();
-
- void
- InitializeNonZerothFrame();
-
- SharedPtr
- GetNextFrame () const;
-
- SharedPtr
- GetPrevFrame () const;
-
- // A SkipFrame occurs when the unwind out of frame 0 didn't go right -- we've got one bogus frame at frame #1.
- // There is a good chance we'll get back on track if we follow the frame pointer chain (or whatever is appropriate
- // on this ABI) so we allow one invalid frame to be in the stack. Ideally we'll mark this frame specially at some
- // point and indicate to the user that the unwinder had a hiccup. Often when this happens we will miss a frame of
- // the program's actual stack in the unwind and we want to flag that for the user somehow.
- bool
- IsSkipFrame () const;
-
- //------------------------------------------------------------------
- /// Determines if a SymbolContext is a trap handler or not
- ///
- /// Given a SymbolContext, determines if this is a trap handler function
- /// aka asynchronous signal handler.
- ///
- /// @return
- /// Returns true if the SymbolContext is a trap handler.
- //------------------------------------------------------------------
- bool
- IsTrapHandlerSymbol (lldb_private::Process *process, const lldb_private::SymbolContext &m_sym_ctx) const;
-
- // Provide a location for where THIS function saved the CALLER's register value
- // Or a frame "below" this one saved it, i.e. a function called by this one, preserved a register that this
- // function didn't modify/use.
- //
- // The RegisterLocation type may be set to eRegisterNotAvailable -- this will happen for a volatile register
- // being queried mid-stack. Instead of floating frame 0's contents of that register up the stack (which may
- // or may not be the value of that reg when the function was executing), we won't return any value.
- //
- // If a non-volatile register (a "preserved" register) is requested mid-stack and no frames "below" the requested
- // stack have saved the register anywhere, it is safe to assume that frame 0's register values are still the same
- // as the requesting frame's.
- lldb_private::UnwindLLDB::RegisterSearchResult
- SavedLocationForRegister (uint32_t lldb_regnum, lldb_private::UnwindLLDB::RegisterLocation ®loc);
-
- bool
- ReadRegisterValueFromRegisterLocation (lldb_private::UnwindLLDB::RegisterLocation regloc,
- const lldb_private::RegisterInfo *reg_info,
- lldb_private::RegisterValue &value);
-
- bool
- WriteRegisterValueToRegisterLocation (lldb_private::UnwindLLDB::RegisterLocation regloc,
- const lldb_private::RegisterInfo *reg_info,
- const lldb_private::RegisterValue &value);
-
- //------------------------------------------------------------------
- /// If the unwind has to the caller frame has failed, try something else
- ///
- /// If lldb is using an assembly language based UnwindPlan for a frame and
- /// the unwind to the caller frame fails, try falling back to a generic
- /// UnwindPlan (architecture default unwindplan) to see if that might work
- /// better. This is mostly helping to work around problems where the
- /// assembly language inspection fails on hand-written assembly code.
- ///
- /// @return
- /// Returns true if a fallback unwindplan was found & was installed.
- //------------------------------------------------------------------
- bool
- TryFallbackUnwindPlan ();
-
- //------------------------------------------------------------------
- /// Switch to the fallback unwind plan unconditionally without any safety
- /// checks that it is providing better results than the normal unwind plan.
- ///
- /// The only time it is valid to call this method is if the full unwindplan is
- /// found to be fundamentally incorrect/impossible.
- ///
- /// Returns true if it was able to install the fallback unwind plan.
- //------------------------------------------------------------------
- bool
- ForceSwitchToFallbackUnwindPlan ();
-
- // Get the contents of a general purpose (address-size) register for this frame
- // (usually retrieved from the next frame)
- bool
- ReadGPRValue (lldb::RegisterKind register_kind, uint32_t regnum, lldb::addr_t &value);
-
- bool
- ReadGPRValue (const RegisterNumber ®_num, lldb::addr_t &value);
-
- // Get the CFA register for a given frame.
- bool
- ReadCFAValueForRow (lldb::RegisterKind register_kind, const UnwindPlan::RowSP &row, lldb::addr_t &value);
-
- lldb::UnwindPlanSP
- GetFastUnwindPlanForFrame ();
-
- lldb::UnwindPlanSP
- GetFullUnwindPlanForFrame ();
-
- void
- UnwindLogMsg (const char *fmt, ...) __attribute__ ((format (printf, 2, 3)));
-
- void
- UnwindLogMsgVerbose (const char *fmt, ...) __attribute__ ((format (printf, 2, 3)));
-
- bool
- IsUnwindPlanValidForCurrentPC(lldb::UnwindPlanSP unwind_plan_sp, int &valid_pc_offset);
-
- lldb_private::Thread& m_thread;
-
- ///
- // The following tell us how to retrieve the CALLER's register values (ie the "previous" frame, aka the frame above)
- // i.e. where THIS frame saved them
- ///
-
- lldb::UnwindPlanSP m_fast_unwind_plan_sp; // may be NULL
- lldb::UnwindPlanSP m_full_unwind_plan_sp;
- lldb::UnwindPlanSP m_fallback_unwind_plan_sp; // may be NULL
-
- bool m_all_registers_available; // Can we retrieve all regs or just nonvolatile regs?
- int m_frame_type; // enum FrameType
-
- lldb::addr_t m_cfa;
- lldb_private::Address m_start_pc;
- lldb_private::Address m_current_pc;
-
- int m_current_offset; // how far into the function we've executed; -1 if unknown
- // 0 if no instructions have been executed yet.
-
- int m_current_offset_backed_up_one; // how far into the function we've executed; -1 if unknown
- // 0 if no instructions have been executed yet.
- // On architectures where the return address on the stack points
- // to the instruction after the CALL, this value will have 1
- // subtracted from it. Else a function that ends in a CALL will
- // have an offset pointing into the next function's address range.
- // m_current_pc has the actual address of the "current" pc.
-
- lldb_private::SymbolContext& m_sym_ctx;
- bool m_sym_ctx_valid; // if ResolveSymbolContextForAddress fails, don't try to use m_sym_ctx
-
- uint32_t m_frame_number; // What stack frame this RegisterContext is
-
- std::map<uint32_t, lldb_private::UnwindLLDB::RegisterLocation> m_registers; // where to find reg values for this frame
-
- lldb_private::UnwindLLDB& m_parent_unwind; // The UnwindLLDB that is creating this RegisterContextLLDB
-
- //------------------------------------------------------------------
- // For RegisterContextLLDB only
- //------------------------------------------------------------------
-
- DISALLOW_COPY_AND_ASSIGN (RegisterContextLLDB);
+ DISALLOW_COPY_AND_ASSIGN(RegisterContextLLDB);
};
} // namespace lldb_private
Modified: lldb/trunk/source/Plugins/Process/Utility/RegisterContextLinux_arm.cpp
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/source/Plugins/Process/Utility/RegisterContextLinux_arm.cpp?rev=280751&r1=280750&r2=280751&view=diff
==============================================================================
--- lldb/trunk/source/Plugins/Process/Utility/RegisterContextLinux_arm.cpp (original)
+++ lldb/trunk/source/Plugins/Process/Utility/RegisterContextLinux_arm.cpp Tue Sep 6 15:57:50 2016
@@ -7,12 +7,12 @@
//
//===---------------------------------------------------------------------===//
+#include <cassert>
#include <stddef.h>
#include <vector>
-#include <cassert>
-#include "llvm/Support/Compiler.h"
#include "lldb/lldb-defines.h"
+#include "llvm/Support/Compiler.h"
#include "RegisterContextLinux_arm.h"
@@ -20,14 +20,31 @@ using namespace lldb;
using namespace lldb_private;
// Based on RegisterContextDarwin_arm.cpp
-#define GPR_OFFSET(idx) ((idx) * 4)
-#define FPU_OFFSET(idx) ((idx) * 4 + sizeof (RegisterContextLinux_arm::GPR))
-#define FPSCR_OFFSET (LLVM_EXTENSION offsetof (RegisterContextLinux_arm::FPU, fpscr) + sizeof (RegisterContextLinux_arm::GPR))
-#define EXC_OFFSET(idx) ((idx) * 4 + sizeof (RegisterContextLinux_arm::GPR) + sizeof (RegisterContextLinux_arm::FPU))
-#define DBG_OFFSET(reg) ((LLVM_EXTENSION offsetof (RegisterContextLinux_arm::DBG, reg) + sizeof (RegisterContextLinux_arm::GPR) + sizeof (RegisterContextLinux_arm::FPU) + sizeof (RegisterContextLinux_arm::EXC)))
-
-#define DEFINE_DBG(reg, i) #reg, NULL, sizeof(((RegisterContextLinux_arm::DBG *)NULL)->reg[i]), DBG_OFFSET(reg[i]), eEncodingUint, eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, dbg_##reg##i }, NULL, NULL, NULL, 0
-#define REG_CONTEXT_SIZE (sizeof (RegisterContextLinux_arm::GPR) + sizeof (RegisterContextLinux_arm::FPU) + sizeof (RegisterContextLinux_arm::EXC))
+#define GPR_OFFSET(idx) ((idx)*4)
+#define FPU_OFFSET(idx) ((idx)*4 + sizeof(RegisterContextLinux_arm::GPR))
+#define FPSCR_OFFSET \
+ (LLVM_EXTENSION offsetof(RegisterContextLinux_arm::FPU, fpscr) + \
+ sizeof(RegisterContextLinux_arm::GPR))
+#define EXC_OFFSET(idx) \
+ ((idx)*4 + sizeof(RegisterContextLinux_arm::GPR) + \
+ sizeof(RegisterContextLinux_arm::FPU))
+#define DBG_OFFSET(reg) \
+ ((LLVM_EXTENSION offsetof(RegisterContextLinux_arm::DBG, reg) + \
+ sizeof(RegisterContextLinux_arm::GPR) + \
+ sizeof(RegisterContextLinux_arm::FPU) + \
+ sizeof(RegisterContextLinux_arm::EXC)))
+
+#define DEFINE_DBG(reg, i) \
+ #reg, NULL, sizeof(((RegisterContextLinux_arm::DBG *) NULL)->reg[i]), \
+ DBG_OFFSET(reg[i]), eEncodingUint, eFormatHex, \
+ {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \
+ LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \
+ dbg_##reg##i }, \
+ NULL, NULL, NULL, 0
+#define REG_CONTEXT_SIZE \
+ (sizeof(RegisterContextLinux_arm::GPR) + \
+ sizeof(RegisterContextLinux_arm::FPU) + \
+ sizeof(RegisterContextLinux_arm::EXC))
//-----------------------------------------------------------------------------
// Include RegisterInfos_arm to declare our g_register_infos_arm structure.
@@ -37,52 +54,43 @@ using namespace lldb_private;
#undef DECLARE_REGISTER_INFOS_ARM_STRUCT
static const lldb_private::RegisterInfo *
-GetRegisterInfoPtr (const lldb_private::ArchSpec &target_arch)
-{
- switch (target_arch.GetMachine())
- {
- case llvm::Triple::arm:
- return g_register_infos_arm;
- default:
- assert(false && "Unhandled target architecture.");
- return NULL;
- }
+GetRegisterInfoPtr(const lldb_private::ArchSpec &target_arch) {
+ switch (target_arch.GetMachine()) {
+ case llvm::Triple::arm:
+ return g_register_infos_arm;
+ default:
+ assert(false && "Unhandled target architecture.");
+ return NULL;
+ }
}
static uint32_t
-GetRegisterInfoCount(const lldb_private::ArchSpec &target_arch)
-{
- switch (target_arch.GetMachine())
- {
- case llvm::Triple::arm:
- return static_cast<uint32_t>(sizeof(g_register_infos_arm) / sizeof(g_register_infos_arm[0]));
- default:
- assert(false && "Unhandled target architecture.");
- return 0;
- }
-}
-
-RegisterContextLinux_arm::RegisterContextLinux_arm(const lldb_private::ArchSpec &target_arch) :
- lldb_private::RegisterInfoInterface(target_arch),
- m_register_info_p(GetRegisterInfoPtr(target_arch)),
- m_register_info_count(GetRegisterInfoCount(target_arch))
-{
-}
+GetRegisterInfoCount(const lldb_private::ArchSpec &target_arch) {
+ switch (target_arch.GetMachine()) {
+ case llvm::Triple::arm:
+ return static_cast<uint32_t>(sizeof(g_register_infos_arm) /
+ sizeof(g_register_infos_arm[0]));
+ default:
+ assert(false && "Unhandled target architecture.");
+ return 0;
+ }
+}
+
+RegisterContextLinux_arm::RegisterContextLinux_arm(
+ const lldb_private::ArchSpec &target_arch)
+ : lldb_private::RegisterInfoInterface(target_arch),
+ m_register_info_p(GetRegisterInfoPtr(target_arch)),
+ m_register_info_count(GetRegisterInfoCount(target_arch)) {}
-size_t
-RegisterContextLinux_arm::GetGPRSize() const
-{
- return sizeof(struct RegisterContextLinux_arm::GPR);
+size_t RegisterContextLinux_arm::GetGPRSize() const {
+ return sizeof(struct RegisterContextLinux_arm::GPR);
}
const lldb_private::RegisterInfo *
-RegisterContextLinux_arm::GetRegisterInfo() const
-{
- return m_register_info_p;
+RegisterContextLinux_arm::GetRegisterInfo() const {
+ return m_register_info_p;
}
-uint32_t
-RegisterContextLinux_arm::GetRegisterCount() const
-{
- return m_register_info_count;
+uint32_t RegisterContextLinux_arm::GetRegisterCount() const {
+ return m_register_info_count;
}
Modified: lldb/trunk/source/Plugins/Process/Utility/RegisterContextLinux_arm.h
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/source/Plugins/Process/Utility/RegisterContextLinux_arm.h?rev=280751&r1=280750&r2=280751&view=diff
==============================================================================
--- lldb/trunk/source/Plugins/Process/Utility/RegisterContextLinux_arm.h (original)
+++ lldb/trunk/source/Plugins/Process/Utility/RegisterContextLinux_arm.h Tue Sep 6 15:57:50 2016
@@ -10,66 +10,53 @@
#ifndef liblldb_RegisterContextLinux_arm_h_
#define liblldb_RegisterContextLinux_arm_h_
-#include "lldb/lldb-private.h"
-#include "lldb/Target/RegisterContext.h"
#include "RegisterInfoInterface.h"
+#include "lldb/Target/RegisterContext.h"
+#include "lldb/lldb-private.h"
-class RegisterContextLinux_arm
- : public lldb_private::RegisterInfoInterface
-{
+class RegisterContextLinux_arm : public lldb_private::RegisterInfoInterface {
public:
+ struct GPR {
+ uint32_t r[16]; // R0-R15
+ uint32_t cpsr; // CPSR
+ };
+
+ struct QReg {
+ uint8_t bytes[16];
+ };
+
+ struct FPU {
+ union {
+ uint32_t s[32];
+ uint64_t d[32];
+ QReg q[16]; // the 128-bit NEON registers
+ } floats;
+ uint32_t fpscr;
+ };
+ struct EXC {
+ uint32_t exception;
+ uint32_t fsr; /* Fault status */
+ uint32_t far; /* Virtual Fault Address */
+ };
+
+ struct DBG {
+ uint32_t bvr[16];
+ uint32_t bcr[16];
+ uint32_t wvr[16];
+ uint32_t wcr[16];
+ };
- struct GPR
- {
- uint32_t r[16]; // R0-R15
- uint32_t cpsr; // CPSR
- };
-
-
- struct QReg
- {
- uint8_t bytes[16];
- };
-
- struct FPU
- {
- union {
- uint32_t s[32];
- uint64_t d[32];
- QReg q[16]; // the 128-bit NEON registers
- } floats;
- uint32_t fpscr;
- };
- struct EXC
- {
- uint32_t exception;
- uint32_t fsr; /* Fault status */
- uint32_t far; /* Virtual Fault Address */
- };
-
- struct DBG
- {
- uint32_t bvr[16];
- uint32_t bcr[16];
- uint32_t wvr[16];
- uint32_t wcr[16];
- };
-
- RegisterContextLinux_arm(const lldb_private::ArchSpec &target_arch);
+ RegisterContextLinux_arm(const lldb_private::ArchSpec &target_arch);
- size_t
- GetGPRSize() const override;
+ size_t GetGPRSize() const override;
- const lldb_private::RegisterInfo *
- GetRegisterInfo() const override;
+ const lldb_private::RegisterInfo *GetRegisterInfo() const override;
- uint32_t
- GetRegisterCount () const override;
+ uint32_t GetRegisterCount() const override;
private:
- const lldb_private::RegisterInfo *m_register_info_p;
- uint32_t m_register_info_count;
+ const lldb_private::RegisterInfo *m_register_info_p;
+ uint32_t m_register_info_count;
};
-#endif // liblldb_RegisterContextLinux_arm_h_
-
+#endif // liblldb_RegisterContextLinux_arm_h_
Modified: lldb/trunk/source/Plugins/Process/Utility/RegisterContextLinux_arm64.cpp
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/source/Plugins/Process/Utility/RegisterContextLinux_arm64.cpp?rev=280751&r1=280750&r2=280751&view=diff
==============================================================================
--- lldb/trunk/source/Plugins/Process/Utility/RegisterContextLinux_arm64.cpp (original)
+++ lldb/trunk/source/Plugins/Process/Utility/RegisterContextLinux_arm64.cpp Tue Sep 6 15:57:50 2016
@@ -7,28 +7,47 @@
//
//===---------------------------------------------------------------------===//
+#include <cassert>
#include <stddef.h>
#include <vector>
-#include <cassert>
-#include "llvm/Support/Compiler.h"
#include "lldb/lldb-defines.h"
+#include "llvm/Support/Compiler.h"
#include "RegisterContextLinux_arm64.h"
// Based on RegisterContextDarwin_arm64.cpp
-#define GPR_OFFSET(idx) ((idx) * 8)
-#define GPR_OFFSET_NAME(reg) (LLVM_EXTENSION offsetof (RegisterContextLinux_arm64::GPR, reg))
-
-#define FPU_OFFSET(idx) ((idx) * 16 + sizeof (RegisterContextLinux_arm64::GPR))
-#define FPU_OFFSET_NAME(reg) (LLVM_EXTENSION offsetof (RegisterContextLinux_arm64::FPU, reg) + sizeof (RegisterContextLinux_arm64::GPR))
-
-#define EXC_OFFSET_NAME(reg) (LLVM_EXTENSION offsetof (RegisterContextLinux_arm64::EXC, reg) + sizeof (RegisterContextLinux_arm64::GPR) + sizeof (RegisterContextLinux_arm64::FPU))
-#define DBG_OFFSET_NAME(reg) (LLVM_EXTENSION offsetof (RegisterContextLinux_arm64::DBG, reg) + sizeof (RegisterContextLinux_arm64::GPR) + sizeof (RegisterContextLinux_arm64::FPU) + sizeof (RegisterContextLinux_arm64::EXC))
-
-#define DEFINE_DBG(reg, i) #reg, NULL, sizeof(((RegisterContextLinux_arm64::DBG *)NULL)->reg[i]), DBG_OFFSET_NAME(reg[i]), lldb::eEncodingUint, lldb::eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, dbg_##reg##i }, NULL, NULL, NULL, 0
-#define REG_CONTEXT_SIZE (sizeof (RegisterContextLinux_arm64::GPR) + sizeof (RegisterContextLinux_arm64::FPU) + sizeof (RegisterContextLinux_arm64::EXC))
-
+#define GPR_OFFSET(idx) ((idx)*8)
+#define GPR_OFFSET_NAME(reg) \
+ (LLVM_EXTENSION offsetof(RegisterContextLinux_arm64::GPR, reg))
+
+#define FPU_OFFSET(idx) ((idx)*16 + sizeof(RegisterContextLinux_arm64::GPR))
+#define FPU_OFFSET_NAME(reg) \
+ (LLVM_EXTENSION offsetof(RegisterContextLinux_arm64::FPU, reg) + \
+ sizeof(RegisterContextLinux_arm64::GPR))
+
+#define EXC_OFFSET_NAME(reg) \
+ (LLVM_EXTENSION offsetof(RegisterContextLinux_arm64::EXC, reg) + \
+ sizeof(RegisterContextLinux_arm64::GPR) + \
+ sizeof(RegisterContextLinux_arm64::FPU))
+#define DBG_OFFSET_NAME(reg) \
+ (LLVM_EXTENSION offsetof(RegisterContextLinux_arm64::DBG, reg) + \
+ sizeof(RegisterContextLinux_arm64::GPR) + \
+ sizeof(RegisterContextLinux_arm64::FPU) + \
+ sizeof(RegisterContextLinux_arm64::EXC))
+
+#define DEFINE_DBG(reg, i) \
+ #reg, NULL, \
+ sizeof(((RegisterContextLinux_arm64::DBG *) NULL)->reg[i]), \
+ DBG_OFFSET_NAME(reg[i]), lldb::eEncodingUint, lldb::eFormatHex, \
+ {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \
+ LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \
+ dbg_##reg##i }, \
+ NULL, NULL, NULL, 0
+#define REG_CONTEXT_SIZE \
+ (sizeof(RegisterContextLinux_arm64::GPR) + \
+ sizeof(RegisterContextLinux_arm64::FPU) + \
+ sizeof(RegisterContextLinux_arm64::EXC))
//-----------------------------------------------------------------------------
// Include RegisterInfos_arm64 to declare our g_register_infos_arm64 structure.
@@ -38,52 +57,43 @@
#undef DECLARE_REGISTER_INFOS_ARM64_STRUCT
static const lldb_private::RegisterInfo *
-GetRegisterInfoPtr (const lldb_private::ArchSpec &target_arch)
-{
- switch (target_arch.GetMachine())
- {
- case llvm::Triple::aarch64:
- return g_register_infos_arm64;
- default:
- assert(false && "Unhandled target architecture.");
- return NULL;
- }
+GetRegisterInfoPtr(const lldb_private::ArchSpec &target_arch) {
+ switch (target_arch.GetMachine()) {
+ case llvm::Triple::aarch64:
+ return g_register_infos_arm64;
+ default:
+ assert(false && "Unhandled target architecture.");
+ return NULL;
+ }
}
static uint32_t
-GetRegisterInfoCount(const lldb_private::ArchSpec &target_arch)
-{
- switch (target_arch.GetMachine())
- {
- case llvm::Triple::aarch64:
- return static_cast<uint32_t>(sizeof(g_register_infos_arm64) / sizeof(g_register_infos_arm64[0]));
- default:
- assert(false && "Unhandled target architecture.");
- return 0;
- }
-}
-
-RegisterContextLinux_arm64::RegisterContextLinux_arm64(const lldb_private::ArchSpec &target_arch) :
- lldb_private::RegisterInfoInterface(target_arch),
- m_register_info_p(GetRegisterInfoPtr(target_arch)),
- m_register_info_count(GetRegisterInfoCount(target_arch))
-{
-}
+GetRegisterInfoCount(const lldb_private::ArchSpec &target_arch) {
+ switch (target_arch.GetMachine()) {
+ case llvm::Triple::aarch64:
+ return static_cast<uint32_t>(sizeof(g_register_infos_arm64) /
+ sizeof(g_register_infos_arm64[0]));
+ default:
+ assert(false && "Unhandled target architecture.");
+ return 0;
+ }
+}
+
+RegisterContextLinux_arm64::RegisterContextLinux_arm64(
+ const lldb_private::ArchSpec &target_arch)
+ : lldb_private::RegisterInfoInterface(target_arch),
+ m_register_info_p(GetRegisterInfoPtr(target_arch)),
+ m_register_info_count(GetRegisterInfoCount(target_arch)) {}
-size_t
-RegisterContextLinux_arm64::GetGPRSize() const
-{
- return sizeof(struct RegisterContextLinux_arm64::GPR);
+size_t RegisterContextLinux_arm64::GetGPRSize() const {
+ return sizeof(struct RegisterContextLinux_arm64::GPR);
}
const lldb_private::RegisterInfo *
-RegisterContextLinux_arm64::GetRegisterInfo() const
-{
- return m_register_info_p;
+RegisterContextLinux_arm64::GetRegisterInfo() const {
+ return m_register_info_p;
}
-uint32_t
-RegisterContextLinux_arm64::GetRegisterCount() const
-{
- return m_register_info_count;
+uint32_t RegisterContextLinux_arm64::GetRegisterCount() const {
+ return m_register_info_count;
}
Modified: lldb/trunk/source/Plugins/Process/Utility/RegisterContextLinux_arm64.h
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/source/Plugins/Process/Utility/RegisterContextLinux_arm64.h?rev=280751&r1=280750&r2=280751&view=diff
==============================================================================
--- lldb/trunk/source/Plugins/Process/Utility/RegisterContextLinux_arm64.h (original)
+++ lldb/trunk/source/Plugins/Process/Utility/RegisterContextLinux_arm64.h Tue Sep 6 15:57:50 2016
@@ -10,71 +10,61 @@
#ifndef liblldb_RegisterContextLinux_arm64_H_
#define liblldb_RegisterContextLinux_arm64_H_
-#include "lldb/lldb-private.h"
-#include "lldb/Target/RegisterContext.h"
#include "RegisterInfoInterface.h"
+#include "lldb/Target/RegisterContext.h"
+#include "lldb/lldb-private.h"
-class RegisterContextLinux_arm64
- : public lldb_private::RegisterInfoInterface
-{
+class RegisterContextLinux_arm64 : public lldb_private::RegisterInfoInterface {
public:
- // based on RegisterContextDarwin_arm64.h
- struct GPR
- {
- uint64_t x[29]; // x0-x28
- uint64_t fp; // x29
- uint64_t lr; // x30
- uint64_t sp; // x31
- uint64_t pc; // pc
- uint32_t cpsr; // cpsr
- };
-
- // based on RegisterContextDarwin_arm64.h
- struct VReg
- {
- uint8_t bytes[16];
- };
-
- // based on RegisterContextDarwin_arm64.h
- struct FPU
- {
- VReg v[32];
- uint32_t fpsr;
- uint32_t fpcr;
- };
-
- // based on RegisterContextDarwin_arm64.h
- struct EXC
- {
- uint64_t far; // Virtual Fault Address
- uint32_t esr; // Exception syndrome
- uint32_t exception; // number of arm exception token
- };
-
- // based on RegisterContextDarwin_arm64.h
- struct DBG
- {
- uint64_t bvr[16];
- uint64_t bcr[16];
- uint64_t wvr[16];
- uint64_t wcr[16];
- uint64_t mdscr_el1;
- };
-
- RegisterContextLinux_arm64(const lldb_private::ArchSpec &target_arch);
+ // based on RegisterContextDarwin_arm64.h
+ struct GPR {
+ uint64_t x[29]; // x0-x28
+ uint64_t fp; // x29
+ uint64_t lr; // x30
+ uint64_t sp; // x31
+ uint64_t pc; // pc
+ uint32_t cpsr; // cpsr
+ };
+
+ // based on RegisterContextDarwin_arm64.h
+ struct VReg {
+ uint8_t bytes[16];
+ };
+
+ // based on RegisterContextDarwin_arm64.h
+ struct FPU {
+ VReg v[32];
+ uint32_t fpsr;
+ uint32_t fpcr;
+ };
+
+ // based on RegisterContextDarwin_arm64.h
+ struct EXC {
+ uint64_t far; // Virtual Fault Address
+ uint32_t esr; // Exception syndrome
+ uint32_t exception; // number of arm exception token
+ };
+
+ // based on RegisterContextDarwin_arm64.h
+ struct DBG {
+ uint64_t bvr[16];
+ uint64_t bcr[16];
+ uint64_t wvr[16];
+ uint64_t wcr[16];
+ uint64_t mdscr_el1;
+ };
+
+ RegisterContextLinux_arm64(const lldb_private::ArchSpec &target_arch);
- size_t
- GetGPRSize() const override;
+ size_t GetGPRSize() const override;
- const lldb_private::RegisterInfo *
- GetRegisterInfo() const override;
+ const lldb_private::RegisterInfo *GetRegisterInfo() const override;
- uint32_t
- GetRegisterCount () const override;
+ uint32_t GetRegisterCount() const override;
private:
- const lldb_private::RegisterInfo *m_register_info_p;
- uint32_t m_register_info_count;
+ const lldb_private::RegisterInfo *m_register_info_p;
+ uint32_t m_register_info_count;
};
#endif
Modified: lldb/trunk/source/Plugins/Process/Utility/RegisterContextLinux_i386.cpp
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/source/Plugins/Process/Utility/RegisterContextLinux_i386.cpp?rev=280751&r1=280750&r2=280751&view=diff
==============================================================================
--- lldb/trunk/source/Plugins/Process/Utility/RegisterContextLinux_i386.cpp (original)
+++ lldb/trunk/source/Plugins/Process/Utility/RegisterContextLinux_i386.cpp Tue Sep 6 15:57:50 2016
@@ -7,87 +7,81 @@
//
//===---------------------------------------------------------------------===//
-#include "RegisterContextPOSIX_x86.h"
#include "RegisterContextLinux_i386.h"
+#include "RegisterContextPOSIX_x86.h"
using namespace lldb_private;
using namespace lldb;
-struct GPR
-{
- uint32_t ebx;
- uint32_t ecx;
- uint32_t edx;
- uint32_t esi;
- uint32_t edi;
- uint32_t ebp;
- uint32_t eax;
- uint32_t ds;
- uint32_t es;
- uint32_t fs;
- uint32_t gs;
- uint32_t orig_eax;
- uint32_t eip;
- uint32_t cs;
- uint32_t eflags;
- uint32_t esp;
- uint32_t ss;
+struct GPR {
+ uint32_t ebx;
+ uint32_t ecx;
+ uint32_t edx;
+ uint32_t esi;
+ uint32_t edi;
+ uint32_t ebp;
+ uint32_t eax;
+ uint32_t ds;
+ uint32_t es;
+ uint32_t fs;
+ uint32_t gs;
+ uint32_t orig_eax;
+ uint32_t eip;
+ uint32_t cs;
+ uint32_t eflags;
+ uint32_t esp;
+ uint32_t ss;
};
-struct FPR_i386
-{
- uint16_t fctrl; // FPU Control Word (fcw)
- uint16_t fstat; // FPU Status Word (fsw)
- uint8_t ftag; // FPU Tag Word (ftw)
- uint8_t reserved_1; // Reserved
- uint16_t fop; // Last Instruction Opcode (fop)
- union
- {
- struct
- {
- uint64_t fip; // Instruction Pointer
- uint64_t fdp; // Data Pointer
- } x86_64;
- struct
- {
- uint32_t fioff; // FPU IP Offset (fip)
- uint32_t fiseg; // FPU IP Selector (fcs)
- uint32_t fooff; // FPU Operand Pointer Offset (foo)
- uint32_t foseg; // FPU Operand Pointer Selector (fos)
- } i386_;// Added _ in the end to avoid error with gcc defining i386 in some cases
- } ptr;
- uint32_t mxcsr; // MXCSR Register State
- uint32_t mxcsrmask; // MXCSR Mask
- MMSReg stmm[8]; // 8*16 bytes for each FP-reg = 128 bytes
- XMMReg xmm[8]; // 8*16 bytes for each XMM-reg = 128 bytes
- uint32_t padding[56];
+struct FPR_i386 {
+ uint16_t fctrl; // FPU Control Word (fcw)
+ uint16_t fstat; // FPU Status Word (fsw)
+ uint8_t ftag; // FPU Tag Word (ftw)
+ uint8_t reserved_1; // Reserved
+ uint16_t fop; // Last Instruction Opcode (fop)
+ union {
+ struct {
+ uint64_t fip; // Instruction Pointer
+ uint64_t fdp; // Data Pointer
+ } x86_64;
+ struct {
+ uint32_t fioff; // FPU IP Offset (fip)
+ uint32_t fiseg; // FPU IP Selector (fcs)
+ uint32_t fooff; // FPU Operand Pointer Offset (foo)
+ uint32_t foseg; // FPU Operand Pointer Selector (fos)
+ } i386_; // Added _ in the end to avoid error with gcc defining i386 in some
+ // cases
+ } ptr;
+ uint32_t mxcsr; // MXCSR Register State
+ uint32_t mxcsrmask; // MXCSR Mask
+ MMSReg stmm[8]; // 8*16 bytes for each FP-reg = 128 bytes
+ XMMReg xmm[8]; // 8*16 bytes for each XMM-reg = 128 bytes
+ uint32_t padding[56];
};
-struct UserArea
-{
- GPR regs; // General purpose registers.
- int32_t fpvalid; // True if FPU is being used.
- FPR_i386 i387; // FPU registers.
- uint32_t tsize; // Text segment size.
- uint32_t dsize; // Data segment size.
- uint32_t ssize; // Stack segment size.
- uint32_t start_code; // VM address of text.
- uint32_t start_stack; // VM address of stack bottom (top in rsp).
- int32_t signal; // Signal causing core dump.
- int32_t reserved; // Unused.
- uint32_t ar0; // Location of GPR's.
- uint32_t fpstate; // Location of FPR's. Should be a FXSTATE *, but this
- // has to be 32-bits even on 64-bit systems.
- uint32_t magic; // Identifier for core dumps.
- char u_comm[32]; // Command causing core dump.
- uint32_t u_debugreg[8]; // Debug registers (DR0 - DR7).
+struct UserArea {
+ GPR regs; // General purpose registers.
+ int32_t fpvalid; // True if FPU is being used.
+ FPR_i386 i387; // FPU registers.
+ uint32_t tsize; // Text segment size.
+ uint32_t dsize; // Data segment size.
+ uint32_t ssize; // Stack segment size.
+ uint32_t start_code; // VM address of text.
+ uint32_t start_stack; // VM address of stack bottom (top in rsp).
+ int32_t signal; // Signal causing core dump.
+ int32_t reserved; // Unused.
+ uint32_t ar0; // Location of GPR's.
+ uint32_t fpstate; // Location of FPR's. Should be a FXSTATE *, but this
+ // has to be 32-bits even on 64-bit systems.
+ uint32_t magic; // Identifier for core dumps.
+ char u_comm[32]; // Command causing core dump.
+ uint32_t u_debugreg[8]; // Debug registers (DR0 - DR7).
};
-#define DR_SIZE sizeof(((UserArea*)NULL)->u_debugreg[0])
+#define DR_SIZE sizeof(((UserArea *)NULL)->u_debugreg[0])
#define DR_0_OFFSET 0xFC
-#define DR_OFFSET(reg_index) \
- (DR_0_OFFSET + (reg_index * 4))
-#define FPR_SIZE(reg) sizeof(((FPR_i386*)NULL)->reg)
+#define DR_OFFSET(reg_index) (DR_0_OFFSET + (reg_index * 4))
+#define FPR_SIZE(reg) sizeof(((FPR_i386 *)NULL)->reg)
//---------------------------------------------------------------------------
// Include RegisterInfos_i386 to declare our g_register_infos_i386 structure.
@@ -96,48 +90,48 @@ struct UserArea
#include "RegisterInfos_i386.h"
#undef DECLARE_REGISTER_INFOS_I386_STRUCT
-RegisterContextLinux_i386::RegisterContextLinux_i386(const ArchSpec &target_arch) :
- RegisterInfoInterface(target_arch)
-{
- RegisterInfo orig_ax = { "orig_eax", NULL, sizeof(((GPR*)NULL)->orig_eax), (LLVM_EXTENSION offsetof(GPR, orig_eax)), eEncodingUint, \
- eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM }, nullptr, nullptr, nullptr, 0 };
- d_register_infos.push_back(orig_ax);
-}
-
-size_t
-RegisterContextLinux_i386::GetGPRSize() const
-{
- return sizeof(GPR);
-}
-
-const RegisterInfo *
-RegisterContextLinux_i386::GetRegisterInfo() const
-{
- switch (m_target_arch.GetMachine())
- {
- case llvm::Triple::x86:
- case llvm::Triple::x86_64:
- return g_register_infos_i386;
- default:
- assert(false && "Unhandled target architecture.");
- return NULL;
- }
-}
-
-uint32_t
-RegisterContextLinux_i386::GetRegisterCount () const
-{
- return static_cast<uint32_t> (sizeof (g_register_infos_i386) / sizeof (g_register_infos_i386 [0]));
+RegisterContextLinux_i386::RegisterContextLinux_i386(
+ const ArchSpec &target_arch)
+ : RegisterInfoInterface(target_arch) {
+ RegisterInfo orig_ax = {"orig_eax",
+ NULL,
+ sizeof(((GPR *)NULL)->orig_eax),
+ (LLVM_EXTENSION offsetof(GPR, orig_eax)),
+ eEncodingUint,
+ eFormatHex,
+ {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0};
+ d_register_infos.push_back(orig_ax);
+}
+
+size_t RegisterContextLinux_i386::GetGPRSize() const { return sizeof(GPR); }
+
+const RegisterInfo *RegisterContextLinux_i386::GetRegisterInfo() const {
+ switch (m_target_arch.GetMachine()) {
+ case llvm::Triple::x86:
+ case llvm::Triple::x86_64:
+ return g_register_infos_i386;
+ default:
+ assert(false && "Unhandled target architecture.");
+ return NULL;
+ }
+}
+
+uint32_t RegisterContextLinux_i386::GetRegisterCount() const {
+ return static_cast<uint32_t>(sizeof(g_register_infos_i386) /
+ sizeof(g_register_infos_i386[0]));
}
-uint32_t
-RegisterContextLinux_i386::GetUserRegisterCount () const
-{
- return static_cast<uint32_t> (k_num_user_registers_i386);
+uint32_t RegisterContextLinux_i386::GetUserRegisterCount() const {
+ return static_cast<uint32_t>(k_num_user_registers_i386);
}
const std::vector<lldb_private::RegisterInfo> *
-RegisterContextLinux_i386::GetDynamicRegisterInfoP() const
-{
- return &d_register_infos;
+RegisterContextLinux_i386::GetDynamicRegisterInfoP() const {
+ return &d_register_infos;
}
Modified: lldb/trunk/source/Plugins/Process/Utility/RegisterContextLinux_i386.h
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/source/Plugins/Process/Utility/RegisterContextLinux_i386.h?rev=280751&r1=280750&r2=280751&view=diff
==============================================================================
--- lldb/trunk/source/Plugins/Process/Utility/RegisterContextLinux_i386.h (original)
+++ lldb/trunk/source/Plugins/Process/Utility/RegisterContextLinux_i386.h Tue Sep 6 15:57:50 2016
@@ -12,29 +12,23 @@
#include "RegisterInfoInterface.h"
-class RegisterContextLinux_i386
- : public lldb_private::RegisterInfoInterface
-{
+class RegisterContextLinux_i386 : public lldb_private::RegisterInfoInterface {
public:
- RegisterContextLinux_i386(const lldb_private::ArchSpec &target_arch);
+ RegisterContextLinux_i386(const lldb_private::ArchSpec &target_arch);
- size_t
- GetGPRSize() const override;
+ size_t GetGPRSize() const override;
- const lldb_private::RegisterInfo *
- GetRegisterInfo() const override;
+ const lldb_private::RegisterInfo *GetRegisterInfo() const override;
- uint32_t
- GetRegisterCount () const override;
+ uint32_t GetRegisterCount() const override;
- uint32_t
- GetUserRegisterCount () const override;
+ uint32_t GetUserRegisterCount() const override;
- const std::vector<lldb_private::RegisterInfo> *
- GetDynamicRegisterInfoP() const override;
+ const std::vector<lldb_private::RegisterInfo> *
+ GetDynamicRegisterInfoP() const override;
private:
- std::vector<lldb_private::RegisterInfo> d_register_infos;
+ std::vector<lldb_private::RegisterInfo> d_register_infos;
};
#endif
Modified: lldb/trunk/source/Plugins/Process/Utility/RegisterContextLinux_mips.cpp
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/source/Plugins/Process/Utility/RegisterContextLinux_mips.cpp?rev=280751&r1=280750&r2=280751&view=diff
==============================================================================
--- lldb/trunk/source/Plugins/Process/Utility/RegisterContextLinux_mips.cpp (original)
+++ lldb/trunk/source/Plugins/Process/Utility/RegisterContextLinux_mips.cpp Tue Sep 6 15:57:50 2016
@@ -7,8 +7,8 @@
//
//===---------------------------------------------------------------------===//
-#include <vector>
#include <stddef.h>
+#include <vector>
// For eh_frame and DWARF Register numbers
#include "RegisterContextLinux_mips.h"
@@ -29,48 +29,38 @@ using namespace lldb;
#include "RegisterInfos_mips.h"
#undef DECLARE_REGISTER_INFOS_MIPS_STRUCT
-uint32_t
-GetUserRegisterInfoCount (bool msa_present)
-{
- if (msa_present)
- return static_cast<uint32_t> (k_num_user_registers_mips);
- return static_cast<uint32_t> (k_num_user_registers_mips - k_num_msa_registers_mips);
+uint32_t GetUserRegisterInfoCount(bool msa_present) {
+ if (msa_present)
+ return static_cast<uint32_t>(k_num_user_registers_mips);
+ return static_cast<uint32_t>(k_num_user_registers_mips -
+ k_num_msa_registers_mips);
}
-RegisterContextLinux_mips::RegisterContextLinux_mips(const ArchSpec &target_arch, bool msa_present) :
- RegisterInfoInterface(target_arch),
- m_user_register_count (GetUserRegisterInfoCount (msa_present))
-{
-}
+RegisterContextLinux_mips::RegisterContextLinux_mips(
+ const ArchSpec &target_arch, bool msa_present)
+ : RegisterInfoInterface(target_arch),
+ m_user_register_count(GetUserRegisterInfoCount(msa_present)) {}
-size_t
-RegisterContextLinux_mips::GetGPRSize() const
-{
- return sizeof(GPR_linux_mips);
+size_t RegisterContextLinux_mips::GetGPRSize() const {
+ return sizeof(GPR_linux_mips);
}
-const RegisterInfo *
-RegisterContextLinux_mips::GetRegisterInfo() const
-{
- switch (m_target_arch.GetMachine())
- {
- case llvm::Triple::mips:
- case llvm::Triple::mipsel:
- return g_register_infos_mips;
- default:
- assert(false && "Unhandled target architecture.");
- return NULL;
- }
+const RegisterInfo *RegisterContextLinux_mips::GetRegisterInfo() const {
+ switch (m_target_arch.GetMachine()) {
+ case llvm::Triple::mips:
+ case llvm::Triple::mipsel:
+ return g_register_infos_mips;
+ default:
+ assert(false && "Unhandled target architecture.");
+ return NULL;
+ }
}
-uint32_t
-RegisterContextLinux_mips::GetRegisterCount () const
-{
- return static_cast<uint32_t> (sizeof (g_register_infos_mips) / sizeof (g_register_infos_mips [0]));
+uint32_t RegisterContextLinux_mips::GetRegisterCount() const {
+ return static_cast<uint32_t>(sizeof(g_register_infos_mips) /
+ sizeof(g_register_infos_mips[0]));
}
-uint32_t
-RegisterContextLinux_mips::GetUserRegisterCount () const
-{
- return static_cast<uint32_t> (m_user_register_count);
+uint32_t RegisterContextLinux_mips::GetUserRegisterCount() const {
+ return static_cast<uint32_t>(m_user_register_count);
}
Modified: lldb/trunk/source/Plugins/Process/Utility/RegisterContextLinux_mips.h
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/source/Plugins/Process/Utility/RegisterContextLinux_mips.h?rev=280751&r1=280750&r2=280751&view=diff
==============================================================================
--- lldb/trunk/source/Plugins/Process/Utility/RegisterContextLinux_mips.h (original)
+++ lldb/trunk/source/Plugins/Process/Utility/RegisterContextLinux_mips.h Tue Sep 6 15:57:50 2016
@@ -10,29 +10,24 @@
#ifndef liblldb_RegisterContextLinux_mips_H_
#define liblldb_RegisterContextLinux_mips_H_
-#include "lldb/lldb-private.h"
#include "RegisterInfoInterface.h"
+#include "lldb/lldb-private.h"
-class RegisterContextLinux_mips
- : public lldb_private::RegisterInfoInterface
-{
+class RegisterContextLinux_mips : public lldb_private::RegisterInfoInterface {
public:
- RegisterContextLinux_mips(const lldb_private::ArchSpec &target_arch, bool msa_present = true);
+ RegisterContextLinux_mips(const lldb_private::ArchSpec &target_arch,
+ bool msa_present = true);
- size_t
- GetGPRSize() const override;
+ size_t GetGPRSize() const override;
- const lldb_private::RegisterInfo *
- GetRegisterInfo() const override;
+ const lldb_private::RegisterInfo *GetRegisterInfo() const override;
- uint32_t
- GetRegisterCount () const override;
+ uint32_t GetRegisterCount() const override;
- uint32_t
- GetUserRegisterCount () const override;
+ uint32_t GetUserRegisterCount() const override;
private:
- uint32_t m_user_register_count;
+ uint32_t m_user_register_count;
};
#endif
Modified: lldb/trunk/source/Plugins/Process/Utility/RegisterContextLinux_mips64.cpp
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/source/Plugins/Process/Utility/RegisterContextLinux_mips64.cpp?rev=280751&r1=280750&r2=280751&view=diff
==============================================================================
--- lldb/trunk/source/Plugins/Process/Utility/RegisterContextLinux_mips64.cpp (original)
+++ lldb/trunk/source/Plugins/Process/Utility/RegisterContextLinux_mips64.cpp Tue Sep 6 15:57:50 2016
@@ -7,10 +7,10 @@
//
//===---------------------------------------------------------------------===//
-#if defined (__mips__)
+#if defined(__mips__)
-#include <vector>
#include <stddef.h>
+#include <vector>
// For eh_frame and DWARF Register numbers
#include "RegisterContextLinux_mips64.h"
@@ -25,7 +25,8 @@ using namespace lldb;
using namespace lldb_private;
//---------------------------------------------------------------------------
-// Include RegisterInfos_mips64 to declare our g_register_infos_mips64 structure.
+// Include RegisterInfos_mips64 to declare our g_register_infos_mips64
+// structure.
//---------------------------------------------------------------------------
#define DECLARE_REGISTER_INFOS_MIPS64_STRUCT
#define LINUX_MIPS64
@@ -40,91 +41,79 @@ using namespace lldb_private;
#include "RegisterInfos_mips.h"
#undef DECLARE_REGISTER_INFOS_MIPS_STRUCT
-static const RegisterInfo *
-GetRegisterInfoPtr (const ArchSpec &target_arch)
-{
- switch (target_arch.GetMachine())
- {
- case llvm::Triple::mips64:
- case llvm::Triple::mips64el:
- return g_register_infos_mips64;
- case llvm::Triple::mips:
- case llvm::Triple::mipsel:
- return g_register_infos_mips;
- default:
- assert(false && "Unhandled target architecture.");
- return nullptr;
- }
-}
-
-static uint32_t
-GetRegisterInfoCount (const ArchSpec &target_arch)
-{
- switch (target_arch.GetMachine())
- {
- case llvm::Triple::mips64:
- case llvm::Triple::mips64el:
- return static_cast<uint32_t> (sizeof (g_register_infos_mips64) / sizeof (g_register_infos_mips64 [0]));
- case llvm::Triple::mips:
- case llvm::Triple::mipsel:
- return static_cast<uint32_t> (sizeof (g_register_infos_mips) / sizeof (g_register_infos_mips [0]));
- default:
- assert(false && "Unhandled target architecture.");
- return 0;
- }
-}
-
-uint32_t
-GetUserRegisterInfoCount (const ArchSpec &target_arch, bool msa_present)
-{
- switch (target_arch.GetMachine())
- {
- case llvm::Triple::mips:
- case llvm::Triple::mipsel:
- if (msa_present)
- return static_cast<uint32_t> (k_num_user_registers_mips);
- return static_cast<uint32_t> (k_num_user_registers_mips - k_num_msa_registers_mips);
- case llvm::Triple::mips64el:
- case llvm::Triple::mips64:
- if (msa_present)
- return static_cast<uint32_t> (k_num_user_registers_mips64);
- return static_cast<uint32_t> (k_num_user_registers_mips64 - k_num_msa_registers_mips64);
- default:
- assert(false && "Unhandled target architecture.");
- return 0;
- }
-}
-
-RegisterContextLinux_mips64::RegisterContextLinux_mips64(const ArchSpec &target_arch, bool msa_present) :
- lldb_private::RegisterInfoInterface(target_arch),
- m_register_info_p (GetRegisterInfoPtr (target_arch)),
- m_register_info_count (GetRegisterInfoCount (target_arch)),
- m_user_register_count (GetUserRegisterInfoCount (target_arch, msa_present))
-{
-}
-
-size_t
-RegisterContextLinux_mips64::GetGPRSize() const
-{
- return sizeof(GPR_linux_mips);
-}
-
-const RegisterInfo *
-RegisterContextLinux_mips64::GetRegisterInfo() const
-{
- return m_register_info_p;
-}
-
-uint32_t
-RegisterContextLinux_mips64::GetRegisterCount () const
-{
- return m_register_info_count;
-}
-
-uint32_t
-RegisterContextLinux_mips64::GetUserRegisterCount () const
-{
- return m_user_register_count;
+static const RegisterInfo *GetRegisterInfoPtr(const ArchSpec &target_arch) {
+ switch (target_arch.GetMachine()) {
+ case llvm::Triple::mips64:
+ case llvm::Triple::mips64el:
+ return g_register_infos_mips64;
+ case llvm::Triple::mips:
+ case llvm::Triple::mipsel:
+ return g_register_infos_mips;
+ default:
+ assert(false && "Unhandled target architecture.");
+ return nullptr;
+ }
+}
+
+static uint32_t GetRegisterInfoCount(const ArchSpec &target_arch) {
+ switch (target_arch.GetMachine()) {
+ case llvm::Triple::mips64:
+ case llvm::Triple::mips64el:
+ return static_cast<uint32_t>(sizeof(g_register_infos_mips64) /
+ sizeof(g_register_infos_mips64[0]));
+ case llvm::Triple::mips:
+ case llvm::Triple::mipsel:
+ return static_cast<uint32_t>(sizeof(g_register_infos_mips) /
+ sizeof(g_register_infos_mips[0]));
+ default:
+ assert(false && "Unhandled target architecture.");
+ return 0;
+ }
+}
+
+uint32_t GetUserRegisterInfoCount(const ArchSpec &target_arch,
+ bool msa_present) {
+ switch (target_arch.GetMachine()) {
+ case llvm::Triple::mips:
+ case llvm::Triple::mipsel:
+ if (msa_present)
+ return static_cast<uint32_t>(k_num_user_registers_mips);
+ return static_cast<uint32_t>(k_num_user_registers_mips -
+ k_num_msa_registers_mips);
+ case llvm::Triple::mips64el:
+ case llvm::Triple::mips64:
+ if (msa_present)
+ return static_cast<uint32_t>(k_num_user_registers_mips64);
+ return static_cast<uint32_t>(k_num_user_registers_mips64 -
+ k_num_msa_registers_mips64);
+ default:
+ assert(false && "Unhandled target architecture.");
+ return 0;
+ }
+}
+
+RegisterContextLinux_mips64::RegisterContextLinux_mips64(
+ const ArchSpec &target_arch, bool msa_present)
+ : lldb_private::RegisterInfoInterface(target_arch),
+ m_register_info_p(GetRegisterInfoPtr(target_arch)),
+ m_register_info_count(GetRegisterInfoCount(target_arch)),
+ m_user_register_count(
+ GetUserRegisterInfoCount(target_arch, msa_present)) {}
+
+size_t RegisterContextLinux_mips64::GetGPRSize() const {
+ return sizeof(GPR_linux_mips);
+}
+
+const RegisterInfo *RegisterContextLinux_mips64::GetRegisterInfo() const {
+ return m_register_info_p;
+}
+
+uint32_t RegisterContextLinux_mips64::GetRegisterCount() const {
+ return m_register_info_count;
+}
+
+uint32_t RegisterContextLinux_mips64::GetUserRegisterCount() const {
+ return m_user_register_count;
}
#endif
Modified: lldb/trunk/source/Plugins/Process/Utility/RegisterContextLinux_mips64.h
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/source/Plugins/Process/Utility/RegisterContextLinux_mips64.h?rev=280751&r1=280750&r2=280751&view=diff
==============================================================================
--- lldb/trunk/source/Plugins/Process/Utility/RegisterContextLinux_mips64.h (original)
+++ lldb/trunk/source/Plugins/Process/Utility/RegisterContextLinux_mips64.h Tue Sep 6 15:57:50 2016
@@ -7,36 +7,31 @@
//
//===----------------------------------------------------------------------===//
-#if defined (__mips__)
+#if defined(__mips__)
#ifndef liblldb_RegisterContextLinux_mips64_H_
#define liblldb_RegisterContextLinux_mips64_H_
-#include "lldb/lldb-private.h"
#include "RegisterInfoInterface.h"
+#include "lldb/lldb-private.h"
-class RegisterContextLinux_mips64
- : public lldb_private::RegisterInfoInterface
-{
+class RegisterContextLinux_mips64 : public lldb_private::RegisterInfoInterface {
public:
- RegisterContextLinux_mips64(const lldb_private::ArchSpec &target_arch, bool msa_present = true);
+ RegisterContextLinux_mips64(const lldb_private::ArchSpec &target_arch,
+ bool msa_present = true);
- size_t
- GetGPRSize() const override;
+ size_t GetGPRSize() const override;
- const lldb_private::RegisterInfo *
- GetRegisterInfo() const override;
+ const lldb_private::RegisterInfo *GetRegisterInfo() const override;
- uint32_t
- GetRegisterCount () const override;
+ uint32_t GetRegisterCount() const override;
- uint32_t
- GetUserRegisterCount () const override;
+ uint32_t GetUserRegisterCount() const override;
private:
- const lldb_private::RegisterInfo *m_register_info_p;
- uint32_t m_register_info_count;
- uint32_t m_user_register_count;
+ const lldb_private::RegisterInfo *m_register_info_p;
+ uint32_t m_register_info_count;
+ uint32_t m_user_register_count;
};
#endif
Modified: lldb/trunk/source/Plugins/Process/Utility/RegisterContextLinux_s390x.cpp
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/source/Plugins/Process/Utility/RegisterContextLinux_s390x.cpp?rev=280751&r1=280750&r2=280751&view=diff
==============================================================================
--- lldb/trunk/source/Plugins/Process/Utility/RegisterContextLinux_s390x.cpp (original)
+++ lldb/trunk/source/Plugins/Process/Utility/RegisterContextLinux_s390x.cpp Tue Sep 6 15:57:50 2016
@@ -7,8 +7,8 @@
//
//===----------------------------------------------------------------------===//
-#include "RegisterContextPOSIX_s390x.h"
#include "RegisterContextLinux_s390x.h"
+#include "RegisterContextPOSIX_s390x.h"
using namespace lldb_private;
using namespace lldb;
@@ -20,79 +20,58 @@ using namespace lldb;
#include "RegisterInfos_s390x.h"
#undef DECLARE_REGISTER_INFOS_S390X_STRUCT
-static const RegisterInfo *
-GetRegisterInfoPtr(const ArchSpec &target_arch)
-{
- switch (target_arch.GetMachine())
- {
- case llvm::Triple::systemz:
- return g_register_infos_s390x;
- default:
- assert(false && "Unhandled target architecture.");
- return nullptr;
- }
-}
-
-static uint32_t
-GetRegisterInfoCount(const ArchSpec &target_arch)
-{
- switch (target_arch.GetMachine())
- {
- case llvm::Triple::systemz:
- return k_num_registers_s390x;
- default:
- assert(false && "Unhandled target architecture.");
- return 0;
- }
-}
-
-static uint32_t
-GetUserRegisterInfoCount(const ArchSpec &target_arch)
-{
- switch (target_arch.GetMachine())
- {
- case llvm::Triple::systemz:
- return k_num_user_registers_s390x + k_num_linux_registers_s390x;
- default:
- assert(false && "Unhandled target architecture.");
- return 0;
- }
+static const RegisterInfo *GetRegisterInfoPtr(const ArchSpec &target_arch) {
+ switch (target_arch.GetMachine()) {
+ case llvm::Triple::systemz:
+ return g_register_infos_s390x;
+ default:
+ assert(false && "Unhandled target architecture.");
+ return nullptr;
+ }
+}
+
+static uint32_t GetRegisterInfoCount(const ArchSpec &target_arch) {
+ switch (target_arch.GetMachine()) {
+ case llvm::Triple::systemz:
+ return k_num_registers_s390x;
+ default:
+ assert(false && "Unhandled target architecture.");
+ return 0;
+ }
}
-RegisterContextLinux_s390x::RegisterContextLinux_s390x(const ArchSpec &target_arch)
+static uint32_t GetUserRegisterInfoCount(const ArchSpec &target_arch) {
+ switch (target_arch.GetMachine()) {
+ case llvm::Triple::systemz:
+ return k_num_user_registers_s390x + k_num_linux_registers_s390x;
+ default:
+ assert(false && "Unhandled target architecture.");
+ return 0;
+ }
+}
+
+RegisterContextLinux_s390x::RegisterContextLinux_s390x(
+ const ArchSpec &target_arch)
: lldb_private::RegisterInfoInterface(target_arch),
m_register_info_p(GetRegisterInfoPtr(target_arch)),
m_register_info_count(GetRegisterInfoCount(target_arch)),
- m_user_register_count(GetUserRegisterInfoCount(target_arch))
-{
-}
+ m_user_register_count(GetUserRegisterInfoCount(target_arch)) {}
const std::vector<lldb_private::RegisterInfo> *
-RegisterContextLinux_s390x::GetDynamicRegisterInfoP() const
-{
- return &d_register_infos;
+RegisterContextLinux_s390x::GetDynamicRegisterInfoP() const {
+ return &d_register_infos;
}
-const RegisterInfo *
-RegisterContextLinux_s390x::GetRegisterInfo() const
-{
- return m_register_info_p;
+const RegisterInfo *RegisterContextLinux_s390x::GetRegisterInfo() const {
+ return m_register_info_p;
}
-uint32_t
-RegisterContextLinux_s390x::GetRegisterCount() const
-{
- return m_register_info_count;
+uint32_t RegisterContextLinux_s390x::GetRegisterCount() const {
+ return m_register_info_count;
}
-uint32_t
-RegisterContextLinux_s390x::GetUserRegisterCount() const
-{
- return m_user_register_count;
+uint32_t RegisterContextLinux_s390x::GetUserRegisterCount() const {
+ return m_user_register_count;
}
-size_t
-RegisterContextLinux_s390x::GetGPRSize() const
-{
- return 0;
-}
+size_t RegisterContextLinux_s390x::GetGPRSize() const { return 0; }
Modified: lldb/trunk/source/Plugins/Process/Utility/RegisterContextLinux_s390x.h
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/source/Plugins/Process/Utility/RegisterContextLinux_s390x.h?rev=280751&r1=280750&r2=280751&view=diff
==============================================================================
--- lldb/trunk/source/Plugins/Process/Utility/RegisterContextLinux_s390x.h (original)
+++ lldb/trunk/source/Plugins/Process/Utility/RegisterContextLinux_s390x.h Tue Sep 6 15:57:50 2016
@@ -12,31 +12,26 @@
#include "RegisterInfoInterface.h"
-class RegisterContextLinux_s390x : public lldb_private::RegisterInfoInterface
-{
+class RegisterContextLinux_s390x : public lldb_private::RegisterInfoInterface {
public:
- RegisterContextLinux_s390x(const lldb_private::ArchSpec &target_arch);
+ RegisterContextLinux_s390x(const lldb_private::ArchSpec &target_arch);
- size_t
- GetGPRSize() const override;
+ size_t GetGPRSize() const override;
- const lldb_private::RegisterInfo *
- GetRegisterInfo() const override;
+ const lldb_private::RegisterInfo *GetRegisterInfo() const override;
- uint32_t
- GetRegisterCount() const override;
+ uint32_t GetRegisterCount() const override;
- uint32_t
- GetUserRegisterCount() const override;
+ uint32_t GetUserRegisterCount() const override;
- const std::vector<lldb_private::RegisterInfo> *
- GetDynamicRegisterInfoP() const override;
+ const std::vector<lldb_private::RegisterInfo> *
+ GetDynamicRegisterInfoP() const override;
private:
- const lldb_private::RegisterInfo *m_register_info_p;
- uint32_t m_register_info_count;
- uint32_t m_user_register_count;
- std::vector<lldb_private::RegisterInfo> d_register_infos;
+ const lldb_private::RegisterInfo *m_register_info_p;
+ uint32_t m_register_info_count;
+ uint32_t m_user_register_count;
+ std::vector<lldb_private::RegisterInfo> d_register_infos;
};
#endif
Modified: lldb/trunk/source/Plugins/Process/Utility/RegisterContextLinux_x86_64.cpp
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/source/Plugins/Process/Utility/RegisterContextLinux_x86_64.cpp?rev=280751&r1=280750&r2=280751&view=diff
==============================================================================
--- lldb/trunk/source/Plugins/Process/Utility/RegisterContextLinux_x86_64.cpp (original)
+++ lldb/trunk/source/Plugins/Process/Utility/RegisterContextLinux_x86_64.cpp Tue Sep 6 15:57:50 2016
@@ -7,201 +7,191 @@
//
//===---------------------------------------------------------------------===//
-#include <vector>
-#include "RegisterContextPOSIX_x86.h"
-#include "RegisterContextLinux_i386.h"
#include "RegisterContextLinux_x86_64.h"
+#include "RegisterContextLinux_i386.h"
+#include "RegisterContextPOSIX_x86.h"
+#include <vector>
using namespace lldb_private;
using namespace lldb;
-typedef struct _GPR
-{
- uint64_t r15;
- uint64_t r14;
- uint64_t r13;
- uint64_t r12;
- uint64_t rbp;
- uint64_t rbx;
- uint64_t r11;
- uint64_t r10;
- uint64_t r9;
- uint64_t r8;
- uint64_t rax;
- uint64_t rcx;
- uint64_t rdx;
- uint64_t rsi;
- uint64_t rdi;
- uint64_t orig_rax;
- uint64_t rip;
- uint64_t cs;
- uint64_t rflags;
- uint64_t rsp;
- uint64_t ss;
- uint64_t fs_base;
- uint64_t gs_base;
- uint64_t ds;
- uint64_t es;
- uint64_t fs;
- uint64_t gs;
+typedef struct _GPR {
+ uint64_t r15;
+ uint64_t r14;
+ uint64_t r13;
+ uint64_t r12;
+ uint64_t rbp;
+ uint64_t rbx;
+ uint64_t r11;
+ uint64_t r10;
+ uint64_t r9;
+ uint64_t r8;
+ uint64_t rax;
+ uint64_t rcx;
+ uint64_t rdx;
+ uint64_t rsi;
+ uint64_t rdi;
+ uint64_t orig_rax;
+ uint64_t rip;
+ uint64_t cs;
+ uint64_t rflags;
+ uint64_t rsp;
+ uint64_t ss;
+ uint64_t fs_base;
+ uint64_t gs_base;
+ uint64_t ds;
+ uint64_t es;
+ uint64_t fs;
+ uint64_t gs;
} GPR;
struct DBG {
- uint64_t dr[8];
+ uint64_t dr[8];
};
-struct UserArea
-{
- GPR gpr; // General purpose registers.
- int32_t fpvalid; // True if FPU is being used.
- int32_t pad0;
- FXSAVE fpr; // General purpose floating point registers (see FPR for extended register sets).
- uint64_t tsize; // Text segment size.
- uint64_t dsize; // Data segment size.
- uint64_t ssize; // Stack segment size.
- uint64_t start_code; // VM address of text.
- uint64_t start_stack; // VM address of stack bottom (top in rsp).
- int64_t signal; // Signal causing core dump.
- int32_t reserved; // Unused.
- int32_t pad1;
- uint64_t ar0; // Location of GPR's.
- FXSAVE* fpstate; // Location of FPR's.
- uint64_t magic; // Identifier for core dumps.
- char u_comm[32]; // Command causing core dump.
- DBG dbg; // Debug registers.
- uint64_t error_code; // CPU error code.
- uint64_t fault_address; // Control register CR3.
+struct UserArea {
+ GPR gpr; // General purpose registers.
+ int32_t fpvalid; // True if FPU is being used.
+ int32_t pad0;
+ FXSAVE fpr; // General purpose floating point registers (see FPR for extended
+ // register sets).
+ uint64_t tsize; // Text segment size.
+ uint64_t dsize; // Data segment size.
+ uint64_t ssize; // Stack segment size.
+ uint64_t start_code; // VM address of text.
+ uint64_t start_stack; // VM address of stack bottom (top in rsp).
+ int64_t signal; // Signal causing core dump.
+ int32_t reserved; // Unused.
+ int32_t pad1;
+ uint64_t ar0; // Location of GPR's.
+ FXSAVE *fpstate; // Location of FPR's.
+ uint64_t magic; // Identifier for core dumps.
+ char u_comm[32]; // Command causing core dump.
+ DBG dbg; // Debug registers.
+ uint64_t error_code; // CPU error code.
+ uint64_t fault_address; // Control register CR3.
};
-
-#define DR_OFFSET(reg_index) \
- (LLVM_EXTENSION offsetof(UserArea, dbg) + \
- LLVM_EXTENSION offsetof(DBG, dr[reg_index]))
+#define DR_OFFSET(reg_index) \
+ (LLVM_EXTENSION offsetof(UserArea, dbg) + \
+ LLVM_EXTENSION offsetof(DBG, dr[reg_index]))
//---------------------------------------------------------------------------
-// Include RegisterInfos_x86_64 to declare our g_register_infos_x86_64 structure.
+// Include RegisterInfos_x86_64 to declare our g_register_infos_x86_64
+// structure.
//---------------------------------------------------------------------------
#define DECLARE_REGISTER_INFOS_X86_64_STRUCT
#include "RegisterInfos_x86_64.h"
#undef DECLARE_REGISTER_INFOS_X86_64_STRUCT
-static std::vector<lldb_private::RegisterInfo>&
-GetPrivateRegisterInfoVector ()
-{
- static std::vector<lldb_private::RegisterInfo> g_register_infos;
- return g_register_infos;
+static std::vector<lldb_private::RegisterInfo> &GetPrivateRegisterInfoVector() {
+ static std::vector<lldb_private::RegisterInfo> g_register_infos;
+ return g_register_infos;
}
static const RegisterInfo *
-GetRegisterInfo_i386(const lldb_private::ArchSpec &arch)
-{
- std::vector<lldb_private::RegisterInfo> &g_register_infos = GetPrivateRegisterInfoVector ();
-
- // Allocate RegisterInfo only once
- if (g_register_infos.empty())
- {
- // Copy the register information from base class
- std::unique_ptr<RegisterContextLinux_i386> reg_interface(new RegisterContextLinux_i386 (arch));
- const RegisterInfo *base_info = reg_interface->GetRegisterInfo();
- g_register_infos.insert(g_register_infos.end(), &base_info[0], &base_info[k_num_registers_i386]);
-
- //---------------------------------------------------------------------------
- // Include RegisterInfos_x86_64 to update the g_register_infos structure
- // with x86_64 offsets.
- //---------------------------------------------------------------------------
- #define UPDATE_REGISTER_INFOS_I386_STRUCT_WITH_X86_64_OFFSETS
- #include "RegisterInfos_x86_64.h"
- #undef UPDATE_REGISTER_INFOS_I386_STRUCT_WITH_X86_64_OFFSETS
- }
+GetRegisterInfo_i386(const lldb_private::ArchSpec &arch) {
+ std::vector<lldb_private::RegisterInfo> &g_register_infos =
+ GetPrivateRegisterInfoVector();
+
+ // Allocate RegisterInfo only once
+ if (g_register_infos.empty()) {
+ // Copy the register information from base class
+ std::unique_ptr<RegisterContextLinux_i386> reg_interface(
+ new RegisterContextLinux_i386(arch));
+ const RegisterInfo *base_info = reg_interface->GetRegisterInfo();
+ g_register_infos.insert(g_register_infos.end(), &base_info[0],
+ &base_info[k_num_registers_i386]);
- return &g_register_infos[0];
+//---------------------------------------------------------------------------
+// Include RegisterInfos_x86_64 to update the g_register_infos structure
+// with x86_64 offsets.
+//---------------------------------------------------------------------------
+#define UPDATE_REGISTER_INFOS_I386_STRUCT_WITH_X86_64_OFFSETS
+#include "RegisterInfos_x86_64.h"
+#undef UPDATE_REGISTER_INFOS_I386_STRUCT_WITH_X86_64_OFFSETS
+ }
+
+ return &g_register_infos[0];
}
-static const RegisterInfo *
-GetRegisterInfoPtr (const ArchSpec &target_arch)
-{
- switch (target_arch.GetMachine())
- {
- case llvm::Triple::x86:
- return GetRegisterInfo_i386 (target_arch);
- case llvm::Triple::x86_64:
- return g_register_infos_x86_64;
- default:
- assert(false && "Unhandled target architecture.");
- return nullptr;
- }
-}
-
-static uint32_t
-GetRegisterInfoCount (const ArchSpec &target_arch)
-{
- switch (target_arch.GetMachine())
- {
- case llvm::Triple::x86:
- {
- assert (!GetPrivateRegisterInfoVector ().empty () && "i386 register info not yet filled.");
- return static_cast<uint32_t> (GetPrivateRegisterInfoVector ().size ());
- }
- case llvm::Triple::x86_64:
- return static_cast<uint32_t> (sizeof (g_register_infos_x86_64) / sizeof (g_register_infos_x86_64 [0]));
- default:
- assert(false && "Unhandled target architecture.");
- return 0;
- }
-}
-
-static uint32_t
-GetUserRegisterInfoCount (const ArchSpec &target_arch)
-{
- switch (target_arch.GetMachine())
- {
- case llvm::Triple::x86:
- return static_cast<uint32_t> (k_num_user_registers_i386);
- case llvm::Triple::x86_64:
- return static_cast<uint32_t> (k_num_user_registers_x86_64);
- default:
- assert(false && "Unhandled target architecture.");
- return 0;
- }
-}
-
-RegisterContextLinux_x86_64::RegisterContextLinux_x86_64(const ArchSpec &target_arch) :
- lldb_private::RegisterInfoInterface(target_arch),
- m_register_info_p (GetRegisterInfoPtr (target_arch)),
- m_register_info_count (GetRegisterInfoCount (target_arch)),
- m_user_register_count (GetUserRegisterInfoCount (target_arch))
-{
- RegisterInfo orig_ax = { "orig_rax", NULL, sizeof(((GPR*)NULL)->orig_rax), (LLVM_EXTENSION offsetof(GPR, orig_rax)), eEncodingUint, \
- eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM }, nullptr, nullptr, nullptr, 0 };
- d_register_infos.push_back(orig_ax);
-}
-
-size_t
-RegisterContextLinux_x86_64::GetGPRSize() const
-{
- return sizeof(GPR);
+static const RegisterInfo *GetRegisterInfoPtr(const ArchSpec &target_arch) {
+ switch (target_arch.GetMachine()) {
+ case llvm::Triple::x86:
+ return GetRegisterInfo_i386(target_arch);
+ case llvm::Triple::x86_64:
+ return g_register_infos_x86_64;
+ default:
+ assert(false && "Unhandled target architecture.");
+ return nullptr;
+ }
+}
+
+static uint32_t GetRegisterInfoCount(const ArchSpec &target_arch) {
+ switch (target_arch.GetMachine()) {
+ case llvm::Triple::x86: {
+ assert(!GetPrivateRegisterInfoVector().empty() &&
+ "i386 register info not yet filled.");
+ return static_cast<uint32_t>(GetPrivateRegisterInfoVector().size());
+ }
+ case llvm::Triple::x86_64:
+ return static_cast<uint32_t>(sizeof(g_register_infos_x86_64) /
+ sizeof(g_register_infos_x86_64[0]));
+ default:
+ assert(false && "Unhandled target architecture.");
+ return 0;
+ }
+}
+
+static uint32_t GetUserRegisterInfoCount(const ArchSpec &target_arch) {
+ switch (target_arch.GetMachine()) {
+ case llvm::Triple::x86:
+ return static_cast<uint32_t>(k_num_user_registers_i386);
+ case llvm::Triple::x86_64:
+ return static_cast<uint32_t>(k_num_user_registers_x86_64);
+ default:
+ assert(false && "Unhandled target architecture.");
+ return 0;
+ }
+}
+
+RegisterContextLinux_x86_64::RegisterContextLinux_x86_64(
+ const ArchSpec &target_arch)
+ : lldb_private::RegisterInfoInterface(target_arch),
+ m_register_info_p(GetRegisterInfoPtr(target_arch)),
+ m_register_info_count(GetRegisterInfoCount(target_arch)),
+ m_user_register_count(GetUserRegisterInfoCount(target_arch)) {
+ RegisterInfo orig_ax = {"orig_rax",
+ NULL,
+ sizeof(((GPR *)NULL)->orig_rax),
+ (LLVM_EXTENSION offsetof(GPR, orig_rax)),
+ eEncodingUint,
+ eFormatHex,
+ {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0};
+ d_register_infos.push_back(orig_ax);
}
+size_t RegisterContextLinux_x86_64::GetGPRSize() const { return sizeof(GPR); }
+
const std::vector<lldb_private::RegisterInfo> *
-RegisterContextLinux_x86_64::GetDynamicRegisterInfoP() const
-{
- return &d_register_infos;
+RegisterContextLinux_x86_64::GetDynamicRegisterInfoP() const {
+ return &d_register_infos;
}
-const RegisterInfo *
-RegisterContextLinux_x86_64::GetRegisterInfo() const
-{
- return m_register_info_p;
+const RegisterInfo *RegisterContextLinux_x86_64::GetRegisterInfo() const {
+ return m_register_info_p;
}
-uint32_t
-RegisterContextLinux_x86_64::GetRegisterCount () const
-{
- return m_register_info_count;
+uint32_t RegisterContextLinux_x86_64::GetRegisterCount() const {
+ return m_register_info_count;
}
-uint32_t
-RegisterContextLinux_x86_64::GetUserRegisterCount () const
-{
- return m_user_register_count;
+uint32_t RegisterContextLinux_x86_64::GetUserRegisterCount() const {
+ return m_user_register_count;
}
Modified: lldb/trunk/source/Plugins/Process/Utility/RegisterContextLinux_x86_64.h
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/source/Plugins/Process/Utility/RegisterContextLinux_x86_64.h?rev=280751&r1=280750&r2=280751&view=diff
==============================================================================
--- lldb/trunk/source/Plugins/Process/Utility/RegisterContextLinux_x86_64.h (original)
+++ lldb/trunk/source/Plugins/Process/Utility/RegisterContextLinux_x86_64.h Tue Sep 6 15:57:50 2016
@@ -12,33 +12,26 @@
#include "RegisterInfoInterface.h"
-class RegisterContextLinux_x86_64
- : public lldb_private::RegisterInfoInterface
-{
+class RegisterContextLinux_x86_64 : public lldb_private::RegisterInfoInterface {
public:
- RegisterContextLinux_x86_64(const lldb_private::ArchSpec &target_arch);
+ RegisterContextLinux_x86_64(const lldb_private::ArchSpec &target_arch);
- size_t
- GetGPRSize() const override;
+ size_t GetGPRSize() const override;
- const lldb_private::RegisterInfo *
- GetRegisterInfo() const override;
+ const lldb_private::RegisterInfo *GetRegisterInfo() const override;
- uint32_t
- GetRegisterCount () const override;
+ uint32_t GetRegisterCount() const override;
- uint32_t
- GetUserRegisterCount () const override;
+ uint32_t GetUserRegisterCount() const override;
- const std::vector<lldb_private::RegisterInfo> *
- GetDynamicRegisterInfoP() const override;
+ const std::vector<lldb_private::RegisterInfo> *
+ GetDynamicRegisterInfoP() const override;
private:
- const lldb_private::RegisterInfo *m_register_info_p;
- uint32_t m_register_info_count;
- uint32_t m_user_register_count;
- std::vector<lldb_private::RegisterInfo> d_register_infos;
-
+ const lldb_private::RegisterInfo *m_register_info_p;
+ uint32_t m_register_info_count;
+ uint32_t m_user_register_count;
+ std::vector<lldb_private::RegisterInfo> d_register_infos;
};
#endif
Modified: lldb/trunk/source/Plugins/Process/Utility/RegisterContextMacOSXFrameBackchain.cpp
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/source/Plugins/Process/Utility/RegisterContextMacOSXFrameBackchain.cpp?rev=280751&r1=280750&r2=280751&view=diff
==============================================================================
--- lldb/trunk/source/Plugins/Process/Utility/RegisterContextMacOSXFrameBackchain.cpp (original)
+++ lldb/trunk/source/Plugins/Process/Utility/RegisterContextMacOSXFrameBackchain.cpp Tue Sep 6 15:57:50 2016
@@ -27,181 +27,143 @@ using namespace lldb_private;
//----------------------------------------------------------------------
// RegisterContextMacOSXFrameBackchain constructor
//----------------------------------------------------------------------
-RegisterContextMacOSXFrameBackchain::RegisterContextMacOSXFrameBackchain
-(
- Thread &thread,
- uint32_t concrete_frame_idx,
- const UnwindMacOSXFrameBackchain::Cursor &cursor
-) :
- RegisterContext (thread, concrete_frame_idx),
- m_cursor (cursor),
- m_cursor_is_valid (true)
-{
-}
+RegisterContextMacOSXFrameBackchain::RegisterContextMacOSXFrameBackchain(
+ Thread &thread, uint32_t concrete_frame_idx,
+ const UnwindMacOSXFrameBackchain::Cursor &cursor)
+ : RegisterContext(thread, concrete_frame_idx), m_cursor(cursor),
+ m_cursor_is_valid(true) {}
//----------------------------------------------------------------------
// Destructor
//----------------------------------------------------------------------
-RegisterContextMacOSXFrameBackchain::~RegisterContextMacOSXFrameBackchain()
-{
-}
+RegisterContextMacOSXFrameBackchain::~RegisterContextMacOSXFrameBackchain() {}
-void
-RegisterContextMacOSXFrameBackchain::InvalidateAllRegisters ()
-{
- m_cursor_is_valid = false;
+void RegisterContextMacOSXFrameBackchain::InvalidateAllRegisters() {
+ m_cursor_is_valid = false;
}
-size_t
-RegisterContextMacOSXFrameBackchain::GetRegisterCount ()
-{
- return m_thread.GetRegisterContext()->GetRegisterCount();
+size_t RegisterContextMacOSXFrameBackchain::GetRegisterCount() {
+ return m_thread.GetRegisterContext()->GetRegisterCount();
}
const RegisterInfo *
-RegisterContextMacOSXFrameBackchain::GetRegisterInfoAtIndex (size_t reg)
-{
- return m_thread.GetRegisterContext()->GetRegisterInfoAtIndex(reg);
+RegisterContextMacOSXFrameBackchain::GetRegisterInfoAtIndex(size_t reg) {
+ return m_thread.GetRegisterContext()->GetRegisterInfoAtIndex(reg);
}
-size_t
-RegisterContextMacOSXFrameBackchain::GetRegisterSetCount ()
-{
- return m_thread.GetRegisterContext()->GetRegisterSetCount();
+size_t RegisterContextMacOSXFrameBackchain::GetRegisterSetCount() {
+ return m_thread.GetRegisterContext()->GetRegisterSetCount();
}
-
-
const RegisterSet *
-RegisterContextMacOSXFrameBackchain::GetRegisterSet (size_t reg_set)
-{
- return m_thread.GetRegisterContext()->GetRegisterSet (reg_set);
+RegisterContextMacOSXFrameBackchain::GetRegisterSet(size_t reg_set) {
+ return m_thread.GetRegisterContext()->GetRegisterSet(reg_set);
}
+bool RegisterContextMacOSXFrameBackchain::ReadRegister(
+ const RegisterInfo *reg_info, RegisterValue &value) {
+ if (!m_cursor_is_valid)
+ return false;
+ uint64_t reg_value = LLDB_INVALID_ADDRESS;
-bool
-RegisterContextMacOSXFrameBackchain::ReadRegister (const RegisterInfo *reg_info,
- RegisterValue &value)
-{
- if (!m_cursor_is_valid)
- return false;
-
- uint64_t reg_value = LLDB_INVALID_ADDRESS;
-
- switch (reg_info->kinds[eRegisterKindGeneric])
- {
- case LLDB_REGNUM_GENERIC_PC:
- if (m_cursor.pc == LLDB_INVALID_ADDRESS)
- return false;
- reg_value = m_cursor.pc;
- break;
-
- case LLDB_REGNUM_GENERIC_FP:
- if (m_cursor.fp == LLDB_INVALID_ADDRESS)
- return false;
- reg_value = m_cursor.fp;
- break;
-
- default:
- return false;
- }
-
- switch (reg_info->encoding)
- {
- case eEncodingInvalid:
- case eEncodingVector:
- break;
-
- case eEncodingUint:
- case eEncodingSint:
- value.SetUInt(reg_value, reg_info->byte_size);
- return true;
-
- case eEncodingIEEE754:
- switch (reg_info->byte_size)
- {
- case sizeof (float):
- if (sizeof (float) == sizeof(uint32_t))
- {
- value.SetUInt32(reg_value, RegisterValue::eTypeFloat);
- return true;
- }
- else if (sizeof (float) == sizeof(uint64_t))
- {
- value.SetUInt64(reg_value, RegisterValue::eTypeFloat);
- return true;
- }
- break;
-
- case sizeof (double):
- if (sizeof (double) == sizeof(uint32_t))
- {
- value.SetUInt32(reg_value, RegisterValue::eTypeDouble);
- return true;
- }
- else if (sizeof (double) == sizeof(uint64_t))
- {
- value.SetUInt64(reg_value, RegisterValue::eTypeDouble);
- return true;
- }
- break;
-
- // TOOD: need a better way to detect when "long double" types are
- // the same bytes size as "double"
-#if !defined(__arm__) && !defined(__arm64__) && !defined(__aarch64__) && !defined(_MSC_VER) && \
- !defined(__mips__) && !defined(__powerpc__) && !defined(__ANDROID_NDK__)
- case sizeof (long double):
- if (sizeof (long double) == sizeof(uint32_t))
- {
- value.SetUInt32(reg_value, RegisterValue::eTypeLongDouble);
- return true;
- }
- else if (sizeof (long double) == sizeof(uint64_t))
- {
- value.SetUInt64(reg_value, RegisterValue::eTypeLongDouble);
- return true;
- }
- break;
-#endif
- }
- break;
- }
- return false;
-}
+ switch (reg_info->kinds[eRegisterKindGeneric]) {
+ case LLDB_REGNUM_GENERIC_PC:
+ if (m_cursor.pc == LLDB_INVALID_ADDRESS)
+ return false;
+ reg_value = m_cursor.pc;
+ break;
+
+ case LLDB_REGNUM_GENERIC_FP:
+ if (m_cursor.fp == LLDB_INVALID_ADDRESS)
+ return false;
+ reg_value = m_cursor.fp;
+ break;
-bool
-RegisterContextMacOSXFrameBackchain::WriteRegister (const RegisterInfo *reg_info,
- const RegisterValue &value)
-{
- // Not supported yet. We could easily add support for this by remembering
- // the address of each entry (it would need to be part of the cursor)
+ default:
return false;
-}
+ }
-bool
-RegisterContextMacOSXFrameBackchain::ReadAllRegisterValues (lldb::DataBufferSP &data_sp)
-{
- // libunwind frames can't handle this it doesn't always have all register
- // values. This call should only be called on frame zero anyway so there
- // shouldn't be any problem
- return false;
-}
+ switch (reg_info->encoding) {
+ case eEncodingInvalid:
+ case eEncodingVector:
+ break;
+
+ case eEncodingUint:
+ case eEncodingSint:
+ value.SetUInt(reg_value, reg_info->byte_size);
+ return true;
+
+ case eEncodingIEEE754:
+ switch (reg_info->byte_size) {
+ case sizeof(float):
+ if (sizeof(float) == sizeof(uint32_t)) {
+ value.SetUInt32(reg_value, RegisterValue::eTypeFloat);
+ return true;
+ } else if (sizeof(float) == sizeof(uint64_t)) {
+ value.SetUInt64(reg_value, RegisterValue::eTypeFloat);
+ return true;
+ }
+ break;
-bool
-RegisterContextMacOSXFrameBackchain::WriteAllRegisterValues (const lldb::DataBufferSP &data_sp)
-{
- // Since this class doesn't respond to "ReadAllRegisterValues()", it must
- // not have been the one that saved all the register values. So we just let
- // the thread's register context (the register context for frame zero) do
- // the writing.
- return m_thread.GetRegisterContext()->WriteAllRegisterValues(data_sp);
-}
+ case sizeof(double):
+ if (sizeof(double) == sizeof(uint32_t)) {
+ value.SetUInt32(reg_value, RegisterValue::eTypeDouble);
+ return true;
+ } else if (sizeof(double) == sizeof(uint64_t)) {
+ value.SetUInt64(reg_value, RegisterValue::eTypeDouble);
+ return true;
+ }
+ break;
+// TOOD: need a better way to detect when "long double" types are
+// the same bytes size as "double"
+#if !defined(__arm__) && !defined(__arm64__) && !defined(__aarch64__) && \
+ !defined(_MSC_VER) && !defined(__mips__) && !defined(__powerpc__) && \
+ !defined(__ANDROID_NDK__)
+ case sizeof(long double):
+ if (sizeof(long double) == sizeof(uint32_t)) {
+ value.SetUInt32(reg_value, RegisterValue::eTypeLongDouble);
+ return true;
+ } else if (sizeof(long double) == sizeof(uint64_t)) {
+ value.SetUInt64(reg_value, RegisterValue::eTypeLongDouble);
+ return true;
+ }
+ break;
+#endif
+ }
+ break;
+ }
+ return false;
+}
+
+bool RegisterContextMacOSXFrameBackchain::WriteRegister(
+ const RegisterInfo *reg_info, const RegisterValue &value) {
+ // Not supported yet. We could easily add support for this by remembering
+ // the address of each entry (it would need to be part of the cursor)
+ return false;
+}
+
+bool RegisterContextMacOSXFrameBackchain::ReadAllRegisterValues(
+ lldb::DataBufferSP &data_sp) {
+ // libunwind frames can't handle this it doesn't always have all register
+ // values. This call should only be called on frame zero anyway so there
+ // shouldn't be any problem
+ return false;
+}
+
+bool RegisterContextMacOSXFrameBackchain::WriteAllRegisterValues(
+ const lldb::DataBufferSP &data_sp) {
+ // Since this class doesn't respond to "ReadAllRegisterValues()", it must
+ // not have been the one that saved all the register values. So we just let
+ // the thread's register context (the register context for frame zero) do
+ // the writing.
+ return m_thread.GetRegisterContext()->WriteAllRegisterValues(data_sp);
+}
uint32_t
-RegisterContextMacOSXFrameBackchain::ConvertRegisterKindToRegisterNumber (lldb::RegisterKind kind, uint32_t num)
-{
- return m_thread.GetRegisterContext()->ConvertRegisterKindToRegisterNumber (kind, num);
+RegisterContextMacOSXFrameBackchain::ConvertRegisterKindToRegisterNumber(
+ lldb::RegisterKind kind, uint32_t num) {
+ return m_thread.GetRegisterContext()->ConvertRegisterKindToRegisterNumber(
+ kind, num);
}
-
Modified: lldb/trunk/source/Plugins/Process/Utility/RegisterContextMacOSXFrameBackchain.h
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/source/Plugins/Process/Utility/RegisterContextMacOSXFrameBackchain.h?rev=280751&r1=280750&r2=280751&view=diff
==============================================================================
--- lldb/trunk/source/Plugins/Process/Utility/RegisterContextMacOSXFrameBackchain.h (original)
+++ lldb/trunk/source/Plugins/Process/Utility/RegisterContextMacOSXFrameBackchain.h Tue Sep 6 15:57:50 2016
@@ -14,57 +14,48 @@
// C++ Includes
// Other libraries and framework includes
// Project includes
-#include "lldb/lldb-private.h"
#include "lldb/Target/RegisterContext.h"
+#include "lldb/lldb-private.h"
#include "UnwindMacOSXFrameBackchain.h"
-class RegisterContextMacOSXFrameBackchain : public lldb_private::RegisterContext
-{
+class RegisterContextMacOSXFrameBackchain
+ : public lldb_private::RegisterContext {
public:
- RegisterContextMacOSXFrameBackchain (lldb_private::Thread &thread,
- uint32_t concrete_frame_idx,
- const UnwindMacOSXFrameBackchain::Cursor &cursor);
+ RegisterContextMacOSXFrameBackchain(
+ lldb_private::Thread &thread, uint32_t concrete_frame_idx,
+ const UnwindMacOSXFrameBackchain::Cursor &cursor);
+
+ ~RegisterContextMacOSXFrameBackchain() override;
+
+ void InvalidateAllRegisters() override;
- ~RegisterContextMacOSXFrameBackchain() override;
+ size_t GetRegisterCount() override;
- void
- InvalidateAllRegisters() override;
+ const lldb_private::RegisterInfo *GetRegisterInfoAtIndex(size_t reg) override;
- size_t
- GetRegisterCount() override;
+ size_t GetRegisterSetCount() override;
- const lldb_private::RegisterInfo *
- GetRegisterInfoAtIndex(size_t reg) override;
+ const lldb_private::RegisterSet *GetRegisterSet(size_t reg_set) override;
- size_t
- GetRegisterSetCount() override;
+ bool ReadRegister(const lldb_private::RegisterInfo *reg_info,
+ lldb_private::RegisterValue &value) override;
- const lldb_private::RegisterSet *
- GetRegisterSet(size_t reg_set) override;
+ bool WriteRegister(const lldb_private::RegisterInfo *reg_info,
+ const lldb_private::RegisterValue &value) override;
- bool
- ReadRegister(const lldb_private::RegisterInfo *reg_info,
- lldb_private::RegisterValue &value) override;
+ bool ReadAllRegisterValues(lldb::DataBufferSP &data_sp) override;
- bool
- WriteRegister(const lldb_private::RegisterInfo *reg_info,
- const lldb_private::RegisterValue &value) override;
-
- bool
- ReadAllRegisterValues(lldb::DataBufferSP &data_sp) override;
+ bool WriteAllRegisterValues(const lldb::DataBufferSP &data_sp) override;
- bool
- WriteAllRegisterValues(const lldb::DataBufferSP &data_sp) override;
+ uint32_t ConvertRegisterKindToRegisterNumber(lldb::RegisterKind kind,
+ uint32_t num) override;
- uint32_t
- ConvertRegisterKindToRegisterNumber(lldb::RegisterKind kind, uint32_t num) override;
-
private:
- UnwindMacOSXFrameBackchain::Cursor m_cursor;
- bool m_cursor_is_valid;
+ UnwindMacOSXFrameBackchain::Cursor m_cursor;
+ bool m_cursor_is_valid;
- DISALLOW_COPY_AND_ASSIGN (RegisterContextMacOSXFrameBackchain);
+ DISALLOW_COPY_AND_ASSIGN(RegisterContextMacOSXFrameBackchain);
};
#endif // lldb_RegisterContextMacOSXFrameBackchain_h_
Modified: lldb/trunk/source/Plugins/Process/Utility/RegisterContextMach_arm.cpp
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/source/Plugins/Process/Utility/RegisterContextMach_arm.cpp?rev=280751&r1=280750&r2=280751&view=diff
==============================================================================
--- lldb/trunk/source/Plugins/Process/Utility/RegisterContextMach_arm.cpp (original)
+++ lldb/trunk/source/Plugins/Process/Utility/RegisterContextMach_arm.cpp Tue Sep 6 15:57:50 2016
@@ -22,66 +22,50 @@
using namespace lldb;
using namespace lldb_private;
+RegisterContextMach_arm::RegisterContextMach_arm(Thread &thread,
+ uint32_t concrete_frame_idx)
+ : RegisterContextDarwin_arm(thread, concrete_frame_idx) {}
-RegisterContextMach_arm::RegisterContextMach_arm(Thread &thread, uint32_t concrete_frame_idx) :
- RegisterContextDarwin_arm (thread, concrete_frame_idx)
-{
-}
-
-RegisterContextMach_arm::~RegisterContextMach_arm()
-{
-}
+RegisterContextMach_arm::~RegisterContextMach_arm() {}
-int
-RegisterContextMach_arm::DoReadGPR (lldb::tid_t tid, int flavor, GPR &gpr)
-{
- mach_msg_type_number_t count = GPRWordCount;
- return ::thread_get_state(tid, flavor, (thread_state_t)&gpr, &count);
+int RegisterContextMach_arm::DoReadGPR(lldb::tid_t tid, int flavor, GPR &gpr) {
+ mach_msg_type_number_t count = GPRWordCount;
+ return ::thread_get_state(tid, flavor, (thread_state_t)&gpr, &count);
}
-int
-RegisterContextMach_arm::DoReadFPU (lldb::tid_t tid, int flavor, FPU &fpu)
-{
- mach_msg_type_number_t count = FPUWordCount;
- return ::thread_get_state(tid, flavor, (thread_state_t)&fpu, &count);
+int RegisterContextMach_arm::DoReadFPU(lldb::tid_t tid, int flavor, FPU &fpu) {
+ mach_msg_type_number_t count = FPUWordCount;
+ return ::thread_get_state(tid, flavor, (thread_state_t)&fpu, &count);
}
-int
-RegisterContextMach_arm::DoReadEXC (lldb::tid_t tid, int flavor, EXC &exc)
-{
- mach_msg_type_number_t count = EXCWordCount;
- return ::thread_get_state(tid, flavor, (thread_state_t)&exc, &count);
+int RegisterContextMach_arm::DoReadEXC(lldb::tid_t tid, int flavor, EXC &exc) {
+ mach_msg_type_number_t count = EXCWordCount;
+ return ::thread_get_state(tid, flavor, (thread_state_t)&exc, &count);
}
-int
-RegisterContextMach_arm::DoReadDBG (lldb::tid_t tid, int flavor, DBG &dbg)
-{
- mach_msg_type_number_t count = DBGWordCount;
- return ::thread_get_state(tid, flavor, (thread_state_t)&dbg, &count);
+int RegisterContextMach_arm::DoReadDBG(lldb::tid_t tid, int flavor, DBG &dbg) {
+ mach_msg_type_number_t count = DBGWordCount;
+ return ::thread_get_state(tid, flavor, (thread_state_t)&dbg, &count);
}
-int
-RegisterContextMach_arm::DoWriteGPR (lldb::tid_t tid, int flavor, const GPR &gpr)
-{
- return ::thread_set_state(tid, flavor, (thread_state_t)&gpr, GPRWordCount);
+int RegisterContextMach_arm::DoWriteGPR(lldb::tid_t tid, int flavor,
+ const GPR &gpr) {
+ return ::thread_set_state(tid, flavor, (thread_state_t)&gpr, GPRWordCount);
}
-int
-RegisterContextMach_arm::DoWriteFPU (lldb::tid_t tid, int flavor, const FPU &fpu)
-{
- return ::thread_set_state(tid, flavor, (thread_state_t)&fpu, FPUWordCount);
+int RegisterContextMach_arm::DoWriteFPU(lldb::tid_t tid, int flavor,
+ const FPU &fpu) {
+ return ::thread_set_state(tid, flavor, (thread_state_t)&fpu, FPUWordCount);
}
-int
-RegisterContextMach_arm::DoWriteEXC (lldb::tid_t tid, int flavor, const EXC &exc)
-{
- return ::thread_set_state(tid, flavor, (thread_state_t)&exc, EXCWordCount);
+int RegisterContextMach_arm::DoWriteEXC(lldb::tid_t tid, int flavor,
+ const EXC &exc) {
+ return ::thread_set_state(tid, flavor, (thread_state_t)&exc, EXCWordCount);
}
-int
-RegisterContextMach_arm::DoWriteDBG (lldb::tid_t tid, int flavor, const DBG &dbg)
-{
- return ::thread_set_state(tid, flavor, (thread_state_t)&dbg, DBGWordCount);
+int RegisterContextMach_arm::DoWriteDBG(lldb::tid_t tid, int flavor,
+ const DBG &dbg) {
+ return ::thread_set_state(tid, flavor, (thread_state_t)&dbg, DBGWordCount);
}
#endif
Modified: lldb/trunk/source/Plugins/Process/Utility/RegisterContextMach_arm.h
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/source/Plugins/Process/Utility/RegisterContextMach_arm.h?rev=280751&r1=280750&r2=280751&view=diff
==============================================================================
--- lldb/trunk/source/Plugins/Process/Utility/RegisterContextMach_arm.h (original)
+++ lldb/trunk/source/Plugins/Process/Utility/RegisterContextMach_arm.h Tue Sep 6 15:57:50 2016
@@ -17,40 +17,29 @@
// Project includes
#include "RegisterContextDarwin_arm.h"
-class RegisterContextMach_arm : public RegisterContextDarwin_arm
-{
+class RegisterContextMach_arm : public RegisterContextDarwin_arm {
public:
+ RegisterContextMach_arm(lldb_private::Thread &thread,
+ uint32_t concrete_frame_idx);
- RegisterContextMach_arm(lldb_private::Thread &thread, uint32_t concrete_frame_idx);
-
- virtual
- ~RegisterContextMach_arm();
+ virtual ~RegisterContextMach_arm();
protected:
+ virtual int DoReadGPR(lldb::tid_t tid, int flavor, GPR &gpr);
+
+ int DoReadFPU(lldb::tid_t tid, int flavor, FPU &fpu);
+
+ int DoReadEXC(lldb::tid_t tid, int flavor, EXC &exc);
+
+ int DoReadDBG(lldb::tid_t tid, int flavor, DBG &dbg);
+
+ int DoWriteGPR(lldb::tid_t tid, int flavor, const GPR &gpr);
+
+ int DoWriteFPU(lldb::tid_t tid, int flavor, const FPU &fpu);
+
+ int DoWriteEXC(lldb::tid_t tid, int flavor, const EXC &exc);
- virtual int
- DoReadGPR (lldb::tid_t tid, int flavor, GPR &gpr);
-
- int
- DoReadFPU (lldb::tid_t tid, int flavor, FPU &fpu);
-
- int
- DoReadEXC (lldb::tid_t tid, int flavor, EXC &exc);
-
- int
- DoReadDBG (lldb::tid_t tid, int flavor, DBG &dbg);
-
- int
- DoWriteGPR (lldb::tid_t tid, int flavor, const GPR &gpr);
-
- int
- DoWriteFPU (lldb::tid_t tid, int flavor, const FPU &fpu);
-
- int
- DoWriteEXC (lldb::tid_t tid, int flavor, const EXC &exc);
-
- int
- DoWriteDBG (lldb::tid_t tid, int flavor, const DBG &dbg);
+ int DoWriteDBG(lldb::tid_t tid, int flavor, const DBG &dbg);
};
-#endif // liblldb_RegisterContextMach_arm_h_
+#endif // liblldb_RegisterContextMach_arm_h_
Modified: lldb/trunk/source/Plugins/Process/Utility/RegisterContextMach_i386.cpp
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/source/Plugins/Process/Utility/RegisterContextMach_i386.cpp?rev=280751&r1=280750&r2=280751&view=diff
==============================================================================
--- lldb/trunk/source/Plugins/Process/Utility/RegisterContextMach_i386.cpp (original)
+++ lldb/trunk/source/Plugins/Process/Utility/RegisterContextMach_i386.cpp Tue Sep 6 15:57:50 2016
@@ -20,53 +20,40 @@
using namespace lldb;
using namespace lldb_private;
+RegisterContextMach_i386::RegisterContextMach_i386(Thread &thread,
+ uint32_t concrete_frame_idx)
+ : RegisterContextDarwin_i386(thread, concrete_frame_idx) {}
-RegisterContextMach_i386::RegisterContextMach_i386(Thread &thread, uint32_t concrete_frame_idx) :
- RegisterContextDarwin_i386 (thread, concrete_frame_idx)
-{
-}
-
-RegisterContextMach_i386::~RegisterContextMach_i386()
-{
-}
+RegisterContextMach_i386::~RegisterContextMach_i386() {}
-int
-RegisterContextMach_i386::DoReadGPR (lldb::tid_t tid, int flavor, GPR &gpr)
-{
- mach_msg_type_number_t count = GPRWordCount;
- return ::thread_get_state(tid, flavor, (thread_state_t)&gpr, &count);
+int RegisterContextMach_i386::DoReadGPR(lldb::tid_t tid, int flavor, GPR &gpr) {
+ mach_msg_type_number_t count = GPRWordCount;
+ return ::thread_get_state(tid, flavor, (thread_state_t)&gpr, &count);
}
-int
-RegisterContextMach_i386::DoReadFPU (lldb::tid_t tid, int flavor, FPU &fpu)
-{
- mach_msg_type_number_t count = FPUWordCount;
- return ::thread_get_state(tid, flavor, (thread_state_t)&fpu, &count);
+int RegisterContextMach_i386::DoReadFPU(lldb::tid_t tid, int flavor, FPU &fpu) {
+ mach_msg_type_number_t count = FPUWordCount;
+ return ::thread_get_state(tid, flavor, (thread_state_t)&fpu, &count);
}
-int
-RegisterContextMach_i386::DoReadEXC (lldb::tid_t tid, int flavor, EXC &exc)
-{
- mach_msg_type_number_t count = EXCWordCount;
- return ::thread_get_state(tid, flavor, (thread_state_t)&exc, &count);
+int RegisterContextMach_i386::DoReadEXC(lldb::tid_t tid, int flavor, EXC &exc) {
+ mach_msg_type_number_t count = EXCWordCount;
+ return ::thread_get_state(tid, flavor, (thread_state_t)&exc, &count);
}
-int
-RegisterContextMach_i386::DoWriteGPR (lldb::tid_t tid, int flavor, const GPR &gpr)
-{
- return ::thread_set_state(tid, flavor, (thread_state_t)&gpr, GPRWordCount);
+int RegisterContextMach_i386::DoWriteGPR(lldb::tid_t tid, int flavor,
+ const GPR &gpr) {
+ return ::thread_set_state(tid, flavor, (thread_state_t)&gpr, GPRWordCount);
}
-int
-RegisterContextMach_i386::DoWriteFPU (lldb::tid_t tid, int flavor, const FPU &fpu)
-{
- return ::thread_set_state(tid, flavor, (thread_state_t)&fpu, FPUWordCount);
+int RegisterContextMach_i386::DoWriteFPU(lldb::tid_t tid, int flavor,
+ const FPU &fpu) {
+ return ::thread_set_state(tid, flavor, (thread_state_t)&fpu, FPUWordCount);
}
-int
-RegisterContextMach_i386::DoWriteEXC (lldb::tid_t tid, int flavor, const EXC &exc)
-{
- return ::thread_set_state(tid, flavor, (thread_state_t)&exc, EXCWordCount);
+int RegisterContextMach_i386::DoWriteEXC(lldb::tid_t tid, int flavor,
+ const EXC &exc) {
+ return ::thread_set_state(tid, flavor, (thread_state_t)&exc, EXCWordCount);
}
#endif
Modified: lldb/trunk/source/Plugins/Process/Utility/RegisterContextMach_i386.h
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/source/Plugins/Process/Utility/RegisterContextMach_i386.h?rev=280751&r1=280750&r2=280751&view=diff
==============================================================================
--- lldb/trunk/source/Plugins/Process/Utility/RegisterContextMach_i386.h (original)
+++ lldb/trunk/source/Plugins/Process/Utility/RegisterContextMach_i386.h Tue Sep 6 15:57:50 2016
@@ -16,34 +16,25 @@
// Project includes
#include "RegisterContextDarwin_i386.h"
-class RegisterContextMach_i386 : public RegisterContextDarwin_i386
-{
+class RegisterContextMach_i386 : public RegisterContextDarwin_i386 {
public:
-
- RegisterContextMach_i386(lldb_private::Thread &thread, uint32_t concrete_frame_idx);
-
- virtual
- ~RegisterContextMach_i386();
-
+ RegisterContextMach_i386(lldb_private::Thread &thread,
+ uint32_t concrete_frame_idx);
+
+ virtual ~RegisterContextMach_i386();
+
protected:
-
- virtual int
- DoReadGPR (lldb::tid_t tid, int flavor, GPR &gpr);
-
- int
- DoReadFPU (lldb::tid_t tid, int flavor, FPU &fpu);
-
- int
- DoReadEXC (lldb::tid_t tid, int flavor, EXC &exc);
-
- int
- DoWriteGPR (lldb::tid_t tid, int flavor, const GPR &gpr);
-
- int
- DoWriteFPU (lldb::tid_t tid, int flavor, const FPU &fpu);
-
- int
- DoWriteEXC (lldb::tid_t tid, int flavor, const EXC &exc);
+ virtual int DoReadGPR(lldb::tid_t tid, int flavor, GPR &gpr);
+
+ int DoReadFPU(lldb::tid_t tid, int flavor, FPU &fpu);
+
+ int DoReadEXC(lldb::tid_t tid, int flavor, EXC &exc);
+
+ int DoWriteGPR(lldb::tid_t tid, int flavor, const GPR &gpr);
+
+ int DoWriteFPU(lldb::tid_t tid, int flavor, const FPU &fpu);
+
+ int DoWriteEXC(lldb::tid_t tid, int flavor, const EXC &exc);
};
-#endif // liblldb_RegisterContextMach_i386_h_
+#endif // liblldb_RegisterContextMach_i386_h_
Modified: lldb/trunk/source/Plugins/Process/Utility/RegisterContextMach_x86_64.cpp
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/source/Plugins/Process/Utility/RegisterContextMach_x86_64.cpp?rev=280751&r1=280750&r2=280751&view=diff
==============================================================================
--- lldb/trunk/source/Plugins/Process/Utility/RegisterContextMach_x86_64.cpp (original)
+++ lldb/trunk/source/Plugins/Process/Utility/RegisterContextMach_x86_64.cpp Tue Sep 6 15:57:50 2016
@@ -20,53 +20,43 @@
using namespace lldb;
using namespace lldb_private;
+RegisterContextMach_x86_64::RegisterContextMach_x86_64(
+ Thread &thread, uint32_t concrete_frame_idx)
+ : RegisterContextDarwin_x86_64(thread, concrete_frame_idx) {}
-RegisterContextMach_x86_64::RegisterContextMach_x86_64(Thread &thread, uint32_t concrete_frame_idx) :
- RegisterContextDarwin_x86_64 (thread, concrete_frame_idx)
-{
-}
-
-RegisterContextMach_x86_64::~RegisterContextMach_x86_64()
-{
-}
+RegisterContextMach_x86_64::~RegisterContextMach_x86_64() {}
-int
-RegisterContextMach_x86_64::DoReadGPR (lldb::tid_t tid, int flavor, GPR &gpr)
-{
- mach_msg_type_number_t count = GPRWordCount;
- return ::thread_get_state(tid, flavor, (thread_state_t)&gpr, &count);
+int RegisterContextMach_x86_64::DoReadGPR(lldb::tid_t tid, int flavor,
+ GPR &gpr) {
+ mach_msg_type_number_t count = GPRWordCount;
+ return ::thread_get_state(tid, flavor, (thread_state_t)&gpr, &count);
}
-int
-RegisterContextMach_x86_64::DoReadFPU (lldb::tid_t tid, int flavor, FPU &fpu)
-{
- mach_msg_type_number_t count = FPUWordCount;
- return ::thread_get_state(tid, flavor, (thread_state_t)&fpu, &count);
+int RegisterContextMach_x86_64::DoReadFPU(lldb::tid_t tid, int flavor,
+ FPU &fpu) {
+ mach_msg_type_number_t count = FPUWordCount;
+ return ::thread_get_state(tid, flavor, (thread_state_t)&fpu, &count);
}
-int
-RegisterContextMach_x86_64::DoReadEXC (lldb::tid_t tid, int flavor, EXC &exc)
-{
- mach_msg_type_number_t count = EXCWordCount;
- return ::thread_get_state(tid, flavor, (thread_state_t)&exc, &count);
+int RegisterContextMach_x86_64::DoReadEXC(lldb::tid_t tid, int flavor,
+ EXC &exc) {
+ mach_msg_type_number_t count = EXCWordCount;
+ return ::thread_get_state(tid, flavor, (thread_state_t)&exc, &count);
}
-int
-RegisterContextMach_x86_64::DoWriteGPR (lldb::tid_t tid, int flavor, const GPR &gpr)
-{
- return ::thread_set_state(tid, flavor, (thread_state_t)&gpr, GPRWordCount);
+int RegisterContextMach_x86_64::DoWriteGPR(lldb::tid_t tid, int flavor,
+ const GPR &gpr) {
+ return ::thread_set_state(tid, flavor, (thread_state_t)&gpr, GPRWordCount);
}
-int
-RegisterContextMach_x86_64::DoWriteFPU (lldb::tid_t tid, int flavor, const FPU &fpu)
-{
- return ::thread_set_state(tid, flavor, (thread_state_t)&fpu, FPUWordCount);
+int RegisterContextMach_x86_64::DoWriteFPU(lldb::tid_t tid, int flavor,
+ const FPU &fpu) {
+ return ::thread_set_state(tid, flavor, (thread_state_t)&fpu, FPUWordCount);
}
-int
-RegisterContextMach_x86_64::DoWriteEXC (lldb::tid_t tid, int flavor, const EXC &exc)
-{
- return ::thread_set_state(tid, flavor, (thread_state_t)&exc, EXCWordCount);
+int RegisterContextMach_x86_64::DoWriteEXC(lldb::tid_t tid, int flavor,
+ const EXC &exc) {
+ return ::thread_set_state(tid, flavor, (thread_state_t)&exc, EXCWordCount);
}
#endif
Modified: lldb/trunk/source/Plugins/Process/Utility/RegisterContextMach_x86_64.h
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/source/Plugins/Process/Utility/RegisterContextMach_x86_64.h?rev=280751&r1=280750&r2=280751&view=diff
==============================================================================
--- lldb/trunk/source/Plugins/Process/Utility/RegisterContextMach_x86_64.h (original)
+++ lldb/trunk/source/Plugins/Process/Utility/RegisterContextMach_x86_64.h Tue Sep 6 15:57:50 2016
@@ -1,4 +1,5 @@
-//===-- RegisterContextMach_x86_64.h ------------------------------*- C++ -*-===//
+//===-- RegisterContextMach_x86_64.h ------------------------------*- C++
+//-*-===//
//
// The LLVM Compiler Infrastructure
//
@@ -16,34 +17,25 @@
// Project includes
#include "RegisterContextDarwin_x86_64.h"
-class RegisterContextMach_x86_64 : public RegisterContextDarwin_x86_64
-{
+class RegisterContextMach_x86_64 : public RegisterContextDarwin_x86_64 {
public:
-
- RegisterContextMach_x86_64(lldb_private::Thread &thread, uint32_t concrete_frame_idx);
-
- virtual
- ~RegisterContextMach_x86_64();
-
+ RegisterContextMach_x86_64(lldb_private::Thread &thread,
+ uint32_t concrete_frame_idx);
+
+ virtual ~RegisterContextMach_x86_64();
+
protected:
-
- virtual int
- DoReadGPR (lldb::tid_t tid, int flavor, GPR &gpr);
-
- int
- DoReadFPU (lldb::tid_t tid, int flavor, FPU &fpu);
-
- int
- DoReadEXC (lldb::tid_t tid, int flavor, EXC &exc);
-
- int
- DoWriteGPR (lldb::tid_t tid, int flavor, const GPR &gpr);
-
- int
- DoWriteFPU (lldb::tid_t tid, int flavor, const FPU &fpu);
-
- int
- DoWriteEXC (lldb::tid_t tid, int flavor, const EXC &exc);
+ virtual int DoReadGPR(lldb::tid_t tid, int flavor, GPR &gpr);
+
+ int DoReadFPU(lldb::tid_t tid, int flavor, FPU &fpu);
+
+ int DoReadEXC(lldb::tid_t tid, int flavor, EXC &exc);
+
+ int DoWriteGPR(lldb::tid_t tid, int flavor, const GPR &gpr);
+
+ int DoWriteFPU(lldb::tid_t tid, int flavor, const FPU &fpu);
+
+ int DoWriteEXC(lldb::tid_t tid, int flavor, const EXC &exc);
};
-#endif // liblldb_RegisterContextMach_x86_64_h_
+#endif // liblldb_RegisterContextMach_x86_64_h_
Modified: lldb/trunk/source/Plugins/Process/Utility/RegisterContextMemory.cpp
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/source/Plugins/Process/Utility/RegisterContextMemory.cpp?rev=280751&r1=280750&r2=280751&view=diff
==============================================================================
--- lldb/trunk/source/Plugins/Process/Utility/RegisterContextMemory.cpp (original)
+++ lldb/trunk/source/Plugins/Process/Utility/RegisterContextMemory.cpp Tue Sep 6 15:57:50 2016
@@ -26,149 +26,123 @@ using namespace lldb_private;
//----------------------------------------------------------------------
// RegisterContextMemory constructor
//----------------------------------------------------------------------
-RegisterContextMemory::RegisterContextMemory
-(
- Thread &thread,
- uint32_t concrete_frame_idx,
- DynamicRegisterInfo ®_infos,
- addr_t reg_data_addr
-) :
- RegisterContext (thread, concrete_frame_idx),
- m_reg_infos (reg_infos),
- m_reg_valid (),
- m_reg_data (),
- m_reg_data_addr (reg_data_addr)
-{
- // Resize our vector of bools to contain one bool for every register.
- // We will use these boolean values to know when a register value
- // is valid in m_reg_data.
- const size_t num_regs = reg_infos.GetNumRegisters();
- assert (num_regs > 0);
- m_reg_valid.resize (num_regs);
-
- // Make a heap based buffer that is big enough to store all registers
- DataBufferSP reg_data_sp(new DataBufferHeap (reg_infos.GetRegisterDataByteSize(), 0));
- m_reg_data.SetData (reg_data_sp);
+RegisterContextMemory::RegisterContextMemory(Thread &thread,
+ uint32_t concrete_frame_idx,
+ DynamicRegisterInfo ®_infos,
+ addr_t reg_data_addr)
+ : RegisterContext(thread, concrete_frame_idx), m_reg_infos(reg_infos),
+ m_reg_valid(), m_reg_data(), m_reg_data_addr(reg_data_addr) {
+ // Resize our vector of bools to contain one bool for every register.
+ // We will use these boolean values to know when a register value
+ // is valid in m_reg_data.
+ const size_t num_regs = reg_infos.GetNumRegisters();
+ assert(num_regs > 0);
+ m_reg_valid.resize(num_regs);
+
+ // Make a heap based buffer that is big enough to store all registers
+ DataBufferSP reg_data_sp(
+ new DataBufferHeap(reg_infos.GetRegisterDataByteSize(), 0));
+ m_reg_data.SetData(reg_data_sp);
}
//----------------------------------------------------------------------
// Destructor
//----------------------------------------------------------------------
-RegisterContextMemory::~RegisterContextMemory()
-{
-}
+RegisterContextMemory::~RegisterContextMemory() {}
-void
-RegisterContextMemory::InvalidateAllRegisters ()
-{
- if (m_reg_data_addr != LLDB_INVALID_ADDRESS)
- SetAllRegisterValid (false);
+void RegisterContextMemory::InvalidateAllRegisters() {
+ if (m_reg_data_addr != LLDB_INVALID_ADDRESS)
+ SetAllRegisterValid(false);
}
-void
-RegisterContextMemory::SetAllRegisterValid (bool b)
-{
- std::vector<bool>::iterator pos, end = m_reg_valid.end();
- for (pos = m_reg_valid.begin(); pos != end; ++pos)
- *pos = b;
+void RegisterContextMemory::SetAllRegisterValid(bool b) {
+ std::vector<bool>::iterator pos, end = m_reg_valid.end();
+ for (pos = m_reg_valid.begin(); pos != end; ++pos)
+ *pos = b;
}
-size_t
-RegisterContextMemory::GetRegisterCount ()
-{
- return m_reg_infos.GetNumRegisters ();
+size_t RegisterContextMemory::GetRegisterCount() {
+ return m_reg_infos.GetNumRegisters();
}
-const RegisterInfo *
-RegisterContextMemory::GetRegisterInfoAtIndex (size_t reg)
-{
- return m_reg_infos.GetRegisterInfoAtIndex (reg);
+const RegisterInfo *RegisterContextMemory::GetRegisterInfoAtIndex(size_t reg) {
+ return m_reg_infos.GetRegisterInfoAtIndex(reg);
}
-size_t
-RegisterContextMemory::GetRegisterSetCount ()
-{
- return m_reg_infos.GetNumRegisterSets ();
+size_t RegisterContextMemory::GetRegisterSetCount() {
+ return m_reg_infos.GetNumRegisterSets();
}
-const RegisterSet *
-RegisterContextMemory::GetRegisterSet (size_t reg_set)
-{
- return m_reg_infos.GetRegisterSet (reg_set);
+const RegisterSet *RegisterContextMemory::GetRegisterSet(size_t reg_set) {
+ return m_reg_infos.GetRegisterSet(reg_set);
}
-uint32_t
-RegisterContextMemory::ConvertRegisterKindToRegisterNumber (lldb::RegisterKind kind, uint32_t num)
-{
- return m_reg_infos.ConvertRegisterKindToRegisterNumber (kind, num);
+uint32_t RegisterContextMemory::ConvertRegisterKindToRegisterNumber(
+ lldb::RegisterKind kind, uint32_t num) {
+ return m_reg_infos.ConvertRegisterKindToRegisterNumber(kind, num);
}
-bool
-RegisterContextMemory::ReadRegister (const RegisterInfo *reg_info, RegisterValue ®_value)
-{
- const uint32_t reg_num = reg_info->kinds[eRegisterKindLLDB];
- if (!m_reg_valid[reg_num])
- {
- if (!ReadAllRegisterValues(m_reg_data.GetSharedDataBuffer ()))
- return false;
- }
- const bool partial_data_ok = false;
- return reg_value.SetValueFromData(reg_info, m_reg_data, reg_info->byte_offset, partial_data_ok).Success();
+bool RegisterContextMemory::ReadRegister(const RegisterInfo *reg_info,
+ RegisterValue ®_value) {
+ const uint32_t reg_num = reg_info->kinds[eRegisterKindLLDB];
+ if (!m_reg_valid[reg_num]) {
+ if (!ReadAllRegisterValues(m_reg_data.GetSharedDataBuffer()))
+ return false;
+ }
+ const bool partial_data_ok = false;
+ return reg_value
+ .SetValueFromData(reg_info, m_reg_data, reg_info->byte_offset,
+ partial_data_ok)
+ .Success();
}
-bool
-RegisterContextMemory::WriteRegister (const RegisterInfo *reg_info, const RegisterValue ®_value)
-{
- if (m_reg_data_addr != LLDB_INVALID_ADDRESS)
- {
- const uint32_t reg_num = reg_info->kinds[eRegisterKindLLDB];
- addr_t reg_addr = m_reg_data_addr + reg_info->byte_offset;
- Error error (WriteRegisterValueToMemory(reg_info, reg_addr, reg_info->byte_size, reg_value));
- m_reg_valid[reg_num] = false;
- return error.Success();
- }
- return false;
-}
-
-bool
-RegisterContextMemory::ReadAllRegisterValues (DataBufferSP &data_sp)
-{
- if (m_reg_data_addr != LLDB_INVALID_ADDRESS)
- {
- ProcessSP process_sp (CalculateProcess());
- if (process_sp)
- {
- Error error;
- if (process_sp->ReadMemory(m_reg_data_addr, data_sp->GetBytes(), data_sp->GetByteSize(), error) == data_sp->GetByteSize())
- {
- SetAllRegisterValid (true);
- return true;
- }
- }
+bool RegisterContextMemory::WriteRegister(const RegisterInfo *reg_info,
+ const RegisterValue ®_value) {
+ if (m_reg_data_addr != LLDB_INVALID_ADDRESS) {
+ const uint32_t reg_num = reg_info->kinds[eRegisterKindLLDB];
+ addr_t reg_addr = m_reg_data_addr + reg_info->byte_offset;
+ Error error(WriteRegisterValueToMemory(reg_info, reg_addr,
+ reg_info->byte_size, reg_value));
+ m_reg_valid[reg_num] = false;
+ return error.Success();
+ }
+ return false;
+}
+
+bool RegisterContextMemory::ReadAllRegisterValues(DataBufferSP &data_sp) {
+ if (m_reg_data_addr != LLDB_INVALID_ADDRESS) {
+ ProcessSP process_sp(CalculateProcess());
+ if (process_sp) {
+ Error error;
+ if (process_sp->ReadMemory(m_reg_data_addr, data_sp->GetBytes(),
+ data_sp->GetByteSize(),
+ error) == data_sp->GetByteSize()) {
+ SetAllRegisterValid(true);
+ return true;
+ }
}
- return false;
+ }
+ return false;
}
-bool
-RegisterContextMemory::WriteAllRegisterValues (const DataBufferSP &data_sp)
-{
- if (m_reg_data_addr != LLDB_INVALID_ADDRESS)
- {
- ProcessSP process_sp (CalculateProcess());
- if (process_sp)
- {
- Error error;
- SetAllRegisterValid (false);
- if (process_sp->WriteMemory(m_reg_data_addr, data_sp->GetBytes(), data_sp->GetByteSize(), error) == data_sp->GetByteSize())
- return true;
- }
+bool RegisterContextMemory::WriteAllRegisterValues(
+ const DataBufferSP &data_sp) {
+ if (m_reg_data_addr != LLDB_INVALID_ADDRESS) {
+ ProcessSP process_sp(CalculateProcess());
+ if (process_sp) {
+ Error error;
+ SetAllRegisterValid(false);
+ if (process_sp->WriteMemory(m_reg_data_addr, data_sp->GetBytes(),
+ data_sp->GetByteSize(),
+ error) == data_sp->GetByteSize())
+ return true;
}
- return false;
+ }
+ return false;
}
-void
-RegisterContextMemory::SetAllRegisterData (const lldb::DataBufferSP &data_sp)
-{
- m_reg_data.SetData(data_sp);
- SetAllRegisterValid (true);
+void RegisterContextMemory::SetAllRegisterData(
+ const lldb::DataBufferSP &data_sp) {
+ m_reg_data.SetData(data_sp);
+ SetAllRegisterValid(true);
}
Modified: lldb/trunk/source/Plugins/Process/Utility/RegisterContextMemory.h
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/source/Plugins/Process/Utility/RegisterContextMemory.h?rev=280751&r1=280750&r2=280751&view=diff
==============================================================================
--- lldb/trunk/source/Plugins/Process/Utility/RegisterContextMemory.h (original)
+++ lldb/trunk/source/Plugins/Process/Utility/RegisterContextMemory.h Tue Sep 6 15:57:50 2016
@@ -16,76 +16,65 @@
// Other libraries and framework includes
// Project includes
-#include "lldb/lldb-private.h"
#include "lldb/Core/DataExtractor.h"
#include "lldb/Target/RegisterContext.h"
+#include "lldb/lldb-private.h"
class DynamicRegisterInfo;
-class RegisterContextMemory : public lldb_private::RegisterContext
-{
+class RegisterContextMemory : public lldb_private::RegisterContext {
public:
- RegisterContextMemory (lldb_private::Thread &thread,
- uint32_t concrete_frame_idx,
- DynamicRegisterInfo ®_info,
- lldb::addr_t reg_data_addr);
-
- ~RegisterContextMemory() override;
-
- void
- InvalidateAllRegisters() override;
-
- size_t
- GetRegisterCount() override;
-
- const lldb_private::RegisterInfo *
- GetRegisterInfoAtIndex(size_t reg) override;
-
- size_t
- GetRegisterSetCount() override;
-
- const lldb_private::RegisterSet *
- GetRegisterSet(size_t reg_set) override;
-
- uint32_t
- ConvertRegisterKindToRegisterNumber(lldb::RegisterKind kind, uint32_t num) override;
-
- //------------------------------------------------------------------
- // If all of the thread register are in a contiguous buffer in
- // memory, then the default ReadRegister/WriteRegister and
- // ReadAllRegisterValues/WriteAllRegisterValues will work. If thread
- // registers are not contiguous, clients will want to subclass this
- // class and modify the read/write functions as needed.
- //------------------------------------------------------------------
-
- bool
- ReadRegister(const lldb_private::RegisterInfo *reg_info,
- lldb_private::RegisterValue ®_value) override;
-
- bool
- WriteRegister(const lldb_private::RegisterInfo *reg_info,
- const lldb_private::RegisterValue ®_value) override;
-
- bool
- ReadAllRegisterValues(lldb::DataBufferSP &data_sp) override;
-
- bool
- WriteAllRegisterValues(const lldb::DataBufferSP &data_sp) override;
+ RegisterContextMemory(lldb_private::Thread &thread,
+ uint32_t concrete_frame_idx,
+ DynamicRegisterInfo ®_info,
+ lldb::addr_t reg_data_addr);
+
+ ~RegisterContextMemory() override;
+
+ void InvalidateAllRegisters() override;
+
+ size_t GetRegisterCount() override;
+
+ const lldb_private::RegisterInfo *GetRegisterInfoAtIndex(size_t reg) override;
+
+ size_t GetRegisterSetCount() override;
+
+ const lldb_private::RegisterSet *GetRegisterSet(size_t reg_set) override;
+
+ uint32_t ConvertRegisterKindToRegisterNumber(lldb::RegisterKind kind,
+ uint32_t num) override;
+
+ //------------------------------------------------------------------
+ // If all of the thread register are in a contiguous buffer in
+ // memory, then the default ReadRegister/WriteRegister and
+ // ReadAllRegisterValues/WriteAllRegisterValues will work. If thread
+ // registers are not contiguous, clients will want to subclass this
+ // class and modify the read/write functions as needed.
+ //------------------------------------------------------------------
+
+ bool ReadRegister(const lldb_private::RegisterInfo *reg_info,
+ lldb_private::RegisterValue ®_value) override;
+
+ bool WriteRegister(const lldb_private::RegisterInfo *reg_info,
+ const lldb_private::RegisterValue ®_value) override;
+
+ bool ReadAllRegisterValues(lldb::DataBufferSP &data_sp) override;
+
+ bool WriteAllRegisterValues(const lldb::DataBufferSP &data_sp) override;
- void
- SetAllRegisterData (const lldb::DataBufferSP &data_sp);
+ void SetAllRegisterData(const lldb::DataBufferSP &data_sp);
protected:
- void
- SetAllRegisterValid (bool b);
+ void SetAllRegisterValid(bool b);
- DynamicRegisterInfo &m_reg_infos;
- std::vector<bool> m_reg_valid;
- lldb_private::DataExtractor m_reg_data;
- lldb::addr_t m_reg_data_addr; // If this is valid, then we have a register context that is stored in memmory
+ DynamicRegisterInfo &m_reg_infos;
+ std::vector<bool> m_reg_valid;
+ lldb_private::DataExtractor m_reg_data;
+ lldb::addr_t m_reg_data_addr; // If this is valid, then we have a register
+ // context that is stored in memmory
private:
- DISALLOW_COPY_AND_ASSIGN (RegisterContextMemory);
+ DISALLOW_COPY_AND_ASSIGN(RegisterContextMemory);
};
#endif // lldb_RegisterContextMemory_h_
Modified: lldb/trunk/source/Plugins/Process/Utility/RegisterContextNetBSD_x86_64.cpp
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/source/Plugins/Process/Utility/RegisterContextNetBSD_x86_64.cpp?rev=280751&r1=280750&r2=280751&view=diff
==============================================================================
--- lldb/trunk/source/Plugins/Process/Utility/RegisterContextNetBSD_x86_64.cpp (original)
+++ lldb/trunk/source/Plugins/Process/Utility/RegisterContextNetBSD_x86_64.cpp Tue Sep 6 15:57:50 2016
@@ -12,41 +12,40 @@
#include "llvm/Support/Compiler.h"
-#include "RegisterContextPOSIX_x86.h"
#include "RegisterContextNetBSD_x86_64.h"
+#include "RegisterContextPOSIX_x86.h"
using namespace lldb_private;
using namespace lldb;
// src/sys/arch/amd64/include/frame_regs.h
-typedef struct _GPR
-{
- uint64_t rdi; /* 0 */
- uint64_t rsi; /* 1 */
- uint64_t rdx; /* 2 */
- uint64_t rcx; /* 3 */
- uint64_t r8; /* 4 */
- uint64_t r9; /* 5 */
- uint64_t r10; /* 6 */
- uint64_t r11; /* 7 */
- uint64_t r12; /* 8 */
- uint64_t r13; /* 9 */
- uint64_t r14; /* 10 */
- uint64_t r15; /* 11 */
- uint64_t rbp; /* 12 */
- uint64_t rbx; /* 13 */
- uint64_t rax; /* 14 */
- uint64_t gs; /* 15 */
- uint64_t fs; /* 16 */
- uint64_t es; /* 17 */
- uint64_t ds; /* 18 */
- uint64_t trapno; /* 19 */
- uint64_t err; /* 20 */
- uint64_t rip; /* 21 */
- uint64_t cs; /* 22 */
- uint64_t rflags; /* 23 */
- uint64_t rsp; /* 24 */
- uint64_t ss; /* 25 */
+typedef struct _GPR {
+ uint64_t rdi; /* 0 */
+ uint64_t rsi; /* 1 */
+ uint64_t rdx; /* 2 */
+ uint64_t rcx; /* 3 */
+ uint64_t r8; /* 4 */
+ uint64_t r9; /* 5 */
+ uint64_t r10; /* 6 */
+ uint64_t r11; /* 7 */
+ uint64_t r12; /* 8 */
+ uint64_t r13; /* 9 */
+ uint64_t r14; /* 10 */
+ uint64_t r15; /* 11 */
+ uint64_t rbp; /* 12 */
+ uint64_t rbx; /* 13 */
+ uint64_t rax; /* 14 */
+ uint64_t gs; /* 15 */
+ uint64_t fs; /* 16 */
+ uint64_t es; /* 17 */
+ uint64_t ds; /* 18 */
+ uint64_t trapno; /* 19 */
+ uint64_t err; /* 20 */
+ uint64_t rip; /* 21 */
+ uint64_t cs; /* 22 */
+ uint64_t rflags; /* 23 */
+ uint64_t rsp; /* 24 */
+ uint64_t ss; /* 25 */
} GPR;
/*
@@ -65,38 +64,35 @@ typedef struct _GPR
*/
struct UserArea {
- GPR gpr;
- uint64_t mc_tlsbase;
- FPR fpr;
+ GPR gpr;
+ uint64_t mc_tlsbase;
+ FPR fpr;
};
-
//---------------------------------------------------------------------------
// Cherry-pick parts of RegisterInfos_x86_64.h, without debug registers
//---------------------------------------------------------------------------
// Computes the offset of the given GPR in the user data area.
-#define GPR_OFFSET(regname) \
- (LLVM_EXTENSION offsetof(GPR, regname))
+#define GPR_OFFSET(regname) (LLVM_EXTENSION offsetof(GPR, regname))
// Computes the offset of the given FPR in the extended data area.
-#define FPR_OFFSET(regname) \
- (LLVM_EXTENSION offsetof(UserArea, fpr) + \
- LLVM_EXTENSION offsetof(FPR, xstate) + \
- LLVM_EXTENSION offsetof(FXSAVE, regname))
+#define FPR_OFFSET(regname) \
+ (LLVM_EXTENSION offsetof(UserArea, fpr) + \
+ LLVM_EXTENSION offsetof(FPR, xstate) + \
+ LLVM_EXTENSION offsetof(FXSAVE, regname))
// Computes the offset of the YMM register assembled from register halves.
// Based on DNBArchImplX86_64.cpp from debugserver
-#define YMM_OFFSET(reg_index) \
- (LLVM_EXTENSION offsetof(UserArea, fpr) + \
- LLVM_EXTENSION offsetof(FPR, xstate) + \
- LLVM_EXTENSION offsetof(XSAVE, ymmh[0]) + \
- (32 * reg_index))
+#define YMM_OFFSET(reg_index) \
+ (LLVM_EXTENSION offsetof(UserArea, fpr) + \
+ LLVM_EXTENSION offsetof(FPR, xstate) + \
+ LLVM_EXTENSION offsetof(XSAVE, ymmh[0]) + (32 * reg_index))
// Number of bytes needed to represent a FPR.
-#define FPR_SIZE(reg) sizeof(((FXSAVE*)NULL)->reg)
+#define FPR_SIZE(reg) sizeof(((FXSAVE *)NULL)->reg)
// Number of bytes needed to represent the i'th FP register.
-#define FP_SIZE sizeof(((MMSReg*)NULL)->bytes)
+#define FP_SIZE sizeof(((MMSReg *)NULL)->bytes)
// Number of bytes needed to represent an XMM register.
#define XMM_SIZE sizeof(XMMReg)
@@ -107,197 +103,229 @@ struct UserArea {
// RegisterKind: EHFrame, DWARF, Generic, Process Plugin, LLDB
// Note that the size and offset will be updated by platform-specific classes.
-#define DEFINE_GPR(reg, alt, kind1, kind2, kind3, kind4) \
- { #reg, alt, sizeof(((GPR*)NULL)->reg), GPR_OFFSET(reg), eEncodingUint, \
- eFormatHex, { kind1, kind2, kind3, kind4, lldb_##reg##_x86_64 }, NULL, NULL }
-
-#define DEFINE_FPR(name, reg, kind1, kind2, kind3, kind4) \
- { #name, NULL, FPR_SIZE(reg), FPR_OFFSET(reg), eEncodingUint, \
- eFormatHex, { kind1, kind2, kind3, kind4, lldb_##name##_x86_64 }, NULL, NULL }
-
-#define DEFINE_FP_ST(reg, i) \
- { #reg#i, NULL, FP_SIZE, LLVM_EXTENSION FPR_OFFSET(stmm[i]), \
- eEncodingVector, eFormatVectorOfUInt8, \
- { dwarf_st##i##_x86_64, dwarf_st##i##_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, lldb_st##i##_x86_64 }, \
- NULL, NULL }
-
-#define DEFINE_FP_MM(reg, i) \
- { #reg#i, NULL, sizeof(uint64_t), LLVM_EXTENSION FPR_OFFSET(stmm[i]), \
- eEncodingUint, eFormatHex, \
- { dwarf_mm##i##_x86_64, dwarf_mm##i##_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, lldb_mm##i##_x86_64 }, \
- NULL, NULL }
-
-#define DEFINE_XMM(reg, i) \
- { #reg#i, NULL, XMM_SIZE, LLVM_EXTENSION FPR_OFFSET(reg[i]), \
- eEncodingVector, eFormatVectorOfUInt8, \
- { dwarf_##reg##i##_x86_64, dwarf_##reg##i##_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, lldb_##reg##i##_x86_64}, \
- NULL, NULL }
-
-#define DEFINE_YMM(reg, i) \
- { #reg#i, NULL, YMM_SIZE, LLVM_EXTENSION YMM_OFFSET(i), \
- eEncodingVector, eFormatVectorOfUInt8, \
- { dwarf_##reg##i##h_x86_64, dwarf_##reg##i##h_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, lldb_##reg##i##_x86_64 }, \
- NULL, NULL }
-
-#define DEFINE_GPR_PSEUDO_32(reg32, reg64) \
- { #reg32, NULL, 4, GPR_OFFSET(reg64), eEncodingUint, \
- eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, lldb_##reg32##_x86_64 }, RegisterContextPOSIX_x86::g_contained_##reg64, RegisterContextPOSIX_x86::g_invalidate_##reg64 }
-#define DEFINE_GPR_PSEUDO_16(reg16, reg64) \
- { #reg16, NULL, 2, GPR_OFFSET(reg64), eEncodingUint, \
- eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, lldb_##reg16##_x86_64 }, RegisterContextPOSIX_x86::g_contained_##reg64, RegisterContextPOSIX_x86::g_invalidate_##reg64 }
-#define DEFINE_GPR_PSEUDO_8H(reg8, reg64) \
- { #reg8, NULL, 1, GPR_OFFSET(reg64)+1, eEncodingUint, \
- eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, lldb_##reg8##_x86_64 }, RegisterContextPOSIX_x86::g_contained_##reg64, RegisterContextPOSIX_x86::g_invalidate_##reg64 }
-#define DEFINE_GPR_PSEUDO_8L(reg8, reg64) \
- { #reg8, NULL, 1, GPR_OFFSET(reg64), eEncodingUint, \
- eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, lldb_##reg8##_x86_64 }, RegisterContextPOSIX_x86::g_contained_##reg64, RegisterContextPOSIX_x86::g_invalidate_##reg64 }
-
-static RegisterInfo
-g_register_infos_x86_64[] =
-{
- // General purpose registers. EH_Frame, DWARF, Generic, Process Plugin
- DEFINE_GPR(rax, nullptr, dwarf_rax_x86_64, dwarf_rax_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
- DEFINE_GPR(rbx, nullptr, dwarf_rbx_x86_64, dwarf_rbx_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
- DEFINE_GPR(rcx, "arg4", dwarf_rcx_x86_64, dwarf_rcx_x86_64, LLDB_REGNUM_GENERIC_ARG4, LLDB_INVALID_REGNUM),
- DEFINE_GPR(rdx, "arg3", dwarf_rdx_x86_64, dwarf_rdx_x86_64, LLDB_REGNUM_GENERIC_ARG3, LLDB_INVALID_REGNUM),
- DEFINE_GPR(rdi, "arg1", dwarf_rdi_x86_64, dwarf_rdi_x86_64, LLDB_REGNUM_GENERIC_ARG1, LLDB_INVALID_REGNUM),
- DEFINE_GPR(rsi, "arg2", dwarf_rsi_x86_64, dwarf_rsi_x86_64, LLDB_REGNUM_GENERIC_ARG2, LLDB_INVALID_REGNUM),
- DEFINE_GPR(rbp, "fp", dwarf_rbp_x86_64, dwarf_rbp_x86_64, LLDB_REGNUM_GENERIC_FP, LLDB_INVALID_REGNUM),
- DEFINE_GPR(rsp, "sp", dwarf_rsp_x86_64, dwarf_rsp_x86_64, LLDB_REGNUM_GENERIC_SP, LLDB_INVALID_REGNUM),
- DEFINE_GPR(r8, "arg5", dwarf_r8_x86_64, dwarf_r8_x86_64, LLDB_REGNUM_GENERIC_ARG5, LLDB_INVALID_REGNUM),
- DEFINE_GPR(r9, "arg6", dwarf_r9_x86_64, dwarf_r9_x86_64, LLDB_REGNUM_GENERIC_ARG6, LLDB_INVALID_REGNUM),
- DEFINE_GPR(r10, nullptr, dwarf_r10_x86_64, dwarf_r10_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
- DEFINE_GPR(r11, nullptr, dwarf_r11_x86_64, dwarf_r11_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
- DEFINE_GPR(r12, nullptr, dwarf_r12_x86_64, dwarf_r12_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
- DEFINE_GPR(r13, nullptr, dwarf_r13_x86_64, dwarf_r13_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
- DEFINE_GPR(r14, nullptr, dwarf_r14_x86_64, dwarf_r14_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
- DEFINE_GPR(r15, nullptr, dwarf_r15_x86_64, dwarf_r15_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
- DEFINE_GPR(rip, "pc", dwarf_rip_x86_64, dwarf_rip_x86_64, LLDB_REGNUM_GENERIC_PC, LLDB_INVALID_REGNUM),
- DEFINE_GPR(rflags, "flags", dwarf_rflags_x86_64, dwarf_rflags_x86_64, LLDB_REGNUM_GENERIC_FLAGS, LLDB_INVALID_REGNUM),
- DEFINE_GPR(cs, nullptr, dwarf_cs_x86_64, dwarf_cs_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
- DEFINE_GPR(fs, nullptr, dwarf_fs_x86_64, dwarf_fs_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
- DEFINE_GPR(gs, nullptr, dwarf_gs_x86_64, dwarf_gs_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
- DEFINE_GPR(ss, nullptr, dwarf_ss_x86_64, dwarf_ss_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
- DEFINE_GPR(ds, nullptr, dwarf_ds_x86_64, dwarf_ds_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
- DEFINE_GPR(es, nullptr, dwarf_es_x86_64, dwarf_es_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
-
- DEFINE_GPR_PSEUDO_32(eax, rax),
- DEFINE_GPR_PSEUDO_32(ebx, rbx),
- DEFINE_GPR_PSEUDO_32(ecx, rcx),
- DEFINE_GPR_PSEUDO_32(edx, rdx),
- DEFINE_GPR_PSEUDO_32(edi, rdi),
- DEFINE_GPR_PSEUDO_32(esi, rsi),
- DEFINE_GPR_PSEUDO_32(ebp, rbp),
- DEFINE_GPR_PSEUDO_32(esp, rsp),
- DEFINE_GPR_PSEUDO_32(r8d, r8),
- DEFINE_GPR_PSEUDO_32(r9d, r9),
- DEFINE_GPR_PSEUDO_32(r10d, r10),
- DEFINE_GPR_PSEUDO_32(r11d, r11),
- DEFINE_GPR_PSEUDO_32(r12d, r12),
- DEFINE_GPR_PSEUDO_32(r13d, r13),
- DEFINE_GPR_PSEUDO_32(r14d, r14),
- DEFINE_GPR_PSEUDO_32(r15d, r15),
- DEFINE_GPR_PSEUDO_16(ax, rax),
- DEFINE_GPR_PSEUDO_16(bx, rbx),
- DEFINE_GPR_PSEUDO_16(cx, rcx),
- DEFINE_GPR_PSEUDO_16(dx, rdx),
- DEFINE_GPR_PSEUDO_16(di, rdi),
- DEFINE_GPR_PSEUDO_16(si, rsi),
- DEFINE_GPR_PSEUDO_16(bp, rbp),
- DEFINE_GPR_PSEUDO_16(sp, rsp),
- DEFINE_GPR_PSEUDO_16(r8w, r8),
- DEFINE_GPR_PSEUDO_16(r9w, r9),
- DEFINE_GPR_PSEUDO_16(r10w, r10),
- DEFINE_GPR_PSEUDO_16(r11w, r11),
- DEFINE_GPR_PSEUDO_16(r12w, r12),
- DEFINE_GPR_PSEUDO_16(r13w, r13),
- DEFINE_GPR_PSEUDO_16(r14w, r14),
- DEFINE_GPR_PSEUDO_16(r15w, r15),
- DEFINE_GPR_PSEUDO_8H(ah, rax),
- DEFINE_GPR_PSEUDO_8H(bh, rbx),
- DEFINE_GPR_PSEUDO_8H(ch, rcx),
- DEFINE_GPR_PSEUDO_8H(dh, rdx),
- DEFINE_GPR_PSEUDO_8L(al, rax),
- DEFINE_GPR_PSEUDO_8L(bl, rbx),
- DEFINE_GPR_PSEUDO_8L(cl, rcx),
- DEFINE_GPR_PSEUDO_8L(dl, rdx),
- DEFINE_GPR_PSEUDO_8L(dil, rdi),
- DEFINE_GPR_PSEUDO_8L(sil, rsi),
- DEFINE_GPR_PSEUDO_8L(bpl, rbp),
- DEFINE_GPR_PSEUDO_8L(spl, rsp),
- DEFINE_GPR_PSEUDO_8L(r8l, r8),
- DEFINE_GPR_PSEUDO_8L(r9l, r9),
- DEFINE_GPR_PSEUDO_8L(r10l, r10),
- DEFINE_GPR_PSEUDO_8L(r11l, r11),
- DEFINE_GPR_PSEUDO_8L(r12l, r12),
- DEFINE_GPR_PSEUDO_8L(r13l, r13),
- DEFINE_GPR_PSEUDO_8L(r14l, r14),
- DEFINE_GPR_PSEUDO_8L(r15l, r15),
-
- // i387 Floating point registers. EH_frame, DWARF, Generic, Process Plugin
- DEFINE_FPR(fctrl, fctrl, dwarf_fctrl_x86_64, dwarf_fctrl_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
- DEFINE_FPR(fstat, fstat, dwarf_fstat_x86_64, dwarf_fstat_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
- DEFINE_FPR(ftag, ftag, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
- DEFINE_FPR(fop, fop, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
- DEFINE_FPR(fiseg, ptr.i386_.fiseg, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
- DEFINE_FPR(fioff, ptr.i386_.fioff, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
- DEFINE_FPR(foseg, ptr.i386_.foseg, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
- DEFINE_FPR(fooff, ptr.i386_.fooff, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
- DEFINE_FPR(mxcsr, mxcsr, dwarf_mxcsr_x86_64, dwarf_mxcsr_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
- DEFINE_FPR(mxcsrmask, mxcsrmask, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
+#define DEFINE_GPR(reg, alt, kind1, kind2, kind3, kind4) \
+ { \
+ #reg, alt, sizeof(((GPR *) NULL)->reg), \
+ GPR_OFFSET(reg), eEncodingUint, eFormatHex, \
+ {kind1, kind2, kind3, kind4, \
+ lldb_##reg##_x86_64 }, \
+ NULL, NULL \
+ }
+
+#define DEFINE_FPR(name, reg, kind1, kind2, kind3, kind4) \
+ { \
+ #name, NULL, FPR_SIZE(reg), FPR_OFFSET(reg), eEncodingUint, eFormatHex, \
+ {kind1, kind2, kind3, kind4, \
+ lldb_##name##_x86_64 }, \
+ NULL, NULL \
+ }
+
+#define DEFINE_FP_ST(reg, i) \
+ { \
+ #reg #i, NULL, FP_SIZE, \
+ LLVM_EXTENSION FPR_OFFSET( \
+ stmm[i]), eEncodingVector, eFormatVectorOfUInt8, \
+ {dwarf_st##i##_x86_64, dwarf_st##i##_x86_64, LLDB_INVALID_REGNUM, \
+ LLDB_INVALID_REGNUM, lldb_st##i##_x86_64 }, \
+ NULL, NULL \
+ }
+
+#define DEFINE_FP_MM(reg, i) \
+ { \
+ #reg #i, NULL, sizeof(uint64_t), \
+ LLVM_EXTENSION FPR_OFFSET( \
+ stmm[i]), eEncodingUint, eFormatHex, \
+ {dwarf_mm##i##_x86_64, dwarf_mm##i##_x86_64, \
+ LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \
+ lldb_mm##i##_x86_64 }, \
+ NULL, NULL \
+ }
+
+#define DEFINE_XMM(reg, i) \
+ { \
+ #reg #i, NULL, XMM_SIZE, \
+ LLVM_EXTENSION FPR_OFFSET( \
+ reg[i]), eEncodingVector, eFormatVectorOfUInt8, \
+ {dwarf_##reg##i##_x86_64, dwarf_##reg##i##_x86_64, \
+ LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \
+ lldb_##reg##i##_x86_64 }, \
+ NULL, NULL \
+ }
+
+#define DEFINE_YMM(reg, i) \
+ { \
+ #reg #i, NULL, YMM_SIZE, \
+ LLVM_EXTENSION YMM_OFFSET(i), eEncodingVector, eFormatVectorOfUInt8, \
+ {dwarf_##reg##i##h_x86_64, \
+ dwarf_##reg##i##h_x86_64, \
+ LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \
+ lldb_##reg##i##_x86_64 }, \
+ NULL, NULL \
+ }
+
+#define DEFINE_GPR_PSEUDO_32(reg32, reg64) \
+ { \
+ #reg32, NULL, 4, \
+ GPR_OFFSET(reg64), eEncodingUint, eFormatHex, \
+ {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \
+ LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \
+ lldb_##reg32##_x86_64 }, \
+ RegisterContextPOSIX_x86::g_contained_##reg64, \
+ RegisterContextPOSIX_x86::g_invalidate_##reg64 \
+ }
+#define DEFINE_GPR_PSEUDO_16(reg16, reg64) \
+ { \
+ #reg16, NULL, 2, \
+ GPR_OFFSET(reg64), eEncodingUint, eFormatHex, \
+ {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \
+ LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \
+ lldb_##reg16##_x86_64 }, \
+ RegisterContextPOSIX_x86::g_contained_##reg64, \
+ RegisterContextPOSIX_x86::g_invalidate_##reg64 \
+ }
+#define DEFINE_GPR_PSEUDO_8H(reg8, reg64) \
+ { \
+ #reg8, NULL, 1, GPR_OFFSET(reg64) + 1, eEncodingUint, eFormatHex, \
+ {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \
+ LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \
+ lldb_##reg8##_x86_64 }, \
+ RegisterContextPOSIX_x86::g_contained_##reg64, \
+ RegisterContextPOSIX_x86::g_invalidate_##reg64 \
+ }
+#define DEFINE_GPR_PSEUDO_8L(reg8, reg64) \
+ { \
+ #reg8, NULL, 1, GPR_OFFSET(reg64), eEncodingUint, eFormatHex, \
+ {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \
+ LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \
+ lldb_##reg8##_x86_64 }, \
+ RegisterContextPOSIX_x86::g_contained_##reg64, \
+ RegisterContextPOSIX_x86::g_invalidate_##reg64 \
+ }
+
+static RegisterInfo g_register_infos_x86_64[] = {
+ // General purpose registers. EH_Frame, DWARF,
+ // Generic, Process Plugin
+ DEFINE_GPR(rax, nullptr, dwarf_rax_x86_64, dwarf_rax_x86_64,
+ LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
+ DEFINE_GPR(rbx, nullptr, dwarf_rbx_x86_64, dwarf_rbx_x86_64,
+ LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
+ DEFINE_GPR(rcx, "arg4", dwarf_rcx_x86_64, dwarf_rcx_x86_64,
+ LLDB_REGNUM_GENERIC_ARG4, LLDB_INVALID_REGNUM),
+ DEFINE_GPR(rdx, "arg3", dwarf_rdx_x86_64, dwarf_rdx_x86_64,
+ LLDB_REGNUM_GENERIC_ARG3, LLDB_INVALID_REGNUM),
+ DEFINE_GPR(rdi, "arg1", dwarf_rdi_x86_64, dwarf_rdi_x86_64,
+ LLDB_REGNUM_GENERIC_ARG1, LLDB_INVALID_REGNUM),
+ DEFINE_GPR(rsi, "arg2", dwarf_rsi_x86_64, dwarf_rsi_x86_64,
+ LLDB_REGNUM_GENERIC_ARG2, LLDB_INVALID_REGNUM),
+ DEFINE_GPR(rbp, "fp", dwarf_rbp_x86_64, dwarf_rbp_x86_64,
+ LLDB_REGNUM_GENERIC_FP, LLDB_INVALID_REGNUM),
+ DEFINE_GPR(rsp, "sp", dwarf_rsp_x86_64, dwarf_rsp_x86_64,
+ LLDB_REGNUM_GENERIC_SP, LLDB_INVALID_REGNUM),
+ DEFINE_GPR(r8, "arg5", dwarf_r8_x86_64, dwarf_r8_x86_64,
+ LLDB_REGNUM_GENERIC_ARG5, LLDB_INVALID_REGNUM),
+ DEFINE_GPR(r9, "arg6", dwarf_r9_x86_64, dwarf_r9_x86_64,
+ LLDB_REGNUM_GENERIC_ARG6, LLDB_INVALID_REGNUM),
+ DEFINE_GPR(r10, nullptr, dwarf_r10_x86_64, dwarf_r10_x86_64,
+ LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
+ DEFINE_GPR(r11, nullptr, dwarf_r11_x86_64, dwarf_r11_x86_64,
+ LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
+ DEFINE_GPR(r12, nullptr, dwarf_r12_x86_64, dwarf_r12_x86_64,
+ LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
+ DEFINE_GPR(r13, nullptr, dwarf_r13_x86_64, dwarf_r13_x86_64,
+ LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
+ DEFINE_GPR(r14, nullptr, dwarf_r14_x86_64, dwarf_r14_x86_64,
+ LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
+ DEFINE_GPR(r15, nullptr, dwarf_r15_x86_64, dwarf_r15_x86_64,
+ LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
+ DEFINE_GPR(rip, "pc", dwarf_rip_x86_64, dwarf_rip_x86_64,
+ LLDB_REGNUM_GENERIC_PC, LLDB_INVALID_REGNUM),
+ DEFINE_GPR(rflags, "flags", dwarf_rflags_x86_64, dwarf_rflags_x86_64,
+ LLDB_REGNUM_GENERIC_FLAGS, LLDB_INVALID_REGNUM),
+ DEFINE_GPR(cs, nullptr, dwarf_cs_x86_64, dwarf_cs_x86_64,
+ LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
+ DEFINE_GPR(fs, nullptr, dwarf_fs_x86_64, dwarf_fs_x86_64,
+ LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
+ DEFINE_GPR(gs, nullptr, dwarf_gs_x86_64, dwarf_gs_x86_64,
+ LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
+ DEFINE_GPR(ss, nullptr, dwarf_ss_x86_64, dwarf_ss_x86_64,
+ LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
+ DEFINE_GPR(ds, nullptr, dwarf_ds_x86_64, dwarf_ds_x86_64,
+ LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
+ DEFINE_GPR(es, nullptr, dwarf_es_x86_64, dwarf_es_x86_64,
+ LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
+
+ DEFINE_GPR_PSEUDO_32(eax, rax), DEFINE_GPR_PSEUDO_32(ebx, rbx),
+ DEFINE_GPR_PSEUDO_32(ecx, rcx), DEFINE_GPR_PSEUDO_32(edx, rdx),
+ DEFINE_GPR_PSEUDO_32(edi, rdi), DEFINE_GPR_PSEUDO_32(esi, rsi),
+ DEFINE_GPR_PSEUDO_32(ebp, rbp), DEFINE_GPR_PSEUDO_32(esp, rsp),
+ DEFINE_GPR_PSEUDO_32(r8d, r8), DEFINE_GPR_PSEUDO_32(r9d, r9),
+ DEFINE_GPR_PSEUDO_32(r10d, r10), DEFINE_GPR_PSEUDO_32(r11d, r11),
+ DEFINE_GPR_PSEUDO_32(r12d, r12), DEFINE_GPR_PSEUDO_32(r13d, r13),
+ DEFINE_GPR_PSEUDO_32(r14d, r14), DEFINE_GPR_PSEUDO_32(r15d, r15),
+ DEFINE_GPR_PSEUDO_16(ax, rax), DEFINE_GPR_PSEUDO_16(bx, rbx),
+ DEFINE_GPR_PSEUDO_16(cx, rcx), DEFINE_GPR_PSEUDO_16(dx, rdx),
+ DEFINE_GPR_PSEUDO_16(di, rdi), DEFINE_GPR_PSEUDO_16(si, rsi),
+ DEFINE_GPR_PSEUDO_16(bp, rbp), DEFINE_GPR_PSEUDO_16(sp, rsp),
+ DEFINE_GPR_PSEUDO_16(r8w, r8), DEFINE_GPR_PSEUDO_16(r9w, r9),
+ DEFINE_GPR_PSEUDO_16(r10w, r10), DEFINE_GPR_PSEUDO_16(r11w, r11),
+ DEFINE_GPR_PSEUDO_16(r12w, r12), DEFINE_GPR_PSEUDO_16(r13w, r13),
+ DEFINE_GPR_PSEUDO_16(r14w, r14), DEFINE_GPR_PSEUDO_16(r15w, r15),
+ DEFINE_GPR_PSEUDO_8H(ah, rax), DEFINE_GPR_PSEUDO_8H(bh, rbx),
+ DEFINE_GPR_PSEUDO_8H(ch, rcx), DEFINE_GPR_PSEUDO_8H(dh, rdx),
+ DEFINE_GPR_PSEUDO_8L(al, rax), DEFINE_GPR_PSEUDO_8L(bl, rbx),
+ DEFINE_GPR_PSEUDO_8L(cl, rcx), DEFINE_GPR_PSEUDO_8L(dl, rdx),
+ DEFINE_GPR_PSEUDO_8L(dil, rdi), DEFINE_GPR_PSEUDO_8L(sil, rsi),
+ DEFINE_GPR_PSEUDO_8L(bpl, rbp), DEFINE_GPR_PSEUDO_8L(spl, rsp),
+ DEFINE_GPR_PSEUDO_8L(r8l, r8), DEFINE_GPR_PSEUDO_8L(r9l, r9),
+ DEFINE_GPR_PSEUDO_8L(r10l, r10), DEFINE_GPR_PSEUDO_8L(r11l, r11),
+ DEFINE_GPR_PSEUDO_8L(r12l, r12), DEFINE_GPR_PSEUDO_8L(r13l, r13),
+ DEFINE_GPR_PSEUDO_8L(r14l, r14), DEFINE_GPR_PSEUDO_8L(r15l, r15),
+
+ // i387 Floating point registers. EH_frame,
+ // DWARF, Generic, Process Plugin
+ DEFINE_FPR(fctrl, fctrl, dwarf_fctrl_x86_64, dwarf_fctrl_x86_64,
+ LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
+ DEFINE_FPR(fstat, fstat, dwarf_fstat_x86_64, dwarf_fstat_x86_64,
+ LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
+ DEFINE_FPR(ftag, ftag, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
+ DEFINE_FPR(fop, fop, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
+ DEFINE_FPR(fiseg, ptr.i386_.fiseg, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
+ DEFINE_FPR(fioff, ptr.i386_.fioff, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
+ DEFINE_FPR(foseg, ptr.i386_.foseg, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
+ DEFINE_FPR(fooff, ptr.i386_.fooff, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
+ DEFINE_FPR(mxcsr, mxcsr, dwarf_mxcsr_x86_64, dwarf_mxcsr_x86_64,
+ LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
+ DEFINE_FPR(mxcsrmask, mxcsrmask, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
// FP registers.
- DEFINE_FP_ST(st, 0),
- DEFINE_FP_ST(st, 1),
- DEFINE_FP_ST(st, 2),
- DEFINE_FP_ST(st, 3),
- DEFINE_FP_ST(st, 4),
- DEFINE_FP_ST(st, 5),
- DEFINE_FP_ST(st, 6),
- DEFINE_FP_ST(st, 7),
- DEFINE_FP_MM(mm, 0),
- DEFINE_FP_MM(mm, 1),
- DEFINE_FP_MM(mm, 2),
- DEFINE_FP_MM(mm, 3),
- DEFINE_FP_MM(mm, 4),
- DEFINE_FP_MM(mm, 5),
- DEFINE_FP_MM(mm, 6),
+ DEFINE_FP_ST(st, 0), DEFINE_FP_ST(st, 1), DEFINE_FP_ST(st, 2),
+ DEFINE_FP_ST(st, 3), DEFINE_FP_ST(st, 4), DEFINE_FP_ST(st, 5),
+ DEFINE_FP_ST(st, 6), DEFINE_FP_ST(st, 7), DEFINE_FP_MM(mm, 0),
+ DEFINE_FP_MM(mm, 1), DEFINE_FP_MM(mm, 2), DEFINE_FP_MM(mm, 3),
+ DEFINE_FP_MM(mm, 4), DEFINE_FP_MM(mm, 5), DEFINE_FP_MM(mm, 6),
DEFINE_FP_MM(mm, 7),
// XMM registers
- DEFINE_XMM(xmm, 0),
- DEFINE_XMM(xmm, 1),
- DEFINE_XMM(xmm, 2),
- DEFINE_XMM(xmm, 3),
- DEFINE_XMM(xmm, 4),
- DEFINE_XMM(xmm, 5),
- DEFINE_XMM(xmm, 6),
- DEFINE_XMM(xmm, 7),
- DEFINE_XMM(xmm, 8),
- DEFINE_XMM(xmm, 9),
- DEFINE_XMM(xmm, 10),
- DEFINE_XMM(xmm, 11),
- DEFINE_XMM(xmm, 12),
- DEFINE_XMM(xmm, 13),
- DEFINE_XMM(xmm, 14),
+ DEFINE_XMM(xmm, 0), DEFINE_XMM(xmm, 1), DEFINE_XMM(xmm, 2),
+ DEFINE_XMM(xmm, 3), DEFINE_XMM(xmm, 4), DEFINE_XMM(xmm, 5),
+ DEFINE_XMM(xmm, 6), DEFINE_XMM(xmm, 7), DEFINE_XMM(xmm, 8),
+ DEFINE_XMM(xmm, 9), DEFINE_XMM(xmm, 10), DEFINE_XMM(xmm, 11),
+ DEFINE_XMM(xmm, 12), DEFINE_XMM(xmm, 13), DEFINE_XMM(xmm, 14),
DEFINE_XMM(xmm, 15),
// Copy of YMM registers assembled from xmm and ymmh
- DEFINE_YMM(ymm, 0),
- DEFINE_YMM(ymm, 1),
- DEFINE_YMM(ymm, 2),
- DEFINE_YMM(ymm, 3),
- DEFINE_YMM(ymm, 4),
- DEFINE_YMM(ymm, 5),
- DEFINE_YMM(ymm, 6),
- DEFINE_YMM(ymm, 7),
- DEFINE_YMM(ymm, 8),
- DEFINE_YMM(ymm, 9),
- DEFINE_YMM(ymm, 10),
- DEFINE_YMM(ymm, 11),
- DEFINE_YMM(ymm, 12),
- DEFINE_YMM(ymm, 13),
- DEFINE_YMM(ymm, 14),
+ DEFINE_YMM(ymm, 0), DEFINE_YMM(ymm, 1), DEFINE_YMM(ymm, 2),
+ DEFINE_YMM(ymm, 3), DEFINE_YMM(ymm, 4), DEFINE_YMM(ymm, 5),
+ DEFINE_YMM(ymm, 6), DEFINE_YMM(ymm, 7), DEFINE_YMM(ymm, 8),
+ DEFINE_YMM(ymm, 9), DEFINE_YMM(ymm, 10), DEFINE_YMM(ymm, 11),
+ DEFINE_YMM(ymm, 12), DEFINE_YMM(ymm, 13), DEFINE_YMM(ymm, 14),
DEFINE_YMM(ymm, 15),
};
@@ -306,52 +334,40 @@ g_register_infos_x86_64[] =
//---------------------------------------------------------------------------
static const RegisterInfo *
-PrivateGetRegisterInfoPtr (const lldb_private::ArchSpec& target_arch)
-{
- switch (target_arch.GetMachine())
- {
- case llvm::Triple::x86_64:
- return g_register_infos_x86_64;
- default:
- assert(false && "Unhandled target architecture.");
- return nullptr;
- }
+PrivateGetRegisterInfoPtr(const lldb_private::ArchSpec &target_arch) {
+ switch (target_arch.GetMachine()) {
+ case llvm::Triple::x86_64:
+ return g_register_infos_x86_64;
+ default:
+ assert(false && "Unhandled target architecture.");
+ return nullptr;
+ }
}
static uint32_t
-PrivateGetRegisterCount (const lldb_private::ArchSpec& target_arch)
-{
- switch (target_arch.GetMachine())
- {
- case llvm::Triple::x86_64:
- return static_cast<uint32_t> (sizeof (g_register_infos_x86_64) / sizeof (g_register_infos_x86_64 [0]));
- default:
- assert(false && "Unhandled target architecture.");
- return 0;
- }
+PrivateGetRegisterCount(const lldb_private::ArchSpec &target_arch) {
+ switch (target_arch.GetMachine()) {
+ case llvm::Triple::x86_64:
+ return static_cast<uint32_t>(sizeof(g_register_infos_x86_64) /
+ sizeof(g_register_infos_x86_64[0]));
+ default:
+ assert(false && "Unhandled target architecture.");
+ return 0;
+ }
}
-RegisterContextNetBSD_x86_64::RegisterContextNetBSD_x86_64(const ArchSpec &target_arch) :
- lldb_private::RegisterInfoInterface(target_arch),
- m_register_info_p (PrivateGetRegisterInfoPtr (target_arch)),
- m_register_count (PrivateGetRegisterCount (target_arch))
-{
-}
+RegisterContextNetBSD_x86_64::RegisterContextNetBSD_x86_64(
+ const ArchSpec &target_arch)
+ : lldb_private::RegisterInfoInterface(target_arch),
+ m_register_info_p(PrivateGetRegisterInfoPtr(target_arch)),
+ m_register_count(PrivateGetRegisterCount(target_arch)) {}
-size_t
-RegisterContextNetBSD_x86_64::GetGPRSize() const
-{
- return sizeof(GPR);
-}
+size_t RegisterContextNetBSD_x86_64::GetGPRSize() const { return sizeof(GPR); }
-const RegisterInfo *
-RegisterContextNetBSD_x86_64::GetRegisterInfo() const
-{
- return m_register_info_p;
+const RegisterInfo *RegisterContextNetBSD_x86_64::GetRegisterInfo() const {
+ return m_register_info_p;
}
-uint32_t
-RegisterContextNetBSD_x86_64::GetRegisterCount () const
-{
- return m_register_count;
+uint32_t RegisterContextNetBSD_x86_64::GetRegisterCount() const {
+ return m_register_count;
}
Modified: lldb/trunk/source/Plugins/Process/Utility/RegisterContextNetBSD_x86_64.h
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/source/Plugins/Process/Utility/RegisterContextNetBSD_x86_64.h?rev=280751&r1=280750&r2=280751&view=diff
==============================================================================
--- lldb/trunk/source/Plugins/Process/Utility/RegisterContextNetBSD_x86_64.h (original)
+++ lldb/trunk/source/Plugins/Process/Utility/RegisterContextNetBSD_x86_64.h Tue Sep 6 15:57:50 2016
@@ -12,24 +12,20 @@
#include "RegisterInfoInterface.h"
-class RegisterContextNetBSD_x86_64:
- public lldb_private::RegisterInfoInterface
-{
+class RegisterContextNetBSD_x86_64
+ : public lldb_private::RegisterInfoInterface {
public:
- RegisterContextNetBSD_x86_64(const lldb_private::ArchSpec &target_arch);
+ RegisterContextNetBSD_x86_64(const lldb_private::ArchSpec &target_arch);
- size_t
- GetGPRSize() const override;
+ size_t GetGPRSize() const override;
- const lldb_private::RegisterInfo *
- GetRegisterInfo() const override;
+ const lldb_private::RegisterInfo *GetRegisterInfo() const override;
- uint32_t
- GetRegisterCount () const override;
+ uint32_t GetRegisterCount() const override;
private:
- const lldb_private::RegisterInfo *m_register_info_p;
- const uint32_t m_register_count;
+ const lldb_private::RegisterInfo *m_register_info_p;
+ const uint32_t m_register_count;
};
#endif
Modified: lldb/trunk/source/Plugins/Process/Utility/RegisterContextPOSIX_arm.cpp
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/source/Plugins/Process/Utility/RegisterContextPOSIX_arm.cpp?rev=280751&r1=280750&r2=280751&view=diff
==============================================================================
--- lldb/trunk/source/Plugins/Process/Utility/RegisterContextPOSIX_arm.cpp (original)
+++ lldb/trunk/source/Plugins/Process/Utility/RegisterContextPOSIX_arm.cpp Tue Sep 6 15:57:50 2016
@@ -15,321 +15,204 @@
#include "lldb/Core/DataExtractor.h"
#include "lldb/Core/RegisterValue.h"
#include "lldb/Core/Scalar.h"
+#include "lldb/Host/Endian.h"
#include "lldb/Target/Target.h"
#include "lldb/Target/Thread.h"
-#include "lldb/Host/Endian.h"
#include "llvm/Support/Compiler.h"
-#include "RegisterContextPOSIX_arm.h"
#include "Plugins/Process/elf-core/ProcessElfCore.h"
+#include "RegisterContextPOSIX_arm.h"
using namespace lldb;
using namespace lldb_private;
// arm general purpose registers.
-const uint32_t g_gpr_regnums_arm[] =
-{
- gpr_r0_arm,
- gpr_r1_arm,
- gpr_r2_arm,
- gpr_r3_arm,
- gpr_r4_arm,
- gpr_r5_arm,
- gpr_r6_arm,
- gpr_r7_arm,
- gpr_r8_arm,
- gpr_r9_arm,
- gpr_r10_arm,
- gpr_r11_arm,
- gpr_r12_arm,
- gpr_sp_arm,
- gpr_lr_arm,
- gpr_pc_arm,
- gpr_cpsr_arm,
+const uint32_t g_gpr_regnums_arm[] = {
+ gpr_r0_arm, gpr_r1_arm, gpr_r2_arm, gpr_r3_arm, gpr_r4_arm,
+ gpr_r5_arm, gpr_r6_arm, gpr_r7_arm, gpr_r8_arm, gpr_r9_arm,
+ gpr_r10_arm, gpr_r11_arm, gpr_r12_arm, gpr_sp_arm, gpr_lr_arm,
+ gpr_pc_arm, gpr_cpsr_arm,
LLDB_INVALID_REGNUM // register sets need to end with this flag
};
-static_assert(((sizeof g_gpr_regnums_arm / sizeof g_gpr_regnums_arm[0]) - 1) == k_num_gpr_registers_arm, \
+static_assert(((sizeof g_gpr_regnums_arm / sizeof g_gpr_regnums_arm[0]) - 1) ==
+ k_num_gpr_registers_arm,
"g_gpr_regnums_arm has wrong number of register infos");
// arm floating point registers.
-static const uint32_t g_fpu_regnums_arm[] =
-{
- fpu_s0_arm,
- fpu_s1_arm,
- fpu_s2_arm,
- fpu_s3_arm,
- fpu_s4_arm,
- fpu_s5_arm,
- fpu_s6_arm,
- fpu_s7_arm,
- fpu_s8_arm,
- fpu_s9_arm,
- fpu_s10_arm,
- fpu_s11_arm,
- fpu_s12_arm,
- fpu_s13_arm,
- fpu_s14_arm,
- fpu_s15_arm,
- fpu_s16_arm,
- fpu_s17_arm,
- fpu_s18_arm,
- fpu_s19_arm,
- fpu_s20_arm,
- fpu_s21_arm,
- fpu_s22_arm,
- fpu_s23_arm,
- fpu_s24_arm,
- fpu_s25_arm,
- fpu_s26_arm,
- fpu_s27_arm,
- fpu_s28_arm,
- fpu_s29_arm,
- fpu_s30_arm,
- fpu_s31_arm,
- fpu_fpscr_arm,
- fpu_d0_arm,
- fpu_d1_arm,
- fpu_d2_arm,
- fpu_d3_arm,
- fpu_d4_arm,
- fpu_d5_arm,
- fpu_d6_arm,
- fpu_d7_arm,
- fpu_d8_arm,
- fpu_d9_arm,
- fpu_d10_arm,
- fpu_d11_arm,
- fpu_d12_arm,
- fpu_d13_arm,
- fpu_d14_arm,
- fpu_d15_arm,
- fpu_d16_arm,
- fpu_d17_arm,
- fpu_d18_arm,
- fpu_d19_arm,
- fpu_d20_arm,
- fpu_d21_arm,
- fpu_d22_arm,
- fpu_d23_arm,
- fpu_d24_arm,
- fpu_d25_arm,
- fpu_d26_arm,
- fpu_d27_arm,
- fpu_d28_arm,
- fpu_d29_arm,
- fpu_d30_arm,
- fpu_d31_arm,
- fpu_q0_arm,
- fpu_q1_arm,
- fpu_q2_arm,
- fpu_q3_arm,
- fpu_q4_arm,
- fpu_q5_arm,
- fpu_q6_arm,
- fpu_q7_arm,
- fpu_q8_arm,
- fpu_q9_arm,
- fpu_q10_arm,
- fpu_q11_arm,
- fpu_q12_arm,
- fpu_q13_arm,
- fpu_q14_arm,
+static const uint32_t g_fpu_regnums_arm[] = {
+ fpu_s0_arm, fpu_s1_arm, fpu_s2_arm, fpu_s3_arm, fpu_s4_arm,
+ fpu_s5_arm, fpu_s6_arm, fpu_s7_arm, fpu_s8_arm, fpu_s9_arm,
+ fpu_s10_arm, fpu_s11_arm, fpu_s12_arm, fpu_s13_arm, fpu_s14_arm,
+ fpu_s15_arm, fpu_s16_arm, fpu_s17_arm, fpu_s18_arm, fpu_s19_arm,
+ fpu_s20_arm, fpu_s21_arm, fpu_s22_arm, fpu_s23_arm, fpu_s24_arm,
+ fpu_s25_arm, fpu_s26_arm, fpu_s27_arm, fpu_s28_arm, fpu_s29_arm,
+ fpu_s30_arm, fpu_s31_arm, fpu_fpscr_arm, fpu_d0_arm, fpu_d1_arm,
+ fpu_d2_arm, fpu_d3_arm, fpu_d4_arm, fpu_d5_arm, fpu_d6_arm,
+ fpu_d7_arm, fpu_d8_arm, fpu_d9_arm, fpu_d10_arm, fpu_d11_arm,
+ fpu_d12_arm, fpu_d13_arm, fpu_d14_arm, fpu_d15_arm, fpu_d16_arm,
+ fpu_d17_arm, fpu_d18_arm, fpu_d19_arm, fpu_d20_arm, fpu_d21_arm,
+ fpu_d22_arm, fpu_d23_arm, fpu_d24_arm, fpu_d25_arm, fpu_d26_arm,
+ fpu_d27_arm, fpu_d28_arm, fpu_d29_arm, fpu_d30_arm, fpu_d31_arm,
+ fpu_q0_arm, fpu_q1_arm, fpu_q2_arm, fpu_q3_arm, fpu_q4_arm,
+ fpu_q5_arm, fpu_q6_arm, fpu_q7_arm, fpu_q8_arm, fpu_q9_arm,
+ fpu_q10_arm, fpu_q11_arm, fpu_q12_arm, fpu_q13_arm, fpu_q14_arm,
fpu_q15_arm,
LLDB_INVALID_REGNUM // register sets need to end with this flag
};
-static_assert(((sizeof g_fpu_regnums_arm / sizeof g_fpu_regnums_arm[0]) - 1) == k_num_fpr_registers_arm, \
+static_assert(((sizeof g_fpu_regnums_arm / sizeof g_fpu_regnums_arm[0]) - 1) ==
+ k_num_fpr_registers_arm,
"g_fpu_regnums_arm has wrong number of register infos");
// Number of register sets provided by this context.
-enum
-{
- k_num_register_sets = 2
-};
+enum { k_num_register_sets = 2 };
// Register sets for arm.
-static const lldb_private::RegisterSet
-g_reg_sets_arm[k_num_register_sets] =
-{
- { "General Purpose Registers", "gpr", k_num_gpr_registers_arm, g_gpr_regnums_arm },
- { "Floating Point Registers", "fpu", k_num_fpr_registers_arm, g_fpu_regnums_arm }
-};
-
-bool RegisterContextPOSIX_arm::IsGPR(unsigned reg)
-{
- return reg <= m_reg_info.last_gpr; // GPR's come first.
-}
-
-bool RegisterContextPOSIX_arm::IsFPR(unsigned reg)
-{
- return (m_reg_info.first_fpr <= reg && reg <= m_reg_info.last_fpr);
-}
-
-RegisterContextPOSIX_arm::RegisterContextPOSIX_arm(lldb_private::Thread &thread,
- uint32_t concrete_frame_idx,
- lldb_private::RegisterInfoInterface *register_info)
- : lldb_private::RegisterContext(thread, concrete_frame_idx)
-{
- m_register_info_ap.reset(register_info);
-
- switch (register_info->m_target_arch.GetMachine())
- {
- case llvm::Triple::arm:
- m_reg_info.num_registers = k_num_registers_arm;
- m_reg_info.num_gpr_registers = k_num_gpr_registers_arm;
- m_reg_info.num_fpr_registers = k_num_fpr_registers_arm;
- m_reg_info.last_gpr = k_last_gpr_arm;
- m_reg_info.first_fpr = k_first_fpr_arm;
- m_reg_info.last_fpr = k_last_fpr_arm;
- m_reg_info.first_fpr_v = fpu_s0_arm;
- m_reg_info.last_fpr_v = fpu_s31_arm;
- m_reg_info.gpr_flags = gpr_cpsr_arm;
- break;
- default:
- assert(false && "Unhandled target architecture.");
- break;
- }
-
- ::memset(&m_fpr, 0, sizeof m_fpr);
+static const lldb_private::RegisterSet g_reg_sets_arm[k_num_register_sets] = {
+ {"General Purpose Registers", "gpr", k_num_gpr_registers_arm,
+ g_gpr_regnums_arm},
+ {"Floating Point Registers", "fpu", k_num_fpr_registers_arm,
+ g_fpu_regnums_arm}};
- // elf-core yet to support ReadFPR()
- lldb::ProcessSP base = CalculateProcess();
- if (base.get()->GetPluginName() == ProcessElfCore::GetPluginNameStatic())
- return;
+bool RegisterContextPOSIX_arm::IsGPR(unsigned reg) {
+ return reg <= m_reg_info.last_gpr; // GPR's come first.
}
-RegisterContextPOSIX_arm::~RegisterContextPOSIX_arm()
-{
+bool RegisterContextPOSIX_arm::IsFPR(unsigned reg) {
+ return (m_reg_info.first_fpr <= reg && reg <= m_reg_info.last_fpr);
}
-void
-RegisterContextPOSIX_arm::Invalidate()
-{
+RegisterContextPOSIX_arm::RegisterContextPOSIX_arm(
+ lldb_private::Thread &thread, uint32_t concrete_frame_idx,
+ lldb_private::RegisterInfoInterface *register_info)
+ : lldb_private::RegisterContext(thread, concrete_frame_idx) {
+ m_register_info_ap.reset(register_info);
+
+ switch (register_info->m_target_arch.GetMachine()) {
+ case llvm::Triple::arm:
+ m_reg_info.num_registers = k_num_registers_arm;
+ m_reg_info.num_gpr_registers = k_num_gpr_registers_arm;
+ m_reg_info.num_fpr_registers = k_num_fpr_registers_arm;
+ m_reg_info.last_gpr = k_last_gpr_arm;
+ m_reg_info.first_fpr = k_first_fpr_arm;
+ m_reg_info.last_fpr = k_last_fpr_arm;
+ m_reg_info.first_fpr_v = fpu_s0_arm;
+ m_reg_info.last_fpr_v = fpu_s31_arm;
+ m_reg_info.gpr_flags = gpr_cpsr_arm;
+ break;
+ default:
+ assert(false && "Unhandled target architecture.");
+ break;
+ }
+
+ ::memset(&m_fpr, 0, sizeof m_fpr);
+
+ // elf-core yet to support ReadFPR()
+ lldb::ProcessSP base = CalculateProcess();
+ if (base.get()->GetPluginName() == ProcessElfCore::GetPluginNameStatic())
+ return;
}
-void
-RegisterContextPOSIX_arm::InvalidateAllRegisters()
-{
+RegisterContextPOSIX_arm::~RegisterContextPOSIX_arm() {}
+
+void RegisterContextPOSIX_arm::Invalidate() {}
+
+void RegisterContextPOSIX_arm::InvalidateAllRegisters() {}
+
+unsigned RegisterContextPOSIX_arm::GetRegisterOffset(unsigned reg) {
+ assert(reg < m_reg_info.num_registers && "Invalid register number.");
+ return GetRegisterInfo()[reg].byte_offset;
}
-unsigned
-RegisterContextPOSIX_arm::GetRegisterOffset(unsigned reg)
-{
- assert(reg < m_reg_info.num_registers && "Invalid register number.");
- return GetRegisterInfo()[reg].byte_offset;
+unsigned RegisterContextPOSIX_arm::GetRegisterSize(unsigned reg) {
+ assert(reg < m_reg_info.num_registers && "Invalid register number.");
+ return GetRegisterInfo()[reg].byte_size;
}
-unsigned
-RegisterContextPOSIX_arm::GetRegisterSize(unsigned reg)
-{
- assert(reg < m_reg_info.num_registers && "Invalid register number.");
- return GetRegisterInfo()[reg].byte_size;
+size_t RegisterContextPOSIX_arm::GetRegisterCount() {
+ size_t num_registers =
+ m_reg_info.num_gpr_registers + m_reg_info.num_fpr_registers;
+ return num_registers;
}
-size_t
-RegisterContextPOSIX_arm::GetRegisterCount()
-{
- size_t num_registers = m_reg_info.num_gpr_registers + m_reg_info.num_fpr_registers;
- return num_registers;
+size_t RegisterContextPOSIX_arm::GetGPRSize() {
+ return m_register_info_ap->GetGPRSize();
}
-size_t
-RegisterContextPOSIX_arm::GetGPRSize()
-{
- return m_register_info_ap->GetGPRSize ();
+const lldb_private::RegisterInfo *RegisterContextPOSIX_arm::GetRegisterInfo() {
+ // Commonly, this method is overridden and g_register_infos is copied and
+ // specialized.
+ // So, use GetRegisterInfo() rather than g_register_infos in this scope.
+ return m_register_info_ap->GetRegisterInfo();
}
const lldb_private::RegisterInfo *
-RegisterContextPOSIX_arm::GetRegisterInfo()
-{
- // Commonly, this method is overridden and g_register_infos is copied and specialized.
- // So, use GetRegisterInfo() rather than g_register_infos in this scope.
- return m_register_info_ap->GetRegisterInfo ();
+RegisterContextPOSIX_arm::GetRegisterInfoAtIndex(size_t reg) {
+ if (reg < m_reg_info.num_registers)
+ return &GetRegisterInfo()[reg];
+ else
+ return NULL;
}
-const lldb_private::RegisterInfo *
-RegisterContextPOSIX_arm::GetRegisterInfoAtIndex(size_t reg)
-{
- if (reg < m_reg_info.num_registers)
- return &GetRegisterInfo()[reg];
- else
- return NULL;
-}
-
-size_t
-RegisterContextPOSIX_arm::GetRegisterSetCount()
-{
- size_t sets = 0;
- for (size_t set = 0; set < k_num_register_sets; ++set)
- {
- if (IsRegisterSetAvailable(set))
- ++sets;
- }
+size_t RegisterContextPOSIX_arm::GetRegisterSetCount() {
+ size_t sets = 0;
+ for (size_t set = 0; set < k_num_register_sets; ++set) {
+ if (IsRegisterSetAvailable(set))
+ ++sets;
+ }
- return sets;
+ return sets;
}
const lldb_private::RegisterSet *
-RegisterContextPOSIX_arm::GetRegisterSet(size_t set)
-{
- if (IsRegisterSetAvailable(set))
- {
- switch (m_register_info_ap->m_target_arch.GetMachine())
- {
- case llvm::Triple::arm:
- return &g_reg_sets_arm[set];
- default:
- assert(false && "Unhandled target architecture.");
- return NULL;
- }
+RegisterContextPOSIX_arm::GetRegisterSet(size_t set) {
+ if (IsRegisterSetAvailable(set)) {
+ switch (m_register_info_ap->m_target_arch.GetMachine()) {
+ case llvm::Triple::arm:
+ return &g_reg_sets_arm[set];
+ default:
+ assert(false && "Unhandled target architecture.");
+ return NULL;
}
- return NULL;
+ }
+ return NULL;
}
-const char *
-RegisterContextPOSIX_arm::GetRegisterName(unsigned reg)
-{
- assert(reg < m_reg_info.num_registers && "Invalid register offset.");
- return GetRegisterInfo()[reg].name;
-}
-
-lldb::ByteOrder
-RegisterContextPOSIX_arm::GetByteOrder()
-{
- // Get the target process whose privileged thread was used for the register read.
- lldb::ByteOrder byte_order = lldb::eByteOrderInvalid;
- lldb_private::Process *process = CalculateProcess().get();
-
- if (process)
- byte_order = process->GetByteOrder();
- return byte_order;
-}
-
-bool
-RegisterContextPOSIX_arm::IsRegisterSetAvailable(size_t set_index)
-{
- return set_index < k_num_register_sets;
+const char *RegisterContextPOSIX_arm::GetRegisterName(unsigned reg) {
+ assert(reg < m_reg_info.num_registers && "Invalid register offset.");
+ return GetRegisterInfo()[reg].name;
}
+lldb::ByteOrder RegisterContextPOSIX_arm::GetByteOrder() {
+ // Get the target process whose privileged thread was used for the register
+ // read.
+ lldb::ByteOrder byte_order = lldb::eByteOrderInvalid;
+ lldb_private::Process *process = CalculateProcess().get();
-// Used when parsing DWARF and EH frame information and any other
-// object file sections that contain register numbers in them.
-uint32_t
-RegisterContextPOSIX_arm::ConvertRegisterKindToRegisterNumber(lldb::RegisterKind kind,
- uint32_t num)
-{
- const uint32_t num_regs = GetRegisterCount();
-
- assert (kind < lldb::kNumRegisterKinds);
- for (uint32_t reg_idx = 0; reg_idx < num_regs; ++reg_idx)
- {
- const lldb_private::RegisterInfo *reg_info = GetRegisterInfoAtIndex (reg_idx);
-
- if (reg_info->kinds[kind] == num)
- return reg_idx;
- }
+ if (process)
+ byte_order = process->GetByteOrder();
+ return byte_order;
+}
- return LLDB_INVALID_REGNUM;
+bool RegisterContextPOSIX_arm::IsRegisterSetAvailable(size_t set_index) {
+ return set_index < k_num_register_sets;
}
+// Used when parsing DWARF and EH frame information and any other
+// object file sections that contain register numbers in them.
+uint32_t RegisterContextPOSIX_arm::ConvertRegisterKindToRegisterNumber(
+ lldb::RegisterKind kind, uint32_t num) {
+ const uint32_t num_regs = GetRegisterCount();
+
+ assert(kind < lldb::kNumRegisterKinds);
+ for (uint32_t reg_idx = 0; reg_idx < num_regs; ++reg_idx) {
+ const lldb_private::RegisterInfo *reg_info =
+ GetRegisterInfoAtIndex(reg_idx);
+
+ if (reg_info->kinds[kind] == num)
+ return reg_idx;
+ }
+
+ return LLDB_INVALID_REGNUM;
+}
Modified: lldb/trunk/source/Plugins/Process/Utility/RegisterContextPOSIX_arm.h
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/source/Plugins/Process/Utility/RegisterContextPOSIX_arm.h?rev=280751&r1=280750&r2=280751&view=diff
==============================================================================
--- lldb/trunk/source/Plugins/Process/Utility/RegisterContextPOSIX_arm.h (original)
+++ lldb/trunk/source/Plugins/Process/Utility/RegisterContextPOSIX_arm.h Tue Sep 6 15:57:50 2016
@@ -14,112 +14,98 @@
// C++ Includes
// Other libraries and framework includes
// Project includes
-#include "lldb/Core/Log.h"
-#include "lldb/Target/RegisterContext.h"
#include "RegisterInfoInterface.h"
#include "lldb-arm-register-enums.h"
+#include "lldb/Core/Log.h"
+#include "lldb/Target/RegisterContext.h"
class ProcessMonitor;
-class RegisterContextPOSIX_arm
- : public lldb_private::RegisterContext
-{
+class RegisterContextPOSIX_arm : public lldb_private::RegisterContext {
public:
- RegisterContextPOSIX_arm (lldb_private::Thread &thread,
- uint32_t concrete_frame_idx,
- lldb_private::RegisterInfoInterface *register_info);
+ RegisterContextPOSIX_arm(lldb_private::Thread &thread,
+ uint32_t concrete_frame_idx,
+ lldb_private::RegisterInfoInterface *register_info);
- ~RegisterContextPOSIX_arm() override;
+ ~RegisterContextPOSIX_arm() override;
- void
- Invalidate();
+ void Invalidate();
- void
- InvalidateAllRegisters() override;
+ void InvalidateAllRegisters() override;
- size_t
- GetRegisterCount() override;
+ size_t GetRegisterCount() override;
- virtual size_t
- GetGPRSize();
+ virtual size_t GetGPRSize();
- virtual unsigned
- GetRegisterSize(unsigned reg);
+ virtual unsigned GetRegisterSize(unsigned reg);
- virtual unsigned
- GetRegisterOffset(unsigned reg);
+ virtual unsigned GetRegisterOffset(unsigned reg);
- const lldb_private::RegisterInfo *
- GetRegisterInfoAtIndex(size_t reg) override;
+ const lldb_private::RegisterInfo *GetRegisterInfoAtIndex(size_t reg) override;
- size_t
- GetRegisterSetCount() override;
+ size_t GetRegisterSetCount() override;
- const lldb_private::RegisterSet *
- GetRegisterSet(size_t set) override;
+ const lldb_private::RegisterSet *GetRegisterSet(size_t set) override;
- const char *
- GetRegisterName(unsigned reg);
+ const char *GetRegisterName(unsigned reg);
- uint32_t
- ConvertRegisterKindToRegisterNumber(lldb::RegisterKind kind, uint32_t num) override;
+ uint32_t ConvertRegisterKindToRegisterNumber(lldb::RegisterKind kind,
+ uint32_t num) override;
protected:
- struct RegInfo
- {
- uint32_t num_registers;
- uint32_t num_gpr_registers;
- uint32_t num_fpr_registers;
-
- uint32_t last_gpr;
- uint32_t first_fpr;
- uint32_t last_fpr;
-
- uint32_t first_fpr_v;
- uint32_t last_fpr_v;
-
- uint32_t gpr_flags;
- };
-
- struct QReg
- {
- uint8_t bytes[16];
- };
-
- struct FPU
- {
- union {
- uint32_t s[32];
- uint64_t d[32];
- QReg q[16]; // the 128-bit NEON registers
- } floats;
- uint32_t fpscr;
- };
-
- uint32_t m_gpr_arm[lldb_private::k_num_gpr_registers_arm]; // 32-bit general purpose registers.
- RegInfo m_reg_info;
- struct RegisterContextPOSIX_arm::FPU m_fpr; // floating-point registers including extended register sets.
- std::unique_ptr<lldb_private::RegisterInfoInterface> m_register_info_ap; // Register Info Interface (FreeBSD or Linux)
-
- // Determines if an extended register set is supported on the processor running the inferior process.
- virtual bool
- IsRegisterSetAvailable(size_t set_index);
-
- virtual const lldb_private::RegisterInfo *
- GetRegisterInfo();
-
- bool
- IsGPR(unsigned reg);
-
- bool
- IsFPR(unsigned reg);
-
- lldb::ByteOrder GetByteOrder();
-
- virtual bool ReadGPR() = 0;
- virtual bool ReadFPR() = 0;
- virtual bool WriteGPR() = 0;
- virtual bool WriteFPR() = 0;
+ struct RegInfo {
+ uint32_t num_registers;
+ uint32_t num_gpr_registers;
+ uint32_t num_fpr_registers;
+
+ uint32_t last_gpr;
+ uint32_t first_fpr;
+ uint32_t last_fpr;
+
+ uint32_t first_fpr_v;
+ uint32_t last_fpr_v;
+
+ uint32_t gpr_flags;
+ };
+
+ struct QReg {
+ uint8_t bytes[16];
+ };
+
+ struct FPU {
+ union {
+ uint32_t s[32];
+ uint64_t d[32];
+ QReg q[16]; // the 128-bit NEON registers
+ } floats;
+ uint32_t fpscr;
+ };
+
+ uint32_t m_gpr_arm[lldb_private::k_num_gpr_registers_arm]; // 32-bit general
+ // purpose
+ // registers.
+ RegInfo m_reg_info;
+ struct RegisterContextPOSIX_arm::FPU
+ m_fpr; // floating-point registers including extended register sets.
+ std::unique_ptr<lldb_private::RegisterInfoInterface>
+ m_register_info_ap; // Register Info Interface (FreeBSD or Linux)
+
+ // Determines if an extended register set is supported on the processor
+ // running the inferior process.
+ virtual bool IsRegisterSetAvailable(size_t set_index);
+
+ virtual const lldb_private::RegisterInfo *GetRegisterInfo();
+
+ bool IsGPR(unsigned reg);
+
+ bool IsFPR(unsigned reg);
+
+ lldb::ByteOrder GetByteOrder();
+
+ virtual bool ReadGPR() = 0;
+ virtual bool ReadFPR() = 0;
+ virtual bool WriteGPR() = 0;
+ virtual bool WriteFPR() = 0;
};
#endif // liblldb_RegisterContextPOSIX_arm_h_
Modified: lldb/trunk/source/Plugins/Process/Utility/RegisterContextPOSIX_arm64.cpp
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/source/Plugins/Process/Utility/RegisterContextPOSIX_arm64.cpp?rev=280751&r1=280750&r2=280751&view=diff
==============================================================================
--- lldb/trunk/source/Plugins/Process/Utility/RegisterContextPOSIX_arm64.cpp (original)
+++ lldb/trunk/source/Plugins/Process/Utility/RegisterContextPOSIX_arm64.cpp Tue Sep 6 15:57:50 2016
@@ -15,288 +15,200 @@
#include "lldb/Core/DataExtractor.h"
#include "lldb/Core/RegisterValue.h"
#include "lldb/Core/Scalar.h"
+#include "lldb/Host/Endian.h"
#include "lldb/Target/Target.h"
#include "lldb/Target/Thread.h"
-#include "lldb/Host/Endian.h"
#include "llvm/Support/Compiler.h"
-#include "RegisterContextPOSIX_arm64.h"
#include "Plugins/Process/elf-core/ProcessElfCore.h"
+#include "RegisterContextPOSIX_arm64.h"
using namespace lldb;
using namespace lldb_private;
// ARM64 general purpose registers.
-const uint32_t g_gpr_regnums_arm64[] =
-{
- gpr_x0_arm64,
- gpr_x1_arm64,
- gpr_x2_arm64,
- gpr_x3_arm64,
- gpr_x4_arm64,
- gpr_x5_arm64,
- gpr_x6_arm64,
- gpr_x7_arm64,
- gpr_x8_arm64,
- gpr_x9_arm64,
- gpr_x10_arm64,
- gpr_x11_arm64,
- gpr_x12_arm64,
- gpr_x13_arm64,
- gpr_x14_arm64,
- gpr_x15_arm64,
- gpr_x16_arm64,
- gpr_x17_arm64,
- gpr_x18_arm64,
- gpr_x19_arm64,
- gpr_x20_arm64,
- gpr_x21_arm64,
- gpr_x22_arm64,
- gpr_x23_arm64,
- gpr_x24_arm64,
- gpr_x25_arm64,
- gpr_x26_arm64,
- gpr_x27_arm64,
- gpr_x28_arm64,
- gpr_fp_arm64,
- gpr_lr_arm64,
- gpr_sp_arm64,
- gpr_pc_arm64,
- gpr_cpsr_arm64,
+const uint32_t g_gpr_regnums_arm64[] = {
+ gpr_x0_arm64, gpr_x1_arm64, gpr_x2_arm64, gpr_x3_arm64,
+ gpr_x4_arm64, gpr_x5_arm64, gpr_x6_arm64, gpr_x7_arm64,
+ gpr_x8_arm64, gpr_x9_arm64, gpr_x10_arm64, gpr_x11_arm64,
+ gpr_x12_arm64, gpr_x13_arm64, gpr_x14_arm64, gpr_x15_arm64,
+ gpr_x16_arm64, gpr_x17_arm64, gpr_x18_arm64, gpr_x19_arm64,
+ gpr_x20_arm64, gpr_x21_arm64, gpr_x22_arm64, gpr_x23_arm64,
+ gpr_x24_arm64, gpr_x25_arm64, gpr_x26_arm64, gpr_x27_arm64,
+ gpr_x28_arm64, gpr_fp_arm64, gpr_lr_arm64, gpr_sp_arm64,
+ gpr_pc_arm64, gpr_cpsr_arm64,
LLDB_INVALID_REGNUM // register sets need to end with this flag
};
-static_assert(((sizeof g_gpr_regnums_arm64 / sizeof g_gpr_regnums_arm64[0]) - 1) == k_num_gpr_registers_arm64, \
+static_assert(((sizeof g_gpr_regnums_arm64 / sizeof g_gpr_regnums_arm64[0]) -
+ 1) == k_num_gpr_registers_arm64,
"g_gpr_regnums_arm64 has wrong number of register infos");
// ARM64 floating point registers.
-static const uint32_t g_fpu_regnums_arm64[] =
-{
- fpu_v0_arm64,
- fpu_v1_arm64,
- fpu_v2_arm64,
- fpu_v3_arm64,
- fpu_v4_arm64,
- fpu_v5_arm64,
- fpu_v6_arm64,
- fpu_v7_arm64,
- fpu_v8_arm64,
- fpu_v9_arm64,
- fpu_v10_arm64,
- fpu_v11_arm64,
- fpu_v12_arm64,
- fpu_v13_arm64,
- fpu_v14_arm64,
- fpu_v15_arm64,
- fpu_v16_arm64,
- fpu_v17_arm64,
- fpu_v18_arm64,
- fpu_v19_arm64,
- fpu_v20_arm64,
- fpu_v21_arm64,
- fpu_v22_arm64,
- fpu_v23_arm64,
- fpu_v24_arm64,
- fpu_v25_arm64,
- fpu_v26_arm64,
- fpu_v27_arm64,
- fpu_v28_arm64,
- fpu_v29_arm64,
- fpu_v30_arm64,
- fpu_v31_arm64,
- fpu_fpsr_arm64,
- fpu_fpcr_arm64,
+static const uint32_t g_fpu_regnums_arm64[] = {
+ fpu_v0_arm64, fpu_v1_arm64, fpu_v2_arm64, fpu_v3_arm64,
+ fpu_v4_arm64, fpu_v5_arm64, fpu_v6_arm64, fpu_v7_arm64,
+ fpu_v8_arm64, fpu_v9_arm64, fpu_v10_arm64, fpu_v11_arm64,
+ fpu_v12_arm64, fpu_v13_arm64, fpu_v14_arm64, fpu_v15_arm64,
+ fpu_v16_arm64, fpu_v17_arm64, fpu_v18_arm64, fpu_v19_arm64,
+ fpu_v20_arm64, fpu_v21_arm64, fpu_v22_arm64, fpu_v23_arm64,
+ fpu_v24_arm64, fpu_v25_arm64, fpu_v26_arm64, fpu_v27_arm64,
+ fpu_v28_arm64, fpu_v29_arm64, fpu_v30_arm64, fpu_v31_arm64,
+ fpu_fpsr_arm64, fpu_fpcr_arm64,
LLDB_INVALID_REGNUM // register sets need to end with this flag
};
-static_assert(((sizeof g_fpu_regnums_arm64 / sizeof g_fpu_regnums_arm64[0]) - 1) == k_num_fpr_registers_arm64, \
+static_assert(((sizeof g_fpu_regnums_arm64 / sizeof g_fpu_regnums_arm64[0]) -
+ 1) == k_num_fpr_registers_arm64,
"g_fpu_regnums_arm64 has wrong number of register infos");
// Number of register sets provided by this context.
-enum
-{
- k_num_register_sets = 2
-};
+enum { k_num_register_sets = 2 };
// Register sets for ARM64.
-static const lldb_private::RegisterSet
-g_reg_sets_arm64[k_num_register_sets] =
-{
- { "General Purpose Registers", "gpr", k_num_gpr_registers_arm64, g_gpr_regnums_arm64 },
- { "Floating Point Registers", "fpu", k_num_fpr_registers_arm64, g_fpu_regnums_arm64 }
-};
-
-bool RegisterContextPOSIX_arm64::IsGPR(unsigned reg)
-{
- return reg <= m_reg_info.last_gpr; // GPR's come first.
-}
-
-bool RegisterContextPOSIX_arm64::IsFPR(unsigned reg)
-{
- return (m_reg_info.first_fpr <= reg && reg <= m_reg_info.last_fpr);
-}
-
-RegisterContextPOSIX_arm64::RegisterContextPOSIX_arm64(lldb_private::Thread &thread,
- uint32_t concrete_frame_idx,
- lldb_private::RegisterInfoInterface *register_info)
- : lldb_private::RegisterContext(thread, concrete_frame_idx)
-{
- m_register_info_ap.reset(register_info);
-
- switch (register_info->m_target_arch.GetMachine())
- {
- case llvm::Triple::aarch64:
- m_reg_info.num_registers = k_num_registers_arm64;
- m_reg_info.num_gpr_registers = k_num_gpr_registers_arm64;
- m_reg_info.num_fpr_registers = k_num_fpr_registers_arm64;
- m_reg_info.last_gpr = k_last_gpr_arm64;
- m_reg_info.first_fpr = k_first_fpr_arm64;
- m_reg_info.last_fpr = k_last_fpr_arm64;
- m_reg_info.first_fpr_v = fpu_v0_arm64;
- m_reg_info.last_fpr_v = fpu_v31_arm64;
- m_reg_info.gpr_flags = gpr_cpsr_arm64;
- break;
- default:
- assert(false && "Unhandled target architecture.");
- break;
- }
-
- ::memset(&m_fpr, 0, sizeof m_fpr);
+static const lldb_private::RegisterSet g_reg_sets_arm64[k_num_register_sets] = {
+ {"General Purpose Registers", "gpr", k_num_gpr_registers_arm64,
+ g_gpr_regnums_arm64},
+ {"Floating Point Registers", "fpu", k_num_fpr_registers_arm64,
+ g_fpu_regnums_arm64}};
- // elf-core yet to support ReadFPR()
- lldb::ProcessSP base = CalculateProcess();
- if (base.get()->GetPluginName() == ProcessElfCore::GetPluginNameStatic())
- return;
+bool RegisterContextPOSIX_arm64::IsGPR(unsigned reg) {
+ return reg <= m_reg_info.last_gpr; // GPR's come first.
}
-RegisterContextPOSIX_arm64::~RegisterContextPOSIX_arm64()
-{
+bool RegisterContextPOSIX_arm64::IsFPR(unsigned reg) {
+ return (m_reg_info.first_fpr <= reg && reg <= m_reg_info.last_fpr);
}
-void
-RegisterContextPOSIX_arm64::Invalidate()
-{
-}
+RegisterContextPOSIX_arm64::RegisterContextPOSIX_arm64(
+ lldb_private::Thread &thread, uint32_t concrete_frame_idx,
+ lldb_private::RegisterInfoInterface *register_info)
+ : lldb_private::RegisterContext(thread, concrete_frame_idx) {
+ m_register_info_ap.reset(register_info);
+
+ switch (register_info->m_target_arch.GetMachine()) {
+ case llvm::Triple::aarch64:
+ m_reg_info.num_registers = k_num_registers_arm64;
+ m_reg_info.num_gpr_registers = k_num_gpr_registers_arm64;
+ m_reg_info.num_fpr_registers = k_num_fpr_registers_arm64;
+ m_reg_info.last_gpr = k_last_gpr_arm64;
+ m_reg_info.first_fpr = k_first_fpr_arm64;
+ m_reg_info.last_fpr = k_last_fpr_arm64;
+ m_reg_info.first_fpr_v = fpu_v0_arm64;
+ m_reg_info.last_fpr_v = fpu_v31_arm64;
+ m_reg_info.gpr_flags = gpr_cpsr_arm64;
+ break;
+ default:
+ assert(false && "Unhandled target architecture.");
+ break;
+ }
-void
-RegisterContextPOSIX_arm64::InvalidateAllRegisters()
-{
+ ::memset(&m_fpr, 0, sizeof m_fpr);
+
+ // elf-core yet to support ReadFPR()
+ lldb::ProcessSP base = CalculateProcess();
+ if (base.get()->GetPluginName() == ProcessElfCore::GetPluginNameStatic())
+ return;
}
-unsigned
-RegisterContextPOSIX_arm64::GetRegisterOffset(unsigned reg)
-{
- assert(reg < m_reg_info.num_registers && "Invalid register number.");
- return GetRegisterInfo()[reg].byte_offset;
+RegisterContextPOSIX_arm64::~RegisterContextPOSIX_arm64() {}
+
+void RegisterContextPOSIX_arm64::Invalidate() {}
+
+void RegisterContextPOSIX_arm64::InvalidateAllRegisters() {}
+
+unsigned RegisterContextPOSIX_arm64::GetRegisterOffset(unsigned reg) {
+ assert(reg < m_reg_info.num_registers && "Invalid register number.");
+ return GetRegisterInfo()[reg].byte_offset;
}
-unsigned
-RegisterContextPOSIX_arm64::GetRegisterSize(unsigned reg)
-{
- assert(reg < m_reg_info.num_registers && "Invalid register number.");
- return GetRegisterInfo()[reg].byte_size;
+unsigned RegisterContextPOSIX_arm64::GetRegisterSize(unsigned reg) {
+ assert(reg < m_reg_info.num_registers && "Invalid register number.");
+ return GetRegisterInfo()[reg].byte_size;
}
-size_t
-RegisterContextPOSIX_arm64::GetRegisterCount()
-{
- size_t num_registers = m_reg_info.num_gpr_registers + m_reg_info.num_fpr_registers;
- return num_registers;
+size_t RegisterContextPOSIX_arm64::GetRegisterCount() {
+ size_t num_registers =
+ m_reg_info.num_gpr_registers + m_reg_info.num_fpr_registers;
+ return num_registers;
}
-size_t
-RegisterContextPOSIX_arm64::GetGPRSize()
-{
- return m_register_info_ap->GetGPRSize ();
+size_t RegisterContextPOSIX_arm64::GetGPRSize() {
+ return m_register_info_ap->GetGPRSize();
}
const lldb_private::RegisterInfo *
-RegisterContextPOSIX_arm64::GetRegisterInfo()
-{
- // Commonly, this method is overridden and g_register_infos is copied and specialized.
- // So, use GetRegisterInfo() rather than g_register_infos in this scope.
- return m_register_info_ap->GetRegisterInfo ();
+RegisterContextPOSIX_arm64::GetRegisterInfo() {
+ // Commonly, this method is overridden and g_register_infos is copied and
+ // specialized.
+ // So, use GetRegisterInfo() rather than g_register_infos in this scope.
+ return m_register_info_ap->GetRegisterInfo();
}
const lldb_private::RegisterInfo *
-RegisterContextPOSIX_arm64::GetRegisterInfoAtIndex(size_t reg)
-{
- if (reg < m_reg_info.num_registers)
- return &GetRegisterInfo()[reg];
- else
- return NULL;
-}
-
-size_t
-RegisterContextPOSIX_arm64::GetRegisterSetCount()
-{
- size_t sets = 0;
- for (size_t set = 0; set < k_num_register_sets; ++set)
- {
- if (IsRegisterSetAvailable(set))
- ++sets;
- }
+RegisterContextPOSIX_arm64::GetRegisterInfoAtIndex(size_t reg) {
+ if (reg < m_reg_info.num_registers)
+ return &GetRegisterInfo()[reg];
+ else
+ return NULL;
+}
- return sets;
+size_t RegisterContextPOSIX_arm64::GetRegisterSetCount() {
+ size_t sets = 0;
+ for (size_t set = 0; set < k_num_register_sets; ++set) {
+ if (IsRegisterSetAvailable(set))
+ ++sets;
+ }
+
+ return sets;
}
const lldb_private::RegisterSet *
-RegisterContextPOSIX_arm64::GetRegisterSet(size_t set)
-{
- if (IsRegisterSetAvailable(set))
- {
- switch (m_register_info_ap->m_target_arch.GetMachine())
- {
- case llvm::Triple::aarch64:
- return &g_reg_sets_arm64[set];
- default:
- assert(false && "Unhandled target architecture.");
- return NULL;
- }
+RegisterContextPOSIX_arm64::GetRegisterSet(size_t set) {
+ if (IsRegisterSetAvailable(set)) {
+ switch (m_register_info_ap->m_target_arch.GetMachine()) {
+ case llvm::Triple::aarch64:
+ return &g_reg_sets_arm64[set];
+ default:
+ assert(false && "Unhandled target architecture.");
+ return NULL;
}
- return NULL;
+ }
+ return NULL;
}
-const char *
-RegisterContextPOSIX_arm64::GetRegisterName(unsigned reg)
-{
- assert(reg < m_reg_info.num_registers && "Invalid register offset.");
- return GetRegisterInfo()[reg].name;
-}
-
-lldb::ByteOrder
-RegisterContextPOSIX_arm64::GetByteOrder()
-{
- // Get the target process whose privileged thread was used for the register read.
- lldb::ByteOrder byte_order = lldb::eByteOrderInvalid;
- lldb_private::Process *process = CalculateProcess().get();
-
- if (process)
- byte_order = process->GetByteOrder();
- return byte_order;
-}
-
-bool
-RegisterContextPOSIX_arm64::IsRegisterSetAvailable(size_t set_index)
-{
- return set_index < k_num_register_sets;
+const char *RegisterContextPOSIX_arm64::GetRegisterName(unsigned reg) {
+ assert(reg < m_reg_info.num_registers && "Invalid register offset.");
+ return GetRegisterInfo()[reg].name;
}
+lldb::ByteOrder RegisterContextPOSIX_arm64::GetByteOrder() {
+ // Get the target process whose privileged thread was used for the register
+ // read.
+ lldb::ByteOrder byte_order = lldb::eByteOrderInvalid;
+ lldb_private::Process *process = CalculateProcess().get();
-// Used when parsing DWARF and EH frame information and any other
-// object file sections that contain register numbers in them.
-uint32_t
-RegisterContextPOSIX_arm64::ConvertRegisterKindToRegisterNumber(lldb::RegisterKind kind,
- uint32_t num)
-{
- const uint32_t num_regs = GetRegisterCount();
-
- assert (kind < lldb::kNumRegisterKinds);
- for (uint32_t reg_idx = 0; reg_idx < num_regs; ++reg_idx)
- {
- const lldb_private::RegisterInfo *reg_info = GetRegisterInfoAtIndex (reg_idx);
+ if (process)
+ byte_order = process->GetByteOrder();
+ return byte_order;
+}
- if (reg_info->kinds[kind] == num)
- return reg_idx;
- }
+bool RegisterContextPOSIX_arm64::IsRegisterSetAvailable(size_t set_index) {
+ return set_index < k_num_register_sets;
+}
+
+// Used when parsing DWARF and EH frame information and any other
+// object file sections that contain register numbers in them.
+uint32_t RegisterContextPOSIX_arm64::ConvertRegisterKindToRegisterNumber(
+ lldb::RegisterKind kind, uint32_t num) {
+ const uint32_t num_regs = GetRegisterCount();
+
+ assert(kind < lldb::kNumRegisterKinds);
+ for (uint32_t reg_idx = 0; reg_idx < num_regs; ++reg_idx) {
+ const lldb_private::RegisterInfo *reg_info =
+ GetRegisterInfoAtIndex(reg_idx);
+
+ if (reg_info->kinds[kind] == num)
+ return reg_idx;
+ }
- return LLDB_INVALID_REGNUM;
+ return LLDB_INVALID_REGNUM;
}
Modified: lldb/trunk/source/Plugins/Process/Utility/RegisterContextPOSIX_arm64.h
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/source/Plugins/Process/Utility/RegisterContextPOSIX_arm64.h?rev=280751&r1=280750&r2=280751&view=diff
==============================================================================
--- lldb/trunk/source/Plugins/Process/Utility/RegisterContextPOSIX_arm64.h (original)
+++ lldb/trunk/source/Plugins/Process/Utility/RegisterContextPOSIX_arm64.h Tue Sep 6 15:57:50 2016
@@ -14,111 +14,98 @@
// C++ Includes
// Other libraries and framework includes
// Project includes
-#include "lldb/Core/Log.h"
-#include "lldb/Target/RegisterContext.h"
#include "RegisterInfoInterface.h"
#include "lldb-arm64-register-enums.h"
+#include "lldb/Core/Log.h"
+#include "lldb/Target/RegisterContext.h"
class ProcessMonitor;
-class RegisterContextPOSIX_arm64
- : public lldb_private::RegisterContext
-{
+class RegisterContextPOSIX_arm64 : public lldb_private::RegisterContext {
public:
- RegisterContextPOSIX_arm64 (lldb_private::Thread &thread,
- uint32_t concrete_frame_idx,
- lldb_private::RegisterInfoInterface *register_info);
+ RegisterContextPOSIX_arm64(
+ lldb_private::Thread &thread, uint32_t concrete_frame_idx,
+ lldb_private::RegisterInfoInterface *register_info);
- ~RegisterContextPOSIX_arm64() override;
+ ~RegisterContextPOSIX_arm64() override;
- void
- Invalidate();
+ void Invalidate();
- void
- InvalidateAllRegisters() override;
+ void InvalidateAllRegisters() override;
- size_t
- GetRegisterCount() override;
+ size_t GetRegisterCount() override;
- virtual size_t
- GetGPRSize();
+ virtual size_t GetGPRSize();
- virtual unsigned
- GetRegisterSize(unsigned reg);
+ virtual unsigned GetRegisterSize(unsigned reg);
- virtual unsigned
- GetRegisterOffset(unsigned reg);
+ virtual unsigned GetRegisterOffset(unsigned reg);
- const lldb_private::RegisterInfo *
- GetRegisterInfoAtIndex(size_t reg) override;
+ const lldb_private::RegisterInfo *GetRegisterInfoAtIndex(size_t reg) override;
- size_t
- GetRegisterSetCount() override;
+ size_t GetRegisterSetCount() override;
- const lldb_private::RegisterSet *
- GetRegisterSet(size_t set) override;
+ const lldb_private::RegisterSet *GetRegisterSet(size_t set) override;
- const char *
- GetRegisterName(unsigned reg);
+ const char *GetRegisterName(unsigned reg);
- uint32_t
- ConvertRegisterKindToRegisterNumber(lldb::RegisterKind kind, uint32_t num) override;
+ uint32_t ConvertRegisterKindToRegisterNumber(lldb::RegisterKind kind,
+ uint32_t num) override;
protected:
- struct RegInfo
- {
- uint32_t num_registers;
- uint32_t num_gpr_registers;
- uint32_t num_fpr_registers;
-
- uint32_t last_gpr;
- uint32_t first_fpr;
- uint32_t last_fpr;
-
- uint32_t first_fpr_v;
- uint32_t last_fpr_v;
-
- uint32_t gpr_flags;
- };
-
- // based on RegisterContextDarwin_arm64.h
- struct VReg
- {
- uint8_t bytes[16];
- };
-
- // based on RegisterContextDarwin_arm64.h
- struct FPU
- {
- VReg v[32];
- uint32_t fpsr;
- uint32_t fpcr;
- };
-
- uint64_t m_gpr_arm64[lldb_private::k_num_gpr_registers_arm64]; // 64-bit general purpose registers.
- RegInfo m_reg_info;
- struct RegisterContextPOSIX_arm64::FPU m_fpr; // floating-point registers including extended register sets.
- std::unique_ptr<lldb_private::RegisterInfoInterface> m_register_info_ap; // Register Info Interface (FreeBSD or Linux)
-
- // Determines if an extended register set is supported on the processor running the inferior process.
- virtual bool
- IsRegisterSetAvailable(size_t set_index);
-
- virtual const lldb_private::RegisterInfo *
- GetRegisterInfo();
-
- bool
- IsGPR(unsigned reg);
-
- bool
- IsFPR(unsigned reg);
-
- lldb::ByteOrder GetByteOrder();
-
- virtual bool ReadGPR() = 0;
- virtual bool ReadFPR() = 0;
- virtual bool WriteGPR() = 0;
- virtual bool WriteFPR() = 0;
+ struct RegInfo {
+ uint32_t num_registers;
+ uint32_t num_gpr_registers;
+ uint32_t num_fpr_registers;
+
+ uint32_t last_gpr;
+ uint32_t first_fpr;
+ uint32_t last_fpr;
+
+ uint32_t first_fpr_v;
+ uint32_t last_fpr_v;
+
+ uint32_t gpr_flags;
+ };
+
+ // based on RegisterContextDarwin_arm64.h
+ struct VReg {
+ uint8_t bytes[16];
+ };
+
+ // based on RegisterContextDarwin_arm64.h
+ struct FPU {
+ VReg v[32];
+ uint32_t fpsr;
+ uint32_t fpcr;
+ };
+
+ uint64_t m_gpr_arm64[lldb_private::k_num_gpr_registers_arm64]; // 64-bit
+ // general
+ // purpose
+ // registers.
+ RegInfo m_reg_info;
+ struct RegisterContextPOSIX_arm64::FPU
+ m_fpr; // floating-point registers including extended register sets.
+ std::unique_ptr<lldb_private::RegisterInfoInterface>
+ m_register_info_ap; // Register Info Interface (FreeBSD or Linux)
+
+ // Determines if an extended register set is supported on the processor
+ // running the inferior process.
+ virtual bool IsRegisterSetAvailable(size_t set_index);
+
+ virtual const lldb_private::RegisterInfo *GetRegisterInfo();
+
+ bool IsGPR(unsigned reg);
+
+ bool IsFPR(unsigned reg);
+
+ lldb::ByteOrder GetByteOrder();
+
+ virtual bool ReadGPR() = 0;
+ virtual bool ReadFPR() = 0;
+ virtual bool WriteGPR() = 0;
+ virtual bool WriteFPR() = 0;
};
#endif // liblldb_RegisterContextPOSIX_arm64_h_
Modified: lldb/trunk/source/Plugins/Process/Utility/RegisterContextPOSIX_mips64.cpp
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/source/Plugins/Process/Utility/RegisterContextPOSIX_mips64.cpp?rev=280751&r1=280750&r2=280751&view=diff
==============================================================================
--- lldb/trunk/source/Plugins/Process/Utility/RegisterContextPOSIX_mips64.cpp (original)
+++ lldb/trunk/source/Plugins/Process/Utility/RegisterContextPOSIX_mips64.cpp Tue Sep 6 15:57:50 2016
@@ -15,223 +15,150 @@
#include "lldb/Core/DataExtractor.h"
#include "lldb/Core/RegisterValue.h"
#include "lldb/Core/Scalar.h"
+#include "lldb/Host/Endian.h"
#include "lldb/Target/Target.h"
#include "lldb/Target/Thread.h"
-#include "lldb/Host/Endian.h"
#include "llvm/Support/Compiler.h"
-#include "RegisterContextPOSIX_mips64.h"
#include "Plugins/Process/elf-core/ProcessElfCore.h"
+#include "RegisterContextPOSIX_mips64.h"
using namespace lldb_private;
using namespace lldb;
-static const
-uint32_t g_gpr_regnums[] =
-{
- gpr_zero_mips64,
- gpr_r1_mips64,
- gpr_r2_mips64,
- gpr_r3_mips64,
- gpr_r4_mips64,
- gpr_r5_mips64,
- gpr_r6_mips64,
- gpr_r7_mips64,
- gpr_r8_mips64,
- gpr_r9_mips64,
- gpr_r10_mips64,
- gpr_r11_mips64,
- gpr_r12_mips64,
- gpr_r13_mips64,
- gpr_r14_mips64,
- gpr_r15_mips64,
- gpr_r16_mips64,
- gpr_r17_mips64,
- gpr_r18_mips64,
- gpr_r19_mips64,
- gpr_r20_mips64,
- gpr_r21_mips64,
- gpr_r22_mips64,
- gpr_r23_mips64,
- gpr_r24_mips64,
- gpr_r25_mips64,
- gpr_r26_mips64,
- gpr_r27_mips64,
- gpr_gp_mips64,
- gpr_sp_mips64,
- gpr_r30_mips64,
- gpr_ra_mips64,
- gpr_sr_mips64,
- gpr_mullo_mips64,
- gpr_mulhi_mips64,
- gpr_badvaddr_mips64,
- gpr_cause_mips64,
- gpr_pc_mips64,
- gpr_ic_mips64,
- gpr_dummy_mips64
-};
+static const uint32_t g_gpr_regnums[] = {
+ gpr_zero_mips64, gpr_r1_mips64, gpr_r2_mips64, gpr_r3_mips64,
+ gpr_r4_mips64, gpr_r5_mips64, gpr_r6_mips64, gpr_r7_mips64,
+ gpr_r8_mips64, gpr_r9_mips64, gpr_r10_mips64, gpr_r11_mips64,
+ gpr_r12_mips64, gpr_r13_mips64, gpr_r14_mips64, gpr_r15_mips64,
+ gpr_r16_mips64, gpr_r17_mips64, gpr_r18_mips64, gpr_r19_mips64,
+ gpr_r20_mips64, gpr_r21_mips64, gpr_r22_mips64, gpr_r23_mips64,
+ gpr_r24_mips64, gpr_r25_mips64, gpr_r26_mips64, gpr_r27_mips64,
+ gpr_gp_mips64, gpr_sp_mips64, gpr_r30_mips64, gpr_ra_mips64,
+ gpr_sr_mips64, gpr_mullo_mips64, gpr_mulhi_mips64, gpr_badvaddr_mips64,
+ gpr_cause_mips64, gpr_pc_mips64, gpr_ic_mips64, gpr_dummy_mips64};
// Number of register sets provided by this context.
-enum
-{
- k_num_register_sets = 1
-};
+enum { k_num_register_sets = 1 };
-static const RegisterSet
-g_reg_sets_mips64[k_num_register_sets] =
-{
- { "General Purpose Registers", "gpr", k_num_gpr_registers_mips64, g_gpr_regnums },
+static const RegisterSet g_reg_sets_mips64[k_num_register_sets] = {
+ {"General Purpose Registers", "gpr", k_num_gpr_registers_mips64,
+ g_gpr_regnums},
};
-bool RegisterContextPOSIX_mips64::IsGPR(unsigned reg)
-{
- return reg <= k_num_gpr_registers_mips64; // GPR's come first.
+bool RegisterContextPOSIX_mips64::IsGPR(unsigned reg) {
+ return reg <= k_num_gpr_registers_mips64; // GPR's come first.
}
-bool
-RegisterContextPOSIX_mips64::IsFPR(unsigned reg)
-{
- // XXX
- return false;
+bool RegisterContextPOSIX_mips64::IsFPR(unsigned reg) {
+ // XXX
+ return false;
}
-RegisterContextPOSIX_mips64::RegisterContextPOSIX_mips64(Thread &thread,
- uint32_t concrete_frame_idx,
- RegisterInfoInterface *register_info)
- : RegisterContext(thread, concrete_frame_idx)
-{
- m_register_info_ap.reset(register_info);
+RegisterContextPOSIX_mips64::RegisterContextPOSIX_mips64(
+ Thread &thread, uint32_t concrete_frame_idx,
+ RegisterInfoInterface *register_info)
+ : RegisterContext(thread, concrete_frame_idx) {
+ m_register_info_ap.reset(register_info);
- // elf-core yet to support ReadFPR()
- ProcessSP base = CalculateProcess();
- if (base.get()->GetPluginName() == ProcessElfCore::GetPluginNameStatic())
- return;
+ // elf-core yet to support ReadFPR()
+ ProcessSP base = CalculateProcess();
+ if (base.get()->GetPluginName() == ProcessElfCore::GetPluginNameStatic())
+ return;
}
-RegisterContextPOSIX_mips64::~RegisterContextPOSIX_mips64()
-{
-}
+RegisterContextPOSIX_mips64::~RegisterContextPOSIX_mips64() {}
-void
-RegisterContextPOSIX_mips64::Invalidate()
-{
-}
+void RegisterContextPOSIX_mips64::Invalidate() {}
+
+void RegisterContextPOSIX_mips64::InvalidateAllRegisters() {}
-void
-RegisterContextPOSIX_mips64::InvalidateAllRegisters()
-{
+unsigned RegisterContextPOSIX_mips64::GetRegisterOffset(unsigned reg) {
+ assert(reg < k_num_registers_mips64 && "Invalid register number.");
+ return GetRegisterInfo()[reg].byte_offset;
}
-unsigned
-RegisterContextPOSIX_mips64::GetRegisterOffset(unsigned reg)
-{
- assert(reg < k_num_registers_mips64 && "Invalid register number.");
- return GetRegisterInfo()[reg].byte_offset;
+unsigned RegisterContextPOSIX_mips64::GetRegisterSize(unsigned reg) {
+ assert(reg < k_num_registers_mips64 && "Invalid register number.");
+ return GetRegisterInfo()[reg].byte_size;
}
-unsigned
-RegisterContextPOSIX_mips64::GetRegisterSize(unsigned reg)
-{
- assert(reg < k_num_registers_mips64 && "Invalid register number.");
- return GetRegisterInfo()[reg].byte_size;
+size_t RegisterContextPOSIX_mips64::GetRegisterCount() {
+ size_t num_registers = k_num_registers_mips64;
+ return num_registers;
}
-size_t
-RegisterContextPOSIX_mips64::GetRegisterCount()
-{
- size_t num_registers = k_num_registers_mips64;
- return num_registers;
+size_t RegisterContextPOSIX_mips64::GetGPRSize() {
+ return m_register_info_ap->GetGPRSize();
}
-size_t
-RegisterContextPOSIX_mips64::GetGPRSize()
-{
- return m_register_info_ap->GetGPRSize();
+const RegisterInfo *RegisterContextPOSIX_mips64::GetRegisterInfo() {
+ // Commonly, this method is overridden and g_register_infos is copied and
+ // specialized.
+ // So, use GetRegisterInfo() rather than g_register_infos in this scope.
+ return m_register_info_ap->GetRegisterInfo();
}
const RegisterInfo *
-RegisterContextPOSIX_mips64::GetRegisterInfo()
-{
- // Commonly, this method is overridden and g_register_infos is copied and specialized.
- // So, use GetRegisterInfo() rather than g_register_infos in this scope.
- return m_register_info_ap->GetRegisterInfo ();
+RegisterContextPOSIX_mips64::GetRegisterInfoAtIndex(size_t reg) {
+ if (reg < k_num_registers_mips64)
+ return &GetRegisterInfo()[reg];
+ else
+ return NULL;
}
-const RegisterInfo *
-RegisterContextPOSIX_mips64::GetRegisterInfoAtIndex(size_t reg)
-{
- if (reg < k_num_registers_mips64)
- return &GetRegisterInfo()[reg];
- else
- return NULL;
-}
-
-size_t
-RegisterContextPOSIX_mips64::GetRegisterSetCount()
-{
- size_t sets = 0;
- for (size_t set = 0; set < k_num_register_sets; ++set)
- {
- if (IsRegisterSetAvailable(set))
- ++sets;
- }
-
- return sets;
-}
-
-const RegisterSet *
-RegisterContextPOSIX_mips64::GetRegisterSet(size_t set)
-{
+size_t RegisterContextPOSIX_mips64::GetRegisterSetCount() {
+ size_t sets = 0;
+ for (size_t set = 0; set < k_num_register_sets; ++set) {
if (IsRegisterSetAvailable(set))
- return &g_reg_sets_mips64[set];
- else
- return NULL;
+ ++sets;
+ }
+
+ return sets;
}
-const char *
-RegisterContextPOSIX_mips64::GetRegisterName(unsigned reg)
-{
- assert(reg < k_num_registers_mips64 && "Invalid register offset.");
- return GetRegisterInfo()[reg].name;
+const RegisterSet *RegisterContextPOSIX_mips64::GetRegisterSet(size_t set) {
+ if (IsRegisterSetAvailable(set))
+ return &g_reg_sets_mips64[set];
+ else
+ return NULL;
}
-lldb::ByteOrder
-RegisterContextPOSIX_mips64::GetByteOrder()
-{
- // Get the target process whose privileged thread was used for the register read.
- lldb::ByteOrder byte_order = eByteOrderInvalid;
- Process *process = CalculateProcess().get();
+const char *RegisterContextPOSIX_mips64::GetRegisterName(unsigned reg) {
+ assert(reg < k_num_registers_mips64 && "Invalid register offset.");
+ return GetRegisterInfo()[reg].name;
+}
+
+lldb::ByteOrder RegisterContextPOSIX_mips64::GetByteOrder() {
+ // Get the target process whose privileged thread was used for the register
+ // read.
+ lldb::ByteOrder byte_order = eByteOrderInvalid;
+ Process *process = CalculateProcess().get();
- if (process)
- byte_order = process->GetByteOrder();
- return byte_order;
+ if (process)
+ byte_order = process->GetByteOrder();
+ return byte_order;
}
-bool
-RegisterContextPOSIX_mips64::IsRegisterSetAvailable(size_t set_index)
-{
- size_t num_sets = k_num_register_sets;
+bool RegisterContextPOSIX_mips64::IsRegisterSetAvailable(size_t set_index) {
+ size_t num_sets = k_num_register_sets;
- return (set_index < num_sets);
+ return (set_index < num_sets);
}
// Used when parsing DWARF and EH frame information and any other
// object file sections that contain register numbers in them.
-uint32_t
-RegisterContextPOSIX_mips64::ConvertRegisterKindToRegisterNumber(lldb::RegisterKind kind,
- uint32_t num)
-{
- const uint32_t num_regs = GetRegisterCount();
-
- assert (kind < kNumRegisterKinds);
- for (uint32_t reg_idx = 0; reg_idx < num_regs; ++reg_idx)
- {
- const RegisterInfo *reg_info = GetRegisterInfoAtIndex (reg_idx);
-
- if (reg_info->kinds[kind] == num)
- return reg_idx;
- }
+uint32_t RegisterContextPOSIX_mips64::ConvertRegisterKindToRegisterNumber(
+ lldb::RegisterKind kind, uint32_t num) {
+ const uint32_t num_regs = GetRegisterCount();
+
+ assert(kind < kNumRegisterKinds);
+ for (uint32_t reg_idx = 0; reg_idx < num_regs; ++reg_idx) {
+ const RegisterInfo *reg_info = GetRegisterInfoAtIndex(reg_idx);
+
+ if (reg_info->kinds[kind] == num)
+ return reg_idx;
+ }
- return LLDB_INVALID_REGNUM;
+ return LLDB_INVALID_REGNUM;
}
-
Modified: lldb/trunk/source/Plugins/Process/Utility/RegisterContextPOSIX_mips64.h
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/source/Plugins/Process/Utility/RegisterContextPOSIX_mips64.h?rev=280751&r1=280750&r2=280751&view=diff
==============================================================================
--- lldb/trunk/source/Plugins/Process/Utility/RegisterContextPOSIX_mips64.h (original)
+++ lldb/trunk/source/Plugins/Process/Utility/RegisterContextPOSIX_mips64.h Tue Sep 6 15:57:50 2016
@@ -14,82 +14,69 @@
// C++ Includes
// Other libraries and framework includes
// Project includes
-#include "lldb/Core/Log.h"
-#include "lldb/Target/RegisterContext.h"
-#include "RegisterInfoInterface.h"
#include "RegisterContext_mips.h"
+#include "RegisterInfoInterface.h"
#include "lldb-mips-freebsd-register-enums.h"
+#include "lldb/Core/Log.h"
+#include "lldb/Target/RegisterContext.h"
using namespace lldb_private;
class ProcessMonitor;
-class RegisterContextPOSIX_mips64
- : public lldb_private::RegisterContext
-{
+class RegisterContextPOSIX_mips64 : public lldb_private::RegisterContext {
public:
- RegisterContextPOSIX_mips64 (lldb_private::Thread &thread,
- uint32_t concrete_frame_idx,
- lldb_private::RegisterInfoInterface *register_info);
+ RegisterContextPOSIX_mips64(
+ lldb_private::Thread &thread, uint32_t concrete_frame_idx,
+ lldb_private::RegisterInfoInterface *register_info);
- ~RegisterContextPOSIX_mips64() override;
+ ~RegisterContextPOSIX_mips64() override;
- void
- Invalidate();
+ void Invalidate();
- void
- InvalidateAllRegisters() override;
+ void InvalidateAllRegisters() override;
- size_t
- GetRegisterCount() override;
+ size_t GetRegisterCount() override;
- virtual size_t
- GetGPRSize();
+ virtual size_t GetGPRSize();
- virtual unsigned
- GetRegisterSize(unsigned reg);
+ virtual unsigned GetRegisterSize(unsigned reg);
- virtual unsigned
- GetRegisterOffset(unsigned reg);
+ virtual unsigned GetRegisterOffset(unsigned reg);
- const lldb_private::RegisterInfo *
- GetRegisterInfoAtIndex(size_t reg) override;
+ const lldb_private::RegisterInfo *GetRegisterInfoAtIndex(size_t reg) override;
- size_t
- GetRegisterSetCount() override;
+ size_t GetRegisterSetCount() override;
- const lldb_private::RegisterSet *
- GetRegisterSet(size_t set) override;
+ const lldb_private::RegisterSet *GetRegisterSet(size_t set) override;
- const char *
- GetRegisterName(unsigned reg);
+ const char *GetRegisterName(unsigned reg);
- uint32_t
- ConvertRegisterKindToRegisterNumber(lldb::RegisterKind kind, uint32_t num) override;
+ uint32_t ConvertRegisterKindToRegisterNumber(lldb::RegisterKind kind,
+ uint32_t num) override;
protected:
- uint64_t m_gpr_mips64[k_num_gpr_registers_mips64]; // general purpose registers.
- std::unique_ptr<lldb_private::RegisterInfoInterface> m_register_info_ap; // Register Info Interface (FreeBSD or Linux)
+ uint64_t
+ m_gpr_mips64[k_num_gpr_registers_mips64]; // general purpose registers.
+ std::unique_ptr<lldb_private::RegisterInfoInterface>
+ m_register_info_ap; // Register Info Interface (FreeBSD or Linux)
- // Determines if an extended register set is supported on the processor running the inferior process.
- virtual bool
- IsRegisterSetAvailable(size_t set_index);
+ // Determines if an extended register set is supported on the processor
+ // running the inferior process.
+ virtual bool IsRegisterSetAvailable(size_t set_index);
- virtual const lldb_private::RegisterInfo *
- GetRegisterInfo();
+ virtual const lldb_private::RegisterInfo *GetRegisterInfo();
- bool
- IsGPR(unsigned reg);
+ bool IsGPR(unsigned reg);
- bool
- IsFPR(unsigned reg);
+ bool IsFPR(unsigned reg);
- lldb::ByteOrder GetByteOrder();
+ lldb::ByteOrder GetByteOrder();
- virtual bool ReadGPR() = 0;
- virtual bool ReadFPR() = 0;
- virtual bool WriteGPR() = 0;
- virtual bool WriteFPR() = 0;
+ virtual bool ReadGPR() = 0;
+ virtual bool ReadFPR() = 0;
+ virtual bool WriteGPR() = 0;
+ virtual bool WriteFPR() = 0;
};
#endif // liblldb_RegisterContextPOSIX_mips64_h_
Modified: lldb/trunk/source/Plugins/Process/Utility/RegisterContextPOSIX_powerpc.cpp
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/source/Plugins/Process/Utility/RegisterContextPOSIX_powerpc.cpp?rev=280751&r1=280750&r2=280751&view=diff
==============================================================================
--- lldb/trunk/source/Plugins/Process/Utility/RegisterContextPOSIX_powerpc.cpp (original)
+++ lldb/trunk/source/Plugins/Process/Utility/RegisterContextPOSIX_powerpc.cpp Tue Sep 6 15:57:50 2016
@@ -1,4 +1,5 @@
-//===-- RegisterContextPOSIX_powerpc.cpp -------------------------*- C++ -*-===//
+//===-- RegisterContextPOSIX_powerpc.cpp -------------------------*- C++
+//-*-===//
//
// The LLVM Compiler Infrastructure
//
@@ -15,305 +16,184 @@
#include "lldb/Core/DataExtractor.h"
#include "lldb/Core/RegisterValue.h"
#include "lldb/Core/Scalar.h"
+#include "lldb/Host/Endian.h"
#include "lldb/Target/Target.h"
#include "lldb/Target/Thread.h"
-#include "lldb/Host/Endian.h"
#include "llvm/Support/Compiler.h"
-#include "RegisterContextPOSIX_powerpc.h"
#include "Plugins/Process/elf-core/ProcessElfCore.h"
+#include "RegisterContextPOSIX_powerpc.h"
using namespace lldb_private;
using namespace lldb;
-static const
-uint32_t g_gpr_regnums[] =
-{
- gpr_r0_powerpc,
- gpr_r1_powerpc,
- gpr_r2_powerpc,
- gpr_r3_powerpc,
- gpr_r4_powerpc,
- gpr_r5_powerpc,
- gpr_r6_powerpc,
- gpr_r7_powerpc,
- gpr_r8_powerpc,
- gpr_r9_powerpc,
- gpr_r10_powerpc,
- gpr_r11_powerpc,
- gpr_r12_powerpc,
- gpr_r13_powerpc,
- gpr_r14_powerpc,
- gpr_r15_powerpc,
- gpr_r16_powerpc,
- gpr_r17_powerpc,
- gpr_r18_powerpc,
- gpr_r19_powerpc,
- gpr_r20_powerpc,
- gpr_r21_powerpc,
- gpr_r22_powerpc,
- gpr_r23_powerpc,
- gpr_r24_powerpc,
- gpr_r25_powerpc,
- gpr_r26_powerpc,
- gpr_r27_powerpc,
- gpr_r28_powerpc,
- gpr_r29_powerpc,
- gpr_r30_powerpc,
- gpr_r31_powerpc,
- gpr_lr_powerpc,
- gpr_cr_powerpc,
- gpr_xer_powerpc,
- gpr_ctr_powerpc,
+static const uint32_t g_gpr_regnums[] = {
+ gpr_r0_powerpc, gpr_r1_powerpc, gpr_r2_powerpc, gpr_r3_powerpc,
+ gpr_r4_powerpc, gpr_r5_powerpc, gpr_r6_powerpc, gpr_r7_powerpc,
+ gpr_r8_powerpc, gpr_r9_powerpc, gpr_r10_powerpc, gpr_r11_powerpc,
+ gpr_r12_powerpc, gpr_r13_powerpc, gpr_r14_powerpc, gpr_r15_powerpc,
+ gpr_r16_powerpc, gpr_r17_powerpc, gpr_r18_powerpc, gpr_r19_powerpc,
+ gpr_r20_powerpc, gpr_r21_powerpc, gpr_r22_powerpc, gpr_r23_powerpc,
+ gpr_r24_powerpc, gpr_r25_powerpc, gpr_r26_powerpc, gpr_r27_powerpc,
+ gpr_r28_powerpc, gpr_r29_powerpc, gpr_r30_powerpc, gpr_r31_powerpc,
+ gpr_lr_powerpc, gpr_cr_powerpc, gpr_xer_powerpc, gpr_ctr_powerpc,
gpr_pc_powerpc,
};
-static const
-uint32_t g_fpr_regnums[] =
-{
- fpr_f0_powerpc,
- fpr_f1_powerpc,
- fpr_f2_powerpc,
- fpr_f3_powerpc,
- fpr_f4_powerpc,
- fpr_f5_powerpc,
- fpr_f6_powerpc,
- fpr_f7_powerpc,
- fpr_f8_powerpc,
- fpr_f9_powerpc,
- fpr_f10_powerpc,
- fpr_f11_powerpc,
- fpr_f12_powerpc,
- fpr_f13_powerpc,
- fpr_f14_powerpc,
- fpr_f15_powerpc,
- fpr_f16_powerpc,
- fpr_f17_powerpc,
- fpr_f18_powerpc,
- fpr_f19_powerpc,
- fpr_f20_powerpc,
- fpr_f21_powerpc,
- fpr_f22_powerpc,
- fpr_f23_powerpc,
- fpr_f24_powerpc,
- fpr_f25_powerpc,
- fpr_f26_powerpc,
- fpr_f27_powerpc,
- fpr_f28_powerpc,
- fpr_f29_powerpc,
- fpr_f30_powerpc,
- fpr_f31_powerpc,
+static const uint32_t g_fpr_regnums[] = {
+ fpr_f0_powerpc, fpr_f1_powerpc, fpr_f2_powerpc, fpr_f3_powerpc,
+ fpr_f4_powerpc, fpr_f5_powerpc, fpr_f6_powerpc, fpr_f7_powerpc,
+ fpr_f8_powerpc, fpr_f9_powerpc, fpr_f10_powerpc, fpr_f11_powerpc,
+ fpr_f12_powerpc, fpr_f13_powerpc, fpr_f14_powerpc, fpr_f15_powerpc,
+ fpr_f16_powerpc, fpr_f17_powerpc, fpr_f18_powerpc, fpr_f19_powerpc,
+ fpr_f20_powerpc, fpr_f21_powerpc, fpr_f22_powerpc, fpr_f23_powerpc,
+ fpr_f24_powerpc, fpr_f25_powerpc, fpr_f26_powerpc, fpr_f27_powerpc,
+ fpr_f28_powerpc, fpr_f29_powerpc, fpr_f30_powerpc, fpr_f31_powerpc,
fpr_fpscr_powerpc,
};
-static const
-uint32_t g_vmx_regnums[] =
-{
- vmx_v0_powerpc,
- vmx_v1_powerpc,
- vmx_v2_powerpc,
- vmx_v3_powerpc,
- vmx_v4_powerpc,
- vmx_v5_powerpc,
- vmx_v6_powerpc,
- vmx_v7_powerpc,
- vmx_v8_powerpc,
- vmx_v9_powerpc,
- vmx_v10_powerpc,
- vmx_v11_powerpc,
- vmx_v12_powerpc,
- vmx_v13_powerpc,
- vmx_v14_powerpc,
- vmx_v15_powerpc,
- vmx_v16_powerpc,
- vmx_v17_powerpc,
- vmx_v18_powerpc,
- vmx_v19_powerpc,
- vmx_v20_powerpc,
- vmx_v21_powerpc,
- vmx_v22_powerpc,
- vmx_v23_powerpc,
- vmx_v24_powerpc,
- vmx_v25_powerpc,
- vmx_v26_powerpc,
- vmx_v27_powerpc,
- vmx_v28_powerpc,
- vmx_v29_powerpc,
- vmx_v30_powerpc,
- vmx_v31_powerpc,
- vmx_vrsave_powerpc,
- vmx_vscr_powerpc,
+static const uint32_t g_vmx_regnums[] = {
+ vmx_v0_powerpc, vmx_v1_powerpc, vmx_v2_powerpc, vmx_v3_powerpc,
+ vmx_v4_powerpc, vmx_v5_powerpc, vmx_v6_powerpc, vmx_v7_powerpc,
+ vmx_v8_powerpc, vmx_v9_powerpc, vmx_v10_powerpc, vmx_v11_powerpc,
+ vmx_v12_powerpc, vmx_v13_powerpc, vmx_v14_powerpc, vmx_v15_powerpc,
+ vmx_v16_powerpc, vmx_v17_powerpc, vmx_v18_powerpc, vmx_v19_powerpc,
+ vmx_v20_powerpc, vmx_v21_powerpc, vmx_v22_powerpc, vmx_v23_powerpc,
+ vmx_v24_powerpc, vmx_v25_powerpc, vmx_v26_powerpc, vmx_v27_powerpc,
+ vmx_v28_powerpc, vmx_v29_powerpc, vmx_v30_powerpc, vmx_v31_powerpc,
+ vmx_vrsave_powerpc, vmx_vscr_powerpc,
};
// Number of register sets provided by this context.
-enum
-{
- k_num_register_sets = 3
-};
+enum { k_num_register_sets = 3 };
-static const RegisterSet
-g_reg_sets_powerpc[k_num_register_sets] =
-{
- { "General Purpose Registers", "gpr", k_num_gpr_registers_powerpc, g_gpr_regnums },
- { "Floating Point Registers", "fpr", k_num_fpr_registers_powerpc, g_fpr_regnums },
- { "Altivec/VMX Registers", "vmx", k_num_vmx_registers_powerpc, g_vmx_regnums },
+static const RegisterSet g_reg_sets_powerpc[k_num_register_sets] = {
+ {"General Purpose Registers", "gpr", k_num_gpr_registers_powerpc,
+ g_gpr_regnums},
+ {"Floating Point Registers", "fpr", k_num_fpr_registers_powerpc,
+ g_fpr_regnums},
+ {"Altivec/VMX Registers", "vmx", k_num_vmx_registers_powerpc,
+ g_vmx_regnums},
};
-static_assert(k_first_gpr_powerpc == 0, "GPRs must index starting at 0, or fix IsGPR()");
-bool RegisterContextPOSIX_powerpc::IsGPR(unsigned reg)
-{
- return (reg <= k_last_gpr_powerpc); // GPR's come first.
+static_assert(k_first_gpr_powerpc == 0,
+ "GPRs must index starting at 0, or fix IsGPR()");
+bool RegisterContextPOSIX_powerpc::IsGPR(unsigned reg) {
+ return (reg <= k_last_gpr_powerpc); // GPR's come first.
}
-bool
-RegisterContextPOSIX_powerpc::IsFPR(unsigned reg)
-{
- return (reg >= k_first_fpr) && (reg <= k_last_fpr);
+bool RegisterContextPOSIX_powerpc::IsFPR(unsigned reg) {
+ return (reg >= k_first_fpr) && (reg <= k_last_fpr);
}
-bool
-RegisterContextPOSIX_powerpc::IsVMX(unsigned reg)
-{
- return (reg >= k_first_vmx) && (reg <= k_last_vmx);
+bool RegisterContextPOSIX_powerpc::IsVMX(unsigned reg) {
+ return (reg >= k_first_vmx) && (reg <= k_last_vmx);
}
-RegisterContextPOSIX_powerpc::RegisterContextPOSIX_powerpc(Thread &thread,
- uint32_t concrete_frame_idx,
- RegisterInfoInterface *register_info)
- : RegisterContext(thread, concrete_frame_idx)
-{
- m_register_info_ap.reset(register_info);
+RegisterContextPOSIX_powerpc::RegisterContextPOSIX_powerpc(
+ Thread &thread, uint32_t concrete_frame_idx,
+ RegisterInfoInterface *register_info)
+ : RegisterContext(thread, concrete_frame_idx) {
+ m_register_info_ap.reset(register_info);
- // elf-core yet to support ReadFPR()
- ProcessSP base = CalculateProcess();
- if (base.get()->GetPluginName() == ProcessElfCore::GetPluginNameStatic())
- return;
+ // elf-core yet to support ReadFPR()
+ ProcessSP base = CalculateProcess();
+ if (base.get()->GetPluginName() == ProcessElfCore::GetPluginNameStatic())
+ return;
}
-RegisterContextPOSIX_powerpc::~RegisterContextPOSIX_powerpc()
-{
-}
+RegisterContextPOSIX_powerpc::~RegisterContextPOSIX_powerpc() {}
-void
-RegisterContextPOSIX_powerpc::Invalidate()
-{
-}
+void RegisterContextPOSIX_powerpc::Invalidate() {}
-void
-RegisterContextPOSIX_powerpc::InvalidateAllRegisters()
-{
+void RegisterContextPOSIX_powerpc::InvalidateAllRegisters() {}
+
+unsigned RegisterContextPOSIX_powerpc::GetRegisterOffset(unsigned reg) {
+ assert(reg < k_num_registers_powerpc && "Invalid register number.");
+ return GetRegisterInfo()[reg].byte_offset;
}
-unsigned
-RegisterContextPOSIX_powerpc::GetRegisterOffset(unsigned reg)
-{
- assert(reg < k_num_registers_powerpc && "Invalid register number.");
- return GetRegisterInfo()[reg].byte_offset;
+unsigned RegisterContextPOSIX_powerpc::GetRegisterSize(unsigned reg) {
+ assert(reg < k_num_registers_powerpc && "Invalid register number.");
+ return GetRegisterInfo()[reg].byte_size;
}
-unsigned
-RegisterContextPOSIX_powerpc::GetRegisterSize(unsigned reg)
-{
- assert(reg < k_num_registers_powerpc && "Invalid register number.");
- return GetRegisterInfo()[reg].byte_size;
+size_t RegisterContextPOSIX_powerpc::GetRegisterCount() {
+ size_t num_registers = k_num_registers_powerpc;
+ return num_registers;
}
-size_t
-RegisterContextPOSIX_powerpc::GetRegisterCount()
-{
- size_t num_registers = k_num_registers_powerpc;
- return num_registers;
+size_t RegisterContextPOSIX_powerpc::GetGPRSize() {
+ return m_register_info_ap->GetGPRSize();
}
-size_t
-RegisterContextPOSIX_powerpc::GetGPRSize()
-{
- return m_register_info_ap->GetGPRSize();
+const RegisterInfo *RegisterContextPOSIX_powerpc::GetRegisterInfo() {
+ // Commonly, this method is overridden and g_register_infos is copied and
+ // specialized.
+ // So, use GetRegisterInfo() rather than g_register_infos in this scope.
+ return m_register_info_ap->GetRegisterInfo();
}
const RegisterInfo *
-RegisterContextPOSIX_powerpc::GetRegisterInfo()
-{
- // Commonly, this method is overridden and g_register_infos is copied and specialized.
- // So, use GetRegisterInfo() rather than g_register_infos in this scope.
- return m_register_info_ap->GetRegisterInfo ();
+RegisterContextPOSIX_powerpc::GetRegisterInfoAtIndex(size_t reg) {
+ if (reg < k_num_registers_powerpc)
+ return &GetRegisterInfo()[reg];
+ else
+ return NULL;
}
-const RegisterInfo *
-RegisterContextPOSIX_powerpc::GetRegisterInfoAtIndex(size_t reg)
-{
- if (reg < k_num_registers_powerpc)
- return &GetRegisterInfo()[reg];
- else
- return NULL;
-}
-
-size_t
-RegisterContextPOSIX_powerpc::GetRegisterSetCount()
-{
- size_t sets = 0;
- for (size_t set = 0; set < k_num_register_sets; ++set)
- {
- if (IsRegisterSetAvailable(set))
- ++sets;
- }
-
- return sets;
-}
-
-const RegisterSet *
-RegisterContextPOSIX_powerpc::GetRegisterSet(size_t set)
-{
+size_t RegisterContextPOSIX_powerpc::GetRegisterSetCount() {
+ size_t sets = 0;
+ for (size_t set = 0; set < k_num_register_sets; ++set) {
if (IsRegisterSetAvailable(set))
- return &g_reg_sets_powerpc[set];
- else
- return NULL;
+ ++sets;
+ }
+
+ return sets;
}
-const char *
-RegisterContextPOSIX_powerpc::GetRegisterName(unsigned reg)
-{
- assert(reg < k_num_registers_powerpc && "Invalid register offset.");
- return GetRegisterInfo()[reg].name;
+const RegisterSet *RegisterContextPOSIX_powerpc::GetRegisterSet(size_t set) {
+ if (IsRegisterSetAvailable(set))
+ return &g_reg_sets_powerpc[set];
+ else
+ return NULL;
}
-lldb::ByteOrder
-RegisterContextPOSIX_powerpc::GetByteOrder()
-{
- // Get the target process whose privileged thread was used for the register read.
- lldb::ByteOrder byte_order = eByteOrderInvalid;
- Process *process = CalculateProcess().get();
+const char *RegisterContextPOSIX_powerpc::GetRegisterName(unsigned reg) {
+ assert(reg < k_num_registers_powerpc && "Invalid register offset.");
+ return GetRegisterInfo()[reg].name;
+}
+
+lldb::ByteOrder RegisterContextPOSIX_powerpc::GetByteOrder() {
+ // Get the target process whose privileged thread was used for the register
+ // read.
+ lldb::ByteOrder byte_order = eByteOrderInvalid;
+ Process *process = CalculateProcess().get();
- if (process)
- byte_order = process->GetByteOrder();
- return byte_order;
+ if (process)
+ byte_order = process->GetByteOrder();
+ return byte_order;
}
-bool
-RegisterContextPOSIX_powerpc::IsRegisterSetAvailable(size_t set_index)
-{
- size_t num_sets = k_num_register_sets;
+bool RegisterContextPOSIX_powerpc::IsRegisterSetAvailable(size_t set_index) {
+ size_t num_sets = k_num_register_sets;
- return (set_index < num_sets);
+ return (set_index < num_sets);
}
// Used when parsing DWARF and EH frame information and any other
// object file sections that contain register numbers in them.
-uint32_t
-RegisterContextPOSIX_powerpc::ConvertRegisterKindToRegisterNumber(lldb::RegisterKind kind,
- uint32_t num)
-{
- const uint32_t num_regs = GetRegisterCount();
-
- assert (kind < kNumRegisterKinds);
- for (uint32_t reg_idx = 0; reg_idx < num_regs; ++reg_idx)
- {
- const RegisterInfo *reg_info = GetRegisterInfoAtIndex (reg_idx);
-
- if (reg_info->kinds[kind] == num)
- return reg_idx;
- }
+uint32_t RegisterContextPOSIX_powerpc::ConvertRegisterKindToRegisterNumber(
+ lldb::RegisterKind kind, uint32_t num) {
+ const uint32_t num_regs = GetRegisterCount();
+
+ assert(kind < kNumRegisterKinds);
+ for (uint32_t reg_idx = 0; reg_idx < num_regs; ++reg_idx) {
+ const RegisterInfo *reg_info = GetRegisterInfoAtIndex(reg_idx);
+
+ if (reg_info->kinds[kind] == num)
+ return reg_idx;
+ }
- return LLDB_INVALID_REGNUM;
+ return LLDB_INVALID_REGNUM;
}
-
Modified: lldb/trunk/source/Plugins/Process/Utility/RegisterContextPOSIX_powerpc.h
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/source/Plugins/Process/Utility/RegisterContextPOSIX_powerpc.h?rev=280751&r1=280750&r2=280751&view=diff
==============================================================================
--- lldb/trunk/source/Plugins/Process/Utility/RegisterContextPOSIX_powerpc.h (original)
+++ lldb/trunk/source/Plugins/Process/Utility/RegisterContextPOSIX_powerpc.h Tue Sep 6 15:57:50 2016
@@ -14,210 +14,196 @@
// C++ Includes
// Other libraries and framework includes
// Project includes
+#include "RegisterContext_powerpc.h"
+#include "RegisterInfoInterface.h"
#include "lldb/Core/Log.h"
#include "lldb/Target/RegisterContext.h"
-#include "RegisterInfoInterface.h"
-#include "RegisterContext_powerpc.h"
class ProcessMonitor;
// ---------------------------------------------------------------------------
// Internal codes for all powerpc registers.
// ---------------------------------------------------------------------------
-enum
-{
- k_first_gpr_powerpc,
- gpr_r0_powerpc = k_first_gpr_powerpc,
- gpr_r1_powerpc,
- gpr_r2_powerpc,
- gpr_r3_powerpc,
- gpr_r4_powerpc,
- gpr_r5_powerpc,
- gpr_r6_powerpc,
- gpr_r7_powerpc,
- gpr_r8_powerpc,
- gpr_r9_powerpc,
- gpr_r10_powerpc,
- gpr_r11_powerpc,
- gpr_r12_powerpc,
- gpr_r13_powerpc,
- gpr_r14_powerpc,
- gpr_r15_powerpc,
- gpr_r16_powerpc,
- gpr_r17_powerpc,
- gpr_r18_powerpc,
- gpr_r19_powerpc,
- gpr_r20_powerpc,
- gpr_r21_powerpc,
- gpr_r22_powerpc,
- gpr_r23_powerpc,
- gpr_r24_powerpc,
- gpr_r25_powerpc,
- gpr_r26_powerpc,
- gpr_r27_powerpc,
- gpr_r28_powerpc,
- gpr_r29_powerpc,
- gpr_r30_powerpc,
- gpr_r31_powerpc,
- gpr_lr_powerpc,
- gpr_cr_powerpc,
- gpr_xer_powerpc,
- gpr_ctr_powerpc,
- gpr_pc_powerpc,
- k_last_gpr_powerpc = gpr_pc_powerpc,
-
- k_first_fpr,
- fpr_f0_powerpc = k_first_fpr,
- fpr_f1_powerpc,
- fpr_f2_powerpc,
- fpr_f3_powerpc,
- fpr_f4_powerpc,
- fpr_f5_powerpc,
- fpr_f6_powerpc,
- fpr_f7_powerpc,
- fpr_f8_powerpc,
- fpr_f9_powerpc,
- fpr_f10_powerpc,
- fpr_f11_powerpc,
- fpr_f12_powerpc,
- fpr_f13_powerpc,
- fpr_f14_powerpc,
- fpr_f15_powerpc,
- fpr_f16_powerpc,
- fpr_f17_powerpc,
- fpr_f18_powerpc,
- fpr_f19_powerpc,
- fpr_f20_powerpc,
- fpr_f21_powerpc,
- fpr_f22_powerpc,
- fpr_f23_powerpc,
- fpr_f24_powerpc,
- fpr_f25_powerpc,
- fpr_f26_powerpc,
- fpr_f27_powerpc,
- fpr_f28_powerpc,
- fpr_f29_powerpc,
- fpr_f30_powerpc,
- fpr_f31_powerpc,
- fpr_fpscr_powerpc,
- k_last_fpr = fpr_fpscr_powerpc,
-
- k_first_vmx,
- vmx_v0_powerpc = k_first_vmx,
- vmx_v1_powerpc,
- vmx_v2_powerpc,
- vmx_v3_powerpc,
- vmx_v4_powerpc,
- vmx_v5_powerpc,
- vmx_v6_powerpc,
- vmx_v7_powerpc,
- vmx_v8_powerpc,
- vmx_v9_powerpc,
- vmx_v10_powerpc,
- vmx_v11_powerpc,
- vmx_v12_powerpc,
- vmx_v13_powerpc,
- vmx_v14_powerpc,
- vmx_v15_powerpc,
- vmx_v16_powerpc,
- vmx_v17_powerpc,
- vmx_v18_powerpc,
- vmx_v19_powerpc,
- vmx_v20_powerpc,
- vmx_v21_powerpc,
- vmx_v22_powerpc,
- vmx_v23_powerpc,
- vmx_v24_powerpc,
- vmx_v25_powerpc,
- vmx_v26_powerpc,
- vmx_v27_powerpc,
- vmx_v28_powerpc,
- vmx_v29_powerpc,
- vmx_v30_powerpc,
- vmx_v31_powerpc,
- vmx_vrsave_powerpc,
- vmx_vscr_powerpc,
- k_last_vmx = vmx_vscr_powerpc,
-
- k_num_registers_powerpc,
- k_num_gpr_registers_powerpc = k_last_gpr_powerpc - k_first_gpr_powerpc + 1,
- k_num_fpr_registers_powerpc = k_last_fpr - k_first_fpr + 1,
- k_num_vmx_registers_powerpc = k_last_vmx - k_first_vmx + 1,
+enum {
+ k_first_gpr_powerpc,
+ gpr_r0_powerpc = k_first_gpr_powerpc,
+ gpr_r1_powerpc,
+ gpr_r2_powerpc,
+ gpr_r3_powerpc,
+ gpr_r4_powerpc,
+ gpr_r5_powerpc,
+ gpr_r6_powerpc,
+ gpr_r7_powerpc,
+ gpr_r8_powerpc,
+ gpr_r9_powerpc,
+ gpr_r10_powerpc,
+ gpr_r11_powerpc,
+ gpr_r12_powerpc,
+ gpr_r13_powerpc,
+ gpr_r14_powerpc,
+ gpr_r15_powerpc,
+ gpr_r16_powerpc,
+ gpr_r17_powerpc,
+ gpr_r18_powerpc,
+ gpr_r19_powerpc,
+ gpr_r20_powerpc,
+ gpr_r21_powerpc,
+ gpr_r22_powerpc,
+ gpr_r23_powerpc,
+ gpr_r24_powerpc,
+ gpr_r25_powerpc,
+ gpr_r26_powerpc,
+ gpr_r27_powerpc,
+ gpr_r28_powerpc,
+ gpr_r29_powerpc,
+ gpr_r30_powerpc,
+ gpr_r31_powerpc,
+ gpr_lr_powerpc,
+ gpr_cr_powerpc,
+ gpr_xer_powerpc,
+ gpr_ctr_powerpc,
+ gpr_pc_powerpc,
+ k_last_gpr_powerpc = gpr_pc_powerpc,
+
+ k_first_fpr,
+ fpr_f0_powerpc = k_first_fpr,
+ fpr_f1_powerpc,
+ fpr_f2_powerpc,
+ fpr_f3_powerpc,
+ fpr_f4_powerpc,
+ fpr_f5_powerpc,
+ fpr_f6_powerpc,
+ fpr_f7_powerpc,
+ fpr_f8_powerpc,
+ fpr_f9_powerpc,
+ fpr_f10_powerpc,
+ fpr_f11_powerpc,
+ fpr_f12_powerpc,
+ fpr_f13_powerpc,
+ fpr_f14_powerpc,
+ fpr_f15_powerpc,
+ fpr_f16_powerpc,
+ fpr_f17_powerpc,
+ fpr_f18_powerpc,
+ fpr_f19_powerpc,
+ fpr_f20_powerpc,
+ fpr_f21_powerpc,
+ fpr_f22_powerpc,
+ fpr_f23_powerpc,
+ fpr_f24_powerpc,
+ fpr_f25_powerpc,
+ fpr_f26_powerpc,
+ fpr_f27_powerpc,
+ fpr_f28_powerpc,
+ fpr_f29_powerpc,
+ fpr_f30_powerpc,
+ fpr_f31_powerpc,
+ fpr_fpscr_powerpc,
+ k_last_fpr = fpr_fpscr_powerpc,
+
+ k_first_vmx,
+ vmx_v0_powerpc = k_first_vmx,
+ vmx_v1_powerpc,
+ vmx_v2_powerpc,
+ vmx_v3_powerpc,
+ vmx_v4_powerpc,
+ vmx_v5_powerpc,
+ vmx_v6_powerpc,
+ vmx_v7_powerpc,
+ vmx_v8_powerpc,
+ vmx_v9_powerpc,
+ vmx_v10_powerpc,
+ vmx_v11_powerpc,
+ vmx_v12_powerpc,
+ vmx_v13_powerpc,
+ vmx_v14_powerpc,
+ vmx_v15_powerpc,
+ vmx_v16_powerpc,
+ vmx_v17_powerpc,
+ vmx_v18_powerpc,
+ vmx_v19_powerpc,
+ vmx_v20_powerpc,
+ vmx_v21_powerpc,
+ vmx_v22_powerpc,
+ vmx_v23_powerpc,
+ vmx_v24_powerpc,
+ vmx_v25_powerpc,
+ vmx_v26_powerpc,
+ vmx_v27_powerpc,
+ vmx_v28_powerpc,
+ vmx_v29_powerpc,
+ vmx_v30_powerpc,
+ vmx_v31_powerpc,
+ vmx_vrsave_powerpc,
+ vmx_vscr_powerpc,
+ k_last_vmx = vmx_vscr_powerpc,
+
+ k_num_registers_powerpc,
+ k_num_gpr_registers_powerpc = k_last_gpr_powerpc - k_first_gpr_powerpc + 1,
+ k_num_fpr_registers_powerpc = k_last_fpr - k_first_fpr + 1,
+ k_num_vmx_registers_powerpc = k_last_vmx - k_first_vmx + 1,
};
-class RegisterContextPOSIX_powerpc
- : public lldb_private::RegisterContext
-{
+class RegisterContextPOSIX_powerpc : public lldb_private::RegisterContext {
public:
- RegisterContextPOSIX_powerpc (lldb_private::Thread &thread,
- uint32_t concrete_frame_idx,
- lldb_private::RegisterInfoInterface *register_info);
+ RegisterContextPOSIX_powerpc(
+ lldb_private::Thread &thread, uint32_t concrete_frame_idx,
+ lldb_private::RegisterInfoInterface *register_info);
- ~RegisterContextPOSIX_powerpc() override;
+ ~RegisterContextPOSIX_powerpc() override;
- void
- Invalidate();
+ void Invalidate();
- void
- InvalidateAllRegisters() override;
+ void InvalidateAllRegisters() override;
- size_t
- GetRegisterCount() override;
+ size_t GetRegisterCount() override;
- virtual size_t
- GetGPRSize();
+ virtual size_t GetGPRSize();
- virtual unsigned
- GetRegisterSize(unsigned reg);
+ virtual unsigned GetRegisterSize(unsigned reg);
- virtual unsigned
- GetRegisterOffset(unsigned reg);
+ virtual unsigned GetRegisterOffset(unsigned reg);
- const lldb_private::RegisterInfo *
- GetRegisterInfoAtIndex(size_t reg) override;
+ const lldb_private::RegisterInfo *GetRegisterInfoAtIndex(size_t reg) override;
- size_t
- GetRegisterSetCount() override;
+ size_t GetRegisterSetCount() override;
- const lldb_private::RegisterSet *
- GetRegisterSet(size_t set) override;
+ const lldb_private::RegisterSet *GetRegisterSet(size_t set) override;
- const char *
- GetRegisterName(unsigned reg);
+ const char *GetRegisterName(unsigned reg);
- uint32_t
- ConvertRegisterKindToRegisterNumber(lldb::RegisterKind kind, uint32_t num) override;
+ uint32_t ConvertRegisterKindToRegisterNumber(lldb::RegisterKind kind,
+ uint32_t num) override;
protected:
- uint64_t m_gpr_powerpc[k_num_gpr_registers_powerpc]; // general purpose registers.
- uint64_t m_fpr_powerpc[k_num_fpr_registers_powerpc]; // floating point registers.
- uint32_t m_vmx_powerpc[k_num_vmx_registers_powerpc][4];
- std::unique_ptr<lldb_private::RegisterInfoInterface> m_register_info_ap; // Register Info Interface (FreeBSD or Linux)
-
- // Determines if an extended register set is supported on the processor running the inferior process.
- virtual bool
- IsRegisterSetAvailable(size_t set_index);
-
- virtual const lldb_private::RegisterInfo *
- GetRegisterInfo();
-
- bool
- IsGPR(unsigned reg);
-
- bool
- IsFPR(unsigned reg);
-
- bool
- IsVMX(unsigned reg);
-
- lldb::ByteOrder GetByteOrder();
-
- virtual bool ReadGPR() = 0;
- virtual bool ReadFPR() = 0;
- virtual bool ReadVMX() = 0;
- virtual bool WriteGPR() = 0;
- virtual bool WriteFPR() = 0;
- virtual bool WriteVMX() = 0;
+ uint64_t
+ m_gpr_powerpc[k_num_gpr_registers_powerpc]; // general purpose registers.
+ uint64_t
+ m_fpr_powerpc[k_num_fpr_registers_powerpc]; // floating point registers.
+ uint32_t m_vmx_powerpc[k_num_vmx_registers_powerpc][4];
+ std::unique_ptr<lldb_private::RegisterInfoInterface>
+ m_register_info_ap; // Register Info Interface (FreeBSD or Linux)
+
+ // Determines if an extended register set is supported on the processor
+ // running the inferior process.
+ virtual bool IsRegisterSetAvailable(size_t set_index);
+
+ virtual const lldb_private::RegisterInfo *GetRegisterInfo();
+
+ bool IsGPR(unsigned reg);
+
+ bool IsFPR(unsigned reg);
+
+ bool IsVMX(unsigned reg);
+
+ lldb::ByteOrder GetByteOrder();
+
+ virtual bool ReadGPR() = 0;
+ virtual bool ReadFPR() = 0;
+ virtual bool ReadVMX() = 0;
+ virtual bool WriteGPR() = 0;
+ virtual bool WriteFPR() = 0;
+ virtual bool WriteVMX() = 0;
};
#endif // liblldb_RegisterContextPOSIX_powerpc_h_
Modified: lldb/trunk/source/Plugins/Process/Utility/RegisterContextPOSIX_s390x.cpp
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/source/Plugins/Process/Utility/RegisterContextPOSIX_s390x.cpp?rev=280751&r1=280750&r2=280751&view=diff
==============================================================================
--- lldb/trunk/source/Plugins/Process/Utility/RegisterContextPOSIX_s390x.cpp (original)
+++ lldb/trunk/source/Plugins/Process/Utility/RegisterContextPOSIX_s390x.cpp Tue Sep 6 15:57:50 2016
@@ -21,245 +21,172 @@
#include "lldb/Target/Thread.h"
#include "llvm/Support/Compiler.h"
-#include "RegisterContext_s390x.h"
#include "RegisterContextPOSIX_s390x.h"
+#include "RegisterContext_s390x.h"
using namespace lldb_private;
using namespace lldb;
// s390x 64-bit general purpose registers.
-static const uint32_t g_gpr_regnums_s390x[] =
-{
- lldb_r0_s390x,
- lldb_r1_s390x,
- lldb_r2_s390x,
- lldb_r3_s390x,
- lldb_r4_s390x,
- lldb_r5_s390x,
- lldb_r6_s390x,
- lldb_r7_s390x,
- lldb_r8_s390x,
- lldb_r9_s390x,
- lldb_r10_s390x,
- lldb_r11_s390x,
- lldb_r12_s390x,
- lldb_r13_s390x,
- lldb_r14_s390x,
- lldb_r15_s390x,
- lldb_acr0_s390x,
- lldb_acr1_s390x,
- lldb_acr2_s390x,
- lldb_acr3_s390x,
- lldb_acr4_s390x,
- lldb_acr5_s390x,
- lldb_acr6_s390x,
- lldb_acr7_s390x,
- lldb_acr8_s390x,
- lldb_acr9_s390x,
- lldb_acr10_s390x,
- lldb_acr11_s390x,
- lldb_acr12_s390x,
- lldb_acr13_s390x,
- lldb_acr14_s390x,
- lldb_acr15_s390x,
- lldb_pswm_s390x,
- lldb_pswa_s390x,
+static const uint32_t g_gpr_regnums_s390x[] = {
+ lldb_r0_s390x, lldb_r1_s390x, lldb_r2_s390x, lldb_r3_s390x,
+ lldb_r4_s390x, lldb_r5_s390x, lldb_r6_s390x, lldb_r7_s390x,
+ lldb_r8_s390x, lldb_r9_s390x, lldb_r10_s390x, lldb_r11_s390x,
+ lldb_r12_s390x, lldb_r13_s390x, lldb_r14_s390x, lldb_r15_s390x,
+ lldb_acr0_s390x, lldb_acr1_s390x, lldb_acr2_s390x, lldb_acr3_s390x,
+ lldb_acr4_s390x, lldb_acr5_s390x, lldb_acr6_s390x, lldb_acr7_s390x,
+ lldb_acr8_s390x, lldb_acr9_s390x, lldb_acr10_s390x, lldb_acr11_s390x,
+ lldb_acr12_s390x, lldb_acr13_s390x, lldb_acr14_s390x, lldb_acr15_s390x,
+ lldb_pswm_s390x, lldb_pswa_s390x,
LLDB_INVALID_REGNUM // register sets need to end with this flag
};
-static_assert((sizeof(g_gpr_regnums_s390x) / sizeof(g_gpr_regnums_s390x[0])) - 1 == k_num_gpr_registers_s390x,
+static_assert((sizeof(g_gpr_regnums_s390x) / sizeof(g_gpr_regnums_s390x[0])) -
+ 1 ==
+ k_num_gpr_registers_s390x,
"g_gpr_regnums_s390x has wrong number of register infos");
// s390x 64-bit floating point registers.
-static const uint32_t g_fpu_regnums_s390x[] =
-{
- lldb_f0_s390x,
- lldb_f1_s390x,
- lldb_f2_s390x,
- lldb_f3_s390x,
- lldb_f4_s390x,
- lldb_f5_s390x,
- lldb_f6_s390x,
- lldb_f7_s390x,
- lldb_f8_s390x,
- lldb_f9_s390x,
- lldb_f10_s390x,
- lldb_f11_s390x,
- lldb_f12_s390x,
- lldb_f13_s390x,
- lldb_f14_s390x,
- lldb_f15_s390x,
+static const uint32_t g_fpu_regnums_s390x[] = {
+ lldb_f0_s390x, lldb_f1_s390x, lldb_f2_s390x, lldb_f3_s390x,
+ lldb_f4_s390x, lldb_f5_s390x, lldb_f6_s390x, lldb_f7_s390x,
+ lldb_f8_s390x, lldb_f9_s390x, lldb_f10_s390x, lldb_f11_s390x,
+ lldb_f12_s390x, lldb_f13_s390x, lldb_f14_s390x, lldb_f15_s390x,
lldb_fpc_s390x,
LLDB_INVALID_REGNUM // register sets need to end with this flag
};
-static_assert((sizeof(g_fpu_regnums_s390x) / sizeof(g_fpu_regnums_s390x[0])) - 1 == k_num_fpr_registers_s390x,
+static_assert((sizeof(g_fpu_regnums_s390x) / sizeof(g_fpu_regnums_s390x[0])) -
+ 1 ==
+ k_num_fpr_registers_s390x,
"g_fpu_regnums_s390x has wrong number of register infos");
// Number of register sets provided by this context.
-enum
-{
- k_num_register_sets = 2
-};
+enum { k_num_register_sets = 2 };
// Register sets for s390x 64-bit.
-static const RegisterSet g_reg_sets_s390x[k_num_register_sets] =
-{
- { "General Purpose Registers", "gpr", k_num_gpr_registers_s390x, g_gpr_regnums_s390x },
- { "Floating Point Registers", "fpr", k_num_fpr_registers_s390x, g_fpu_regnums_s390x },
+static const RegisterSet g_reg_sets_s390x[k_num_register_sets] = {
+ {"General Purpose Registers", "gpr", k_num_gpr_registers_s390x,
+ g_gpr_regnums_s390x},
+ {"Floating Point Registers", "fpr", k_num_fpr_registers_s390x,
+ g_fpu_regnums_s390x},
};
-bool
-RegisterContextPOSIX_s390x::IsGPR(unsigned reg)
-{
- return reg <= m_reg_info.last_gpr; // GPRs come first.
-}
-
-bool
-RegisterContextPOSIX_s390x::IsFPR(unsigned reg)
-{
- return (m_reg_info.first_fpr <= reg && reg <= m_reg_info.last_fpr);
-}
-
-RegisterContextPOSIX_s390x::RegisterContextPOSIX_s390x(Thread &thread, uint32_t concrete_frame_idx,
- RegisterInfoInterface *register_info)
- : RegisterContext(thread, concrete_frame_idx)
-{
- m_register_info_ap.reset(register_info);
-
- switch (register_info->m_target_arch.GetMachine())
- {
- case llvm::Triple::systemz:
- m_reg_info.num_registers = k_num_registers_s390x;
- m_reg_info.num_gpr_registers = k_num_gpr_registers_s390x;
- m_reg_info.num_fpr_registers = k_num_fpr_registers_s390x;
- m_reg_info.last_gpr = k_last_gpr_s390x;
- m_reg_info.first_fpr = k_first_fpr_s390x;
- m_reg_info.last_fpr = k_last_fpr_s390x;
- break;
- default:
- assert(false && "Unhandled target architecture.");
- break;
- }
+bool RegisterContextPOSIX_s390x::IsGPR(unsigned reg) {
+ return reg <= m_reg_info.last_gpr; // GPRs come first.
}
-RegisterContextPOSIX_s390x::~RegisterContextPOSIX_s390x()
-{
+bool RegisterContextPOSIX_s390x::IsFPR(unsigned reg) {
+ return (m_reg_info.first_fpr <= reg && reg <= m_reg_info.last_fpr);
}
-void
-RegisterContextPOSIX_s390x::Invalidate()
-{
+RegisterContextPOSIX_s390x::RegisterContextPOSIX_s390x(
+ Thread &thread, uint32_t concrete_frame_idx,
+ RegisterInfoInterface *register_info)
+ : RegisterContext(thread, concrete_frame_idx) {
+ m_register_info_ap.reset(register_info);
+
+ switch (register_info->m_target_arch.GetMachine()) {
+ case llvm::Triple::systemz:
+ m_reg_info.num_registers = k_num_registers_s390x;
+ m_reg_info.num_gpr_registers = k_num_gpr_registers_s390x;
+ m_reg_info.num_fpr_registers = k_num_fpr_registers_s390x;
+ m_reg_info.last_gpr = k_last_gpr_s390x;
+ m_reg_info.first_fpr = k_first_fpr_s390x;
+ m_reg_info.last_fpr = k_last_fpr_s390x;
+ break;
+ default:
+ assert(false && "Unhandled target architecture.");
+ break;
+ }
}
-void
-RegisterContextPOSIX_s390x::InvalidateAllRegisters()
-{
+RegisterContextPOSIX_s390x::~RegisterContextPOSIX_s390x() {}
+
+void RegisterContextPOSIX_s390x::Invalidate() {}
+
+void RegisterContextPOSIX_s390x::InvalidateAllRegisters() {}
+
+const RegisterInfo *RegisterContextPOSIX_s390x::GetRegisterInfo() {
+ return m_register_info_ap->GetRegisterInfo();
}
const RegisterInfo *
-RegisterContextPOSIX_s390x::GetRegisterInfo()
-{
- return m_register_info_ap->GetRegisterInfo();
+RegisterContextPOSIX_s390x::GetRegisterInfoAtIndex(size_t reg) {
+ if (reg < m_reg_info.num_registers)
+ return &GetRegisterInfo()[reg];
+ else
+ return NULL;
}
-const RegisterInfo *
-RegisterContextPOSIX_s390x::GetRegisterInfoAtIndex(size_t reg)
-{
- if (reg < m_reg_info.num_registers)
- return &GetRegisterInfo()[reg];
- else
- return NULL;
-}
-
-size_t
-RegisterContextPOSIX_s390x::GetRegisterCount()
-{
- return m_reg_info.num_registers;
-}
-
-unsigned
-RegisterContextPOSIX_s390x::GetRegisterOffset(unsigned reg)
-{
- assert(reg < m_reg_info.num_registers && "Invalid register number.");
- return GetRegisterInfo()[reg].byte_offset;
-}
-
-unsigned
-RegisterContextPOSIX_s390x::GetRegisterSize(unsigned reg)
-{
- assert(reg < m_reg_info.num_registers && "Invalid register number.");
- return GetRegisterInfo()[reg].byte_size;
-}
-
-const char *
-RegisterContextPOSIX_s390x::GetRegisterName(unsigned reg)
-{
- assert(reg < m_reg_info.num_registers && "Invalid register offset.");
- return GetRegisterInfo()[reg].name;
-}
-
-bool
-RegisterContextPOSIX_s390x::IsRegisterSetAvailable(size_t set_index)
-{
- return set_index < k_num_register_sets;
-}
-
-size_t
-RegisterContextPOSIX_s390x::GetRegisterSetCount()
-{
- size_t sets = 0;
- for (size_t set = 0; set < k_num_register_sets; ++set)
- {
- if (IsRegisterSetAvailable(set))
- ++sets;
- }
+size_t RegisterContextPOSIX_s390x::GetRegisterCount() {
+ return m_reg_info.num_registers;
+}
- return sets;
+unsigned RegisterContextPOSIX_s390x::GetRegisterOffset(unsigned reg) {
+ assert(reg < m_reg_info.num_registers && "Invalid register number.");
+ return GetRegisterInfo()[reg].byte_offset;
}
-const RegisterSet *
-RegisterContextPOSIX_s390x::GetRegisterSet(size_t set)
-{
+unsigned RegisterContextPOSIX_s390x::GetRegisterSize(unsigned reg) {
+ assert(reg < m_reg_info.num_registers && "Invalid register number.");
+ return GetRegisterInfo()[reg].byte_size;
+}
+
+const char *RegisterContextPOSIX_s390x::GetRegisterName(unsigned reg) {
+ assert(reg < m_reg_info.num_registers && "Invalid register offset.");
+ return GetRegisterInfo()[reg].name;
+}
+
+bool RegisterContextPOSIX_s390x::IsRegisterSetAvailable(size_t set_index) {
+ return set_index < k_num_register_sets;
+}
+
+size_t RegisterContextPOSIX_s390x::GetRegisterSetCount() {
+ size_t sets = 0;
+ for (size_t set = 0; set < k_num_register_sets; ++set) {
if (IsRegisterSetAvailable(set))
- {
- switch (m_register_info_ap->m_target_arch.GetMachine())
- {
- case llvm::Triple::systemz:
- return &g_reg_sets_s390x[set];
- default:
- assert(false && "Unhandled target architecture.");
- return NULL;
- }
+ ++sets;
+ }
+
+ return sets;
+}
+
+const RegisterSet *RegisterContextPOSIX_s390x::GetRegisterSet(size_t set) {
+ if (IsRegisterSetAvailable(set)) {
+ switch (m_register_info_ap->m_target_arch.GetMachine()) {
+ case llvm::Triple::systemz:
+ return &g_reg_sets_s390x[set];
+ default:
+ assert(false && "Unhandled target architecture.");
+ return NULL;
}
- return NULL;
+ }
+ return NULL;
}
-lldb::ByteOrder
-RegisterContextPOSIX_s390x::GetByteOrder()
-{
- // Get the target process whose privileged thread was used for the register read.
- lldb::ByteOrder byte_order = eByteOrderInvalid;
- Process *process = CalculateProcess().get();
-
- if (process)
- byte_order = process->GetByteOrder();
- return byte_order;
+lldb::ByteOrder RegisterContextPOSIX_s390x::GetByteOrder() {
+ // Get the target process whose privileged thread was used for the register
+ // read.
+ lldb::ByteOrder byte_order = eByteOrderInvalid;
+ Process *process = CalculateProcess().get();
+
+ if (process)
+ byte_order = process->GetByteOrder();
+ return byte_order;
}
// Used when parsing DWARF and EH frame information and any other
// object file sections that contain register numbers in them.
-uint32_t
-RegisterContextPOSIX_s390x::ConvertRegisterKindToRegisterNumber(lldb::RegisterKind kind, uint32_t num)
-{
- const uint32_t num_regs = GetRegisterCount();
-
- assert(kind < kNumRegisterKinds);
- for (uint32_t reg_idx = 0; reg_idx < num_regs; ++reg_idx)
- {
- const RegisterInfo *reg_info = GetRegisterInfoAtIndex(reg_idx);
-
- if (reg_info->kinds[kind] == num)
- return reg_idx;
- }
+uint32_t RegisterContextPOSIX_s390x::ConvertRegisterKindToRegisterNumber(
+ lldb::RegisterKind kind, uint32_t num) {
+ const uint32_t num_regs = GetRegisterCount();
+
+ assert(kind < kNumRegisterKinds);
+ for (uint32_t reg_idx = 0; reg_idx < num_regs; ++reg_idx) {
+ const RegisterInfo *reg_info = GetRegisterInfoAtIndex(reg_idx);
+
+ if (reg_info->kinds[kind] == num)
+ return reg_idx;
+ }
- return LLDB_INVALID_REGNUM;
+ return LLDB_INVALID_REGNUM;
}
Modified: lldb/trunk/source/Plugins/Process/Utility/RegisterContextPOSIX_s390x.h
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/source/Plugins/Process/Utility/RegisterContextPOSIX_s390x.h?rev=280751&r1=280750&r2=280751&view=diff
==============================================================================
--- lldb/trunk/source/Plugins/Process/Utility/RegisterContextPOSIX_s390x.h (original)
+++ lldb/trunk/source/Plugins/Process/Utility/RegisterContextPOSIX_s390x.h Tue Sep 6 15:57:50 2016
@@ -14,90 +14,71 @@
// C++ Includes
// Other libraries and framework includes
// Project includes
-#include "lldb/Core/Log.h"
-#include "lldb/Target/RegisterContext.h"
-#include "RegisterInfoInterface.h"
#include "RegisterContext_s390x.h"
+#include "RegisterInfoInterface.h"
#include "lldb-s390x-register-enums.h"
+#include "lldb/Core/Log.h"
+#include "lldb/Target/RegisterContext.h"
class ProcessMonitor;
-class RegisterContextPOSIX_s390x : public lldb_private::RegisterContext
-{
+class RegisterContextPOSIX_s390x : public lldb_private::RegisterContext {
public:
- RegisterContextPOSIX_s390x(lldb_private::Thread &thread, uint32_t concrete_frame_idx,
- lldb_private::RegisterInfoInterface *register_info);
+ RegisterContextPOSIX_s390x(
+ lldb_private::Thread &thread, uint32_t concrete_frame_idx,
+ lldb_private::RegisterInfoInterface *register_info);
- ~RegisterContextPOSIX_s390x() override;
+ ~RegisterContextPOSIX_s390x() override;
- void
- Invalidate();
+ void Invalidate();
- void
- InvalidateAllRegisters() override;
+ void InvalidateAllRegisters() override;
- size_t
- GetRegisterCount() override;
+ size_t GetRegisterCount() override;
- virtual unsigned
- GetRegisterSize(unsigned reg);
+ virtual unsigned GetRegisterSize(unsigned reg);
- virtual unsigned
- GetRegisterOffset(unsigned reg);
+ virtual unsigned GetRegisterOffset(unsigned reg);
- const lldb_private::RegisterInfo *
- GetRegisterInfoAtIndex(size_t reg) override;
+ const lldb_private::RegisterInfo *GetRegisterInfoAtIndex(size_t reg) override;
- size_t
- GetRegisterSetCount() override;
+ size_t GetRegisterSetCount() override;
- const lldb_private::RegisterSet *
- GetRegisterSet(size_t set) override;
+ const lldb_private::RegisterSet *GetRegisterSet(size_t set) override;
- const char *
- GetRegisterName(unsigned reg);
+ const char *GetRegisterName(unsigned reg);
- uint32_t
- ConvertRegisterKindToRegisterNumber(lldb::RegisterKind kind, uint32_t num) override;
+ uint32_t ConvertRegisterKindToRegisterNumber(lldb::RegisterKind kind,
+ uint32_t num) override;
protected:
- struct RegInfo
- {
- uint32_t num_registers;
- uint32_t num_gpr_registers;
- uint32_t num_fpr_registers;
-
- uint32_t last_gpr;
- uint32_t first_fpr;
- uint32_t last_fpr;
- };
-
- RegInfo m_reg_info;
- std::unique_ptr<lldb_private::RegisterInfoInterface> m_register_info_ap;
-
- virtual bool
- IsRegisterSetAvailable(size_t set_index);
-
- virtual const lldb_private::RegisterInfo *
- GetRegisterInfo();
-
- bool
- IsGPR(unsigned reg);
-
- bool
- IsFPR(unsigned reg);
-
- lldb::ByteOrder
- GetByteOrder();
-
- virtual bool
- ReadGPR() = 0;
- virtual bool
- ReadFPR() = 0;
- virtual bool
- WriteGPR() = 0;
- virtual bool
- WriteFPR() = 0;
+ struct RegInfo {
+ uint32_t num_registers;
+ uint32_t num_gpr_registers;
+ uint32_t num_fpr_registers;
+
+ uint32_t last_gpr;
+ uint32_t first_fpr;
+ uint32_t last_fpr;
+ };
+
+ RegInfo m_reg_info;
+ std::unique_ptr<lldb_private::RegisterInfoInterface> m_register_info_ap;
+
+ virtual bool IsRegisterSetAvailable(size_t set_index);
+
+ virtual const lldb_private::RegisterInfo *GetRegisterInfo();
+
+ bool IsGPR(unsigned reg);
+
+ bool IsFPR(unsigned reg);
+
+ lldb::ByteOrder GetByteOrder();
+
+ virtual bool ReadGPR() = 0;
+ virtual bool ReadFPR() = 0;
+ virtual bool WriteGPR() = 0;
+ virtual bool WriteFPR() = 0;
};
#endif // liblldb_RegisterContextPOSIX_s390x_h_
Modified: lldb/trunk/source/Plugins/Process/Utility/RegisterContextPOSIX_x86.cpp
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/source/Plugins/Process/Utility/RegisterContextPOSIX_x86.cpp?rev=280751&r1=280750&r2=280751&view=diff
==============================================================================
--- lldb/trunk/source/Plugins/Process/Utility/RegisterContextPOSIX_x86.cpp (original)
+++ lldb/trunk/source/Plugins/Process/Utility/RegisterContextPOSIX_x86.cpp Tue Sep 6 15:57:50 2016
@@ -15,187 +15,94 @@
#include "lldb/Core/DataExtractor.h"
#include "lldb/Core/RegisterValue.h"
#include "lldb/Core/Scalar.h"
+#include "lldb/Host/Endian.h"
#include "lldb/Target/Target.h"
#include "lldb/Target/Thread.h"
-#include "lldb/Host/Endian.h"
#include "llvm/Support/Compiler.h"
-#include "RegisterContext_x86.h"
-#include "RegisterContextPOSIX_x86.h"
#include "Plugins/Process/elf-core/ProcessElfCore.h"
+#include "RegisterContextPOSIX_x86.h"
+#include "RegisterContext_x86.h"
using namespace lldb_private;
using namespace lldb;
-const uint32_t
-g_gpr_regnums_i386[] =
-{
- lldb_eax_i386,
- lldb_ebx_i386,
- lldb_ecx_i386,
- lldb_edx_i386,
- lldb_edi_i386,
- lldb_esi_i386,
- lldb_ebp_i386,
- lldb_esp_i386,
- lldb_eip_i386,
- lldb_eflags_i386,
- lldb_cs_i386,
- lldb_fs_i386,
- lldb_gs_i386,
- lldb_ss_i386,
- lldb_ds_i386,
- lldb_es_i386,
- lldb_ax_i386,
- lldb_bx_i386,
- lldb_cx_i386,
- lldb_dx_i386,
- lldb_di_i386,
- lldb_si_i386,
- lldb_bp_i386,
- lldb_sp_i386,
- lldb_ah_i386,
- lldb_bh_i386,
- lldb_ch_i386,
- lldb_dh_i386,
- lldb_al_i386,
- lldb_bl_i386,
- lldb_cl_i386,
- lldb_dl_i386,
- LLDB_INVALID_REGNUM, // Register sets must be terminated with LLDB_INVALID_REGNUM.
+const uint32_t g_gpr_regnums_i386[] = {
+ lldb_eax_i386, lldb_ebx_i386, lldb_ecx_i386, lldb_edx_i386,
+ lldb_edi_i386, lldb_esi_i386, lldb_ebp_i386, lldb_esp_i386,
+ lldb_eip_i386, lldb_eflags_i386, lldb_cs_i386, lldb_fs_i386,
+ lldb_gs_i386, lldb_ss_i386, lldb_ds_i386, lldb_es_i386,
+ lldb_ax_i386, lldb_bx_i386, lldb_cx_i386, lldb_dx_i386,
+ lldb_di_i386, lldb_si_i386, lldb_bp_i386, lldb_sp_i386,
+ lldb_ah_i386, lldb_bh_i386, lldb_ch_i386, lldb_dh_i386,
+ lldb_al_i386, lldb_bl_i386, lldb_cl_i386, lldb_dl_i386,
+ LLDB_INVALID_REGNUM, // Register sets must be terminated with
+ // LLDB_INVALID_REGNUM.
};
-static_assert((sizeof(g_gpr_regnums_i386) / sizeof(g_gpr_regnums_i386[0])) - 1 == k_num_gpr_registers_i386,
- "g_gpr_regnums_i386 has wrong number of register infos");
-
-const uint32_t
-g_lldb_regnums_i386[] =
-{
- lldb_fctrl_i386,
- lldb_fstat_i386,
- lldb_ftag_i386,
- lldb_fop_i386,
- lldb_fiseg_i386,
- lldb_fioff_i386,
- lldb_foseg_i386,
- lldb_fooff_i386,
- lldb_mxcsr_i386,
- lldb_mxcsrmask_i386,
- lldb_st0_i386,
- lldb_st1_i386,
- lldb_st2_i386,
- lldb_st3_i386,
- lldb_st4_i386,
- lldb_st5_i386,
- lldb_st6_i386,
- lldb_st7_i386,
- lldb_mm0_i386,
- lldb_mm1_i386,
- lldb_mm2_i386,
- lldb_mm3_i386,
- lldb_mm4_i386,
- lldb_mm5_i386,
- lldb_mm6_i386,
- lldb_mm7_i386,
- lldb_xmm0_i386,
- lldb_xmm1_i386,
- lldb_xmm2_i386,
- lldb_xmm3_i386,
- lldb_xmm4_i386,
- lldb_xmm5_i386,
- lldb_xmm6_i386,
- lldb_xmm7_i386,
- LLDB_INVALID_REGNUM // Register sets must be terminated with LLDB_INVALID_REGNUM.
+static_assert((sizeof(g_gpr_regnums_i386) / sizeof(g_gpr_regnums_i386[0])) -
+ 1 ==
+ k_num_gpr_registers_i386,
+ "g_gpr_regnums_i386 has wrong number of register infos");
+
+const uint32_t g_lldb_regnums_i386[] = {
+ lldb_fctrl_i386, lldb_fstat_i386, lldb_ftag_i386, lldb_fop_i386,
+ lldb_fiseg_i386, lldb_fioff_i386, lldb_foseg_i386, lldb_fooff_i386,
+ lldb_mxcsr_i386, lldb_mxcsrmask_i386, lldb_st0_i386, lldb_st1_i386,
+ lldb_st2_i386, lldb_st3_i386, lldb_st4_i386, lldb_st5_i386,
+ lldb_st6_i386, lldb_st7_i386, lldb_mm0_i386, lldb_mm1_i386,
+ lldb_mm2_i386, lldb_mm3_i386, lldb_mm4_i386, lldb_mm5_i386,
+ lldb_mm6_i386, lldb_mm7_i386, lldb_xmm0_i386, lldb_xmm1_i386,
+ lldb_xmm2_i386, lldb_xmm3_i386, lldb_xmm4_i386, lldb_xmm5_i386,
+ lldb_xmm6_i386, lldb_xmm7_i386,
+ LLDB_INVALID_REGNUM // Register sets must be terminated with
+ // LLDB_INVALID_REGNUM.
};
-static_assert((sizeof(g_lldb_regnums_i386) / sizeof(g_lldb_regnums_i386[0])) - 1 == k_num_fpr_registers_i386,
- "g_lldb_regnums_i386 has wrong number of register infos");
-
-const uint32_t
-g_avx_regnums_i386[] =
-{
- lldb_ymm0_i386,
- lldb_ymm1_i386,
- lldb_ymm2_i386,
- lldb_ymm3_i386,
- lldb_ymm4_i386,
- lldb_ymm5_i386,
- lldb_ymm6_i386,
- lldb_ymm7_i386,
- LLDB_INVALID_REGNUM // Register sets must be terminated with LLDB_INVALID_REGNUM.
+static_assert((sizeof(g_lldb_regnums_i386) / sizeof(g_lldb_regnums_i386[0])) -
+ 1 ==
+ k_num_fpr_registers_i386,
+ "g_lldb_regnums_i386 has wrong number of register infos");
+
+const uint32_t g_avx_regnums_i386[] = {
+ lldb_ymm0_i386, lldb_ymm1_i386, lldb_ymm2_i386, lldb_ymm3_i386,
+ lldb_ymm4_i386, lldb_ymm5_i386, lldb_ymm6_i386, lldb_ymm7_i386,
+ LLDB_INVALID_REGNUM // Register sets must be terminated with
+ // LLDB_INVALID_REGNUM.
};
-static_assert((sizeof(g_avx_regnums_i386) / sizeof(g_avx_regnums_i386[0])) - 1 == k_num_avx_registers_i386,
- " g_avx_regnums_i386 has wrong number of register infos");
-
-static const
-uint32_t g_gpr_regnums_x86_64[] =
-{
- lldb_rax_x86_64,
- lldb_rbx_x86_64,
- lldb_rcx_x86_64,
- lldb_rdx_x86_64,
- lldb_rdi_x86_64,
- lldb_rsi_x86_64,
- lldb_rbp_x86_64,
- lldb_rsp_x86_64,
- lldb_r8_x86_64,
- lldb_r9_x86_64,
- lldb_r10_x86_64,
- lldb_r11_x86_64,
- lldb_r12_x86_64,
- lldb_r13_x86_64,
- lldb_r14_x86_64,
- lldb_r15_x86_64,
- lldb_rip_x86_64,
- lldb_rflags_x86_64,
- lldb_cs_x86_64,
- lldb_fs_x86_64,
- lldb_gs_x86_64,
- lldb_ss_x86_64,
- lldb_ds_x86_64,
- lldb_es_x86_64,
- lldb_eax_x86_64,
- lldb_ebx_x86_64,
- lldb_ecx_x86_64,
- lldb_edx_x86_64,
- lldb_edi_x86_64,
- lldb_esi_x86_64,
- lldb_ebp_x86_64,
- lldb_esp_x86_64,
- lldb_r8d_x86_64, // Low 32 bits or r8
- lldb_r9d_x86_64, // Low 32 bits or r9
- lldb_r10d_x86_64, // Low 32 bits or r10
- lldb_r11d_x86_64, // Low 32 bits or r11
- lldb_r12d_x86_64, // Low 32 bits or r12
- lldb_r13d_x86_64, // Low 32 bits or r13
- lldb_r14d_x86_64, // Low 32 bits or r14
- lldb_r15d_x86_64, // Low 32 bits or r15
- lldb_ax_x86_64,
- lldb_bx_x86_64,
- lldb_cx_x86_64,
- lldb_dx_x86_64,
- lldb_di_x86_64,
- lldb_si_x86_64,
- lldb_bp_x86_64,
- lldb_sp_x86_64,
- lldb_r8w_x86_64, // Low 16 bits or r8
- lldb_r9w_x86_64, // Low 16 bits or r9
- lldb_r10w_x86_64, // Low 16 bits or r10
- lldb_r11w_x86_64, // Low 16 bits or r11
- lldb_r12w_x86_64, // Low 16 bits or r12
- lldb_r13w_x86_64, // Low 16 bits or r13
- lldb_r14w_x86_64, // Low 16 bits or r14
- lldb_r15w_x86_64, // Low 16 bits or r15
- lldb_ah_x86_64,
- lldb_bh_x86_64,
- lldb_ch_x86_64,
- lldb_dh_x86_64,
- lldb_al_x86_64,
- lldb_bl_x86_64,
- lldb_cl_x86_64,
- lldb_dl_x86_64,
- lldb_dil_x86_64,
- lldb_sil_x86_64,
- lldb_bpl_x86_64,
- lldb_spl_x86_64,
+static_assert((sizeof(g_avx_regnums_i386) / sizeof(g_avx_regnums_i386[0])) -
+ 1 ==
+ k_num_avx_registers_i386,
+ " g_avx_regnums_i386 has wrong number of register infos");
+
+static const uint32_t g_gpr_regnums_x86_64[] = {
+ lldb_rax_x86_64, lldb_rbx_x86_64, lldb_rcx_x86_64, lldb_rdx_x86_64,
+ lldb_rdi_x86_64, lldb_rsi_x86_64, lldb_rbp_x86_64, lldb_rsp_x86_64,
+ lldb_r8_x86_64, lldb_r9_x86_64, lldb_r10_x86_64, lldb_r11_x86_64,
+ lldb_r12_x86_64, lldb_r13_x86_64, lldb_r14_x86_64, lldb_r15_x86_64,
+ lldb_rip_x86_64, lldb_rflags_x86_64, lldb_cs_x86_64, lldb_fs_x86_64,
+ lldb_gs_x86_64, lldb_ss_x86_64, lldb_ds_x86_64, lldb_es_x86_64,
+ lldb_eax_x86_64, lldb_ebx_x86_64, lldb_ecx_x86_64, lldb_edx_x86_64,
+ lldb_edi_x86_64, lldb_esi_x86_64, lldb_ebp_x86_64, lldb_esp_x86_64,
+ lldb_r8d_x86_64, // Low 32 bits or r8
+ lldb_r9d_x86_64, // Low 32 bits or r9
+ lldb_r10d_x86_64, // Low 32 bits or r10
+ lldb_r11d_x86_64, // Low 32 bits or r11
+ lldb_r12d_x86_64, // Low 32 bits or r12
+ lldb_r13d_x86_64, // Low 32 bits or r13
+ lldb_r14d_x86_64, // Low 32 bits or r14
+ lldb_r15d_x86_64, // Low 32 bits or r15
+ lldb_ax_x86_64, lldb_bx_x86_64, lldb_cx_x86_64, lldb_dx_x86_64,
+ lldb_di_x86_64, lldb_si_x86_64, lldb_bp_x86_64, lldb_sp_x86_64,
+ lldb_r8w_x86_64, // Low 16 bits or r8
+ lldb_r9w_x86_64, // Low 16 bits or r9
+ lldb_r10w_x86_64, // Low 16 bits or r10
+ lldb_r11w_x86_64, // Low 16 bits or r11
+ lldb_r12w_x86_64, // Low 16 bits or r12
+ lldb_r13w_x86_64, // Low 16 bits or r13
+ lldb_r14w_x86_64, // Low 16 bits or r14
+ lldb_r15w_x86_64, // Low 16 bits or r15
+ lldb_ah_x86_64, lldb_bh_x86_64, lldb_ch_x86_64, lldb_dh_x86_64,
+ lldb_al_x86_64, lldb_bl_x86_64, lldb_cl_x86_64, lldb_dl_x86_64,
+ lldb_dil_x86_64, lldb_sil_x86_64, lldb_bpl_x86_64, lldb_spl_x86_64,
lldb_r8l_x86_64, // Low 8 bits or r8
lldb_r9l_x86_64, // Low 8 bits or r9
lldb_r10l_x86_64, // Low 8 bits or r10
@@ -204,464 +111,446 @@ uint32_t g_gpr_regnums_x86_64[] =
lldb_r13l_x86_64, // Low 8 bits or r13
lldb_r14l_x86_64, // Low 8 bits or r14
lldb_r15l_x86_64, // Low 8 bits or r15
- LLDB_INVALID_REGNUM // Register sets must be terminated with LLDB_INVALID_REGNUM.
+ LLDB_INVALID_REGNUM // Register sets must be terminated with
+ // LLDB_INVALID_REGNUM.
};
-static_assert((sizeof(g_gpr_regnums_x86_64) / sizeof(g_gpr_regnums_x86_64[0])) - 1 == k_num_gpr_registers_x86_64,
- "g_gpr_regnums_x86_64 has wrong number of register infos");
-
-static const uint32_t
-g_lldb_regnums_x86_64[] =
-{
- lldb_fctrl_x86_64,
- lldb_fstat_x86_64,
- lldb_ftag_x86_64,
- lldb_fop_x86_64,
- lldb_fiseg_x86_64,
- lldb_fioff_x86_64,
- lldb_foseg_x86_64,
- lldb_fooff_x86_64,
- lldb_mxcsr_x86_64,
- lldb_mxcsrmask_x86_64,
- lldb_st0_x86_64,
- lldb_st1_x86_64,
- lldb_st2_x86_64,
- lldb_st3_x86_64,
- lldb_st4_x86_64,
- lldb_st5_x86_64,
- lldb_st6_x86_64,
- lldb_st7_x86_64,
- lldb_mm0_x86_64,
- lldb_mm1_x86_64,
- lldb_mm2_x86_64,
- lldb_mm3_x86_64,
- lldb_mm4_x86_64,
- lldb_mm5_x86_64,
- lldb_mm6_x86_64,
- lldb_mm7_x86_64,
- lldb_xmm0_x86_64,
- lldb_xmm1_x86_64,
- lldb_xmm2_x86_64,
- lldb_xmm3_x86_64,
- lldb_xmm4_x86_64,
- lldb_xmm5_x86_64,
- lldb_xmm6_x86_64,
- lldb_xmm7_x86_64,
- lldb_xmm8_x86_64,
- lldb_xmm9_x86_64,
- lldb_xmm10_x86_64,
- lldb_xmm11_x86_64,
- lldb_xmm12_x86_64,
- lldb_xmm13_x86_64,
- lldb_xmm14_x86_64,
- lldb_xmm15_x86_64,
- LLDB_INVALID_REGNUM // Register sets must be terminated with LLDB_INVALID_REGNUM.
+static_assert((sizeof(g_gpr_regnums_x86_64) / sizeof(g_gpr_regnums_x86_64[0])) -
+ 1 ==
+ k_num_gpr_registers_x86_64,
+ "g_gpr_regnums_x86_64 has wrong number of register infos");
+
+static const uint32_t g_lldb_regnums_x86_64[] = {
+ lldb_fctrl_x86_64, lldb_fstat_x86_64, lldb_ftag_x86_64,
+ lldb_fop_x86_64, lldb_fiseg_x86_64, lldb_fioff_x86_64,
+ lldb_foseg_x86_64, lldb_fooff_x86_64, lldb_mxcsr_x86_64,
+ lldb_mxcsrmask_x86_64, lldb_st0_x86_64, lldb_st1_x86_64,
+ lldb_st2_x86_64, lldb_st3_x86_64, lldb_st4_x86_64,
+ lldb_st5_x86_64, lldb_st6_x86_64, lldb_st7_x86_64,
+ lldb_mm0_x86_64, lldb_mm1_x86_64, lldb_mm2_x86_64,
+ lldb_mm3_x86_64, lldb_mm4_x86_64, lldb_mm5_x86_64,
+ lldb_mm6_x86_64, lldb_mm7_x86_64, lldb_xmm0_x86_64,
+ lldb_xmm1_x86_64, lldb_xmm2_x86_64, lldb_xmm3_x86_64,
+ lldb_xmm4_x86_64, lldb_xmm5_x86_64, lldb_xmm6_x86_64,
+ lldb_xmm7_x86_64, lldb_xmm8_x86_64, lldb_xmm9_x86_64,
+ lldb_xmm10_x86_64, lldb_xmm11_x86_64, lldb_xmm12_x86_64,
+ lldb_xmm13_x86_64, lldb_xmm14_x86_64, lldb_xmm15_x86_64,
+ LLDB_INVALID_REGNUM // Register sets must be terminated with
+ // LLDB_INVALID_REGNUM.
};
-static_assert((sizeof(g_lldb_regnums_x86_64) / sizeof(g_lldb_regnums_x86_64[0])) - 1 == k_num_fpr_registers_x86_64,
- "g_lldb_regnums_x86_64 has wrong number of register infos");
-
-static const uint32_t
-g_avx_regnums_x86_64[] =
-{
- lldb_ymm0_x86_64,
- lldb_ymm1_x86_64,
- lldb_ymm2_x86_64,
- lldb_ymm3_x86_64,
- lldb_ymm4_x86_64,
- lldb_ymm5_x86_64,
- lldb_ymm6_x86_64,
- lldb_ymm7_x86_64,
- lldb_ymm8_x86_64,
- lldb_ymm9_x86_64,
- lldb_ymm10_x86_64,
- lldb_ymm11_x86_64,
- lldb_ymm12_x86_64,
- lldb_ymm13_x86_64,
- lldb_ymm14_x86_64,
- lldb_ymm15_x86_64,
- LLDB_INVALID_REGNUM // Register sets must be terminated with LLDB_INVALID_REGNUM.
+static_assert((sizeof(g_lldb_regnums_x86_64) /
+ sizeof(g_lldb_regnums_x86_64[0])) -
+ 1 ==
+ k_num_fpr_registers_x86_64,
+ "g_lldb_regnums_x86_64 has wrong number of register infos");
+
+static const uint32_t g_avx_regnums_x86_64[] = {
+ lldb_ymm0_x86_64, lldb_ymm1_x86_64, lldb_ymm2_x86_64, lldb_ymm3_x86_64,
+ lldb_ymm4_x86_64, lldb_ymm5_x86_64, lldb_ymm6_x86_64, lldb_ymm7_x86_64,
+ lldb_ymm8_x86_64, lldb_ymm9_x86_64, lldb_ymm10_x86_64, lldb_ymm11_x86_64,
+ lldb_ymm12_x86_64, lldb_ymm13_x86_64, lldb_ymm14_x86_64, lldb_ymm15_x86_64,
+ LLDB_INVALID_REGNUM // Register sets must be terminated with
+ // LLDB_INVALID_REGNUM.
};
-static_assert((sizeof(g_avx_regnums_x86_64) / sizeof(g_avx_regnums_x86_64[0])) - 1 == k_num_avx_registers_x86_64,
- "g_avx_regnums_x86_64 has wrong number of register infos");
-
-uint32_t RegisterContextPOSIX_x86::g_contained_eax[] = { lldb_eax_i386, LLDB_INVALID_REGNUM };
-uint32_t RegisterContextPOSIX_x86::g_contained_ebx[] = { lldb_ebx_i386, LLDB_INVALID_REGNUM };
-uint32_t RegisterContextPOSIX_x86::g_contained_ecx[] = { lldb_ecx_i386, LLDB_INVALID_REGNUM };
-uint32_t RegisterContextPOSIX_x86::g_contained_edx[] = { lldb_edx_i386, LLDB_INVALID_REGNUM };
-uint32_t RegisterContextPOSIX_x86::g_contained_edi[] = { lldb_edi_i386, LLDB_INVALID_REGNUM };
-uint32_t RegisterContextPOSIX_x86::g_contained_esi[] = { lldb_esi_i386, LLDB_INVALID_REGNUM };
-uint32_t RegisterContextPOSIX_x86::g_contained_ebp[] = { lldb_ebp_i386, LLDB_INVALID_REGNUM };
-uint32_t RegisterContextPOSIX_x86::g_contained_esp[] = { lldb_esp_i386, LLDB_INVALID_REGNUM };
-
-uint32_t RegisterContextPOSIX_x86::g_invalidate_eax[] = { lldb_eax_i386, lldb_ax_i386, lldb_ah_i386, lldb_al_i386, LLDB_INVALID_REGNUM };
-uint32_t RegisterContextPOSIX_x86::g_invalidate_ebx[] = { lldb_ebx_i386, lldb_bx_i386, lldb_bh_i386, lldb_bl_i386, LLDB_INVALID_REGNUM };
-uint32_t RegisterContextPOSIX_x86::g_invalidate_ecx[] = { lldb_ecx_i386, lldb_cx_i386, lldb_ch_i386, lldb_cl_i386, LLDB_INVALID_REGNUM };
-uint32_t RegisterContextPOSIX_x86::g_invalidate_edx[] = { lldb_edx_i386, lldb_dx_i386, lldb_dh_i386, lldb_dl_i386, LLDB_INVALID_REGNUM };
-uint32_t RegisterContextPOSIX_x86::g_invalidate_edi[] = { lldb_edi_i386, lldb_di_i386, LLDB_INVALID_REGNUM };
-uint32_t RegisterContextPOSIX_x86::g_invalidate_esi[] = { lldb_esi_i386, lldb_si_i386, LLDB_INVALID_REGNUM };
-uint32_t RegisterContextPOSIX_x86::g_invalidate_ebp[] = { lldb_ebp_i386, lldb_bp_i386, LLDB_INVALID_REGNUM };
-uint32_t RegisterContextPOSIX_x86::g_invalidate_esp[] = { lldb_esp_i386, lldb_sp_i386, LLDB_INVALID_REGNUM };
-
-uint32_t RegisterContextPOSIX_x86::g_contained_rax[] = { lldb_rax_x86_64, LLDB_INVALID_REGNUM };
-uint32_t RegisterContextPOSIX_x86::g_contained_rbx[] = { lldb_rbx_x86_64, LLDB_INVALID_REGNUM };
-uint32_t RegisterContextPOSIX_x86::g_contained_rcx[] = { lldb_rcx_x86_64, LLDB_INVALID_REGNUM };
-uint32_t RegisterContextPOSIX_x86::g_contained_rdx[] = { lldb_rdx_x86_64, LLDB_INVALID_REGNUM };
-uint32_t RegisterContextPOSIX_x86::g_contained_rdi[] = { lldb_rdi_x86_64, LLDB_INVALID_REGNUM };
-uint32_t RegisterContextPOSIX_x86::g_contained_rsi[] = { lldb_rsi_x86_64, LLDB_INVALID_REGNUM };
-uint32_t RegisterContextPOSIX_x86::g_contained_rbp[] = { lldb_rbp_x86_64, LLDB_INVALID_REGNUM };
-uint32_t RegisterContextPOSIX_x86::g_contained_rsp[] = { lldb_rsp_x86_64, LLDB_INVALID_REGNUM };
-uint32_t RegisterContextPOSIX_x86::g_contained_r8[] = { lldb_r8_x86_64, LLDB_INVALID_REGNUM };
-uint32_t RegisterContextPOSIX_x86::g_contained_r9[] = { lldb_r9_x86_64, LLDB_INVALID_REGNUM };
-uint32_t RegisterContextPOSIX_x86::g_contained_r10[] = { lldb_r10_x86_64, LLDB_INVALID_REGNUM };
-uint32_t RegisterContextPOSIX_x86::g_contained_r11[] = { lldb_r11_x86_64, LLDB_INVALID_REGNUM };
-uint32_t RegisterContextPOSIX_x86::g_contained_r12[] = { lldb_r12_x86_64, LLDB_INVALID_REGNUM };
-uint32_t RegisterContextPOSIX_x86::g_contained_r13[] = { lldb_r13_x86_64, LLDB_INVALID_REGNUM };
-uint32_t RegisterContextPOSIX_x86::g_contained_r14[] = { lldb_r14_x86_64, LLDB_INVALID_REGNUM };
-uint32_t RegisterContextPOSIX_x86::g_contained_r15[] = { lldb_r15_x86_64, LLDB_INVALID_REGNUM };
-
-uint32_t RegisterContextPOSIX_x86::g_invalidate_rax[] = { lldb_rax_x86_64, lldb_eax_x86_64, lldb_ax_x86_64, lldb_ah_x86_64, lldb_al_x86_64, LLDB_INVALID_REGNUM };
-uint32_t RegisterContextPOSIX_x86::g_invalidate_rbx[] = { lldb_rbx_x86_64, lldb_ebx_x86_64, lldb_bx_x86_64, lldb_bh_x86_64, lldb_bl_x86_64, LLDB_INVALID_REGNUM };
-uint32_t RegisterContextPOSIX_x86::g_invalidate_rcx[] = { lldb_rcx_x86_64, lldb_ecx_x86_64, lldb_cx_x86_64, lldb_ch_x86_64, lldb_cl_x86_64, LLDB_INVALID_REGNUM };
-uint32_t RegisterContextPOSIX_x86::g_invalidate_rdx[] = { lldb_rdx_x86_64, lldb_edx_x86_64, lldb_dx_x86_64, lldb_dh_x86_64, lldb_dl_x86_64, LLDB_INVALID_REGNUM };
-uint32_t RegisterContextPOSIX_x86::g_invalidate_rdi[] = { lldb_rdi_x86_64, lldb_edi_x86_64, lldb_di_x86_64, lldb_dil_x86_64, LLDB_INVALID_REGNUM };
-uint32_t RegisterContextPOSIX_x86::g_invalidate_rsi[] = { lldb_rsi_x86_64, lldb_esi_x86_64, lldb_si_x86_64, lldb_sil_x86_64, LLDB_INVALID_REGNUM };
-uint32_t RegisterContextPOSIX_x86::g_invalidate_rbp[] = { lldb_rbp_x86_64, lldb_ebp_x86_64, lldb_bp_x86_64, lldb_bpl_x86_64, LLDB_INVALID_REGNUM };
-uint32_t RegisterContextPOSIX_x86::g_invalidate_rsp[] = { lldb_rsp_x86_64, lldb_esp_x86_64, lldb_sp_x86_64, lldb_spl_x86_64, LLDB_INVALID_REGNUM };
-uint32_t RegisterContextPOSIX_x86::g_invalidate_r8[] = { lldb_r8_x86_64, lldb_r8d_x86_64, lldb_r8w_x86_64, lldb_r8l_x86_64, LLDB_INVALID_REGNUM };
-uint32_t RegisterContextPOSIX_x86::g_invalidate_r9[] = { lldb_r9_x86_64, lldb_r9d_x86_64, lldb_r9w_x86_64, lldb_r9l_x86_64, LLDB_INVALID_REGNUM };
-uint32_t RegisterContextPOSIX_x86::g_invalidate_r10[] = { lldb_r10_x86_64, lldb_r10d_x86_64, lldb_r10w_x86_64, lldb_r10l_x86_64, LLDB_INVALID_REGNUM };
-uint32_t RegisterContextPOSIX_x86::g_invalidate_r11[] = { lldb_r11_x86_64, lldb_r11d_x86_64, lldb_r11w_x86_64, lldb_r11l_x86_64, LLDB_INVALID_REGNUM };
-uint32_t RegisterContextPOSIX_x86::g_invalidate_r12[] = { lldb_r12_x86_64, lldb_r12d_x86_64, lldb_r12w_x86_64, lldb_r12l_x86_64, LLDB_INVALID_REGNUM };
-uint32_t RegisterContextPOSIX_x86::g_invalidate_r13[] = { lldb_r13_x86_64, lldb_r13d_x86_64, lldb_r13w_x86_64, lldb_r13l_x86_64, LLDB_INVALID_REGNUM };
-uint32_t RegisterContextPOSIX_x86::g_invalidate_r14[] = { lldb_r14_x86_64, lldb_r14d_x86_64, lldb_r14w_x86_64, lldb_r14l_x86_64, LLDB_INVALID_REGNUM };
-uint32_t RegisterContextPOSIX_x86::g_invalidate_r15[] = { lldb_r15_x86_64, lldb_r15d_x86_64, lldb_r15w_x86_64, lldb_r15l_x86_64, LLDB_INVALID_REGNUM };
+static_assert((sizeof(g_avx_regnums_x86_64) / sizeof(g_avx_regnums_x86_64[0])) -
+ 1 ==
+ k_num_avx_registers_x86_64,
+ "g_avx_regnums_x86_64 has wrong number of register infos");
+
+uint32_t RegisterContextPOSIX_x86::g_contained_eax[] = {lldb_eax_i386,
+ LLDB_INVALID_REGNUM};
+uint32_t RegisterContextPOSIX_x86::g_contained_ebx[] = {lldb_ebx_i386,
+ LLDB_INVALID_REGNUM};
+uint32_t RegisterContextPOSIX_x86::g_contained_ecx[] = {lldb_ecx_i386,
+ LLDB_INVALID_REGNUM};
+uint32_t RegisterContextPOSIX_x86::g_contained_edx[] = {lldb_edx_i386,
+ LLDB_INVALID_REGNUM};
+uint32_t RegisterContextPOSIX_x86::g_contained_edi[] = {lldb_edi_i386,
+ LLDB_INVALID_REGNUM};
+uint32_t RegisterContextPOSIX_x86::g_contained_esi[] = {lldb_esi_i386,
+ LLDB_INVALID_REGNUM};
+uint32_t RegisterContextPOSIX_x86::g_contained_ebp[] = {lldb_ebp_i386,
+ LLDB_INVALID_REGNUM};
+uint32_t RegisterContextPOSIX_x86::g_contained_esp[] = {lldb_esp_i386,
+ LLDB_INVALID_REGNUM};
+
+uint32_t RegisterContextPOSIX_x86::g_invalidate_eax[] = {
+ lldb_eax_i386, lldb_ax_i386, lldb_ah_i386, lldb_al_i386,
+ LLDB_INVALID_REGNUM};
+uint32_t RegisterContextPOSIX_x86::g_invalidate_ebx[] = {
+ lldb_ebx_i386, lldb_bx_i386, lldb_bh_i386, lldb_bl_i386,
+ LLDB_INVALID_REGNUM};
+uint32_t RegisterContextPOSIX_x86::g_invalidate_ecx[] = {
+ lldb_ecx_i386, lldb_cx_i386, lldb_ch_i386, lldb_cl_i386,
+ LLDB_INVALID_REGNUM};
+uint32_t RegisterContextPOSIX_x86::g_invalidate_edx[] = {
+ lldb_edx_i386, lldb_dx_i386, lldb_dh_i386, lldb_dl_i386,
+ LLDB_INVALID_REGNUM};
+uint32_t RegisterContextPOSIX_x86::g_invalidate_edi[] = {
+ lldb_edi_i386, lldb_di_i386, LLDB_INVALID_REGNUM};
+uint32_t RegisterContextPOSIX_x86::g_invalidate_esi[] = {
+ lldb_esi_i386, lldb_si_i386, LLDB_INVALID_REGNUM};
+uint32_t RegisterContextPOSIX_x86::g_invalidate_ebp[] = {
+ lldb_ebp_i386, lldb_bp_i386, LLDB_INVALID_REGNUM};
+uint32_t RegisterContextPOSIX_x86::g_invalidate_esp[] = {
+ lldb_esp_i386, lldb_sp_i386, LLDB_INVALID_REGNUM};
+
+uint32_t RegisterContextPOSIX_x86::g_contained_rax[] = {lldb_rax_x86_64,
+ LLDB_INVALID_REGNUM};
+uint32_t RegisterContextPOSIX_x86::g_contained_rbx[] = {lldb_rbx_x86_64,
+ LLDB_INVALID_REGNUM};
+uint32_t RegisterContextPOSIX_x86::g_contained_rcx[] = {lldb_rcx_x86_64,
+ LLDB_INVALID_REGNUM};
+uint32_t RegisterContextPOSIX_x86::g_contained_rdx[] = {lldb_rdx_x86_64,
+ LLDB_INVALID_REGNUM};
+uint32_t RegisterContextPOSIX_x86::g_contained_rdi[] = {lldb_rdi_x86_64,
+ LLDB_INVALID_REGNUM};
+uint32_t RegisterContextPOSIX_x86::g_contained_rsi[] = {lldb_rsi_x86_64,
+ LLDB_INVALID_REGNUM};
+uint32_t RegisterContextPOSIX_x86::g_contained_rbp[] = {lldb_rbp_x86_64,
+ LLDB_INVALID_REGNUM};
+uint32_t RegisterContextPOSIX_x86::g_contained_rsp[] = {lldb_rsp_x86_64,
+ LLDB_INVALID_REGNUM};
+uint32_t RegisterContextPOSIX_x86::g_contained_r8[] = {lldb_r8_x86_64,
+ LLDB_INVALID_REGNUM};
+uint32_t RegisterContextPOSIX_x86::g_contained_r9[] = {lldb_r9_x86_64,
+ LLDB_INVALID_REGNUM};
+uint32_t RegisterContextPOSIX_x86::g_contained_r10[] = {lldb_r10_x86_64,
+ LLDB_INVALID_REGNUM};
+uint32_t RegisterContextPOSIX_x86::g_contained_r11[] = {lldb_r11_x86_64,
+ LLDB_INVALID_REGNUM};
+uint32_t RegisterContextPOSIX_x86::g_contained_r12[] = {lldb_r12_x86_64,
+ LLDB_INVALID_REGNUM};
+uint32_t RegisterContextPOSIX_x86::g_contained_r13[] = {lldb_r13_x86_64,
+ LLDB_INVALID_REGNUM};
+uint32_t RegisterContextPOSIX_x86::g_contained_r14[] = {lldb_r14_x86_64,
+ LLDB_INVALID_REGNUM};
+uint32_t RegisterContextPOSIX_x86::g_contained_r15[] = {lldb_r15_x86_64,
+ LLDB_INVALID_REGNUM};
+
+uint32_t RegisterContextPOSIX_x86::g_invalidate_rax[] = {
+ lldb_rax_x86_64, lldb_eax_x86_64, lldb_ax_x86_64,
+ lldb_ah_x86_64, lldb_al_x86_64, LLDB_INVALID_REGNUM};
+uint32_t RegisterContextPOSIX_x86::g_invalidate_rbx[] = {
+ lldb_rbx_x86_64, lldb_ebx_x86_64, lldb_bx_x86_64,
+ lldb_bh_x86_64, lldb_bl_x86_64, LLDB_INVALID_REGNUM};
+uint32_t RegisterContextPOSIX_x86::g_invalidate_rcx[] = {
+ lldb_rcx_x86_64, lldb_ecx_x86_64, lldb_cx_x86_64,
+ lldb_ch_x86_64, lldb_cl_x86_64, LLDB_INVALID_REGNUM};
+uint32_t RegisterContextPOSIX_x86::g_invalidate_rdx[] = {
+ lldb_rdx_x86_64, lldb_edx_x86_64, lldb_dx_x86_64,
+ lldb_dh_x86_64, lldb_dl_x86_64, LLDB_INVALID_REGNUM};
+uint32_t RegisterContextPOSIX_x86::g_invalidate_rdi[] = {
+ lldb_rdi_x86_64, lldb_edi_x86_64, lldb_di_x86_64, lldb_dil_x86_64,
+ LLDB_INVALID_REGNUM};
+uint32_t RegisterContextPOSIX_x86::g_invalidate_rsi[] = {
+ lldb_rsi_x86_64, lldb_esi_x86_64, lldb_si_x86_64, lldb_sil_x86_64,
+ LLDB_INVALID_REGNUM};
+uint32_t RegisterContextPOSIX_x86::g_invalidate_rbp[] = {
+ lldb_rbp_x86_64, lldb_ebp_x86_64, lldb_bp_x86_64, lldb_bpl_x86_64,
+ LLDB_INVALID_REGNUM};
+uint32_t RegisterContextPOSIX_x86::g_invalidate_rsp[] = {
+ lldb_rsp_x86_64, lldb_esp_x86_64, lldb_sp_x86_64, lldb_spl_x86_64,
+ LLDB_INVALID_REGNUM};
+uint32_t RegisterContextPOSIX_x86::g_invalidate_r8[] = {
+ lldb_r8_x86_64, lldb_r8d_x86_64, lldb_r8w_x86_64, lldb_r8l_x86_64,
+ LLDB_INVALID_REGNUM};
+uint32_t RegisterContextPOSIX_x86::g_invalidate_r9[] = {
+ lldb_r9_x86_64, lldb_r9d_x86_64, lldb_r9w_x86_64, lldb_r9l_x86_64,
+ LLDB_INVALID_REGNUM};
+uint32_t RegisterContextPOSIX_x86::g_invalidate_r10[] = {
+ lldb_r10_x86_64, lldb_r10d_x86_64, lldb_r10w_x86_64, lldb_r10l_x86_64,
+ LLDB_INVALID_REGNUM};
+uint32_t RegisterContextPOSIX_x86::g_invalidate_r11[] = {
+ lldb_r11_x86_64, lldb_r11d_x86_64, lldb_r11w_x86_64, lldb_r11l_x86_64,
+ LLDB_INVALID_REGNUM};
+uint32_t RegisterContextPOSIX_x86::g_invalidate_r12[] = {
+ lldb_r12_x86_64, lldb_r12d_x86_64, lldb_r12w_x86_64, lldb_r12l_x86_64,
+ LLDB_INVALID_REGNUM};
+uint32_t RegisterContextPOSIX_x86::g_invalidate_r13[] = {
+ lldb_r13_x86_64, lldb_r13d_x86_64, lldb_r13w_x86_64, lldb_r13l_x86_64,
+ LLDB_INVALID_REGNUM};
+uint32_t RegisterContextPOSIX_x86::g_invalidate_r14[] = {
+ lldb_r14_x86_64, lldb_r14d_x86_64, lldb_r14w_x86_64, lldb_r14l_x86_64,
+ LLDB_INVALID_REGNUM};
+uint32_t RegisterContextPOSIX_x86::g_invalidate_r15[] = {
+ lldb_r15_x86_64, lldb_r15d_x86_64, lldb_r15w_x86_64, lldb_r15l_x86_64,
+ LLDB_INVALID_REGNUM};
// Number of register sets provided by this context.
-enum
-{
- k_num_extended_register_sets = 1,
- k_num_register_sets = 3
-};
-
-static const RegisterSet
-g_reg_sets_i386[k_num_register_sets] =
-{
- { "General Purpose Registers", "gpr", k_num_gpr_registers_i386, g_gpr_regnums_i386 },
- { "Floating Point Registers", "fpu", k_num_fpr_registers_i386, g_lldb_regnums_i386 },
- { "Advanced Vector Extensions", "avx", k_num_avx_registers_i386, g_avx_regnums_i386 }
-};
-
-static const RegisterSet
-g_reg_sets_x86_64[k_num_register_sets] =
-{
- { "General Purpose Registers", "gpr", k_num_gpr_registers_x86_64, g_gpr_regnums_x86_64 },
- { "Floating Point Registers", "fpu", k_num_fpr_registers_x86_64, g_lldb_regnums_x86_64 },
- { "Advanced Vector Extensions", "avx", k_num_avx_registers_x86_64, g_avx_regnums_x86_64 }
-};
-
-bool RegisterContextPOSIX_x86::IsGPR(unsigned reg)
-{
- return reg <= m_reg_info.last_gpr; // GPR's come first.
-}
-
-bool RegisterContextPOSIX_x86::IsFPR(unsigned reg)
-{
- return (m_reg_info.first_fpr <= reg && reg <= m_reg_info.last_fpr);
-}
-
-bool RegisterContextPOSIX_x86::IsAVX(unsigned reg)
-{
- return (m_reg_info.first_ymm <= reg && reg <= m_reg_info.last_ymm);
-}
-
-bool RegisterContextPOSIX_x86::IsFPR(unsigned reg, FPRType fpr_type)
-{
- bool generic_fpr = IsFPR(reg);
-
- if (fpr_type == eXSAVE)
- return generic_fpr || IsAVX(reg);
- return generic_fpr;
-}
-
-RegisterContextPOSIX_x86::RegisterContextPOSIX_x86(Thread &thread,
- uint32_t concrete_frame_idx,
- RegisterInfoInterface *register_info)
- : RegisterContext(thread, concrete_frame_idx)
-{
- m_register_info_ap.reset(register_info);
-
- switch (register_info->m_target_arch.GetMachine())
- {
- case llvm::Triple::x86:
- m_reg_info.num_registers = k_num_registers_i386;
- m_reg_info.num_gpr_registers = k_num_gpr_registers_i386;
- m_reg_info.num_fpr_registers = k_num_fpr_registers_i386;
- m_reg_info.num_avx_registers = k_num_avx_registers_i386;
- m_reg_info.last_gpr = k_last_gpr_i386;
- m_reg_info.first_fpr = k_first_fpr_i386;
- m_reg_info.last_fpr = k_last_fpr_i386;
- m_reg_info.first_st = lldb_st0_i386;
- m_reg_info.last_st = lldb_st7_i386;
- m_reg_info.first_mm = lldb_mm0_i386;
- m_reg_info.last_mm = lldb_mm7_i386;
- m_reg_info.first_xmm = lldb_xmm0_i386;
- m_reg_info.last_xmm = lldb_xmm7_i386;
- m_reg_info.first_ymm = lldb_ymm0_i386;
- m_reg_info.last_ymm = lldb_ymm7_i386;
- m_reg_info.first_dr = lldb_dr0_i386;
- m_reg_info.gpr_flags = lldb_eflags_i386;
- break;
- case llvm::Triple::x86_64:
- m_reg_info.num_registers = k_num_registers_x86_64;
- m_reg_info.num_gpr_registers = k_num_gpr_registers_x86_64;
- m_reg_info.num_fpr_registers = k_num_fpr_registers_x86_64;
- m_reg_info.num_avx_registers = k_num_avx_registers_x86_64;
- m_reg_info.last_gpr = k_last_gpr_x86_64;
- m_reg_info.first_fpr = k_first_fpr_x86_64;
- m_reg_info.last_fpr = k_last_fpr_x86_64;
- m_reg_info.first_st = lldb_st0_x86_64;
- m_reg_info.last_st = lldb_st7_x86_64;
- m_reg_info.first_mm = lldb_mm0_x86_64;
- m_reg_info.last_mm = lldb_mm7_x86_64;
- m_reg_info.first_xmm = lldb_xmm0_x86_64;
- m_reg_info.last_xmm = lldb_xmm15_x86_64;
- m_reg_info.first_ymm = lldb_ymm0_x86_64;
- m_reg_info.last_ymm = lldb_ymm15_x86_64;
- m_reg_info.first_dr = lldb_dr0_x86_64;
- m_reg_info.gpr_flags = lldb_rflags_x86_64;
- break;
- default:
- assert(false && "Unhandled target architecture.");
- break;
- }
-
- // Initialize m_iovec to point to the buffer and buffer size
- // using the conventions of Berkeley style UIO structures, as required
- // by PTRACE extensions.
- m_iovec.iov_base = &m_fpr.xstate.xsave;
- m_iovec.iov_len = sizeof(m_fpr.xstate.xsave);
-
- ::memset(&m_fpr, 0, sizeof(FPR));
-
- // elf-core yet to support ReadFPR()
- ProcessSP base = CalculateProcess();
- if (base.get()->GetPluginName() == ProcessElfCore::GetPluginNameStatic())
- return;
-
- m_fpr_type = eNotValid;
-}
-
-RegisterContextPOSIX_x86::~RegisterContextPOSIX_x86()
-{
-}
-
-RegisterContextPOSIX_x86::FPRType RegisterContextPOSIX_x86::GetFPRType()
-{
- if (m_fpr_type == eNotValid)
- {
- // TODO: Use assembly to call cpuid on the inferior and query ebx or ecx
- m_fpr_type = eXSAVE; // extended floating-point registers, if available
- if (false == ReadFPR())
- m_fpr_type = eFXSAVE; // assume generic floating-point registers
- }
- return m_fpr_type;
-}
-
-void
-RegisterContextPOSIX_x86::Invalidate()
-{
-}
-
-void
-RegisterContextPOSIX_x86::InvalidateAllRegisters()
-{
-}
+enum { k_num_extended_register_sets = 1, k_num_register_sets = 3 };
-unsigned
-RegisterContextPOSIX_x86::GetRegisterOffset(unsigned reg)
-{
- assert(reg < m_reg_info.num_registers && "Invalid register number.");
- return GetRegisterInfo()[reg].byte_offset;
-}
-
-unsigned
-RegisterContextPOSIX_x86::GetRegisterSize(unsigned reg)
-{
- assert(reg < m_reg_info.num_registers && "Invalid register number.");
- return GetRegisterInfo()[reg].byte_size;
-}
-
-size_t
-RegisterContextPOSIX_x86::GetRegisterCount()
-{
- size_t num_registers = m_reg_info.num_gpr_registers + m_reg_info.num_fpr_registers;
- if (GetFPRType() == eXSAVE)
- return num_registers + m_reg_info.num_avx_registers;
- return num_registers;
-}
-
-size_t
-RegisterContextPOSIX_x86::GetGPRSize()
-{
- return m_register_info_ap->GetGPRSize ();
+static const RegisterSet g_reg_sets_i386[k_num_register_sets] = {
+ {"General Purpose Registers", "gpr", k_num_gpr_registers_i386,
+ g_gpr_regnums_i386},
+ {"Floating Point Registers", "fpu", k_num_fpr_registers_i386,
+ g_lldb_regnums_i386},
+ {"Advanced Vector Extensions", "avx", k_num_avx_registers_i386,
+ g_avx_regnums_i386}};
+
+static const RegisterSet g_reg_sets_x86_64[k_num_register_sets] = {
+ {"General Purpose Registers", "gpr", k_num_gpr_registers_x86_64,
+ g_gpr_regnums_x86_64},
+ {"Floating Point Registers", "fpu", k_num_fpr_registers_x86_64,
+ g_lldb_regnums_x86_64},
+ {"Advanced Vector Extensions", "avx", k_num_avx_registers_x86_64,
+ g_avx_regnums_x86_64}};
+
+bool RegisterContextPOSIX_x86::IsGPR(unsigned reg) {
+ return reg <= m_reg_info.last_gpr; // GPR's come first.
+}
+
+bool RegisterContextPOSIX_x86::IsFPR(unsigned reg) {
+ return (m_reg_info.first_fpr <= reg && reg <= m_reg_info.last_fpr);
+}
+
+bool RegisterContextPOSIX_x86::IsAVX(unsigned reg) {
+ return (m_reg_info.first_ymm <= reg && reg <= m_reg_info.last_ymm);
+}
+
+bool RegisterContextPOSIX_x86::IsFPR(unsigned reg, FPRType fpr_type) {
+ bool generic_fpr = IsFPR(reg);
+
+ if (fpr_type == eXSAVE)
+ return generic_fpr || IsAVX(reg);
+ return generic_fpr;
+}
+
+RegisterContextPOSIX_x86::RegisterContextPOSIX_x86(
+ Thread &thread, uint32_t concrete_frame_idx,
+ RegisterInfoInterface *register_info)
+ : RegisterContext(thread, concrete_frame_idx) {
+ m_register_info_ap.reset(register_info);
+
+ switch (register_info->m_target_arch.GetMachine()) {
+ case llvm::Triple::x86:
+ m_reg_info.num_registers = k_num_registers_i386;
+ m_reg_info.num_gpr_registers = k_num_gpr_registers_i386;
+ m_reg_info.num_fpr_registers = k_num_fpr_registers_i386;
+ m_reg_info.num_avx_registers = k_num_avx_registers_i386;
+ m_reg_info.last_gpr = k_last_gpr_i386;
+ m_reg_info.first_fpr = k_first_fpr_i386;
+ m_reg_info.last_fpr = k_last_fpr_i386;
+ m_reg_info.first_st = lldb_st0_i386;
+ m_reg_info.last_st = lldb_st7_i386;
+ m_reg_info.first_mm = lldb_mm0_i386;
+ m_reg_info.last_mm = lldb_mm7_i386;
+ m_reg_info.first_xmm = lldb_xmm0_i386;
+ m_reg_info.last_xmm = lldb_xmm7_i386;
+ m_reg_info.first_ymm = lldb_ymm0_i386;
+ m_reg_info.last_ymm = lldb_ymm7_i386;
+ m_reg_info.first_dr = lldb_dr0_i386;
+ m_reg_info.gpr_flags = lldb_eflags_i386;
+ break;
+ case llvm::Triple::x86_64:
+ m_reg_info.num_registers = k_num_registers_x86_64;
+ m_reg_info.num_gpr_registers = k_num_gpr_registers_x86_64;
+ m_reg_info.num_fpr_registers = k_num_fpr_registers_x86_64;
+ m_reg_info.num_avx_registers = k_num_avx_registers_x86_64;
+ m_reg_info.last_gpr = k_last_gpr_x86_64;
+ m_reg_info.first_fpr = k_first_fpr_x86_64;
+ m_reg_info.last_fpr = k_last_fpr_x86_64;
+ m_reg_info.first_st = lldb_st0_x86_64;
+ m_reg_info.last_st = lldb_st7_x86_64;
+ m_reg_info.first_mm = lldb_mm0_x86_64;
+ m_reg_info.last_mm = lldb_mm7_x86_64;
+ m_reg_info.first_xmm = lldb_xmm0_x86_64;
+ m_reg_info.last_xmm = lldb_xmm15_x86_64;
+ m_reg_info.first_ymm = lldb_ymm0_x86_64;
+ m_reg_info.last_ymm = lldb_ymm15_x86_64;
+ m_reg_info.first_dr = lldb_dr0_x86_64;
+ m_reg_info.gpr_flags = lldb_rflags_x86_64;
+ break;
+ default:
+ assert(false && "Unhandled target architecture.");
+ break;
+ }
+
+ // Initialize m_iovec to point to the buffer and buffer size
+ // using the conventions of Berkeley style UIO structures, as required
+ // by PTRACE extensions.
+ m_iovec.iov_base = &m_fpr.xstate.xsave;
+ m_iovec.iov_len = sizeof(m_fpr.xstate.xsave);
+
+ ::memset(&m_fpr, 0, sizeof(FPR));
+
+ // elf-core yet to support ReadFPR()
+ ProcessSP base = CalculateProcess();
+ if (base.get()->GetPluginName() == ProcessElfCore::GetPluginNameStatic())
+ return;
+
+ m_fpr_type = eNotValid;
+}
+
+RegisterContextPOSIX_x86::~RegisterContextPOSIX_x86() {}
+
+RegisterContextPOSIX_x86::FPRType RegisterContextPOSIX_x86::GetFPRType() {
+ if (m_fpr_type == eNotValid) {
+ // TODO: Use assembly to call cpuid on the inferior and query ebx or ecx
+ m_fpr_type = eXSAVE; // extended floating-point registers, if available
+ if (false == ReadFPR())
+ m_fpr_type = eFXSAVE; // assume generic floating-point registers
+ }
+ return m_fpr_type;
+}
+
+void RegisterContextPOSIX_x86::Invalidate() {}
+
+void RegisterContextPOSIX_x86::InvalidateAllRegisters() {}
+
+unsigned RegisterContextPOSIX_x86::GetRegisterOffset(unsigned reg) {
+ assert(reg < m_reg_info.num_registers && "Invalid register number.");
+ return GetRegisterInfo()[reg].byte_offset;
+}
+
+unsigned RegisterContextPOSIX_x86::GetRegisterSize(unsigned reg) {
+ assert(reg < m_reg_info.num_registers && "Invalid register number.");
+ return GetRegisterInfo()[reg].byte_size;
+}
+
+size_t RegisterContextPOSIX_x86::GetRegisterCount() {
+ size_t num_registers =
+ m_reg_info.num_gpr_registers + m_reg_info.num_fpr_registers;
+ if (GetFPRType() == eXSAVE)
+ return num_registers + m_reg_info.num_avx_registers;
+ return num_registers;
+}
+
+size_t RegisterContextPOSIX_x86::GetGPRSize() {
+ return m_register_info_ap->GetGPRSize();
+}
+
+const RegisterInfo *RegisterContextPOSIX_x86::GetRegisterInfo() {
+ // Commonly, this method is overridden and g_register_infos is copied and
+ // specialized.
+ // So, use GetRegisterInfo() rather than g_register_infos in this scope.
+ return m_register_info_ap->GetRegisterInfo();
}
const RegisterInfo *
-RegisterContextPOSIX_x86::GetRegisterInfo()
-{
- // Commonly, this method is overridden and g_register_infos is copied and specialized.
- // So, use GetRegisterInfo() rather than g_register_infos in this scope.
- return m_register_info_ap->GetRegisterInfo ();
+RegisterContextPOSIX_x86::GetRegisterInfoAtIndex(size_t reg) {
+ if (reg < m_reg_info.num_registers)
+ return &GetRegisterInfo()[reg];
+ else
+ return NULL;
}
-const RegisterInfo *
-RegisterContextPOSIX_x86::GetRegisterInfoAtIndex(size_t reg)
-{
- if (reg < m_reg_info.num_registers)
- return &GetRegisterInfo()[reg];
- else
- return NULL;
-}
-
-size_t
-RegisterContextPOSIX_x86::GetRegisterSetCount()
-{
- size_t sets = 0;
- for (size_t set = 0; set < k_num_register_sets; ++set)
- {
- if (IsRegisterSetAvailable(set))
- ++sets;
- }
+size_t RegisterContextPOSIX_x86::GetRegisterSetCount() {
+ size_t sets = 0;
+ for (size_t set = 0; set < k_num_register_sets; ++set) {
+ if (IsRegisterSetAvailable(set))
+ ++sets;
+ }
- return sets;
+ return sets;
}
-const RegisterSet *
-RegisterContextPOSIX_x86::GetRegisterSet(size_t set)
-{
- if (IsRegisterSetAvailable(set))
- {
- switch (m_register_info_ap->m_target_arch.GetMachine())
- {
- case llvm::Triple::x86:
- return &g_reg_sets_i386[set];
- case llvm::Triple::x86_64:
- return &g_reg_sets_x86_64[set];
- default:
- assert(false && "Unhandled target architecture.");
- return NULL;
- }
+const RegisterSet *RegisterContextPOSIX_x86::GetRegisterSet(size_t set) {
+ if (IsRegisterSetAvailable(set)) {
+ switch (m_register_info_ap->m_target_arch.GetMachine()) {
+ case llvm::Triple::x86:
+ return &g_reg_sets_i386[set];
+ case llvm::Triple::x86_64:
+ return &g_reg_sets_x86_64[set];
+ default:
+ assert(false && "Unhandled target architecture.");
+ return NULL;
}
- return NULL;
+ }
+ return NULL;
}
-const char *
-RegisterContextPOSIX_x86::GetRegisterName(unsigned reg)
-{
- assert(reg < m_reg_info.num_registers && "Invalid register offset.");
- return GetRegisterInfo()[reg].name;
-}
-
-lldb::ByteOrder
-RegisterContextPOSIX_x86::GetByteOrder()
-{
- // Get the target process whose privileged thread was used for the register read.
- lldb::ByteOrder byte_order = eByteOrderInvalid;
- Process *process = CalculateProcess().get();
-
- if (process)
- byte_order = process->GetByteOrder();
- return byte_order;
+const char *RegisterContextPOSIX_x86::GetRegisterName(unsigned reg) {
+ assert(reg < m_reg_info.num_registers && "Invalid register offset.");
+ return GetRegisterInfo()[reg].name;
}
-// Parse ymm registers and into xmm.bytes and ymmh.bytes.
-bool RegisterContextPOSIX_x86::CopyYMMtoXSTATE(uint32_t reg, lldb::ByteOrder byte_order)
-{
- if (!IsAVX(reg))
- return false;
-
- if (byte_order == eByteOrderLittle)
- {
- ::memcpy(m_fpr.xstate.fxsave.xmm[reg - m_reg_info.first_ymm].bytes,
- m_ymm_set.ymm[reg - m_reg_info.first_ymm].bytes,
- sizeof(XMMReg));
- ::memcpy(m_fpr.xstate.xsave.ymmh[reg - m_reg_info.first_ymm].bytes,
- m_ymm_set.ymm[reg - m_reg_info.first_ymm].bytes + sizeof(XMMReg),
- sizeof(YMMHReg));
- return true;
- }
+lldb::ByteOrder RegisterContextPOSIX_x86::GetByteOrder() {
+ // Get the target process whose privileged thread was used for the register
+ // read.
+ lldb::ByteOrder byte_order = eByteOrderInvalid;
+ Process *process = CalculateProcess().get();
- if (byte_order == eByteOrderBig)
- {
- ::memcpy(m_fpr.xstate.fxsave.xmm[reg - m_reg_info.first_ymm].bytes,
- m_ymm_set.ymm[reg - m_reg_info.first_ymm].bytes + sizeof(XMMReg),
- sizeof(XMMReg));
- ::memcpy(m_fpr.xstate.xsave.ymmh[reg - m_reg_info.first_ymm].bytes,
- m_ymm_set.ymm[reg - m_reg_info.first_ymm].bytes,
- sizeof(YMMHReg));
- return true;
- }
- return false; // unsupported or invalid byte order
+ if (process)
+ byte_order = process->GetByteOrder();
+ return byte_order;
}
-// Concatenate xmm.bytes with ymmh.bytes
-bool RegisterContextPOSIX_x86::CopyXSTATEtoYMM(uint32_t reg, lldb::ByteOrder byte_order)
-{
- if (!IsAVX(reg))
- return false;
-
- if (byte_order == eByteOrderLittle)
- {
- ::memcpy(m_ymm_set.ymm[reg - m_reg_info.first_ymm].bytes,
- m_fpr.xstate.fxsave.xmm[reg - m_reg_info.first_ymm].bytes,
- sizeof(XMMReg));
- ::memcpy(m_ymm_set.ymm[reg - m_reg_info.first_ymm].bytes + sizeof(XMMReg),
- m_fpr.xstate.xsave.ymmh[reg - m_reg_info.first_ymm].bytes,
- sizeof(YMMHReg));
- return true;
- }
-
- if (byte_order == eByteOrderBig)
- {
- ::memcpy(m_ymm_set.ymm[reg - m_reg_info.first_ymm].bytes + sizeof(XMMReg),
- m_fpr.xstate.fxsave.xmm[reg - m_reg_info.first_ymm].bytes,
- sizeof(XMMReg));
- ::memcpy(m_ymm_set.ymm[reg - m_reg_info.first_ymm].bytes,
- m_fpr.xstate.xsave.ymmh[reg - m_reg_info.first_ymm].bytes,
- sizeof(YMMHReg));
- return true;
- }
- return false; // unsupported or invalid byte order
+// Parse ymm registers and into xmm.bytes and ymmh.bytes.
+bool RegisterContextPOSIX_x86::CopyYMMtoXSTATE(uint32_t reg,
+ lldb::ByteOrder byte_order) {
+ if (!IsAVX(reg))
+ return false;
+
+ if (byte_order == eByteOrderLittle) {
+ ::memcpy(m_fpr.xstate.fxsave.xmm[reg - m_reg_info.first_ymm].bytes,
+ m_ymm_set.ymm[reg - m_reg_info.first_ymm].bytes, sizeof(XMMReg));
+ ::memcpy(m_fpr.xstate.xsave.ymmh[reg - m_reg_info.first_ymm].bytes,
+ m_ymm_set.ymm[reg - m_reg_info.first_ymm].bytes + sizeof(XMMReg),
+ sizeof(YMMHReg));
+ return true;
+ }
+
+ if (byte_order == eByteOrderBig) {
+ ::memcpy(m_fpr.xstate.fxsave.xmm[reg - m_reg_info.first_ymm].bytes,
+ m_ymm_set.ymm[reg - m_reg_info.first_ymm].bytes + sizeof(XMMReg),
+ sizeof(XMMReg));
+ ::memcpy(m_fpr.xstate.xsave.ymmh[reg - m_reg_info.first_ymm].bytes,
+ m_ymm_set.ymm[reg - m_reg_info.first_ymm].bytes, sizeof(YMMHReg));
+ return true;
+ }
+ return false; // unsupported or invalid byte order
}
-bool
-RegisterContextPOSIX_x86::IsRegisterSetAvailable(size_t set_index)
-{
- // Note: Extended register sets are assumed to be at the end of g_reg_sets...
- size_t num_sets = k_num_register_sets - k_num_extended_register_sets;
-
- if (GetFPRType() == eXSAVE) // ...and to start with AVX registers.
- ++num_sets;
- return (set_index < num_sets);
+// Concatenate xmm.bytes with ymmh.bytes
+bool RegisterContextPOSIX_x86::CopyXSTATEtoYMM(uint32_t reg,
+ lldb::ByteOrder byte_order) {
+ if (!IsAVX(reg))
+ return false;
+
+ if (byte_order == eByteOrderLittle) {
+ ::memcpy(m_ymm_set.ymm[reg - m_reg_info.first_ymm].bytes,
+ m_fpr.xstate.fxsave.xmm[reg - m_reg_info.first_ymm].bytes,
+ sizeof(XMMReg));
+ ::memcpy(m_ymm_set.ymm[reg - m_reg_info.first_ymm].bytes + sizeof(XMMReg),
+ m_fpr.xstate.xsave.ymmh[reg - m_reg_info.first_ymm].bytes,
+ sizeof(YMMHReg));
+ return true;
+ }
+
+ if (byte_order == eByteOrderBig) {
+ ::memcpy(m_ymm_set.ymm[reg - m_reg_info.first_ymm].bytes + sizeof(XMMReg),
+ m_fpr.xstate.fxsave.xmm[reg - m_reg_info.first_ymm].bytes,
+ sizeof(XMMReg));
+ ::memcpy(m_ymm_set.ymm[reg - m_reg_info.first_ymm].bytes,
+ m_fpr.xstate.xsave.ymmh[reg - m_reg_info.first_ymm].bytes,
+ sizeof(YMMHReg));
+ return true;
+ }
+ return false; // unsupported or invalid byte order
+}
+
+bool RegisterContextPOSIX_x86::IsRegisterSetAvailable(size_t set_index) {
+ // Note: Extended register sets are assumed to be at the end of g_reg_sets...
+ size_t num_sets = k_num_register_sets - k_num_extended_register_sets;
+
+ if (GetFPRType() == eXSAVE) // ...and to start with AVX registers.
+ ++num_sets;
+ return (set_index < num_sets);
}
-
// Used when parsing DWARF and EH frame information and any other
-// object file sections that contain register numbers in them.
-uint32_t
-RegisterContextPOSIX_x86::ConvertRegisterKindToRegisterNumber(lldb::RegisterKind kind,
- uint32_t num)
-{
- const uint32_t num_regs = GetRegisterCount();
-
- assert (kind < kNumRegisterKinds);
- for (uint32_t reg_idx = 0; reg_idx < num_regs; ++reg_idx)
- {
- const RegisterInfo *reg_info = GetRegisterInfoAtIndex (reg_idx);
+// object file sections that contain register numbers in them.
+uint32_t RegisterContextPOSIX_x86::ConvertRegisterKindToRegisterNumber(
+ lldb::RegisterKind kind, uint32_t num) {
+ const uint32_t num_regs = GetRegisterCount();
+
+ assert(kind < kNumRegisterKinds);
+ for (uint32_t reg_idx = 0; reg_idx < num_regs; ++reg_idx) {
+ const RegisterInfo *reg_info = GetRegisterInfoAtIndex(reg_idx);
+
+ if (reg_info->kinds[kind] == num)
+ return reg_idx;
+ }
- if (reg_info->kinds[kind] == num)
- return reg_idx;
- }
-
- return LLDB_INVALID_REGNUM;
+ return LLDB_INVALID_REGNUM;
}
-
Modified: lldb/trunk/source/Plugins/Process/Utility/RegisterContextPOSIX_x86.h
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/source/Plugins/Process/Utility/RegisterContextPOSIX_x86.h?rev=280751&r1=280750&r2=280751&view=diff
==============================================================================
--- lldb/trunk/source/Plugins/Process/Utility/RegisterContextPOSIX_x86.h (original)
+++ lldb/trunk/source/Plugins/Process/Utility/RegisterContextPOSIX_x86.h Tue Sep 6 15:57:50 2016
@@ -14,181 +14,168 @@
// C++ Includes
// Other libraries and framework includes
// Project includes
-#include "lldb/Core/Log.h"
-#include "lldb/Target/RegisterContext.h"
-#include "RegisterInfoInterface.h"
#include "RegisterContext_x86.h"
+#include "RegisterInfoInterface.h"
#include "lldb-x86-register-enums.h"
+#include "lldb/Core/Log.h"
+#include "lldb/Target/RegisterContext.h"
class ProcessMonitor;
-class RegisterContextPOSIX_x86
- : public lldb_private::RegisterContext
-{
+class RegisterContextPOSIX_x86 : public lldb_private::RegisterContext {
public:
- RegisterContextPOSIX_x86 (lldb_private::Thread &thread,
- uint32_t concrete_frame_idx,
- lldb_private::RegisterInfoInterface *register_info);
-
- ~RegisterContextPOSIX_x86() override;
-
- void
- Invalidate();
-
- void
- InvalidateAllRegisters() override;
-
- size_t
- GetRegisterCount() override;
-
- virtual size_t
- GetGPRSize();
-
- virtual unsigned
- GetRegisterSize(unsigned reg);
-
- virtual unsigned
- GetRegisterOffset(unsigned reg);
-
- const lldb_private::RegisterInfo *
- GetRegisterInfoAtIndex(size_t reg) override;
-
- size_t
- GetRegisterSetCount() override;
-
- const lldb_private::RegisterSet *
- GetRegisterSet(size_t set) override;
-
- const char *
- GetRegisterName(unsigned reg);
-
- uint32_t
- ConvertRegisterKindToRegisterNumber(lldb::RegisterKind kind, uint32_t num) override;
-
- //---------------------------------------------------------------------------
- // Note: prefer kernel definitions over user-land
- //---------------------------------------------------------------------------
- enum FPRType
- {
- eNotValid = 0,
- eFSAVE, // TODO
- eFXSAVE,
- eSOFT, // TODO
- eXSAVE
- };
-
- static uint32_t g_contained_eax[];
- static uint32_t g_contained_ebx[];
- static uint32_t g_contained_ecx[];
- static uint32_t g_contained_edx[];
- static uint32_t g_contained_edi[];
- static uint32_t g_contained_esi[];
- static uint32_t g_contained_ebp[];
- static uint32_t g_contained_esp[];
-
- static uint32_t g_invalidate_eax[];
- static uint32_t g_invalidate_ebx[];
- static uint32_t g_invalidate_ecx[];
- static uint32_t g_invalidate_edx[];
- static uint32_t g_invalidate_edi[];
- static uint32_t g_invalidate_esi[];
- static uint32_t g_invalidate_ebp[];
- static uint32_t g_invalidate_esp[];
-
- static uint32_t g_contained_rax[];
- static uint32_t g_contained_rbx[];
- static uint32_t g_contained_rcx[];
- static uint32_t g_contained_rdx[];
- static uint32_t g_contained_rdi[];
- static uint32_t g_contained_rsi[];
- static uint32_t g_contained_rbp[];
- static uint32_t g_contained_rsp[];
- static uint32_t g_contained_r8[];
- static uint32_t g_contained_r9[];
- static uint32_t g_contained_r10[];
- static uint32_t g_contained_r11[];
- static uint32_t g_contained_r12[];
- static uint32_t g_contained_r13[];
- static uint32_t g_contained_r14[];
- static uint32_t g_contained_r15[];
-
- static uint32_t g_invalidate_rax[];
- static uint32_t g_invalidate_rbx[];
- static uint32_t g_invalidate_rcx[];
- static uint32_t g_invalidate_rdx[];
- static uint32_t g_invalidate_rdi[];
- static uint32_t g_invalidate_rsi[];
- static uint32_t g_invalidate_rbp[];
- static uint32_t g_invalidate_rsp[];
- static uint32_t g_invalidate_r8[];
- static uint32_t g_invalidate_r9[];
- static uint32_t g_invalidate_r10[];
- static uint32_t g_invalidate_r11[];
- static uint32_t g_invalidate_r12[];
- static uint32_t g_invalidate_r13[];
- static uint32_t g_invalidate_r14[];
- static uint32_t g_invalidate_r15[];
+ RegisterContextPOSIX_x86(lldb_private::Thread &thread,
+ uint32_t concrete_frame_idx,
+ lldb_private::RegisterInfoInterface *register_info);
+
+ ~RegisterContextPOSIX_x86() override;
+
+ void Invalidate();
+
+ void InvalidateAllRegisters() override;
+
+ size_t GetRegisterCount() override;
+
+ virtual size_t GetGPRSize();
+
+ virtual unsigned GetRegisterSize(unsigned reg);
+
+ virtual unsigned GetRegisterOffset(unsigned reg);
+
+ const lldb_private::RegisterInfo *GetRegisterInfoAtIndex(size_t reg) override;
+
+ size_t GetRegisterSetCount() override;
+
+ const lldb_private::RegisterSet *GetRegisterSet(size_t set) override;
+
+ const char *GetRegisterName(unsigned reg);
+
+ uint32_t ConvertRegisterKindToRegisterNumber(lldb::RegisterKind kind,
+ uint32_t num) override;
+
+ //---------------------------------------------------------------------------
+ // Note: prefer kernel definitions over user-land
+ //---------------------------------------------------------------------------
+ enum FPRType {
+ eNotValid = 0,
+ eFSAVE, // TODO
+ eFXSAVE,
+ eSOFT, // TODO
+ eXSAVE
+ };
+
+ static uint32_t g_contained_eax[];
+ static uint32_t g_contained_ebx[];
+ static uint32_t g_contained_ecx[];
+ static uint32_t g_contained_edx[];
+ static uint32_t g_contained_edi[];
+ static uint32_t g_contained_esi[];
+ static uint32_t g_contained_ebp[];
+ static uint32_t g_contained_esp[];
+
+ static uint32_t g_invalidate_eax[];
+ static uint32_t g_invalidate_ebx[];
+ static uint32_t g_invalidate_ecx[];
+ static uint32_t g_invalidate_edx[];
+ static uint32_t g_invalidate_edi[];
+ static uint32_t g_invalidate_esi[];
+ static uint32_t g_invalidate_ebp[];
+ static uint32_t g_invalidate_esp[];
+
+ static uint32_t g_contained_rax[];
+ static uint32_t g_contained_rbx[];
+ static uint32_t g_contained_rcx[];
+ static uint32_t g_contained_rdx[];
+ static uint32_t g_contained_rdi[];
+ static uint32_t g_contained_rsi[];
+ static uint32_t g_contained_rbp[];
+ static uint32_t g_contained_rsp[];
+ static uint32_t g_contained_r8[];
+ static uint32_t g_contained_r9[];
+ static uint32_t g_contained_r10[];
+ static uint32_t g_contained_r11[];
+ static uint32_t g_contained_r12[];
+ static uint32_t g_contained_r13[];
+ static uint32_t g_contained_r14[];
+ static uint32_t g_contained_r15[];
+
+ static uint32_t g_invalidate_rax[];
+ static uint32_t g_invalidate_rbx[];
+ static uint32_t g_invalidate_rcx[];
+ static uint32_t g_invalidate_rdx[];
+ static uint32_t g_invalidate_rdi[];
+ static uint32_t g_invalidate_rsi[];
+ static uint32_t g_invalidate_rbp[];
+ static uint32_t g_invalidate_rsp[];
+ static uint32_t g_invalidate_r8[];
+ static uint32_t g_invalidate_r9[];
+ static uint32_t g_invalidate_r10[];
+ static uint32_t g_invalidate_r11[];
+ static uint32_t g_invalidate_r12[];
+ static uint32_t g_invalidate_r13[];
+ static uint32_t g_invalidate_r14[];
+ static uint32_t g_invalidate_r15[];
protected:
- struct RegInfo
- {
- uint32_t num_registers;
- uint32_t num_gpr_registers;
- uint32_t num_fpr_registers;
- uint32_t num_avx_registers;
-
- uint32_t last_gpr;
- uint32_t first_fpr;
- uint32_t last_fpr;
-
- uint32_t first_st;
- uint32_t last_st;
- uint32_t first_mm;
- uint32_t last_mm;
- uint32_t first_xmm;
- uint32_t last_xmm;
- uint32_t first_ymm;
- uint32_t last_ymm;
-
- uint32_t first_dr;
- uint32_t gpr_flags;
- };
-
- uint64_t m_gpr_x86_64[lldb_private::k_num_gpr_registers_x86_64]; // 64-bit general purpose registers.
- RegInfo m_reg_info;
- FPRType m_fpr_type; // determines the type of data stored by union FPR, if any.
- FPR m_fpr; // floating-point registers including extended register sets.
- IOVEC m_iovec; // wrapper for xsave.
- YMM m_ymm_set; // copy of ymmh and xmm register halves.
- std::unique_ptr<lldb_private::RegisterInfoInterface> m_register_info_ap; // Register Info Interface (FreeBSD or Linux)
-
- // Determines if an extended register set is supported on the processor running the inferior process.
- virtual bool
- IsRegisterSetAvailable(size_t set_index);
-
- virtual const lldb_private::RegisterInfo *
- GetRegisterInfo();
-
- bool
- IsGPR(unsigned reg);
-
- bool
- IsFPR(unsigned reg);
-
- bool
- IsAVX(unsigned reg);
-
- lldb::ByteOrder GetByteOrder();
-
- bool CopyXSTATEtoYMM(uint32_t reg, lldb::ByteOrder byte_order);
- bool CopyYMMtoXSTATE(uint32_t reg, lldb::ByteOrder byte_order);
- bool IsFPR(unsigned reg, FPRType fpr_type);
- FPRType GetFPRType();
-
- virtual bool ReadGPR() = 0;
- virtual bool ReadFPR() = 0;
- virtual bool WriteGPR() = 0;
- virtual bool WriteFPR() = 0;
+ struct RegInfo {
+ uint32_t num_registers;
+ uint32_t num_gpr_registers;
+ uint32_t num_fpr_registers;
+ uint32_t num_avx_registers;
+
+ uint32_t last_gpr;
+ uint32_t first_fpr;
+ uint32_t last_fpr;
+
+ uint32_t first_st;
+ uint32_t last_st;
+ uint32_t first_mm;
+ uint32_t last_mm;
+ uint32_t first_xmm;
+ uint32_t last_xmm;
+ uint32_t first_ymm;
+ uint32_t last_ymm;
+
+ uint32_t first_dr;
+ uint32_t gpr_flags;
+ };
+
+ uint64_t m_gpr_x86_64[lldb_private::k_num_gpr_registers_x86_64]; // 64-bit
+ // general
+ // purpose
+ // registers.
+ RegInfo m_reg_info;
+ FPRType
+ m_fpr_type; // determines the type of data stored by union FPR, if any.
+ FPR m_fpr; // floating-point registers including extended register sets.
+ IOVEC m_iovec; // wrapper for xsave.
+ YMM m_ymm_set; // copy of ymmh and xmm register halves.
+ std::unique_ptr<lldb_private::RegisterInfoInterface>
+ m_register_info_ap; // Register Info Interface (FreeBSD or Linux)
+
+ // Determines if an extended register set is supported on the processor
+ // running the inferior process.
+ virtual bool IsRegisterSetAvailable(size_t set_index);
+
+ virtual const lldb_private::RegisterInfo *GetRegisterInfo();
+
+ bool IsGPR(unsigned reg);
+
+ bool IsFPR(unsigned reg);
+
+ bool IsAVX(unsigned reg);
+
+ lldb::ByteOrder GetByteOrder();
+
+ bool CopyXSTATEtoYMM(uint32_t reg, lldb::ByteOrder byte_order);
+ bool CopyYMMtoXSTATE(uint32_t reg, lldb::ByteOrder byte_order);
+ bool IsFPR(unsigned reg, FPRType fpr_type);
+ FPRType GetFPRType();
+
+ virtual bool ReadGPR() = 0;
+ virtual bool ReadFPR() = 0;
+ virtual bool WriteGPR() = 0;
+ virtual bool WriteFPR() = 0;
};
#endif // liblldb_RegisterContextPOSIX_x86_h_
Modified: lldb/trunk/source/Plugins/Process/Utility/RegisterContextThreadMemory.cpp
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/source/Plugins/Process/Utility/RegisterContextThreadMemory.cpp?rev=280751&r1=280750&r2=280751&view=diff
==============================================================================
--- lldb/trunk/source/Plugins/Process/Utility/RegisterContextThreadMemory.cpp (original)
+++ lldb/trunk/source/Plugins/Process/Utility/RegisterContextThreadMemory.cpp Tue Sep 6 15:57:50 2016
@@ -7,255 +7,213 @@
//
//===----------------------------------------------------------------------===//
-#include "lldb/lldb-private.h"
#include "lldb/Core/Error.h"
#include "lldb/Target/OperatingSystem.h"
#include "lldb/Target/Process.h"
#include "lldb/Target/Thread.h"
+#include "lldb/lldb-private.h"
#include "RegisterContextThreadMemory.h"
using namespace lldb;
using namespace lldb_private;
-RegisterContextThreadMemory::RegisterContextThreadMemory (Thread &thread,
- lldb::addr_t register_data_addr) :
- RegisterContext (thread, 0),
- m_thread_wp (thread.shared_from_this()),
- m_reg_ctx_sp (),
- m_register_data_addr (register_data_addr),
- m_stop_id(0)
-{
-}
-
-RegisterContextThreadMemory::~RegisterContextThreadMemory()
-{
-}
-
-void
-RegisterContextThreadMemory::UpdateRegisterContext ()
-{
- ThreadSP thread_sp (m_thread_wp.lock());
- if (thread_sp)
- {
- ProcessSP process_sp (thread_sp->GetProcess());
-
- if (process_sp)
- {
- const uint32_t stop_id = process_sp->GetModID().GetStopID();
- if (m_stop_id != stop_id)
- {
- m_stop_id = stop_id;
- m_reg_ctx_sp.reset();
- }
- if (!m_reg_ctx_sp)
- {
- ThreadSP backing_thread_sp (thread_sp->GetBackingThread());
- if (backing_thread_sp)
- {
- m_reg_ctx_sp = backing_thread_sp->GetRegisterContext();
- }
- else
- {
- OperatingSystem *os = process_sp->GetOperatingSystem ();
- if (os->IsOperatingSystemPluginThread (thread_sp))
- m_reg_ctx_sp = os->CreateRegisterContextForThread (thread_sp.get(), m_register_data_addr);
- }
- }
- }
- else
- {
- m_reg_ctx_sp.reset();
- }
- }
- else
- {
+RegisterContextThreadMemory::RegisterContextThreadMemory(
+ Thread &thread, lldb::addr_t register_data_addr)
+ : RegisterContext(thread, 0), m_thread_wp(thread.shared_from_this()),
+ m_reg_ctx_sp(), m_register_data_addr(register_data_addr), m_stop_id(0) {}
+
+RegisterContextThreadMemory::~RegisterContextThreadMemory() {}
+
+void RegisterContextThreadMemory::UpdateRegisterContext() {
+ ThreadSP thread_sp(m_thread_wp.lock());
+ if (thread_sp) {
+ ProcessSP process_sp(thread_sp->GetProcess());
+
+ if (process_sp) {
+ const uint32_t stop_id = process_sp->GetModID().GetStopID();
+ if (m_stop_id != stop_id) {
+ m_stop_id = stop_id;
m_reg_ctx_sp.reset();
+ }
+ if (!m_reg_ctx_sp) {
+ ThreadSP backing_thread_sp(thread_sp->GetBackingThread());
+ if (backing_thread_sp) {
+ m_reg_ctx_sp = backing_thread_sp->GetRegisterContext();
+ } else {
+ OperatingSystem *os = process_sp->GetOperatingSystem();
+ if (os->IsOperatingSystemPluginThread(thread_sp))
+ m_reg_ctx_sp = os->CreateRegisterContextForThread(
+ thread_sp.get(), m_register_data_addr);
+ }
+ }
+ } else {
+ m_reg_ctx_sp.reset();
}
+ } else {
+ m_reg_ctx_sp.reset();
+ }
}
//------------------------------------------------------------------
// Subclasses must override these functions
//------------------------------------------------------------------
-void
-RegisterContextThreadMemory::InvalidateAllRegisters ()
-{
- UpdateRegisterContext ();
- if (m_reg_ctx_sp)
- m_reg_ctx_sp->InvalidateAllRegisters();
+void RegisterContextThreadMemory::InvalidateAllRegisters() {
+ UpdateRegisterContext();
+ if (m_reg_ctx_sp)
+ m_reg_ctx_sp->InvalidateAllRegisters();
}
-size_t
-RegisterContextThreadMemory::GetRegisterCount ()
-{
- UpdateRegisterContext ();
- if (m_reg_ctx_sp)
- return m_reg_ctx_sp->GetRegisterCount();
- return 0;
+size_t RegisterContextThreadMemory::GetRegisterCount() {
+ UpdateRegisterContext();
+ if (m_reg_ctx_sp)
+ return m_reg_ctx_sp->GetRegisterCount();
+ return 0;
}
const RegisterInfo *
-RegisterContextThreadMemory::GetRegisterInfoAtIndex (size_t reg)
-{
- UpdateRegisterContext ();
- if (m_reg_ctx_sp)
- return m_reg_ctx_sp->GetRegisterInfoAtIndex(reg);
- return NULL;
-}
-
-size_t
-RegisterContextThreadMemory::GetRegisterSetCount ()
-{
- UpdateRegisterContext ();
- if (m_reg_ctx_sp)
- return m_reg_ctx_sp->GetRegisterSetCount();
- return 0;
-}
-
-const RegisterSet *
-RegisterContextThreadMemory::GetRegisterSet (size_t reg_set)
-{
- UpdateRegisterContext ();
- if (m_reg_ctx_sp)
- return m_reg_ctx_sp->GetRegisterSet(reg_set);
- return NULL;
-}
-
-bool
-RegisterContextThreadMemory::ReadRegister (const RegisterInfo *reg_info, RegisterValue ®_value)
-{
- UpdateRegisterContext ();
- if (m_reg_ctx_sp)
- return m_reg_ctx_sp->ReadRegister(reg_info, reg_value);
- return false;
-}
-
-bool
-RegisterContextThreadMemory::WriteRegister (const RegisterInfo *reg_info, const RegisterValue ®_value)
-{
- UpdateRegisterContext ();
- if (m_reg_ctx_sp)
- return m_reg_ctx_sp->WriteRegister (reg_info, reg_value);
- return false;
-}
-
-bool
-RegisterContextThreadMemory::ReadAllRegisterValues (lldb::DataBufferSP &data_sp)
-{
- UpdateRegisterContext ();
- if (m_reg_ctx_sp)
- return m_reg_ctx_sp->ReadAllRegisterValues(data_sp);
- return false;
-}
-
-bool
-RegisterContextThreadMemory::WriteAllRegisterValues (const lldb::DataBufferSP &data_sp)
-{
- UpdateRegisterContext ();
- if (m_reg_ctx_sp)
- return m_reg_ctx_sp->WriteAllRegisterValues (data_sp);
- return false;
-}
-
-bool
-RegisterContextThreadMemory::CopyFromRegisterContext (lldb::RegisterContextSP reg_ctx_sp)
-{
- UpdateRegisterContext ();
- if (m_reg_ctx_sp)
- return m_reg_ctx_sp->CopyFromRegisterContext(reg_ctx_sp);
- return false;
-}
-
-uint32_t
-RegisterContextThreadMemory::ConvertRegisterKindToRegisterNumber (lldb::RegisterKind kind, uint32_t num)
-{
- UpdateRegisterContext ();
- if (m_reg_ctx_sp)
- return m_reg_ctx_sp->ConvertRegisterKindToRegisterNumber(kind, num);
- return false;
-}
-
-uint32_t
-RegisterContextThreadMemory::NumSupportedHardwareBreakpoints ()
-{
- UpdateRegisterContext ();
- if (m_reg_ctx_sp)
- return m_reg_ctx_sp->NumSupportedHardwareBreakpoints();
- return false;
-}
-
-uint32_t
-RegisterContextThreadMemory::SetHardwareBreakpoint (lldb::addr_t addr, size_t size)
-{
- UpdateRegisterContext ();
- if (m_reg_ctx_sp)
- return m_reg_ctx_sp->SetHardwareBreakpoint(addr, size);
- return 0;
-}
-
-bool
-RegisterContextThreadMemory::ClearHardwareBreakpoint (uint32_t hw_idx)
-{
- UpdateRegisterContext ();
- if (m_reg_ctx_sp)
- return m_reg_ctx_sp->ClearHardwareBreakpoint (hw_idx);
- return false;
-}
-
-uint32_t
-RegisterContextThreadMemory::NumSupportedHardwareWatchpoints ()
-{
- UpdateRegisterContext ();
- if (m_reg_ctx_sp)
- return m_reg_ctx_sp->NumSupportedHardwareWatchpoints();
- return 0;
-}
-
-uint32_t
-RegisterContextThreadMemory::SetHardwareWatchpoint (lldb::addr_t addr, size_t size, bool read, bool write)
-{
- UpdateRegisterContext ();
- if (m_reg_ctx_sp)
- return m_reg_ctx_sp->SetHardwareWatchpoint(addr, size, read, write);
- return 0;
-}
-
-bool
-RegisterContextThreadMemory::ClearHardwareWatchpoint (uint32_t hw_index)
-{
- UpdateRegisterContext ();
- if (m_reg_ctx_sp)
- return m_reg_ctx_sp->ClearHardwareWatchpoint(hw_index);
- return false;
-}
-
-bool
-RegisterContextThreadMemory::HardwareSingleStep (bool enable)
-{
- UpdateRegisterContext ();
- if (m_reg_ctx_sp)
- return m_reg_ctx_sp->HardwareSingleStep(enable);
- return false;
-}
-
-Error
-RegisterContextThreadMemory::ReadRegisterValueFromMemory (const lldb_private::RegisterInfo *reg_info, lldb::addr_t src_addr, uint32_t src_len, RegisterValue ®_value)
-{
- UpdateRegisterContext ();
- if (m_reg_ctx_sp)
- return m_reg_ctx_sp->ReadRegisterValueFromMemory (reg_info, src_addr, src_len, reg_value);
- Error error;
- error.SetErrorString("invalid register context");
- return error;
-}
-
-Error
-RegisterContextThreadMemory::WriteRegisterValueToMemory (const lldb_private::RegisterInfo *reg_info, lldb::addr_t dst_addr, uint32_t dst_len, const RegisterValue ®_value)
-{
- UpdateRegisterContext ();
- if (m_reg_ctx_sp)
- return m_reg_ctx_sp->WriteRegisterValueToMemory (reg_info, dst_addr, dst_len, reg_value);
- Error error;
- error.SetErrorString("invalid register context");
- return error;
+RegisterContextThreadMemory::GetRegisterInfoAtIndex(size_t reg) {
+ UpdateRegisterContext();
+ if (m_reg_ctx_sp)
+ return m_reg_ctx_sp->GetRegisterInfoAtIndex(reg);
+ return NULL;
+}
+
+size_t RegisterContextThreadMemory::GetRegisterSetCount() {
+ UpdateRegisterContext();
+ if (m_reg_ctx_sp)
+ return m_reg_ctx_sp->GetRegisterSetCount();
+ return 0;
+}
+
+const RegisterSet *RegisterContextThreadMemory::GetRegisterSet(size_t reg_set) {
+ UpdateRegisterContext();
+ if (m_reg_ctx_sp)
+ return m_reg_ctx_sp->GetRegisterSet(reg_set);
+ return NULL;
+}
+
+bool RegisterContextThreadMemory::ReadRegister(const RegisterInfo *reg_info,
+ RegisterValue ®_value) {
+ UpdateRegisterContext();
+ if (m_reg_ctx_sp)
+ return m_reg_ctx_sp->ReadRegister(reg_info, reg_value);
+ return false;
+}
+
+bool RegisterContextThreadMemory::WriteRegister(
+ const RegisterInfo *reg_info, const RegisterValue ®_value) {
+ UpdateRegisterContext();
+ if (m_reg_ctx_sp)
+ return m_reg_ctx_sp->WriteRegister(reg_info, reg_value);
+ return false;
+}
+
+bool RegisterContextThreadMemory::ReadAllRegisterValues(
+ lldb::DataBufferSP &data_sp) {
+ UpdateRegisterContext();
+ if (m_reg_ctx_sp)
+ return m_reg_ctx_sp->ReadAllRegisterValues(data_sp);
+ return false;
+}
+
+bool RegisterContextThreadMemory::WriteAllRegisterValues(
+ const lldb::DataBufferSP &data_sp) {
+ UpdateRegisterContext();
+ if (m_reg_ctx_sp)
+ return m_reg_ctx_sp->WriteAllRegisterValues(data_sp);
+ return false;
+}
+
+bool RegisterContextThreadMemory::CopyFromRegisterContext(
+ lldb::RegisterContextSP reg_ctx_sp) {
+ UpdateRegisterContext();
+ if (m_reg_ctx_sp)
+ return m_reg_ctx_sp->CopyFromRegisterContext(reg_ctx_sp);
+ return false;
+}
+
+uint32_t RegisterContextThreadMemory::ConvertRegisterKindToRegisterNumber(
+ lldb::RegisterKind kind, uint32_t num) {
+ UpdateRegisterContext();
+ if (m_reg_ctx_sp)
+ return m_reg_ctx_sp->ConvertRegisterKindToRegisterNumber(kind, num);
+ return false;
+}
+
+uint32_t RegisterContextThreadMemory::NumSupportedHardwareBreakpoints() {
+ UpdateRegisterContext();
+ if (m_reg_ctx_sp)
+ return m_reg_ctx_sp->NumSupportedHardwareBreakpoints();
+ return false;
+}
+
+uint32_t RegisterContextThreadMemory::SetHardwareBreakpoint(lldb::addr_t addr,
+ size_t size) {
+ UpdateRegisterContext();
+ if (m_reg_ctx_sp)
+ return m_reg_ctx_sp->SetHardwareBreakpoint(addr, size);
+ return 0;
+}
+
+bool RegisterContextThreadMemory::ClearHardwareBreakpoint(uint32_t hw_idx) {
+ UpdateRegisterContext();
+ if (m_reg_ctx_sp)
+ return m_reg_ctx_sp->ClearHardwareBreakpoint(hw_idx);
+ return false;
+}
+
+uint32_t RegisterContextThreadMemory::NumSupportedHardwareWatchpoints() {
+ UpdateRegisterContext();
+ if (m_reg_ctx_sp)
+ return m_reg_ctx_sp->NumSupportedHardwareWatchpoints();
+ return 0;
+}
+
+uint32_t RegisterContextThreadMemory::SetHardwareWatchpoint(lldb::addr_t addr,
+ size_t size,
+ bool read,
+ bool write) {
+ UpdateRegisterContext();
+ if (m_reg_ctx_sp)
+ return m_reg_ctx_sp->SetHardwareWatchpoint(addr, size, read, write);
+ return 0;
+}
+
+bool RegisterContextThreadMemory::ClearHardwareWatchpoint(uint32_t hw_index) {
+ UpdateRegisterContext();
+ if (m_reg_ctx_sp)
+ return m_reg_ctx_sp->ClearHardwareWatchpoint(hw_index);
+ return false;
+}
+
+bool RegisterContextThreadMemory::HardwareSingleStep(bool enable) {
+ UpdateRegisterContext();
+ if (m_reg_ctx_sp)
+ return m_reg_ctx_sp->HardwareSingleStep(enable);
+ return false;
+}
+
+Error RegisterContextThreadMemory::ReadRegisterValueFromMemory(
+ const lldb_private::RegisterInfo *reg_info, lldb::addr_t src_addr,
+ uint32_t src_len, RegisterValue ®_value) {
+ UpdateRegisterContext();
+ if (m_reg_ctx_sp)
+ return m_reg_ctx_sp->ReadRegisterValueFromMemory(reg_info, src_addr,
+ src_len, reg_value);
+ Error error;
+ error.SetErrorString("invalid register context");
+ return error;
+}
+
+Error RegisterContextThreadMemory::WriteRegisterValueToMemory(
+ const lldb_private::RegisterInfo *reg_info, lldb::addr_t dst_addr,
+ uint32_t dst_len, const RegisterValue ®_value) {
+ UpdateRegisterContext();
+ if (m_reg_ctx_sp)
+ return m_reg_ctx_sp->WriteRegisterValueToMemory(reg_info, dst_addr, dst_len,
+ reg_value);
+ Error error;
+ error.SetErrorString("invalid register context");
+ return error;
}
Modified: lldb/trunk/source/Plugins/Process/Utility/RegisterContextThreadMemory.h
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/source/Plugins/Process/Utility/RegisterContextThreadMemory.h?rev=280751&r1=280750&r2=280751&view=diff
==============================================================================
--- lldb/trunk/source/Plugins/Process/Utility/RegisterContextThreadMemory.h (original)
+++ lldb/trunk/source/Plugins/Process/Utility/RegisterContextThreadMemory.h Tue Sep 6 15:57:50 2016
@@ -16,103 +16,88 @@
// Other libraries and framework includes
// Project includes
-#include "lldb/lldb-private.h"
-#include "lldb/Target/RegisterContext.h"
#include "lldb/Symbol/SymbolContext.h"
+#include "lldb/Target/RegisterContext.h"
+#include "lldb/lldb-private.h"
namespace lldb_private {
-
-class RegisterContextThreadMemory : public lldb_private::RegisterContext
-{
+
+class RegisterContextThreadMemory : public lldb_private::RegisterContext {
public:
- RegisterContextThreadMemory (Thread &thread,
- lldb::addr_t register_data_addr);
-
- ~RegisterContextThreadMemory() override;
-
- void
- InvalidateAllRegisters() override;
-
- size_t
- GetRegisterCount() override;
-
- const RegisterInfo *
- GetRegisterInfoAtIndex(size_t reg) override;
-
- size_t
- GetRegisterSetCount() override;
-
- const RegisterSet *
- GetRegisterSet(size_t reg_set) override;
-
- bool
- ReadRegister(const RegisterInfo *reg_info, RegisterValue ®_value) override;
-
- bool
- WriteRegister(const RegisterInfo *reg_info, const RegisterValue ®_value) override;
-
- // These two functions are used to implement "push" and "pop" of register states. They are used primarily
- // for expression evaluation, where we need to push a new state (storing the old one in data_sp) and then
- // restoring the original state by passing the data_sp we got from ReadAllRegisters to WriteAllRegisterValues.
- // ReadAllRegisters will do what is necessary to return a coherent set of register values for this thread, which
- // may mean e.g. interrupting a thread that is sitting in a kernel trap. That is a somewhat disruptive operation,
- // so these API's should only be used when this behavior is needed.
-
- bool
- ReadAllRegisterValues(lldb::DataBufferSP &data_sp) override;
-
- bool
- WriteAllRegisterValues(const lldb::DataBufferSP &data_sp) override;
-
- bool
- CopyFromRegisterContext (lldb::RegisterContextSP context);
-
- uint32_t
- ConvertRegisterKindToRegisterNumber(lldb::RegisterKind kind, uint32_t num) override;
-
- uint32_t
- NumSupportedHardwareBreakpoints() override;
-
- uint32_t
- SetHardwareBreakpoint(lldb::addr_t addr, size_t size) override;
-
- bool
- ClearHardwareBreakpoint(uint32_t hw_idx) override;
-
- uint32_t
- NumSupportedHardwareWatchpoints() override;
-
- uint32_t
- SetHardwareWatchpoint(lldb::addr_t addr, size_t size, bool read, bool write) override;
-
- bool
- ClearHardwareWatchpoint(uint32_t hw_index) override;
-
- bool
- HardwareSingleStep(bool enable) override;
-
- Error
- ReadRegisterValueFromMemory(const lldb_private::RegisterInfo *reg_info,
- lldb::addr_t src_addr,
- uint32_t src_len,
- RegisterValue ®_value) override;
-
- Error
- WriteRegisterValueToMemory(const lldb_private::RegisterInfo *reg_info,
- lldb::addr_t dst_addr, uint32_t dst_len,
- const RegisterValue ®_value) override;
+ RegisterContextThreadMemory(Thread &thread, lldb::addr_t register_data_addr);
+
+ ~RegisterContextThreadMemory() override;
+
+ void InvalidateAllRegisters() override;
+
+ size_t GetRegisterCount() override;
+
+ const RegisterInfo *GetRegisterInfoAtIndex(size_t reg) override;
+
+ size_t GetRegisterSetCount() override;
+
+ const RegisterSet *GetRegisterSet(size_t reg_set) override;
+
+ bool ReadRegister(const RegisterInfo *reg_info,
+ RegisterValue ®_value) override;
+
+ bool WriteRegister(const RegisterInfo *reg_info,
+ const RegisterValue ®_value) override;
+
+ // These two functions are used to implement "push" and "pop" of register
+ // states. They are used primarily
+ // for expression evaluation, where we need to push a new state (storing the
+ // old one in data_sp) and then
+ // restoring the original state by passing the data_sp we got from
+ // ReadAllRegisters to WriteAllRegisterValues.
+ // ReadAllRegisters will do what is necessary to return a coherent set of
+ // register values for this thread, which
+ // may mean e.g. interrupting a thread that is sitting in a kernel trap. That
+ // is a somewhat disruptive operation,
+ // so these API's should only be used when this behavior is needed.
+
+ bool ReadAllRegisterValues(lldb::DataBufferSP &data_sp) override;
+
+ bool WriteAllRegisterValues(const lldb::DataBufferSP &data_sp) override;
+
+ bool CopyFromRegisterContext(lldb::RegisterContextSP context);
+
+ uint32_t ConvertRegisterKindToRegisterNumber(lldb::RegisterKind kind,
+ uint32_t num) override;
+
+ uint32_t NumSupportedHardwareBreakpoints() override;
+
+ uint32_t SetHardwareBreakpoint(lldb::addr_t addr, size_t size) override;
+
+ bool ClearHardwareBreakpoint(uint32_t hw_idx) override;
+
+ uint32_t NumSupportedHardwareWatchpoints() override;
+
+ uint32_t SetHardwareWatchpoint(lldb::addr_t addr, size_t size, bool read,
+ bool write) override;
+
+ bool ClearHardwareWatchpoint(uint32_t hw_index) override;
+
+ bool HardwareSingleStep(bool enable) override;
+
+ Error ReadRegisterValueFromMemory(const lldb_private::RegisterInfo *reg_info,
+ lldb::addr_t src_addr, uint32_t src_len,
+ RegisterValue ®_value) override;
+
+ Error WriteRegisterValueToMemory(const lldb_private::RegisterInfo *reg_info,
+ lldb::addr_t dst_addr, uint32_t dst_len,
+ const RegisterValue ®_value) override;
protected:
- void
- UpdateRegisterContext ();
-
- lldb::ThreadWP m_thread_wp;
- lldb::RegisterContextSP m_reg_ctx_sp;
- lldb::addr_t m_register_data_addr;
- uint32_t m_stop_id;
+ void UpdateRegisterContext();
+
+ lldb::ThreadWP m_thread_wp;
+ lldb::RegisterContextSP m_reg_ctx_sp;
+ lldb::addr_t m_register_data_addr;
+ uint32_t m_stop_id;
private:
- DISALLOW_COPY_AND_ASSIGN (RegisterContextThreadMemory);
+ DISALLOW_COPY_AND_ASSIGN(RegisterContextThreadMemory);
};
} // namespace lldb_private
Modified: lldb/trunk/source/Plugins/Process/Utility/RegisterContext_mips.h
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/source/Plugins/Process/Utility/RegisterContext_mips.h?rev=280751&r1=280750&r2=280751&view=diff
==============================================================================
--- lldb/trunk/source/Plugins/Process/Utility/RegisterContext_mips.h (original)
+++ lldb/trunk/source/Plugins/Process/Utility/RegisterContext_mips.h Tue Sep 6 15:57:50 2016
@@ -13,375 +13,368 @@
#include <cstddef>
#include <cstdint>
-// eh_frame and DWARF Register numbers (eRegisterKindEHFrame & eRegisterKindDWARF)
+// eh_frame and DWARF Register numbers (eRegisterKindEHFrame &
+// eRegisterKindDWARF)
-enum
-{
- // GP Registers
- dwarf_zero_mips = 0,
- dwarf_r1_mips,
- dwarf_r2_mips,
- dwarf_r3_mips,
- dwarf_r4_mips,
- dwarf_r5_mips,
- dwarf_r6_mips,
- dwarf_r7_mips,
- dwarf_r8_mips,
- dwarf_r9_mips,
- dwarf_r10_mips,
- dwarf_r11_mips,
- dwarf_r12_mips,
- dwarf_r13_mips,
- dwarf_r14_mips,
- dwarf_r15_mips,
- dwarf_r16_mips,
- dwarf_r17_mips,
- dwarf_r18_mips,
- dwarf_r19_mips,
- dwarf_r20_mips,
- dwarf_r21_mips,
- dwarf_r22_mips,
- dwarf_r23_mips,
- dwarf_r24_mips,
- dwarf_r25_mips,
- dwarf_r26_mips,
- dwarf_r27_mips,
- dwarf_gp_mips,
- dwarf_sp_mips,
- dwarf_r30_mips,
- dwarf_ra_mips,
- dwarf_sr_mips,
- dwarf_lo_mips,
- dwarf_hi_mips,
- dwarf_bad_mips,
- dwarf_cause_mips,
- dwarf_pc_mips,
- dwarf_f0_mips,
- dwarf_f1_mips,
- dwarf_f2_mips,
- dwarf_f3_mips,
- dwarf_f4_mips,
- dwarf_f5_mips,
- dwarf_f6_mips,
- dwarf_f7_mips,
- dwarf_f8_mips,
- dwarf_f9_mips,
- dwarf_f10_mips,
- dwarf_f11_mips,
- dwarf_f12_mips,
- dwarf_f13_mips,
- dwarf_f14_mips,
- dwarf_f15_mips,
- dwarf_f16_mips,
- dwarf_f17_mips,
- dwarf_f18_mips,
- dwarf_f19_mips,
- dwarf_f20_mips,
- dwarf_f21_mips,
- dwarf_f22_mips,
- dwarf_f23_mips,
- dwarf_f24_mips,
- dwarf_f25_mips,
- dwarf_f26_mips,
- dwarf_f27_mips,
- dwarf_f28_mips,
- dwarf_f29_mips,
- dwarf_f30_mips,
- dwarf_f31_mips,
- dwarf_fcsr_mips,
- dwarf_fir_mips,
- dwarf_w0_mips,
- dwarf_w1_mips,
- dwarf_w2_mips,
- dwarf_w3_mips,
- dwarf_w4_mips,
- dwarf_w5_mips,
- dwarf_w6_mips,
- dwarf_w7_mips,
- dwarf_w8_mips,
- dwarf_w9_mips,
- dwarf_w10_mips,
- dwarf_w11_mips,
- dwarf_w12_mips,
- dwarf_w13_mips,
- dwarf_w14_mips,
- dwarf_w15_mips,
- dwarf_w16_mips,
- dwarf_w17_mips,
- dwarf_w18_mips,
- dwarf_w19_mips,
- dwarf_w20_mips,
- dwarf_w21_mips,
- dwarf_w22_mips,
- dwarf_w23_mips,
- dwarf_w24_mips,
- dwarf_w25_mips,
- dwarf_w26_mips,
- dwarf_w27_mips,
- dwarf_w28_mips,
- dwarf_w29_mips,
- dwarf_w30_mips,
- dwarf_w31_mips,
- dwarf_mcsr_mips,
- dwarf_mir_mips,
- dwarf_config5_mips,
- dwarf_ic_mips,
- dwarf_dummy_mips
+enum {
+ // GP Registers
+ dwarf_zero_mips = 0,
+ dwarf_r1_mips,
+ dwarf_r2_mips,
+ dwarf_r3_mips,
+ dwarf_r4_mips,
+ dwarf_r5_mips,
+ dwarf_r6_mips,
+ dwarf_r7_mips,
+ dwarf_r8_mips,
+ dwarf_r9_mips,
+ dwarf_r10_mips,
+ dwarf_r11_mips,
+ dwarf_r12_mips,
+ dwarf_r13_mips,
+ dwarf_r14_mips,
+ dwarf_r15_mips,
+ dwarf_r16_mips,
+ dwarf_r17_mips,
+ dwarf_r18_mips,
+ dwarf_r19_mips,
+ dwarf_r20_mips,
+ dwarf_r21_mips,
+ dwarf_r22_mips,
+ dwarf_r23_mips,
+ dwarf_r24_mips,
+ dwarf_r25_mips,
+ dwarf_r26_mips,
+ dwarf_r27_mips,
+ dwarf_gp_mips,
+ dwarf_sp_mips,
+ dwarf_r30_mips,
+ dwarf_ra_mips,
+ dwarf_sr_mips,
+ dwarf_lo_mips,
+ dwarf_hi_mips,
+ dwarf_bad_mips,
+ dwarf_cause_mips,
+ dwarf_pc_mips,
+ dwarf_f0_mips,
+ dwarf_f1_mips,
+ dwarf_f2_mips,
+ dwarf_f3_mips,
+ dwarf_f4_mips,
+ dwarf_f5_mips,
+ dwarf_f6_mips,
+ dwarf_f7_mips,
+ dwarf_f8_mips,
+ dwarf_f9_mips,
+ dwarf_f10_mips,
+ dwarf_f11_mips,
+ dwarf_f12_mips,
+ dwarf_f13_mips,
+ dwarf_f14_mips,
+ dwarf_f15_mips,
+ dwarf_f16_mips,
+ dwarf_f17_mips,
+ dwarf_f18_mips,
+ dwarf_f19_mips,
+ dwarf_f20_mips,
+ dwarf_f21_mips,
+ dwarf_f22_mips,
+ dwarf_f23_mips,
+ dwarf_f24_mips,
+ dwarf_f25_mips,
+ dwarf_f26_mips,
+ dwarf_f27_mips,
+ dwarf_f28_mips,
+ dwarf_f29_mips,
+ dwarf_f30_mips,
+ dwarf_f31_mips,
+ dwarf_fcsr_mips,
+ dwarf_fir_mips,
+ dwarf_w0_mips,
+ dwarf_w1_mips,
+ dwarf_w2_mips,
+ dwarf_w3_mips,
+ dwarf_w4_mips,
+ dwarf_w5_mips,
+ dwarf_w6_mips,
+ dwarf_w7_mips,
+ dwarf_w8_mips,
+ dwarf_w9_mips,
+ dwarf_w10_mips,
+ dwarf_w11_mips,
+ dwarf_w12_mips,
+ dwarf_w13_mips,
+ dwarf_w14_mips,
+ dwarf_w15_mips,
+ dwarf_w16_mips,
+ dwarf_w17_mips,
+ dwarf_w18_mips,
+ dwarf_w19_mips,
+ dwarf_w20_mips,
+ dwarf_w21_mips,
+ dwarf_w22_mips,
+ dwarf_w23_mips,
+ dwarf_w24_mips,
+ dwarf_w25_mips,
+ dwarf_w26_mips,
+ dwarf_w27_mips,
+ dwarf_w28_mips,
+ dwarf_w29_mips,
+ dwarf_w30_mips,
+ dwarf_w31_mips,
+ dwarf_mcsr_mips,
+ dwarf_mir_mips,
+ dwarf_config5_mips,
+ dwarf_ic_mips,
+ dwarf_dummy_mips
};
-enum
-{
- dwarf_zero_mips64 = 0,
- dwarf_r1_mips64,
- dwarf_r2_mips64,
- dwarf_r3_mips64,
- dwarf_r4_mips64,
- dwarf_r5_mips64,
- dwarf_r6_mips64,
- dwarf_r7_mips64,
- dwarf_r8_mips64,
- dwarf_r9_mips64,
- dwarf_r10_mips64,
- dwarf_r11_mips64,
- dwarf_r12_mips64,
- dwarf_r13_mips64,
- dwarf_r14_mips64,
- dwarf_r15_mips64,
- dwarf_r16_mips64,
- dwarf_r17_mips64,
- dwarf_r18_mips64,
- dwarf_r19_mips64,
- dwarf_r20_mips64,
- dwarf_r21_mips64,
- dwarf_r22_mips64,
- dwarf_r23_mips64,
- dwarf_r24_mips64,
- dwarf_r25_mips64,
- dwarf_r26_mips64,
- dwarf_r27_mips64,
- dwarf_gp_mips64,
- dwarf_sp_mips64,
- dwarf_r30_mips64,
- dwarf_ra_mips64,
- dwarf_sr_mips64,
- dwarf_lo_mips64,
- dwarf_hi_mips64,
- dwarf_bad_mips64,
- dwarf_cause_mips64,
- dwarf_pc_mips64,
- dwarf_f0_mips64,
- dwarf_f1_mips64,
- dwarf_f2_mips64,
- dwarf_f3_mips64,
- dwarf_f4_mips64,
- dwarf_f5_mips64,
- dwarf_f6_mips64,
- dwarf_f7_mips64,
- dwarf_f8_mips64,
- dwarf_f9_mips64,
- dwarf_f10_mips64,
- dwarf_f11_mips64,
- dwarf_f12_mips64,
- dwarf_f13_mips64,
- dwarf_f14_mips64,
- dwarf_f15_mips64,
- dwarf_f16_mips64,
- dwarf_f17_mips64,
- dwarf_f18_mips64,
- dwarf_f19_mips64,
- dwarf_f20_mips64,
- dwarf_f21_mips64,
- dwarf_f22_mips64,
- dwarf_f23_mips64,
- dwarf_f24_mips64,
- dwarf_f25_mips64,
- dwarf_f26_mips64,
- dwarf_f27_mips64,
- dwarf_f28_mips64,
- dwarf_f29_mips64,
- dwarf_f30_mips64,
- dwarf_f31_mips64,
- dwarf_fcsr_mips64,
- dwarf_fir_mips64,
- dwarf_ic_mips64,
- dwarf_dummy_mips64,
- dwarf_w0_mips64,
- dwarf_w1_mips64,
- dwarf_w2_mips64,
- dwarf_w3_mips64,
- dwarf_w4_mips64,
- dwarf_w5_mips64,
- dwarf_w6_mips64,
- dwarf_w7_mips64,
- dwarf_w8_mips64,
- dwarf_w9_mips64,
- dwarf_w10_mips64,
- dwarf_w11_mips64,
- dwarf_w12_mips64,
- dwarf_w13_mips64,
- dwarf_w14_mips64,
- dwarf_w15_mips64,
- dwarf_w16_mips64,
- dwarf_w17_mips64,
- dwarf_w18_mips64,
- dwarf_w19_mips64,
- dwarf_w20_mips64,
- dwarf_w21_mips64,
- dwarf_w22_mips64,
- dwarf_w23_mips64,
- dwarf_w24_mips64,
- dwarf_w25_mips64,
- dwarf_w26_mips64,
- dwarf_w27_mips64,
- dwarf_w28_mips64,
- dwarf_w29_mips64,
- dwarf_w30_mips64,
- dwarf_w31_mips64,
- dwarf_mcsr_mips64,
- dwarf_mir_mips64,
- dwarf_config5_mips64,
+enum {
+ dwarf_zero_mips64 = 0,
+ dwarf_r1_mips64,
+ dwarf_r2_mips64,
+ dwarf_r3_mips64,
+ dwarf_r4_mips64,
+ dwarf_r5_mips64,
+ dwarf_r6_mips64,
+ dwarf_r7_mips64,
+ dwarf_r8_mips64,
+ dwarf_r9_mips64,
+ dwarf_r10_mips64,
+ dwarf_r11_mips64,
+ dwarf_r12_mips64,
+ dwarf_r13_mips64,
+ dwarf_r14_mips64,
+ dwarf_r15_mips64,
+ dwarf_r16_mips64,
+ dwarf_r17_mips64,
+ dwarf_r18_mips64,
+ dwarf_r19_mips64,
+ dwarf_r20_mips64,
+ dwarf_r21_mips64,
+ dwarf_r22_mips64,
+ dwarf_r23_mips64,
+ dwarf_r24_mips64,
+ dwarf_r25_mips64,
+ dwarf_r26_mips64,
+ dwarf_r27_mips64,
+ dwarf_gp_mips64,
+ dwarf_sp_mips64,
+ dwarf_r30_mips64,
+ dwarf_ra_mips64,
+ dwarf_sr_mips64,
+ dwarf_lo_mips64,
+ dwarf_hi_mips64,
+ dwarf_bad_mips64,
+ dwarf_cause_mips64,
+ dwarf_pc_mips64,
+ dwarf_f0_mips64,
+ dwarf_f1_mips64,
+ dwarf_f2_mips64,
+ dwarf_f3_mips64,
+ dwarf_f4_mips64,
+ dwarf_f5_mips64,
+ dwarf_f6_mips64,
+ dwarf_f7_mips64,
+ dwarf_f8_mips64,
+ dwarf_f9_mips64,
+ dwarf_f10_mips64,
+ dwarf_f11_mips64,
+ dwarf_f12_mips64,
+ dwarf_f13_mips64,
+ dwarf_f14_mips64,
+ dwarf_f15_mips64,
+ dwarf_f16_mips64,
+ dwarf_f17_mips64,
+ dwarf_f18_mips64,
+ dwarf_f19_mips64,
+ dwarf_f20_mips64,
+ dwarf_f21_mips64,
+ dwarf_f22_mips64,
+ dwarf_f23_mips64,
+ dwarf_f24_mips64,
+ dwarf_f25_mips64,
+ dwarf_f26_mips64,
+ dwarf_f27_mips64,
+ dwarf_f28_mips64,
+ dwarf_f29_mips64,
+ dwarf_f30_mips64,
+ dwarf_f31_mips64,
+ dwarf_fcsr_mips64,
+ dwarf_fir_mips64,
+ dwarf_ic_mips64,
+ dwarf_dummy_mips64,
+ dwarf_w0_mips64,
+ dwarf_w1_mips64,
+ dwarf_w2_mips64,
+ dwarf_w3_mips64,
+ dwarf_w4_mips64,
+ dwarf_w5_mips64,
+ dwarf_w6_mips64,
+ dwarf_w7_mips64,
+ dwarf_w8_mips64,
+ dwarf_w9_mips64,
+ dwarf_w10_mips64,
+ dwarf_w11_mips64,
+ dwarf_w12_mips64,
+ dwarf_w13_mips64,
+ dwarf_w14_mips64,
+ dwarf_w15_mips64,
+ dwarf_w16_mips64,
+ dwarf_w17_mips64,
+ dwarf_w18_mips64,
+ dwarf_w19_mips64,
+ dwarf_w20_mips64,
+ dwarf_w21_mips64,
+ dwarf_w22_mips64,
+ dwarf_w23_mips64,
+ dwarf_w24_mips64,
+ dwarf_w25_mips64,
+ dwarf_w26_mips64,
+ dwarf_w27_mips64,
+ dwarf_w28_mips64,
+ dwarf_w29_mips64,
+ dwarf_w30_mips64,
+ dwarf_w31_mips64,
+ dwarf_mcsr_mips64,
+ dwarf_mir_mips64,
+ dwarf_config5_mips64,
};
-struct IOVEC_mips
-{
- void *iov_base;
- size_t iov_len;
+struct IOVEC_mips {
+ void *iov_base;
+ size_t iov_len;
};
// GP registers
-struct GPR_linux_mips
-{
- uint64_t zero;
- uint64_t r1;
- uint64_t r2;
- uint64_t r3;
- uint64_t r4;
- uint64_t r5;
- uint64_t r6;
- uint64_t r7;
- uint64_t r8;
- uint64_t r9;
- uint64_t r10;
- uint64_t r11;
- uint64_t r12;
- uint64_t r13;
- uint64_t r14;
- uint64_t r15;
- uint64_t r16;
- uint64_t r17;
- uint64_t r18;
- uint64_t r19;
- uint64_t r20;
- uint64_t r21;
- uint64_t r22;
- uint64_t r23;
- uint64_t r24;
- uint64_t r25;
- uint64_t r26;
- uint64_t r27;
- uint64_t gp;
- uint64_t sp;
- uint64_t r30;
- uint64_t ra;
- uint64_t mullo;
- uint64_t mulhi;
- uint64_t pc;
- uint64_t badvaddr;
- uint64_t sr;
- uint64_t cause;
- uint64_t config5;
+struct GPR_linux_mips {
+ uint64_t zero;
+ uint64_t r1;
+ uint64_t r2;
+ uint64_t r3;
+ uint64_t r4;
+ uint64_t r5;
+ uint64_t r6;
+ uint64_t r7;
+ uint64_t r8;
+ uint64_t r9;
+ uint64_t r10;
+ uint64_t r11;
+ uint64_t r12;
+ uint64_t r13;
+ uint64_t r14;
+ uint64_t r15;
+ uint64_t r16;
+ uint64_t r17;
+ uint64_t r18;
+ uint64_t r19;
+ uint64_t r20;
+ uint64_t r21;
+ uint64_t r22;
+ uint64_t r23;
+ uint64_t r24;
+ uint64_t r25;
+ uint64_t r26;
+ uint64_t r27;
+ uint64_t gp;
+ uint64_t sp;
+ uint64_t r30;
+ uint64_t ra;
+ uint64_t mullo;
+ uint64_t mulhi;
+ uint64_t pc;
+ uint64_t badvaddr;
+ uint64_t sr;
+ uint64_t cause;
+ uint64_t config5;
};
-struct FPR_linux_mips
-{
- uint64_t f0;
- uint64_t f1;
- uint64_t f2;
- uint64_t f3;
- uint64_t f4;
- uint64_t f5;
- uint64_t f6;
- uint64_t f7;
- uint64_t f8;
- uint64_t f9;
- uint64_t f10;
- uint64_t f11;
- uint64_t f12;
- uint64_t f13;
- uint64_t f14;
- uint64_t f15;
- uint64_t f16;
- uint64_t f17;
- uint64_t f18;
- uint64_t f19;
- uint64_t f20;
- uint64_t f21;
- uint64_t f22;
- uint64_t f23;
- uint64_t f24;
- uint64_t f25;
- uint64_t f26;
- uint64_t f27;
- uint64_t f28;
- uint64_t f29;
- uint64_t f30;
- uint64_t f31;
- uint32_t fcsr;
- uint32_t fir;
- uint32_t config5;
+struct FPR_linux_mips {
+ uint64_t f0;
+ uint64_t f1;
+ uint64_t f2;
+ uint64_t f3;
+ uint64_t f4;
+ uint64_t f5;
+ uint64_t f6;
+ uint64_t f7;
+ uint64_t f8;
+ uint64_t f9;
+ uint64_t f10;
+ uint64_t f11;
+ uint64_t f12;
+ uint64_t f13;
+ uint64_t f14;
+ uint64_t f15;
+ uint64_t f16;
+ uint64_t f17;
+ uint64_t f18;
+ uint64_t f19;
+ uint64_t f20;
+ uint64_t f21;
+ uint64_t f22;
+ uint64_t f23;
+ uint64_t f24;
+ uint64_t f25;
+ uint64_t f26;
+ uint64_t f27;
+ uint64_t f28;
+ uint64_t f29;
+ uint64_t f30;
+ uint64_t f31;
+ uint32_t fcsr;
+ uint32_t fir;
+ uint32_t config5;
};
-struct MSAReg
-{
- uint8_t byte[16];
+struct MSAReg {
+ uint8_t byte[16];
};
-struct MSA_linux_mips
-{
- MSAReg w0;
- MSAReg w1;
- MSAReg w2;
- MSAReg w3;
- MSAReg w4;
- MSAReg w5;
- MSAReg w6;
- MSAReg w7;
- MSAReg w8;
- MSAReg w9;
- MSAReg w10;
- MSAReg w11;
- MSAReg w12;
- MSAReg w13;
- MSAReg w14;
- MSAReg w15;
- MSAReg w16;
- MSAReg w17;
- MSAReg w18;
- MSAReg w19;
- MSAReg w20;
- MSAReg w21;
- MSAReg w22;
- MSAReg w23;
- MSAReg w24;
- MSAReg w25;
- MSAReg w26;
- MSAReg w27;
- MSAReg w28;
- MSAReg w29;
- MSAReg w30;
- MSAReg w31;
- uint32_t fcsr; /* FPU control status register */
- uint32_t fir; /* FPU implementaion revision */
- uint32_t mcsr; /* MSA control status register */
- uint32_t mir; /* MSA implementation revision */
- uint32_t config5; /* Config5 register */
+struct MSA_linux_mips {
+ MSAReg w0;
+ MSAReg w1;
+ MSAReg w2;
+ MSAReg w3;
+ MSAReg w4;
+ MSAReg w5;
+ MSAReg w6;
+ MSAReg w7;
+ MSAReg w8;
+ MSAReg w9;
+ MSAReg w10;
+ MSAReg w11;
+ MSAReg w12;
+ MSAReg w13;
+ MSAReg w14;
+ MSAReg w15;
+ MSAReg w16;
+ MSAReg w17;
+ MSAReg w18;
+ MSAReg w19;
+ MSAReg w20;
+ MSAReg w21;
+ MSAReg w22;
+ MSAReg w23;
+ MSAReg w24;
+ MSAReg w25;
+ MSAReg w26;
+ MSAReg w27;
+ MSAReg w28;
+ MSAReg w29;
+ MSAReg w30;
+ MSAReg w31;
+ uint32_t fcsr; /* FPU control status register */
+ uint32_t fir; /* FPU implementaion revision */
+ uint32_t mcsr; /* MSA control status register */
+ uint32_t mir; /* MSA implementation revision */
+ uint32_t config5; /* Config5 register */
};
-struct UserArea
-{
- GPR_linux_mips gpr; // General purpose registers.
- FPR_linux_mips fpr; // Floating point registers.
- MSA_linux_mips msa; // MSA registers.
+struct UserArea {
+ GPR_linux_mips gpr; // General purpose registers.
+ FPR_linux_mips fpr; // Floating point registers.
+ MSA_linux_mips msa; // MSA registers.
};
#endif // liblldb_RegisterContext_mips64_H_
Modified: lldb/trunk/source/Plugins/Process/Utility/RegisterContext_powerpc.h
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/source/Plugins/Process/Utility/RegisterContext_powerpc.h?rev=280751&r1=280750&r2=280751&view=diff
==============================================================================
--- lldb/trunk/source/Plugins/Process/Utility/RegisterContext_powerpc.h (original)
+++ lldb/trunk/source/Plugins/Process/Utility/RegisterContext_powerpc.h Tue Sep 6 15:57:50 2016
@@ -1,4 +1,5 @@
-//===-- RegisterContext_powerpc.h --------------------------------*- C++ -*-===//
+//===-- RegisterContext_powerpc.h --------------------------------*- C++
+//-*-===//
//
// The LLVM Compiler Infrastructure
//
@@ -10,114 +11,114 @@
#ifndef liblldb_RegisterContext_powerpc_H_
#define liblldb_RegisterContext_powerpc_H_
-// eh_frame and DWARF Register numbers (eRegisterKindEHFrame & eRegisterKindDWARF)
-enum
-{
- dwarf_r0_powerpc = 0,
- dwarf_r1_powerpc,
- dwarf_r2_powerpc,
- dwarf_r3_powerpc,
- dwarf_r4_powerpc,
- dwarf_r5_powerpc,
- dwarf_r6_powerpc,
- dwarf_r7_powerpc,
- dwarf_r8_powerpc,
- dwarf_r9_powerpc,
- dwarf_r10_powerpc,
- dwarf_r11_powerpc,
- dwarf_r12_powerpc,
- dwarf_r13_powerpc,
- dwarf_r14_powerpc,
- dwarf_r15_powerpc,
- dwarf_r16_powerpc,
- dwarf_r17_powerpc,
- dwarf_r18_powerpc,
- dwarf_r19_powerpc,
- dwarf_r20_powerpc,
- dwarf_r21_powerpc,
- dwarf_r22_powerpc,
- dwarf_r23_powerpc,
- dwarf_r24_powerpc,
- dwarf_r25_powerpc,
- dwarf_r26_powerpc,
- dwarf_r27_powerpc,
- dwarf_r28_powerpc,
- dwarf_r29_powerpc,
- dwarf_r30_powerpc,
- dwarf_r31_powerpc,
- dwarf_f0_powerpc,
- dwarf_f1_powerpc,
- dwarf_f2_powerpc,
- dwarf_f3_powerpc,
- dwarf_f4_powerpc,
- dwarf_f5_powerpc,
- dwarf_f6_powerpc,
- dwarf_f7_powerpc,
- dwarf_f8_powerpc,
- dwarf_f9_powerpc,
- dwarf_f10_powerpc,
- dwarf_f11_powerpc,
- dwarf_f12_powerpc,
- dwarf_f13_powerpc,
- dwarf_f14_powerpc,
- dwarf_f15_powerpc,
- dwarf_f16_powerpc,
- dwarf_f17_powerpc,
- dwarf_f18_powerpc,
- dwarf_f19_powerpc,
- dwarf_f20_powerpc,
- dwarf_f21_powerpc,
- dwarf_f22_powerpc,
- dwarf_f23_powerpc,
- dwarf_f24_powerpc,
- dwarf_f25_powerpc,
- dwarf_f26_powerpc,
- dwarf_f27_powerpc,
- dwarf_f28_powerpc,
- dwarf_f29_powerpc,
- dwarf_f30_powerpc,
- dwarf_f31_powerpc,
- dwarf_cr_powerpc,
- dwarf_fpscr_powerpc,
- dwarf_msr_powerpc,
- dwarf_vscr_powerpc,
- dwarf_xer_powerpc = 101,
- dwarf_lr_powerpc = 108,
- dwarf_ctr_powerpc,
- dwarf_pc_powerpc,
- dwarf_vrsave_powerpc = 356,
- dwarf_v0_powerpc = 1124,
- dwarf_v1_powerpc,
- dwarf_v2_powerpc,
- dwarf_v3_powerpc,
- dwarf_v4_powerpc,
- dwarf_v5_powerpc,
- dwarf_v6_powerpc,
- dwarf_v7_powerpc,
- dwarf_v8_powerpc,
- dwarf_v9_powerpc,
- dwarf_v10_powerpc,
- dwarf_v11_powerpc,
- dwarf_v12_powerpc,
- dwarf_v13_powerpc,
- dwarf_v14_powerpc,
- dwarf_v15_powerpc,
- dwarf_v16_powerpc,
- dwarf_v17_powerpc,
- dwarf_v18_powerpc,
- dwarf_v19_powerpc,
- dwarf_v20_powerpc,
- dwarf_v21_powerpc,
- dwarf_v22_powerpc,
- dwarf_v23_powerpc,
- dwarf_v24_powerpc,
- dwarf_v25_powerpc,
- dwarf_v26_powerpc,
- dwarf_v27_powerpc,
- dwarf_v28_powerpc,
- dwarf_v29_powerpc,
- dwarf_v30_powerpc,
- dwarf_v31_powerpc,
+// eh_frame and DWARF Register numbers (eRegisterKindEHFrame &
+// eRegisterKindDWARF)
+enum {
+ dwarf_r0_powerpc = 0,
+ dwarf_r1_powerpc,
+ dwarf_r2_powerpc,
+ dwarf_r3_powerpc,
+ dwarf_r4_powerpc,
+ dwarf_r5_powerpc,
+ dwarf_r6_powerpc,
+ dwarf_r7_powerpc,
+ dwarf_r8_powerpc,
+ dwarf_r9_powerpc,
+ dwarf_r10_powerpc,
+ dwarf_r11_powerpc,
+ dwarf_r12_powerpc,
+ dwarf_r13_powerpc,
+ dwarf_r14_powerpc,
+ dwarf_r15_powerpc,
+ dwarf_r16_powerpc,
+ dwarf_r17_powerpc,
+ dwarf_r18_powerpc,
+ dwarf_r19_powerpc,
+ dwarf_r20_powerpc,
+ dwarf_r21_powerpc,
+ dwarf_r22_powerpc,
+ dwarf_r23_powerpc,
+ dwarf_r24_powerpc,
+ dwarf_r25_powerpc,
+ dwarf_r26_powerpc,
+ dwarf_r27_powerpc,
+ dwarf_r28_powerpc,
+ dwarf_r29_powerpc,
+ dwarf_r30_powerpc,
+ dwarf_r31_powerpc,
+ dwarf_f0_powerpc,
+ dwarf_f1_powerpc,
+ dwarf_f2_powerpc,
+ dwarf_f3_powerpc,
+ dwarf_f4_powerpc,
+ dwarf_f5_powerpc,
+ dwarf_f6_powerpc,
+ dwarf_f7_powerpc,
+ dwarf_f8_powerpc,
+ dwarf_f9_powerpc,
+ dwarf_f10_powerpc,
+ dwarf_f11_powerpc,
+ dwarf_f12_powerpc,
+ dwarf_f13_powerpc,
+ dwarf_f14_powerpc,
+ dwarf_f15_powerpc,
+ dwarf_f16_powerpc,
+ dwarf_f17_powerpc,
+ dwarf_f18_powerpc,
+ dwarf_f19_powerpc,
+ dwarf_f20_powerpc,
+ dwarf_f21_powerpc,
+ dwarf_f22_powerpc,
+ dwarf_f23_powerpc,
+ dwarf_f24_powerpc,
+ dwarf_f25_powerpc,
+ dwarf_f26_powerpc,
+ dwarf_f27_powerpc,
+ dwarf_f28_powerpc,
+ dwarf_f29_powerpc,
+ dwarf_f30_powerpc,
+ dwarf_f31_powerpc,
+ dwarf_cr_powerpc,
+ dwarf_fpscr_powerpc,
+ dwarf_msr_powerpc,
+ dwarf_vscr_powerpc,
+ dwarf_xer_powerpc = 101,
+ dwarf_lr_powerpc = 108,
+ dwarf_ctr_powerpc,
+ dwarf_pc_powerpc,
+ dwarf_vrsave_powerpc = 356,
+ dwarf_v0_powerpc = 1124,
+ dwarf_v1_powerpc,
+ dwarf_v2_powerpc,
+ dwarf_v3_powerpc,
+ dwarf_v4_powerpc,
+ dwarf_v5_powerpc,
+ dwarf_v6_powerpc,
+ dwarf_v7_powerpc,
+ dwarf_v8_powerpc,
+ dwarf_v9_powerpc,
+ dwarf_v10_powerpc,
+ dwarf_v11_powerpc,
+ dwarf_v12_powerpc,
+ dwarf_v13_powerpc,
+ dwarf_v14_powerpc,
+ dwarf_v15_powerpc,
+ dwarf_v16_powerpc,
+ dwarf_v17_powerpc,
+ dwarf_v18_powerpc,
+ dwarf_v19_powerpc,
+ dwarf_v20_powerpc,
+ dwarf_v21_powerpc,
+ dwarf_v22_powerpc,
+ dwarf_v23_powerpc,
+ dwarf_v24_powerpc,
+ dwarf_v25_powerpc,
+ dwarf_v26_powerpc,
+ dwarf_v27_powerpc,
+ dwarf_v28_powerpc,
+ dwarf_v29_powerpc,
+ dwarf_v30_powerpc,
+ dwarf_v31_powerpc,
};
#endif // liblldb_RegisterContext_powerpc_H_
Modified: lldb/trunk/source/Plugins/Process/Utility/RegisterContext_s390x.h
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/source/Plugins/Process/Utility/RegisterContext_s390x.h?rev=280751&r1=280750&r2=280751&view=diff
==============================================================================
--- lldb/trunk/source/Plugins/Process/Utility/RegisterContext_s390x.h (original)
+++ lldb/trunk/source/Plugins/Process/Utility/RegisterContext_s390x.h Tue Sep 6 15:57:50 2016
@@ -14,80 +14,80 @@
// SystemZ ehframe, dwarf regnums
//---------------------------------------------------------------------------
-// EHFrame and DWARF Register numbers (eRegisterKindEHFrame & eRegisterKindDWARF)
-enum
-{
- // General Purpose Registers
- dwarf_r0_s390x = 0,
- dwarf_r1_s390x,
- dwarf_r2_s390x,
- dwarf_r3_s390x,
- dwarf_r4_s390x,
- dwarf_r5_s390x,
- dwarf_r6_s390x,
- dwarf_r7_s390x,
- dwarf_r8_s390x,
- dwarf_r9_s390x,
- dwarf_r10_s390x,
- dwarf_r11_s390x,
- dwarf_r12_s390x,
- dwarf_r13_s390x,
- dwarf_r14_s390x,
- dwarf_r15_s390x,
- // Floating Point Registers / Vector Registers 0-15
- dwarf_f0_s390x = 16,
- dwarf_f2_s390x,
- dwarf_f4_s390x,
- dwarf_f6_s390x,
- dwarf_f1_s390x,
- dwarf_f3_s390x,
- dwarf_f5_s390x,
- dwarf_f7_s390x,
- dwarf_f8_s390x,
- dwarf_f10_s390x,
- dwarf_f12_s390x,
- dwarf_f14_s390x,
- dwarf_f9_s390x,
- dwarf_f11_s390x,
- dwarf_f13_s390x,
- dwarf_f15_s390x,
- // Access Registers
- dwarf_acr0_s390x = 48,
- dwarf_acr1_s390x,
- dwarf_acr2_s390x,
- dwarf_acr3_s390x,
- dwarf_acr4_s390x,
- dwarf_acr5_s390x,
- dwarf_acr6_s390x,
- dwarf_acr7_s390x,
- dwarf_acr8_s390x,
- dwarf_acr9_s390x,
- dwarf_acr10_s390x,
- dwarf_acr11_s390x,
- dwarf_acr12_s390x,
- dwarf_acr13_s390x,
- dwarf_acr14_s390x,
- dwarf_acr15_s390x,
- // Program Status Word
- dwarf_pswm_s390x = 64,
- dwarf_pswa_s390x,
- // Vector Registers 16-31
- dwarf_v16_s390x = 68,
- dwarf_v18_s390x,
- dwarf_v20_s390x,
- dwarf_v22_s390x,
- dwarf_v17_s390x,
- dwarf_v19_s390x,
- dwarf_v21_s390x,
- dwarf_v23_s390x,
- dwarf_v24_s390x,
- dwarf_v26_s390x,
- dwarf_v28_s390x,
- dwarf_v30_s390x,
- dwarf_v25_s390x,
- dwarf_v27_s390x,
- dwarf_v29_s390x,
- dwarf_v31_s390x,
+// EHFrame and DWARF Register numbers (eRegisterKindEHFrame &
+// eRegisterKindDWARF)
+enum {
+ // General Purpose Registers
+ dwarf_r0_s390x = 0,
+ dwarf_r1_s390x,
+ dwarf_r2_s390x,
+ dwarf_r3_s390x,
+ dwarf_r4_s390x,
+ dwarf_r5_s390x,
+ dwarf_r6_s390x,
+ dwarf_r7_s390x,
+ dwarf_r8_s390x,
+ dwarf_r9_s390x,
+ dwarf_r10_s390x,
+ dwarf_r11_s390x,
+ dwarf_r12_s390x,
+ dwarf_r13_s390x,
+ dwarf_r14_s390x,
+ dwarf_r15_s390x,
+ // Floating Point Registers / Vector Registers 0-15
+ dwarf_f0_s390x = 16,
+ dwarf_f2_s390x,
+ dwarf_f4_s390x,
+ dwarf_f6_s390x,
+ dwarf_f1_s390x,
+ dwarf_f3_s390x,
+ dwarf_f5_s390x,
+ dwarf_f7_s390x,
+ dwarf_f8_s390x,
+ dwarf_f10_s390x,
+ dwarf_f12_s390x,
+ dwarf_f14_s390x,
+ dwarf_f9_s390x,
+ dwarf_f11_s390x,
+ dwarf_f13_s390x,
+ dwarf_f15_s390x,
+ // Access Registers
+ dwarf_acr0_s390x = 48,
+ dwarf_acr1_s390x,
+ dwarf_acr2_s390x,
+ dwarf_acr3_s390x,
+ dwarf_acr4_s390x,
+ dwarf_acr5_s390x,
+ dwarf_acr6_s390x,
+ dwarf_acr7_s390x,
+ dwarf_acr8_s390x,
+ dwarf_acr9_s390x,
+ dwarf_acr10_s390x,
+ dwarf_acr11_s390x,
+ dwarf_acr12_s390x,
+ dwarf_acr13_s390x,
+ dwarf_acr14_s390x,
+ dwarf_acr15_s390x,
+ // Program Status Word
+ dwarf_pswm_s390x = 64,
+ dwarf_pswa_s390x,
+ // Vector Registers 16-31
+ dwarf_v16_s390x = 68,
+ dwarf_v18_s390x,
+ dwarf_v20_s390x,
+ dwarf_v22_s390x,
+ dwarf_v17_s390x,
+ dwarf_v19_s390x,
+ dwarf_v21_s390x,
+ dwarf_v23_s390x,
+ dwarf_v24_s390x,
+ dwarf_v26_s390x,
+ dwarf_v28_s390x,
+ dwarf_v30_s390x,
+ dwarf_v25_s390x,
+ dwarf_v27_s390x,
+ dwarf_v29_s390x,
+ dwarf_v31_s390x,
};
#endif
Modified: lldb/trunk/source/Plugins/Process/Utility/RegisterContext_x86.h
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/source/Plugins/Process/Utility/RegisterContext_x86.h?rev=280751&r1=280750&r2=280751&view=diff
==============================================================================
--- lldb/trunk/source/Plugins/Process/Utility/RegisterContext_x86.h (original)
+++ lldb/trunk/source/Plugins/Process/Utility/RegisterContext_x86.h Tue Sep 6 15:57:50 2016
@@ -17,315 +17,307 @@
// i386 ehframe, dwarf regnums
//---------------------------------------------------------------------------
-// Register numbers seen in eh_frame (eRegisterKindEHFrame) on i386 systems (non-Darwin)
+// Register numbers seen in eh_frame (eRegisterKindEHFrame) on i386 systems
+// (non-Darwin)
//
-enum
-{
- ehframe_eax_i386 = 0,
- ehframe_ecx_i386,
- ehframe_edx_i386,
- ehframe_ebx_i386,
-
- // on Darwin esp & ebp are reversed in the eh_frame section for i386 (versus dwarf's reg numbering).
- // To be specific:
- // i386+darwin eh_frame: 4 is ebp, 5 is esp
- // i386+everyone else eh_frame: 4 is esp, 5 is ebp
- // i386 dwarf: 4 is esp, 5 is ebp
- // lldb will get the darwin-specific eh_frame reg numberings from debugserver, or the ABI, so we
- // only encode the generally correct 4 == esp, 5 == ebp numbers in this generic header.
-
- ehframe_esp_i386,
- ehframe_ebp_i386,
- ehframe_esi_i386,
- ehframe_edi_i386,
- ehframe_eip_i386,
- ehframe_eflags_i386,
- ehframe_st0_i386 = 12,
- ehframe_st1_i386,
- ehframe_st2_i386,
- ehframe_st3_i386,
- ehframe_st4_i386,
- ehframe_st5_i386,
- ehframe_st6_i386,
- ehframe_st7_i386,
- ehframe_xmm0_i386 = 21,
- ehframe_xmm1_i386,
- ehframe_xmm2_i386,
- ehframe_xmm3_i386,
- ehframe_xmm4_i386,
- ehframe_xmm5_i386,
- ehframe_xmm6_i386,
- ehframe_xmm7_i386,
- ehframe_mm0_i386 = 29,
- ehframe_mm1_i386,
- ehframe_mm2_i386,
- ehframe_mm3_i386,
- ehframe_mm4_i386,
- ehframe_mm5_i386,
- ehframe_mm6_i386,
- ehframe_mm7_i386,
+enum {
+ ehframe_eax_i386 = 0,
+ ehframe_ecx_i386,
+ ehframe_edx_i386,
+ ehframe_ebx_i386,
+
+ // on Darwin esp & ebp are reversed in the eh_frame section for i386 (versus
+ // dwarf's reg numbering).
+ // To be specific:
+ // i386+darwin eh_frame: 4 is ebp, 5 is esp
+ // i386+everyone else eh_frame: 4 is esp, 5 is ebp
+ // i386 dwarf: 4 is esp, 5 is ebp
+ // lldb will get the darwin-specific eh_frame reg numberings from debugserver,
+ // or the ABI, so we
+ // only encode the generally correct 4 == esp, 5 == ebp numbers in this
+ // generic header.
+
+ ehframe_esp_i386,
+ ehframe_ebp_i386,
+ ehframe_esi_i386,
+ ehframe_edi_i386,
+ ehframe_eip_i386,
+ ehframe_eflags_i386,
+ ehframe_st0_i386 = 12,
+ ehframe_st1_i386,
+ ehframe_st2_i386,
+ ehframe_st3_i386,
+ ehframe_st4_i386,
+ ehframe_st5_i386,
+ ehframe_st6_i386,
+ ehframe_st7_i386,
+ ehframe_xmm0_i386 = 21,
+ ehframe_xmm1_i386,
+ ehframe_xmm2_i386,
+ ehframe_xmm3_i386,
+ ehframe_xmm4_i386,
+ ehframe_xmm5_i386,
+ ehframe_xmm6_i386,
+ ehframe_xmm7_i386,
+ ehframe_mm0_i386 = 29,
+ ehframe_mm1_i386,
+ ehframe_mm2_i386,
+ ehframe_mm3_i386,
+ ehframe_mm4_i386,
+ ehframe_mm5_i386,
+ ehframe_mm6_i386,
+ ehframe_mm7_i386,
};
// DWARF register numbers (eRegisterKindDWARF)
// Intel's x86 or IA-32
-enum
-{
- // General Purpose Registers.
- dwarf_eax_i386 = 0,
- dwarf_ecx_i386,
- dwarf_edx_i386,
- dwarf_ebx_i386,
- dwarf_esp_i386,
- dwarf_ebp_i386,
- dwarf_esi_i386,
- dwarf_edi_i386,
- dwarf_eip_i386,
- dwarf_eflags_i386,
- // Floating Point Registers
- dwarf_st0_i386 = 11,
- dwarf_st1_i386,
- dwarf_st2_i386,
- dwarf_st3_i386,
- dwarf_st4_i386,
- dwarf_st5_i386,
- dwarf_st6_i386,
- dwarf_st7_i386,
- // SSE Registers
- dwarf_xmm0_i386 = 21,
- dwarf_xmm1_i386,
- dwarf_xmm2_i386,
- dwarf_xmm3_i386,
- dwarf_xmm4_i386,
- dwarf_xmm5_i386,
- dwarf_xmm6_i386,
- dwarf_xmm7_i386,
- // MMX Registers
- dwarf_mm0_i386 = 29,
- dwarf_mm1_i386,
- dwarf_mm2_i386,
- dwarf_mm3_i386,
- dwarf_mm4_i386,
- dwarf_mm5_i386,
- dwarf_mm6_i386,
- dwarf_mm7_i386,
- dwarf_fctrl_i386 = 37, // x87 control word
- dwarf_fstat_i386 = 38, // x87 status word
- dwarf_mxcsr_i386 = 39,
- dwarf_es_i386 = 40,
- dwarf_cs_i386 = 41,
- dwarf_ss_i386 = 42,
- dwarf_ds_i386 = 43,
- dwarf_fs_i386 = 44,
- dwarf_gs_i386 = 45
+enum {
+ // General Purpose Registers.
+ dwarf_eax_i386 = 0,
+ dwarf_ecx_i386,
+ dwarf_edx_i386,
+ dwarf_ebx_i386,
+ dwarf_esp_i386,
+ dwarf_ebp_i386,
+ dwarf_esi_i386,
+ dwarf_edi_i386,
+ dwarf_eip_i386,
+ dwarf_eflags_i386,
+ // Floating Point Registers
+ dwarf_st0_i386 = 11,
+ dwarf_st1_i386,
+ dwarf_st2_i386,
+ dwarf_st3_i386,
+ dwarf_st4_i386,
+ dwarf_st5_i386,
+ dwarf_st6_i386,
+ dwarf_st7_i386,
+ // SSE Registers
+ dwarf_xmm0_i386 = 21,
+ dwarf_xmm1_i386,
+ dwarf_xmm2_i386,
+ dwarf_xmm3_i386,
+ dwarf_xmm4_i386,
+ dwarf_xmm5_i386,
+ dwarf_xmm6_i386,
+ dwarf_xmm7_i386,
+ // MMX Registers
+ dwarf_mm0_i386 = 29,
+ dwarf_mm1_i386,
+ dwarf_mm2_i386,
+ dwarf_mm3_i386,
+ dwarf_mm4_i386,
+ dwarf_mm5_i386,
+ dwarf_mm6_i386,
+ dwarf_mm7_i386,
+ dwarf_fctrl_i386 = 37, // x87 control word
+ dwarf_fstat_i386 = 38, // x87 status word
+ dwarf_mxcsr_i386 = 39,
+ dwarf_es_i386 = 40,
+ dwarf_cs_i386 = 41,
+ dwarf_ss_i386 = 42,
+ dwarf_ds_i386 = 43,
+ dwarf_fs_i386 = 44,
+ dwarf_gs_i386 = 45
- // I believe the ymm registers use the dwarf_xmm%_i386 register numbers and
- // then differentiate based on size of the register.
+ // I believe the ymm registers use the dwarf_xmm%_i386 register numbers and
+ // then differentiate based on size of the register.
};
//---------------------------------------------------------------------------
// AMD x86_64, AMD64, Intel EM64T, or Intel 64 ehframe, dwarf regnums
//---------------------------------------------------------------------------
-// EHFrame and DWARF Register numbers (eRegisterKindEHFrame & eRegisterKindDWARF)
+// EHFrame and DWARF Register numbers (eRegisterKindEHFrame &
+// eRegisterKindDWARF)
// This is the spec I used (as opposed to x86-64-abi-0.99.pdf):
// http://software.intel.com/sites/default/files/article/402129/mpx-linux64-abi.pdf
-enum
-{
- // GP Registers
- dwarf_rax_x86_64 = 0,
- dwarf_rdx_x86_64,
- dwarf_rcx_x86_64,
- dwarf_rbx_x86_64,
- dwarf_rsi_x86_64,
- dwarf_rdi_x86_64,
- dwarf_rbp_x86_64,
- dwarf_rsp_x86_64,
- // Extended GP Registers
- dwarf_r8_x86_64 = 8,
- dwarf_r9_x86_64,
- dwarf_r10_x86_64,
- dwarf_r11_x86_64,
- dwarf_r12_x86_64,
- dwarf_r13_x86_64,
- dwarf_r14_x86_64,
- dwarf_r15_x86_64,
- // Return Address (RA) mapped to RIP
- dwarf_rip_x86_64 = 16,
- // SSE Vector Registers
- dwarf_xmm0_x86_64 = 17,
- dwarf_xmm1_x86_64,
- dwarf_xmm2_x86_64,
- dwarf_xmm3_x86_64,
- dwarf_xmm4_x86_64,
- dwarf_xmm5_x86_64,
- dwarf_xmm6_x86_64,
- dwarf_xmm7_x86_64,
- dwarf_xmm8_x86_64,
- dwarf_xmm9_x86_64,
- dwarf_xmm10_x86_64,
- dwarf_xmm11_x86_64,
- dwarf_xmm12_x86_64,
- dwarf_xmm13_x86_64,
- dwarf_xmm14_x86_64,
- dwarf_xmm15_x86_64,
- // Floating Point Registers
- dwarf_st0_x86_64 = 33,
- dwarf_st1_x86_64,
- dwarf_st2_x86_64,
- dwarf_st3_x86_64,
- dwarf_st4_x86_64,
- dwarf_st5_x86_64,
- dwarf_st6_x86_64,
- dwarf_st7_x86_64,
- // MMX Registers
- dwarf_mm0_x86_64 = 41,
- dwarf_mm1_x86_64,
- dwarf_mm2_x86_64,
- dwarf_mm3_x86_64,
- dwarf_mm4_x86_64,
- dwarf_mm5_x86_64,
- dwarf_mm6_x86_64,
- dwarf_mm7_x86_64,
- // Control and Status Flags Register
- dwarf_rflags_x86_64 = 49,
- // selector registers
- dwarf_es_x86_64 = 50,
- dwarf_cs_x86_64,
- dwarf_ss_x86_64,
- dwarf_ds_x86_64,
- dwarf_fs_x86_64,
- dwarf_gs_x86_64,
- // Floating point control registers
- dwarf_mxcsr_x86_64 = 64, // Media Control and Status
- dwarf_fctrl_x86_64, // x87 control word
- dwarf_fstat_x86_64, // x87 status word
- // Upper Vector Registers
- dwarf_ymm0h_x86_64 = 67,
- dwarf_ymm1h_x86_64,
- dwarf_ymm2h_x86_64,
- dwarf_ymm3h_x86_64,
- dwarf_ymm4h_x86_64,
- dwarf_ymm5h_x86_64,
- dwarf_ymm6h_x86_64,
- dwarf_ymm7h_x86_64,
- dwarf_ymm8h_x86_64,
- dwarf_ymm9h_x86_64,
- dwarf_ymm10h_x86_64,
- dwarf_ymm11h_x86_64,
- dwarf_ymm12h_x86_64,
- dwarf_ymm13h_x86_64,
- dwarf_ymm14h_x86_64,
- dwarf_ymm15h_x86_64,
- // AVX2 Vector Mask Registers
- // dwarf_k0_x86_64 = 118,
- // dwarf_k1_x86_64,
- // dwarf_k2_x86_64,
- // dwarf_k3_x86_64,
- // dwarf_k4_x86_64,
- // dwarf_k5_x86_64,
- // dwarf_k6_x86_64,
- // dwarf_k7_x86_64,
+enum {
+ // GP Registers
+ dwarf_rax_x86_64 = 0,
+ dwarf_rdx_x86_64,
+ dwarf_rcx_x86_64,
+ dwarf_rbx_x86_64,
+ dwarf_rsi_x86_64,
+ dwarf_rdi_x86_64,
+ dwarf_rbp_x86_64,
+ dwarf_rsp_x86_64,
+ // Extended GP Registers
+ dwarf_r8_x86_64 = 8,
+ dwarf_r9_x86_64,
+ dwarf_r10_x86_64,
+ dwarf_r11_x86_64,
+ dwarf_r12_x86_64,
+ dwarf_r13_x86_64,
+ dwarf_r14_x86_64,
+ dwarf_r15_x86_64,
+ // Return Address (RA) mapped to RIP
+ dwarf_rip_x86_64 = 16,
+ // SSE Vector Registers
+ dwarf_xmm0_x86_64 = 17,
+ dwarf_xmm1_x86_64,
+ dwarf_xmm2_x86_64,
+ dwarf_xmm3_x86_64,
+ dwarf_xmm4_x86_64,
+ dwarf_xmm5_x86_64,
+ dwarf_xmm6_x86_64,
+ dwarf_xmm7_x86_64,
+ dwarf_xmm8_x86_64,
+ dwarf_xmm9_x86_64,
+ dwarf_xmm10_x86_64,
+ dwarf_xmm11_x86_64,
+ dwarf_xmm12_x86_64,
+ dwarf_xmm13_x86_64,
+ dwarf_xmm14_x86_64,
+ dwarf_xmm15_x86_64,
+ // Floating Point Registers
+ dwarf_st0_x86_64 = 33,
+ dwarf_st1_x86_64,
+ dwarf_st2_x86_64,
+ dwarf_st3_x86_64,
+ dwarf_st4_x86_64,
+ dwarf_st5_x86_64,
+ dwarf_st6_x86_64,
+ dwarf_st7_x86_64,
+ // MMX Registers
+ dwarf_mm0_x86_64 = 41,
+ dwarf_mm1_x86_64,
+ dwarf_mm2_x86_64,
+ dwarf_mm3_x86_64,
+ dwarf_mm4_x86_64,
+ dwarf_mm5_x86_64,
+ dwarf_mm6_x86_64,
+ dwarf_mm7_x86_64,
+ // Control and Status Flags Register
+ dwarf_rflags_x86_64 = 49,
+ // selector registers
+ dwarf_es_x86_64 = 50,
+ dwarf_cs_x86_64,
+ dwarf_ss_x86_64,
+ dwarf_ds_x86_64,
+ dwarf_fs_x86_64,
+ dwarf_gs_x86_64,
+ // Floating point control registers
+ dwarf_mxcsr_x86_64 = 64, // Media Control and Status
+ dwarf_fctrl_x86_64, // x87 control word
+ dwarf_fstat_x86_64, // x87 status word
+ // Upper Vector Registers
+ dwarf_ymm0h_x86_64 = 67,
+ dwarf_ymm1h_x86_64,
+ dwarf_ymm2h_x86_64,
+ dwarf_ymm3h_x86_64,
+ dwarf_ymm4h_x86_64,
+ dwarf_ymm5h_x86_64,
+ dwarf_ymm6h_x86_64,
+ dwarf_ymm7h_x86_64,
+ dwarf_ymm8h_x86_64,
+ dwarf_ymm9h_x86_64,
+ dwarf_ymm10h_x86_64,
+ dwarf_ymm11h_x86_64,
+ dwarf_ymm12h_x86_64,
+ dwarf_ymm13h_x86_64,
+ dwarf_ymm14h_x86_64,
+ dwarf_ymm15h_x86_64,
+ // AVX2 Vector Mask Registers
+ // dwarf_k0_x86_64 = 118,
+ // dwarf_k1_x86_64,
+ // dwarf_k2_x86_64,
+ // dwarf_k3_x86_64,
+ // dwarf_k4_x86_64,
+ // dwarf_k5_x86_64,
+ // dwarf_k6_x86_64,
+ // dwarf_k7_x86_64,
};
//---------------------------------------------------------------------------
// Generic floating-point registers
//---------------------------------------------------------------------------
-struct MMSReg
-{
- uint8_t bytes[10];
- uint8_t pad[6];
+struct MMSReg {
+ uint8_t bytes[10];
+ uint8_t pad[6];
};
-struct XMMReg
-{
- uint8_t bytes[16]; // 128-bits for each XMM register
+struct XMMReg {
+ uint8_t bytes[16]; // 128-bits for each XMM register
};
// i387_fxsave_struct
-struct FXSAVE
-{
- uint16_t fctrl; // FPU Control Word (fcw)
- uint16_t fstat; // FPU Status Word (fsw)
- uint8_t ftag; // FPU Tag Word (ftw)
- uint8_t reserved_1; // Reserved
- uint16_t fop; // Last Instruction Opcode (fop)
- union
- {
- struct
- {
- uint64_t fip; // Instruction Pointer
- uint64_t fdp; // Data Pointer
- } x86_64;
- struct
- {
- uint32_t fioff; // FPU IP Offset (fip)
- uint32_t fiseg; // FPU IP Selector (fcs)
- uint32_t fooff; // FPU Operand Pointer Offset (foo)
- uint32_t foseg; // FPU Operand Pointer Selector (fos)
- } i386_;// Added _ in the end to avoid error with gcc defining i386 in some cases
- } ptr;
- uint32_t mxcsr; // MXCSR Register State
- uint32_t mxcsrmask; // MXCSR Mask
- MMSReg stmm[8]; // 8*16 bytes for each FP-reg = 128 bytes
- XMMReg xmm[16]; // 16*16 bytes for each XMM-reg = 256 bytes
- uint32_t padding[24];
+struct FXSAVE {
+ uint16_t fctrl; // FPU Control Word (fcw)
+ uint16_t fstat; // FPU Status Word (fsw)
+ uint8_t ftag; // FPU Tag Word (ftw)
+ uint8_t reserved_1; // Reserved
+ uint16_t fop; // Last Instruction Opcode (fop)
+ union {
+ struct {
+ uint64_t fip; // Instruction Pointer
+ uint64_t fdp; // Data Pointer
+ } x86_64;
+ struct {
+ uint32_t fioff; // FPU IP Offset (fip)
+ uint32_t fiseg; // FPU IP Selector (fcs)
+ uint32_t fooff; // FPU Operand Pointer Offset (foo)
+ uint32_t foseg; // FPU Operand Pointer Selector (fos)
+ } i386_; // Added _ in the end to avoid error with gcc defining i386 in some
+ // cases
+ } ptr;
+ uint32_t mxcsr; // MXCSR Register State
+ uint32_t mxcsrmask; // MXCSR Mask
+ MMSReg stmm[8]; // 8*16 bytes for each FP-reg = 128 bytes
+ XMMReg xmm[16]; // 16*16 bytes for each XMM-reg = 256 bytes
+ uint32_t padding[24];
};
//---------------------------------------------------------------------------
// Extended floating-point registers
//---------------------------------------------------------------------------
-struct YMMHReg
-{
- uint8_t bytes[16]; // 16 * 8 bits for the high bytes of each YMM register
+struct YMMHReg {
+ uint8_t bytes[16]; // 16 * 8 bits for the high bytes of each YMM register
};
-struct YMMReg
-{
- uint8_t bytes[32]; // 16 * 16 bits for each YMM register
+struct YMMReg {
+ uint8_t bytes[32]; // 16 * 16 bits for each YMM register
};
-struct YMM
-{
- YMMReg ymm[16]; // assembled from ymmh and xmm registers
+struct YMM {
+ YMMReg ymm[16]; // assembled from ymmh and xmm registers
};
-struct XSAVE_HDR
-{
- uint64_t xstate_bv; // OS enabled xstate mask to determine the extended states supported by the processor
- uint64_t reserved1[2];
- uint64_t reserved2[5];
+struct XSAVE_HDR {
+ uint64_t xstate_bv; // OS enabled xstate mask to determine the extended states
+ // supported by the processor
+ uint64_t reserved1[2];
+ uint64_t reserved2[5];
} __attribute__((packed));
-// x86 extensions to FXSAVE (i.e. for AVX processors)
-struct XSAVE
-{
- FXSAVE i387; // floating point registers typical in i387_fxsave_struct
- XSAVE_HDR header; // The xsave_hdr_struct can be used to determine if the following extensions are usable
- YMMHReg ymmh[16]; // High 16 bytes of each of 16 YMM registers (the low bytes are in FXSAVE.xmm for compatibility with SSE)
- // Slot any extensions to the register file here
-} __attribute__((packed, aligned (64)));
+// x86 extensions to FXSAVE (i.e. for AVX processors)
+struct XSAVE {
+ FXSAVE i387; // floating point registers typical in i387_fxsave_struct
+ XSAVE_HDR header; // The xsave_hdr_struct can be used to determine if the
+ // following extensions are usable
+ YMMHReg ymmh[16]; // High 16 bytes of each of 16 YMM registers (the low bytes
+ // are in FXSAVE.xmm for compatibility with SSE)
+ // Slot any extensions to the register file here
+} __attribute__((packed, aligned(64)));
// Floating-point registers
-struct FPR
-{
- // Thread state for the floating-point unit of the processor read by ptrace.
- union XSTATE
- {
- FXSAVE fxsave; // Generic floating-point registers.
- XSAVE xsave; // x86 extended processor state.
- } xstate;
+struct FPR {
+ // Thread state for the floating-point unit of the processor read by ptrace.
+ union XSTATE {
+ FXSAVE fxsave; // Generic floating-point registers.
+ XSAVE xsave; // x86 extended processor state.
+ } xstate;
};
//---------------------------------------------------------------------------
// ptrace PTRACE_GETREGSET, PTRACE_SETREGSET structure
//---------------------------------------------------------------------------
-struct IOVEC
-{
- void *iov_base; // pointer to XSAVE
- size_t iov_len; // sizeof(XSAVE)
+struct IOVEC {
+ void *iov_base; // pointer to XSAVE
+ size_t iov_len; // sizeof(XSAVE)
};
#endif
Modified: lldb/trunk/source/Plugins/Process/Utility/RegisterInfoInterface.h
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/source/Plugins/Process/Utility/RegisterInfoInterface.h?rev=280751&r1=280750&r2=280751&view=diff
==============================================================================
--- lldb/trunk/source/Plugins/Process/Utility/RegisterInfoInterface.h (original)
+++ lldb/trunk/source/Plugins/Process/Utility/RegisterInfoInterface.h Tue Sep 6 15:57:50 2016
@@ -14,69 +14,60 @@
#include "lldb/Core/ArchSpec.h"
-namespace lldb_private
-{
-
- ///------------------------------------------------------------------------------
- /// @class RegisterInfoInterface
- ///
- /// @brief RegisterInfo interface to patch RegisterInfo structure for archs.
- ///------------------------------------------------------------------------------
- class RegisterInfoInterface
- {
- public:
- RegisterInfoInterface(const lldb_private::ArchSpec& target_arch) : m_target_arch(target_arch) {}
- virtual ~RegisterInfoInterface () {}
-
- virtual size_t
- GetGPRSize () const = 0;
-
- virtual const lldb_private::RegisterInfo *
- GetRegisterInfo () const = 0;
-
- // Returns the number of registers including the user registers and the
- // lldb internal registers also
- virtual uint32_t
- GetRegisterCount () const = 0;
-
- // Returns the number of the user registers (excluding the registers
- // kept for lldb internal use only). Subclasses should override it if
- // they belongs to an architecture with lldb internal registers.
- virtual uint32_t
- GetUserRegisterCount () const
- {
- return GetRegisterCount();
- }
-
- const lldb_private::ArchSpec&
- GetTargetArchitecture() const
- { return m_target_arch; }
-
- virtual const lldb_private::RegisterInfo *
- GetDynamicRegisterInfo(const char *reg_name) const
- {
- const std::vector <lldb_private::RegisterInfo> * d_register_infos = GetDynamicRegisterInfoP();
- if(d_register_infos != nullptr)
- {
- std::vector <lldb_private::RegisterInfo> ::const_iterator pos = d_register_infos->begin();
- for(; pos < d_register_infos->end() ; pos++)
- {
- if(::strcmp(reg_name, pos->name) == 0)
- return(d_register_infos->data() + (pos - d_register_infos->begin()) );
- }
- }
- return nullptr;
- }
-
- virtual const std::vector<lldb_private::RegisterInfo> *
- GetDynamicRegisterInfoP() const
- { return nullptr; }
-
- public:
- // FIXME make private.
- lldb_private::ArchSpec m_target_arch;
- };
+namespace lldb_private {
+///------------------------------------------------------------------------------
+/// @class RegisterInfoInterface
+///
+/// @brief RegisterInfo interface to patch RegisterInfo structure for archs.
+///------------------------------------------------------------------------------
+class RegisterInfoInterface {
+public:
+ RegisterInfoInterface(const lldb_private::ArchSpec &target_arch)
+ : m_target_arch(target_arch) {}
+ virtual ~RegisterInfoInterface() {}
+
+ virtual size_t GetGPRSize() const = 0;
+
+ virtual const lldb_private::RegisterInfo *GetRegisterInfo() const = 0;
+
+ // Returns the number of registers including the user registers and the
+ // lldb internal registers also
+ virtual uint32_t GetRegisterCount() const = 0;
+
+ // Returns the number of the user registers (excluding the registers
+ // kept for lldb internal use only). Subclasses should override it if
+ // they belongs to an architecture with lldb internal registers.
+ virtual uint32_t GetUserRegisterCount() const { return GetRegisterCount(); }
+
+ const lldb_private::ArchSpec &GetTargetArchitecture() const {
+ return m_target_arch;
+ }
+
+ virtual const lldb_private::RegisterInfo *
+ GetDynamicRegisterInfo(const char *reg_name) const {
+ const std::vector<lldb_private::RegisterInfo> *d_register_infos =
+ GetDynamicRegisterInfoP();
+ if (d_register_infos != nullptr) {
+ std::vector<lldb_private::RegisterInfo>::const_iterator pos =
+ d_register_infos->begin();
+ for (; pos < d_register_infos->end(); pos++) {
+ if (::strcmp(reg_name, pos->name) == 0)
+ return (d_register_infos->data() + (pos - d_register_infos->begin()));
+ }
+ }
+ return nullptr;
+ }
+
+ virtual const std::vector<lldb_private::RegisterInfo> *
+ GetDynamicRegisterInfoP() const {
+ return nullptr;
+ }
+
+public:
+ // FIXME make private.
+ lldb_private::ArchSpec m_target_arch;
+};
}
#endif
Modified: lldb/trunk/source/Plugins/Process/Utility/RegisterInfos_arm.h
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/source/Plugins/Process/Utility/RegisterInfos_arm.h?rev=280751&r1=280750&r2=280751&view=diff
==============================================================================
--- lldb/trunk/source/Plugins/Process/Utility/RegisterInfos_arm.h (original)
+++ lldb/trunk/source/Plugins/Process/Utility/RegisterInfos_arm.h Tue Sep 6 15:57:50 2016
@@ -15,12 +15,12 @@
// C++ Includes
// Other libraries and framework includes
// Project includes
-#include "lldb/lldb-private.h"
#include "lldb/lldb-defines.h"
#include "lldb/lldb-enumerations.h"
+#include "lldb/lldb-private.h"
-#include "Utility/ARM_ehframe_Registers.h"
#include "Utility/ARM_DWARF_Registers.h"
+#include "Utility/ARM_ehframe_Registers.h"
using namespace lldb;
using namespace lldb_private;
@@ -45,461 +45,1580 @@ using namespace lldb_private;
#error DEFINE_DBG must be defined before including this header file
#endif
-enum
-{
- gpr_r0 = 0,
- gpr_r1,
- gpr_r2,
- gpr_r3,
- gpr_r4,
- gpr_r5,
- gpr_r6,
- gpr_r7,
- gpr_r8,
- gpr_r9,
- gpr_r10,
- gpr_r11,
- gpr_r12,
- gpr_r13, gpr_sp = gpr_r13,
- gpr_r14, gpr_lr = gpr_r14,
- gpr_r15, gpr_pc = gpr_r15,
- gpr_cpsr,
-
- fpu_s0,
- fpu_s1,
- fpu_s2,
- fpu_s3,
- fpu_s4,
- fpu_s5,
- fpu_s6,
- fpu_s7,
- fpu_s8,
- fpu_s9,
- fpu_s10,
- fpu_s11,
- fpu_s12,
- fpu_s13,
- fpu_s14,
- fpu_s15,
- fpu_s16,
- fpu_s17,
- fpu_s18,
- fpu_s19,
- fpu_s20,
- fpu_s21,
- fpu_s22,
- fpu_s23,
- fpu_s24,
- fpu_s25,
- fpu_s26,
- fpu_s27,
- fpu_s28,
- fpu_s29,
- fpu_s30,
- fpu_s31,
- fpu_fpscr,
-
- fpu_d0,
- fpu_d1,
- fpu_d2,
- fpu_d3,
- fpu_d4,
- fpu_d5,
- fpu_d6,
- fpu_d7,
- fpu_d8,
- fpu_d9,
- fpu_d10,
- fpu_d11,
- fpu_d12,
- fpu_d13,
- fpu_d14,
- fpu_d15,
- fpu_d16,
- fpu_d17,
- fpu_d18,
- fpu_d19,
- fpu_d20,
- fpu_d21,
- fpu_d22,
- fpu_d23,
- fpu_d24,
- fpu_d25,
- fpu_d26,
- fpu_d27,
- fpu_d28,
- fpu_d29,
- fpu_d30,
- fpu_d31,
-
- fpu_q0,
- fpu_q1,
- fpu_q2,
- fpu_q3,
- fpu_q4,
- fpu_q5,
- fpu_q6,
- fpu_q7,
- fpu_q8,
- fpu_q9,
- fpu_q10,
- fpu_q11,
- fpu_q12,
- fpu_q13,
- fpu_q14,
- fpu_q15,
-
- exc_exception,
- exc_fsr,
- exc_far,
-
- dbg_bvr0,
- dbg_bvr1,
- dbg_bvr2,
- dbg_bvr3,
- dbg_bvr4,
- dbg_bvr5,
- dbg_bvr6,
- dbg_bvr7,
- dbg_bvr8,
- dbg_bvr9,
- dbg_bvr10,
- dbg_bvr11,
- dbg_bvr12,
- dbg_bvr13,
- dbg_bvr14,
- dbg_bvr15,
-
- dbg_bcr0,
- dbg_bcr1,
- dbg_bcr2,
- dbg_bcr3,
- dbg_bcr4,
- dbg_bcr5,
- dbg_bcr6,
- dbg_bcr7,
- dbg_bcr8,
- dbg_bcr9,
- dbg_bcr10,
- dbg_bcr11,
- dbg_bcr12,
- dbg_bcr13,
- dbg_bcr14,
- dbg_bcr15,
-
- dbg_wvr0,
- dbg_wvr1,
- dbg_wvr2,
- dbg_wvr3,
- dbg_wvr4,
- dbg_wvr5,
- dbg_wvr6,
- dbg_wvr7,
- dbg_wvr8,
- dbg_wvr9,
- dbg_wvr10,
- dbg_wvr11,
- dbg_wvr12,
- dbg_wvr13,
- dbg_wvr14,
- dbg_wvr15,
-
- dbg_wcr0,
- dbg_wcr1,
- dbg_wcr2,
- dbg_wcr3,
- dbg_wcr4,
- dbg_wcr5,
- dbg_wcr6,
- dbg_wcr7,
- dbg_wcr8,
- dbg_wcr9,
- dbg_wcr10,
- dbg_wcr11,
- dbg_wcr12,
- dbg_wcr13,
- dbg_wcr14,
- dbg_wcr15,
+enum {
+ gpr_r0 = 0,
+ gpr_r1,
+ gpr_r2,
+ gpr_r3,
+ gpr_r4,
+ gpr_r5,
+ gpr_r6,
+ gpr_r7,
+ gpr_r8,
+ gpr_r9,
+ gpr_r10,
+ gpr_r11,
+ gpr_r12,
+ gpr_r13,
+ gpr_sp = gpr_r13,
+ gpr_r14,
+ gpr_lr = gpr_r14,
+ gpr_r15,
+ gpr_pc = gpr_r15,
+ gpr_cpsr,
+
+ fpu_s0,
+ fpu_s1,
+ fpu_s2,
+ fpu_s3,
+ fpu_s4,
+ fpu_s5,
+ fpu_s6,
+ fpu_s7,
+ fpu_s8,
+ fpu_s9,
+ fpu_s10,
+ fpu_s11,
+ fpu_s12,
+ fpu_s13,
+ fpu_s14,
+ fpu_s15,
+ fpu_s16,
+ fpu_s17,
+ fpu_s18,
+ fpu_s19,
+ fpu_s20,
+ fpu_s21,
+ fpu_s22,
+ fpu_s23,
+ fpu_s24,
+ fpu_s25,
+ fpu_s26,
+ fpu_s27,
+ fpu_s28,
+ fpu_s29,
+ fpu_s30,
+ fpu_s31,
+ fpu_fpscr,
+
+ fpu_d0,
+ fpu_d1,
+ fpu_d2,
+ fpu_d3,
+ fpu_d4,
+ fpu_d5,
+ fpu_d6,
+ fpu_d7,
+ fpu_d8,
+ fpu_d9,
+ fpu_d10,
+ fpu_d11,
+ fpu_d12,
+ fpu_d13,
+ fpu_d14,
+ fpu_d15,
+ fpu_d16,
+ fpu_d17,
+ fpu_d18,
+ fpu_d19,
+ fpu_d20,
+ fpu_d21,
+ fpu_d22,
+ fpu_d23,
+ fpu_d24,
+ fpu_d25,
+ fpu_d26,
+ fpu_d27,
+ fpu_d28,
+ fpu_d29,
+ fpu_d30,
+ fpu_d31,
+
+ fpu_q0,
+ fpu_q1,
+ fpu_q2,
+ fpu_q3,
+ fpu_q4,
+ fpu_q5,
+ fpu_q6,
+ fpu_q7,
+ fpu_q8,
+ fpu_q9,
+ fpu_q10,
+ fpu_q11,
+ fpu_q12,
+ fpu_q13,
+ fpu_q14,
+ fpu_q15,
+
+ exc_exception,
+ exc_fsr,
+ exc_far,
+
+ dbg_bvr0,
+ dbg_bvr1,
+ dbg_bvr2,
+ dbg_bvr3,
+ dbg_bvr4,
+ dbg_bvr5,
+ dbg_bvr6,
+ dbg_bvr7,
+ dbg_bvr8,
+ dbg_bvr9,
+ dbg_bvr10,
+ dbg_bvr11,
+ dbg_bvr12,
+ dbg_bvr13,
+ dbg_bvr14,
+ dbg_bvr15,
+
+ dbg_bcr0,
+ dbg_bcr1,
+ dbg_bcr2,
+ dbg_bcr3,
+ dbg_bcr4,
+ dbg_bcr5,
+ dbg_bcr6,
+ dbg_bcr7,
+ dbg_bcr8,
+ dbg_bcr9,
+ dbg_bcr10,
+ dbg_bcr11,
+ dbg_bcr12,
+ dbg_bcr13,
+ dbg_bcr14,
+ dbg_bcr15,
+
+ dbg_wvr0,
+ dbg_wvr1,
+ dbg_wvr2,
+ dbg_wvr3,
+ dbg_wvr4,
+ dbg_wvr5,
+ dbg_wvr6,
+ dbg_wvr7,
+ dbg_wvr8,
+ dbg_wvr9,
+ dbg_wvr10,
+ dbg_wvr11,
+ dbg_wvr12,
+ dbg_wvr13,
+ dbg_wvr14,
+ dbg_wvr15,
+
+ dbg_wcr0,
+ dbg_wcr1,
+ dbg_wcr2,
+ dbg_wcr3,
+ dbg_wcr4,
+ dbg_wcr5,
+ dbg_wcr6,
+ dbg_wcr7,
+ dbg_wcr8,
+ dbg_wcr9,
+ dbg_wcr10,
+ dbg_wcr11,
+ dbg_wcr12,
+ dbg_wcr13,
+ dbg_wcr14,
+ dbg_wcr15,
- k_num_registers
+ k_num_registers
};
-static uint32_t g_s0_invalidates[] = { fpu_d0, fpu_q0, LLDB_INVALID_REGNUM };
-static uint32_t g_s1_invalidates[] = { fpu_d0, fpu_q0, LLDB_INVALID_REGNUM };
-static uint32_t g_s2_invalidates[] = { fpu_d1, fpu_q0, LLDB_INVALID_REGNUM };
-static uint32_t g_s3_invalidates[] = { fpu_d1, fpu_q0, LLDB_INVALID_REGNUM };
-static uint32_t g_s4_invalidates[] = { fpu_d2, fpu_q1, LLDB_INVALID_REGNUM };
-static uint32_t g_s5_invalidates[] = { fpu_d2, fpu_q1, LLDB_INVALID_REGNUM };
-static uint32_t g_s6_invalidates[] = { fpu_d3, fpu_q1, LLDB_INVALID_REGNUM };
-static uint32_t g_s7_invalidates[] = { fpu_d3, fpu_q1, LLDB_INVALID_REGNUM };
-static uint32_t g_s8_invalidates[] = { fpu_d4, fpu_q2, LLDB_INVALID_REGNUM };
-static uint32_t g_s9_invalidates[] = { fpu_d4, fpu_q2, LLDB_INVALID_REGNUM };
-static uint32_t g_s10_invalidates[] = { fpu_d5, fpu_q2, LLDB_INVALID_REGNUM };
-static uint32_t g_s11_invalidates[] = { fpu_d5, fpu_q2, LLDB_INVALID_REGNUM };
-static uint32_t g_s12_invalidates[] = { fpu_d6, fpu_q3, LLDB_INVALID_REGNUM };
-static uint32_t g_s13_invalidates[] = { fpu_d6, fpu_q3, LLDB_INVALID_REGNUM };
-static uint32_t g_s14_invalidates[] = { fpu_d7, fpu_q3, LLDB_INVALID_REGNUM };
-static uint32_t g_s15_invalidates[] = { fpu_d7, fpu_q3, LLDB_INVALID_REGNUM };
-static uint32_t g_s16_invalidates[] = { fpu_d8, fpu_q4, LLDB_INVALID_REGNUM };
-static uint32_t g_s17_invalidates[] = { fpu_d8, fpu_q4, LLDB_INVALID_REGNUM };
-static uint32_t g_s18_invalidates[] = { fpu_d9, fpu_q4, LLDB_INVALID_REGNUM };
-static uint32_t g_s19_invalidates[] = { fpu_d9, fpu_q4, LLDB_INVALID_REGNUM };
-static uint32_t g_s20_invalidates[] = { fpu_d10, fpu_q5, LLDB_INVALID_REGNUM };
-static uint32_t g_s21_invalidates[] = { fpu_d10, fpu_q5, LLDB_INVALID_REGNUM };
-static uint32_t g_s22_invalidates[] = { fpu_d11, fpu_q5, LLDB_INVALID_REGNUM };
-static uint32_t g_s23_invalidates[] = { fpu_d11, fpu_q5, LLDB_INVALID_REGNUM };
-static uint32_t g_s24_invalidates[] = { fpu_d12, fpu_q6, LLDB_INVALID_REGNUM };
-static uint32_t g_s25_invalidates[] = { fpu_d12, fpu_q6, LLDB_INVALID_REGNUM };
-static uint32_t g_s26_invalidates[] = { fpu_d13, fpu_q6, LLDB_INVALID_REGNUM };
-static uint32_t g_s27_invalidates[] = { fpu_d13, fpu_q6, LLDB_INVALID_REGNUM };
-static uint32_t g_s28_invalidates[] = { fpu_d14, fpu_q7, LLDB_INVALID_REGNUM };
-static uint32_t g_s29_invalidates[] = { fpu_d14, fpu_q7, LLDB_INVALID_REGNUM };
-static uint32_t g_s30_invalidates[] = { fpu_d15, fpu_q7, LLDB_INVALID_REGNUM };
-static uint32_t g_s31_invalidates[] = { fpu_d15, fpu_q7, LLDB_INVALID_REGNUM };
-
-static uint32_t g_d0_contains[] = { fpu_s0, fpu_s1, LLDB_INVALID_REGNUM };
-static uint32_t g_d1_contains[] = { fpu_s2, fpu_s3, LLDB_INVALID_REGNUM };
-static uint32_t g_d2_contains[] = { fpu_s4, fpu_s5, LLDB_INVALID_REGNUM };
-static uint32_t g_d3_contains[] = { fpu_s6, fpu_s7, LLDB_INVALID_REGNUM };
-static uint32_t g_d4_contains[] = { fpu_s8, fpu_s9, LLDB_INVALID_REGNUM };
-static uint32_t g_d5_contains[] = { fpu_s10, fpu_s11, LLDB_INVALID_REGNUM };
-static uint32_t g_d6_contains[] = { fpu_s12, fpu_s13, LLDB_INVALID_REGNUM };
-static uint32_t g_d7_contains[] = { fpu_s14, fpu_s15, LLDB_INVALID_REGNUM };
-static uint32_t g_d8_contains[] = { fpu_s16, fpu_s17, LLDB_INVALID_REGNUM };
-static uint32_t g_d9_contains[] = { fpu_s18, fpu_s19, LLDB_INVALID_REGNUM };
-static uint32_t g_d10_contains[] = { fpu_s20, fpu_s21, LLDB_INVALID_REGNUM };
-static uint32_t g_d11_contains[] = { fpu_s22, fpu_s23, LLDB_INVALID_REGNUM };
-static uint32_t g_d12_contains[] = { fpu_s24, fpu_s25, LLDB_INVALID_REGNUM };
-static uint32_t g_d13_contains[] = { fpu_s26, fpu_s27, LLDB_INVALID_REGNUM };
-static uint32_t g_d14_contains[] = { fpu_s28, fpu_s29, LLDB_INVALID_REGNUM };
-static uint32_t g_d15_contains[] = { fpu_s30, fpu_s31, LLDB_INVALID_REGNUM };
-
-static uint32_t g_d0_invalidates[] = { fpu_q0, LLDB_INVALID_REGNUM };
-static uint32_t g_d1_invalidates[] = { fpu_q0, LLDB_INVALID_REGNUM };
-static uint32_t g_d2_invalidates[] = { fpu_q1, LLDB_INVALID_REGNUM };
-static uint32_t g_d3_invalidates[] = { fpu_q1, LLDB_INVALID_REGNUM };
-static uint32_t g_d4_invalidates[] = { fpu_q2, LLDB_INVALID_REGNUM };
-static uint32_t g_d5_invalidates[] = { fpu_q2, LLDB_INVALID_REGNUM };
-static uint32_t g_d6_invalidates[] = { fpu_q3, LLDB_INVALID_REGNUM };
-static uint32_t g_d7_invalidates[] = { fpu_q3, LLDB_INVALID_REGNUM };
-static uint32_t g_d8_invalidates[] = { fpu_q4, LLDB_INVALID_REGNUM };
-static uint32_t g_d9_invalidates[] = { fpu_q4, LLDB_INVALID_REGNUM };
-static uint32_t g_d10_invalidates[] = { fpu_q5, LLDB_INVALID_REGNUM };
-static uint32_t g_d11_invalidates[] = { fpu_q5, LLDB_INVALID_REGNUM };
-static uint32_t g_d12_invalidates[] = { fpu_q6, LLDB_INVALID_REGNUM };
-static uint32_t g_d13_invalidates[] = { fpu_q6, LLDB_INVALID_REGNUM };
-static uint32_t g_d14_invalidates[] = { fpu_q7, LLDB_INVALID_REGNUM };
-static uint32_t g_d15_invalidates[] = { fpu_q7, LLDB_INVALID_REGNUM };
-static uint32_t g_d16_invalidates[] = { fpu_q8, LLDB_INVALID_REGNUM };
-static uint32_t g_d17_invalidates[] = { fpu_q8, LLDB_INVALID_REGNUM };
-static uint32_t g_d18_invalidates[] = { fpu_q9, LLDB_INVALID_REGNUM };
-static uint32_t g_d19_invalidates[] = { fpu_q9, LLDB_INVALID_REGNUM };
-static uint32_t g_d20_invalidates[] = { fpu_q10, LLDB_INVALID_REGNUM };
-static uint32_t g_d21_invalidates[] = { fpu_q10, LLDB_INVALID_REGNUM };
-static uint32_t g_d22_invalidates[] = { fpu_q11, LLDB_INVALID_REGNUM };
-static uint32_t g_d23_invalidates[] = { fpu_q11, LLDB_INVALID_REGNUM };
-static uint32_t g_d24_invalidates[] = { fpu_q12, LLDB_INVALID_REGNUM };
-static uint32_t g_d25_invalidates[] = { fpu_q12, LLDB_INVALID_REGNUM };
-static uint32_t g_d26_invalidates[] = { fpu_q13, LLDB_INVALID_REGNUM };
-static uint32_t g_d27_invalidates[] = { fpu_q13, LLDB_INVALID_REGNUM };
-static uint32_t g_d28_invalidates[] = { fpu_q14, LLDB_INVALID_REGNUM };
-static uint32_t g_d29_invalidates[] = { fpu_q14, LLDB_INVALID_REGNUM };
-static uint32_t g_d30_invalidates[] = { fpu_q15, LLDB_INVALID_REGNUM };
-static uint32_t g_d31_invalidates[] = { fpu_q15, LLDB_INVALID_REGNUM };
-
-static uint32_t g_q0_contains[] = { fpu_d0, fpu_d1, fpu_s0, fpu_s1, fpu_s2, fpu_s3, LLDB_INVALID_REGNUM };
-static uint32_t g_q1_contains[] = { fpu_d2, fpu_d3, fpu_s4, fpu_s5, fpu_s6, fpu_s7, LLDB_INVALID_REGNUM };
-static uint32_t g_q2_contains[] = { fpu_d4, fpu_d5, fpu_s8, fpu_s9, fpu_s10, fpu_s11, LLDB_INVALID_REGNUM };
-static uint32_t g_q3_contains[] = { fpu_d6, fpu_d7, fpu_s12, fpu_s13, fpu_s14, fpu_s15, LLDB_INVALID_REGNUM };
-static uint32_t g_q4_contains[] = { fpu_d8, fpu_d9, fpu_s16, fpu_s17, fpu_s18, fpu_s19, LLDB_INVALID_REGNUM };
-static uint32_t g_q5_contains[] = { fpu_d10, fpu_d11, fpu_s20, fpu_s21, fpu_s22, fpu_s23, LLDB_INVALID_REGNUM };
-static uint32_t g_q6_contains[] = { fpu_d12, fpu_d13, fpu_s24, fpu_s25, fpu_s26, fpu_s27, LLDB_INVALID_REGNUM };
-static uint32_t g_q7_contains[] = { fpu_d14, fpu_d15, fpu_s28, fpu_s29, fpu_s30, fpu_s31, LLDB_INVALID_REGNUM };
-static uint32_t g_q8_contains[] = { fpu_d16, fpu_d17, LLDB_INVALID_REGNUM };
-static uint32_t g_q9_contains[] = { fpu_d18, fpu_d19, LLDB_INVALID_REGNUM };
-static uint32_t g_q10_contains[] = { fpu_d20, fpu_d21, LLDB_INVALID_REGNUM };
-static uint32_t g_q11_contains[] = { fpu_d22, fpu_d23, LLDB_INVALID_REGNUM };
-static uint32_t g_q12_contains[] = { fpu_d24, fpu_d25, LLDB_INVALID_REGNUM };
-static uint32_t g_q13_contains[] = { fpu_d26, fpu_d27, LLDB_INVALID_REGNUM };
-static uint32_t g_q14_contains[] = { fpu_d28, fpu_d29, LLDB_INVALID_REGNUM };
-static uint32_t g_q15_contains[] = { fpu_d30, fpu_d31, LLDB_INVALID_REGNUM };
+static uint32_t g_s0_invalidates[] = {fpu_d0, fpu_q0, LLDB_INVALID_REGNUM};
+static uint32_t g_s1_invalidates[] = {fpu_d0, fpu_q0, LLDB_INVALID_REGNUM};
+static uint32_t g_s2_invalidates[] = {fpu_d1, fpu_q0, LLDB_INVALID_REGNUM};
+static uint32_t g_s3_invalidates[] = {fpu_d1, fpu_q0, LLDB_INVALID_REGNUM};
+static uint32_t g_s4_invalidates[] = {fpu_d2, fpu_q1, LLDB_INVALID_REGNUM};
+static uint32_t g_s5_invalidates[] = {fpu_d2, fpu_q1, LLDB_INVALID_REGNUM};
+static uint32_t g_s6_invalidates[] = {fpu_d3, fpu_q1, LLDB_INVALID_REGNUM};
+static uint32_t g_s7_invalidates[] = {fpu_d3, fpu_q1, LLDB_INVALID_REGNUM};
+static uint32_t g_s8_invalidates[] = {fpu_d4, fpu_q2, LLDB_INVALID_REGNUM};
+static uint32_t g_s9_invalidates[] = {fpu_d4, fpu_q2, LLDB_INVALID_REGNUM};
+static uint32_t g_s10_invalidates[] = {fpu_d5, fpu_q2, LLDB_INVALID_REGNUM};
+static uint32_t g_s11_invalidates[] = {fpu_d5, fpu_q2, LLDB_INVALID_REGNUM};
+static uint32_t g_s12_invalidates[] = {fpu_d6, fpu_q3, LLDB_INVALID_REGNUM};
+static uint32_t g_s13_invalidates[] = {fpu_d6, fpu_q3, LLDB_INVALID_REGNUM};
+static uint32_t g_s14_invalidates[] = {fpu_d7, fpu_q3, LLDB_INVALID_REGNUM};
+static uint32_t g_s15_invalidates[] = {fpu_d7, fpu_q3, LLDB_INVALID_REGNUM};
+static uint32_t g_s16_invalidates[] = {fpu_d8, fpu_q4, LLDB_INVALID_REGNUM};
+static uint32_t g_s17_invalidates[] = {fpu_d8, fpu_q4, LLDB_INVALID_REGNUM};
+static uint32_t g_s18_invalidates[] = {fpu_d9, fpu_q4, LLDB_INVALID_REGNUM};
+static uint32_t g_s19_invalidates[] = {fpu_d9, fpu_q4, LLDB_INVALID_REGNUM};
+static uint32_t g_s20_invalidates[] = {fpu_d10, fpu_q5, LLDB_INVALID_REGNUM};
+static uint32_t g_s21_invalidates[] = {fpu_d10, fpu_q5, LLDB_INVALID_REGNUM};
+static uint32_t g_s22_invalidates[] = {fpu_d11, fpu_q5, LLDB_INVALID_REGNUM};
+static uint32_t g_s23_invalidates[] = {fpu_d11, fpu_q5, LLDB_INVALID_REGNUM};
+static uint32_t g_s24_invalidates[] = {fpu_d12, fpu_q6, LLDB_INVALID_REGNUM};
+static uint32_t g_s25_invalidates[] = {fpu_d12, fpu_q6, LLDB_INVALID_REGNUM};
+static uint32_t g_s26_invalidates[] = {fpu_d13, fpu_q6, LLDB_INVALID_REGNUM};
+static uint32_t g_s27_invalidates[] = {fpu_d13, fpu_q6, LLDB_INVALID_REGNUM};
+static uint32_t g_s28_invalidates[] = {fpu_d14, fpu_q7, LLDB_INVALID_REGNUM};
+static uint32_t g_s29_invalidates[] = {fpu_d14, fpu_q7, LLDB_INVALID_REGNUM};
+static uint32_t g_s30_invalidates[] = {fpu_d15, fpu_q7, LLDB_INVALID_REGNUM};
+static uint32_t g_s31_invalidates[] = {fpu_d15, fpu_q7, LLDB_INVALID_REGNUM};
+
+static uint32_t g_d0_contains[] = {fpu_s0, fpu_s1, LLDB_INVALID_REGNUM};
+static uint32_t g_d1_contains[] = {fpu_s2, fpu_s3, LLDB_INVALID_REGNUM};
+static uint32_t g_d2_contains[] = {fpu_s4, fpu_s5, LLDB_INVALID_REGNUM};
+static uint32_t g_d3_contains[] = {fpu_s6, fpu_s7, LLDB_INVALID_REGNUM};
+static uint32_t g_d4_contains[] = {fpu_s8, fpu_s9, LLDB_INVALID_REGNUM};
+static uint32_t g_d5_contains[] = {fpu_s10, fpu_s11, LLDB_INVALID_REGNUM};
+static uint32_t g_d6_contains[] = {fpu_s12, fpu_s13, LLDB_INVALID_REGNUM};
+static uint32_t g_d7_contains[] = {fpu_s14, fpu_s15, LLDB_INVALID_REGNUM};
+static uint32_t g_d8_contains[] = {fpu_s16, fpu_s17, LLDB_INVALID_REGNUM};
+static uint32_t g_d9_contains[] = {fpu_s18, fpu_s19, LLDB_INVALID_REGNUM};
+static uint32_t g_d10_contains[] = {fpu_s20, fpu_s21, LLDB_INVALID_REGNUM};
+static uint32_t g_d11_contains[] = {fpu_s22, fpu_s23, LLDB_INVALID_REGNUM};
+static uint32_t g_d12_contains[] = {fpu_s24, fpu_s25, LLDB_INVALID_REGNUM};
+static uint32_t g_d13_contains[] = {fpu_s26, fpu_s27, LLDB_INVALID_REGNUM};
+static uint32_t g_d14_contains[] = {fpu_s28, fpu_s29, LLDB_INVALID_REGNUM};
+static uint32_t g_d15_contains[] = {fpu_s30, fpu_s31, LLDB_INVALID_REGNUM};
+
+static uint32_t g_d0_invalidates[] = {fpu_q0, LLDB_INVALID_REGNUM};
+static uint32_t g_d1_invalidates[] = {fpu_q0, LLDB_INVALID_REGNUM};
+static uint32_t g_d2_invalidates[] = {fpu_q1, LLDB_INVALID_REGNUM};
+static uint32_t g_d3_invalidates[] = {fpu_q1, LLDB_INVALID_REGNUM};
+static uint32_t g_d4_invalidates[] = {fpu_q2, LLDB_INVALID_REGNUM};
+static uint32_t g_d5_invalidates[] = {fpu_q2, LLDB_INVALID_REGNUM};
+static uint32_t g_d6_invalidates[] = {fpu_q3, LLDB_INVALID_REGNUM};
+static uint32_t g_d7_invalidates[] = {fpu_q3, LLDB_INVALID_REGNUM};
+static uint32_t g_d8_invalidates[] = {fpu_q4, LLDB_INVALID_REGNUM};
+static uint32_t g_d9_invalidates[] = {fpu_q4, LLDB_INVALID_REGNUM};
+static uint32_t g_d10_invalidates[] = {fpu_q5, LLDB_INVALID_REGNUM};
+static uint32_t g_d11_invalidates[] = {fpu_q5, LLDB_INVALID_REGNUM};
+static uint32_t g_d12_invalidates[] = {fpu_q6, LLDB_INVALID_REGNUM};
+static uint32_t g_d13_invalidates[] = {fpu_q6, LLDB_INVALID_REGNUM};
+static uint32_t g_d14_invalidates[] = {fpu_q7, LLDB_INVALID_REGNUM};
+static uint32_t g_d15_invalidates[] = {fpu_q7, LLDB_INVALID_REGNUM};
+static uint32_t g_d16_invalidates[] = {fpu_q8, LLDB_INVALID_REGNUM};
+static uint32_t g_d17_invalidates[] = {fpu_q8, LLDB_INVALID_REGNUM};
+static uint32_t g_d18_invalidates[] = {fpu_q9, LLDB_INVALID_REGNUM};
+static uint32_t g_d19_invalidates[] = {fpu_q9, LLDB_INVALID_REGNUM};
+static uint32_t g_d20_invalidates[] = {fpu_q10, LLDB_INVALID_REGNUM};
+static uint32_t g_d21_invalidates[] = {fpu_q10, LLDB_INVALID_REGNUM};
+static uint32_t g_d22_invalidates[] = {fpu_q11, LLDB_INVALID_REGNUM};
+static uint32_t g_d23_invalidates[] = {fpu_q11, LLDB_INVALID_REGNUM};
+static uint32_t g_d24_invalidates[] = {fpu_q12, LLDB_INVALID_REGNUM};
+static uint32_t g_d25_invalidates[] = {fpu_q12, LLDB_INVALID_REGNUM};
+static uint32_t g_d26_invalidates[] = {fpu_q13, LLDB_INVALID_REGNUM};
+static uint32_t g_d27_invalidates[] = {fpu_q13, LLDB_INVALID_REGNUM};
+static uint32_t g_d28_invalidates[] = {fpu_q14, LLDB_INVALID_REGNUM};
+static uint32_t g_d29_invalidates[] = {fpu_q14, LLDB_INVALID_REGNUM};
+static uint32_t g_d30_invalidates[] = {fpu_q15, LLDB_INVALID_REGNUM};
+static uint32_t g_d31_invalidates[] = {fpu_q15, LLDB_INVALID_REGNUM};
+
+static uint32_t g_q0_contains[] = {
+ fpu_d0, fpu_d1, fpu_s0, fpu_s1, fpu_s2, fpu_s3, LLDB_INVALID_REGNUM};
+static uint32_t g_q1_contains[] = {
+ fpu_d2, fpu_d3, fpu_s4, fpu_s5, fpu_s6, fpu_s7, LLDB_INVALID_REGNUM};
+static uint32_t g_q2_contains[] = {
+ fpu_d4, fpu_d5, fpu_s8, fpu_s9, fpu_s10, fpu_s11, LLDB_INVALID_REGNUM};
+static uint32_t g_q3_contains[] = {
+ fpu_d6, fpu_d7, fpu_s12, fpu_s13, fpu_s14, fpu_s15, LLDB_INVALID_REGNUM};
+static uint32_t g_q4_contains[] = {
+ fpu_d8, fpu_d9, fpu_s16, fpu_s17, fpu_s18, fpu_s19, LLDB_INVALID_REGNUM};
+static uint32_t g_q5_contains[] = {
+ fpu_d10, fpu_d11, fpu_s20, fpu_s21, fpu_s22, fpu_s23, LLDB_INVALID_REGNUM};
+static uint32_t g_q6_contains[] = {
+ fpu_d12, fpu_d13, fpu_s24, fpu_s25, fpu_s26, fpu_s27, LLDB_INVALID_REGNUM};
+static uint32_t g_q7_contains[] = {
+ fpu_d14, fpu_d15, fpu_s28, fpu_s29, fpu_s30, fpu_s31, LLDB_INVALID_REGNUM};
+static uint32_t g_q8_contains[] = {fpu_d16, fpu_d17, LLDB_INVALID_REGNUM};
+static uint32_t g_q9_contains[] = {fpu_d18, fpu_d19, LLDB_INVALID_REGNUM};
+static uint32_t g_q10_contains[] = {fpu_d20, fpu_d21, LLDB_INVALID_REGNUM};
+static uint32_t g_q11_contains[] = {fpu_d22, fpu_d23, LLDB_INVALID_REGNUM};
+static uint32_t g_q12_contains[] = {fpu_d24, fpu_d25, LLDB_INVALID_REGNUM};
+static uint32_t g_q13_contains[] = {fpu_d26, fpu_d27, LLDB_INVALID_REGNUM};
+static uint32_t g_q14_contains[] = {fpu_d28, fpu_d29, LLDB_INVALID_REGNUM};
+static uint32_t g_q15_contains[] = {fpu_d30, fpu_d31, LLDB_INVALID_REGNUM};
static RegisterInfo g_register_infos_arm[] = {
-// NAME ALT SZ OFFSET ENCODING FORMAT EH_FRAME DWARF GENERIC PROCESS PLUGIN LLDB NATIVE VALUE REGS INVALIDATE REGS
-// =========== ======= == ============== ================ ==================== =================== =================== ========================== =================== ============= ============== =================
-{ "r0", nullptr, 4, GPR_OFFSET(0), eEncodingUint, eFormatHex, { ehframe_r0, dwarf_r0, LLDB_REGNUM_GENERIC_ARG1, LLDB_INVALID_REGNUM, gpr_r0 }, nullptr, nullptr, nullptr, 0},
-{ "r1", nullptr, 4, GPR_OFFSET(1), eEncodingUint, eFormatHex, { ehframe_r1, dwarf_r1, LLDB_REGNUM_GENERIC_ARG2, LLDB_INVALID_REGNUM, gpr_r1 }, nullptr, nullptr, nullptr, 0},
-{ "r2", nullptr, 4, GPR_OFFSET(2), eEncodingUint, eFormatHex, { ehframe_r2, dwarf_r2, LLDB_REGNUM_GENERIC_ARG3, LLDB_INVALID_REGNUM, gpr_r2 }, nullptr, nullptr, nullptr, 0},
-{ "r3", nullptr, 4, GPR_OFFSET(3), eEncodingUint, eFormatHex, { ehframe_r3, dwarf_r3, LLDB_REGNUM_GENERIC_ARG4, LLDB_INVALID_REGNUM, gpr_r3 }, nullptr, nullptr, nullptr, 0},
-{ "r4", nullptr, 4, GPR_OFFSET(4), eEncodingUint, eFormatHex, { ehframe_r4, dwarf_r4, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_r4 }, nullptr, nullptr, nullptr, 0},
-{ "r5", nullptr, 4, GPR_OFFSET(5), eEncodingUint, eFormatHex, { ehframe_r5, dwarf_r5, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_r5 }, nullptr, nullptr, nullptr, 0},
-{ "r6", nullptr, 4, GPR_OFFSET(6), eEncodingUint, eFormatHex, { ehframe_r6, dwarf_r6, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_r6 }, nullptr, nullptr, nullptr, 0},
-{ "r7", nullptr, 4, GPR_OFFSET(7), eEncodingUint, eFormatHex, { ehframe_r7, dwarf_r7, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_r7 }, nullptr, nullptr, nullptr, 0},
-{ "r8", nullptr, 4, GPR_OFFSET(8), eEncodingUint, eFormatHex, { ehframe_r8, dwarf_r8, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_r8 }, nullptr, nullptr, nullptr, 0},
-{ "r9", nullptr, 4, GPR_OFFSET(9), eEncodingUint, eFormatHex, { ehframe_r9, dwarf_r9, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_r9 }, nullptr, nullptr, nullptr, 0},
-{ "r10", nullptr, 4, GPR_OFFSET(10), eEncodingUint, eFormatHex, { ehframe_r10, dwarf_r10, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_r10 }, nullptr, nullptr, nullptr, 0},
-{ "r11", nullptr, 4, GPR_OFFSET(11), eEncodingUint, eFormatHex, { ehframe_r11, dwarf_r11, LLDB_REGNUM_GENERIC_FP, LLDB_INVALID_REGNUM, gpr_r11 }, nullptr, nullptr, nullptr, 0},
-{ "r12", nullptr, 4, GPR_OFFSET(12), eEncodingUint, eFormatHex, { ehframe_r12, dwarf_r12, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_r12 }, nullptr, nullptr, nullptr, 0},
-{ "sp", "r13", 4, GPR_OFFSET(13), eEncodingUint, eFormatHex, { ehframe_sp, dwarf_sp, LLDB_REGNUM_GENERIC_SP, LLDB_INVALID_REGNUM, gpr_sp }, nullptr, nullptr, nullptr, 0},
-{ "lr", "r14", 4, GPR_OFFSET(14), eEncodingUint, eFormatHex, { ehframe_lr, dwarf_lr, LLDB_REGNUM_GENERIC_RA, LLDB_INVALID_REGNUM, gpr_lr }, nullptr, nullptr, nullptr, 0},
-{ "pc", "r15", 4, GPR_OFFSET(15), eEncodingUint, eFormatHex, { ehframe_pc, dwarf_pc, LLDB_REGNUM_GENERIC_PC, LLDB_INVALID_REGNUM, gpr_pc }, nullptr, nullptr, nullptr, 0},
-{ "cpsr", "psr", 4, GPR_OFFSET(16), eEncodingUint, eFormatHex, { ehframe_cpsr, dwarf_cpsr, LLDB_REGNUM_GENERIC_FLAGS, LLDB_INVALID_REGNUM, gpr_cpsr }, nullptr, nullptr, nullptr, 0},
-
-{ "s0", nullptr, 4, FPU_OFFSET(0), eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s0, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_s0 }, nullptr, g_s0_invalidates, nullptr, 0},
-{ "s1", nullptr, 4, FPU_OFFSET(1), eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s1, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_s1 }, nullptr, g_s1_invalidates, nullptr, 0},
-{ "s2", nullptr, 4, FPU_OFFSET(2), eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s2, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_s2 }, nullptr, g_s2_invalidates, nullptr, 0},
-{ "s3", nullptr, 4, FPU_OFFSET(3), eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s3, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_s3 }, nullptr, g_s3_invalidates, nullptr, 0},
-{ "s4", nullptr, 4, FPU_OFFSET(4), eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s4, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_s4 }, nullptr, g_s4_invalidates, nullptr, 0},
-{ "s5", nullptr, 4, FPU_OFFSET(5), eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s5, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_s5 }, nullptr, g_s5_invalidates, nullptr, 0},
-{ "s6", nullptr, 4, FPU_OFFSET(6), eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s6, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_s6 }, nullptr, g_s6_invalidates, nullptr, 0},
-{ "s7", nullptr, 4, FPU_OFFSET(7), eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s7, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_s7 }, nullptr, g_s7_invalidates, nullptr, 0},
-{ "s8", nullptr, 4, FPU_OFFSET(8), eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s8, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_s8 }, nullptr, g_s8_invalidates, nullptr, 0},
-{ "s9", nullptr, 4, FPU_OFFSET(9), eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s9, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_s9 }, nullptr, g_s9_invalidates, nullptr, 0},
-{ "s10", nullptr, 4, FPU_OFFSET(10), eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s10, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_s10 }, nullptr, g_s10_invalidates, nullptr, 0},
-{ "s11", nullptr, 4, FPU_OFFSET(11), eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s11, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_s11 }, nullptr, g_s11_invalidates, nullptr, 0},
-{ "s12", nullptr, 4, FPU_OFFSET(12), eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s12, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_s12 }, nullptr, g_s12_invalidates, nullptr, 0},
-{ "s13", nullptr, 4, FPU_OFFSET(13), eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s13, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_s13 }, nullptr, g_s13_invalidates, nullptr, 0},
-{ "s14", nullptr, 4, FPU_OFFSET(14), eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s14, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_s14 }, nullptr, g_s14_invalidates, nullptr, 0},
-{ "s15", nullptr, 4, FPU_OFFSET(15), eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s15, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_s15 }, nullptr, g_s15_invalidates, nullptr, 0},
-{ "s16", nullptr, 4, FPU_OFFSET(16), eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s16, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_s16 }, nullptr, g_s16_invalidates, nullptr, 0},
-{ "s17", nullptr, 4, FPU_OFFSET(17), eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s17, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_s17 }, nullptr, g_s17_invalidates, nullptr, 0},
-{ "s18", nullptr, 4, FPU_OFFSET(18), eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s18, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_s18 }, nullptr, g_s18_invalidates, nullptr, 0},
-{ "s19", nullptr, 4, FPU_OFFSET(19), eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s19, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_s19 }, nullptr, g_s19_invalidates, nullptr, 0},
-{ "s20", nullptr, 4, FPU_OFFSET(20), eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s20, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_s20 }, nullptr, g_s20_invalidates, nullptr, 0},
-{ "s21", nullptr, 4, FPU_OFFSET(21), eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s21, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_s21 }, nullptr, g_s21_invalidates, nullptr, 0},
-{ "s22", nullptr, 4, FPU_OFFSET(22), eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s22, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_s22 }, nullptr, g_s22_invalidates, nullptr, 0},
-{ "s23", nullptr, 4, FPU_OFFSET(23), eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s23, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_s23 }, nullptr, g_s23_invalidates, nullptr, 0},
-{ "s24", nullptr, 4, FPU_OFFSET(24), eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s24, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_s24 }, nullptr, g_s24_invalidates, nullptr, 0},
-{ "s25", nullptr, 4, FPU_OFFSET(25), eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s25, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_s25 }, nullptr, g_s25_invalidates, nullptr, 0},
-{ "s26", nullptr, 4, FPU_OFFSET(26), eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s26, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_s26 }, nullptr, g_s26_invalidates, nullptr, 0},
-{ "s27", nullptr, 4, FPU_OFFSET(27), eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s27, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_s27 }, nullptr, g_s27_invalidates, nullptr, 0},
-{ "s28", nullptr, 4, FPU_OFFSET(28), eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s28, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_s28 }, nullptr, g_s28_invalidates, nullptr, 0},
-{ "s29", nullptr, 4, FPU_OFFSET(29), eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s29, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_s29 }, nullptr, g_s29_invalidates, nullptr, 0},
-{ "s30", nullptr, 4, FPU_OFFSET(30), eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s30, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_s30 }, nullptr, g_s30_invalidates, nullptr, 0},
-{ "s31", nullptr, 4, FPU_OFFSET(31), eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s31, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_s31 }, nullptr, g_s31_invalidates, nullptr, 0},
-{ "fpscr", nullptr, 4, FPSCR_OFFSET, eEncodingUint, eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_fpscr }, nullptr, nullptr, nullptr, 0},
-
-{ "d0", nullptr, 8, FPU_OFFSET(0), eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d0, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_d0 }, g_d0_contains, g_d0_invalidates, nullptr, 0},
-{ "d1", nullptr, 8, FPU_OFFSET(2), eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d1, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_d1 }, g_d1_contains, g_d1_invalidates, nullptr, 0},
-{ "d2", nullptr, 8, FPU_OFFSET(4), eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d2, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_d2 }, g_d2_contains, g_d2_invalidates, nullptr, 0},
-{ "d3", nullptr, 8, FPU_OFFSET(6), eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d3, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_d3 }, g_d3_contains, g_d3_invalidates, nullptr, 0},
-{ "d4", nullptr, 8, FPU_OFFSET(8), eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d4, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_d4 }, g_d4_contains, g_d4_invalidates, nullptr, 0},
-{ "d5", nullptr, 8, FPU_OFFSET(10), eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d5, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_d5 }, g_d5_contains, g_d5_invalidates, nullptr, 0},
-{ "d6", nullptr, 8, FPU_OFFSET(12), eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d6, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_d6 }, g_d6_contains, g_d6_invalidates, nullptr, 0},
-{ "d7", nullptr, 8, FPU_OFFSET(14), eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d7, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_d7 }, g_d7_contains, g_d7_invalidates, nullptr, 0},
-{ "d8", nullptr, 8, FPU_OFFSET(16), eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d8, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_d8 }, g_d8_contains, g_d8_invalidates, nullptr, 0},
-{ "d9", nullptr, 8, FPU_OFFSET(18), eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d9, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_d9 }, g_d9_contains, g_d9_invalidates, nullptr, 0},
-{ "d10", nullptr, 8, FPU_OFFSET(20), eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d10, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_d10 }, g_d10_contains, g_d10_invalidates, nullptr, 0},
-{ "d11", nullptr, 8, FPU_OFFSET(22), eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d11, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_d11 }, g_d11_contains, g_d11_invalidates, nullptr, 0},
-{ "d12", nullptr, 8, FPU_OFFSET(24), eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d12, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_d12 }, g_d12_contains, g_d12_invalidates, nullptr, 0},
-{ "d13", nullptr, 8, FPU_OFFSET(26), eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d13, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_d13 }, g_d13_contains, g_d13_invalidates, nullptr, 0},
-{ "d14", nullptr, 8, FPU_OFFSET(28), eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d14, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_d14 }, g_d14_contains, g_d14_invalidates, nullptr, 0},
-{ "d15", nullptr, 8, FPU_OFFSET(30), eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d15, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_d15 }, g_d15_contains, g_d15_invalidates, nullptr, 0},
-{ "d16", nullptr, 8, FPU_OFFSET(32), eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d16, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_d16 }, nullptr, g_d16_invalidates, nullptr, 0 },
-{ "d17", nullptr, 8, FPU_OFFSET(34), eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d17, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_d17 }, nullptr, g_d17_invalidates, nullptr, 0},
-{ "d18", nullptr, 8, FPU_OFFSET(36), eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d18, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_d18 }, nullptr, g_d18_invalidates, nullptr, 0},
-{ "d19", nullptr, 8, FPU_OFFSET(38), eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d19, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_d19 }, nullptr, g_d19_invalidates, nullptr, 0},
-{ "d20", nullptr, 8, FPU_OFFSET(40), eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d20, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_d20 }, nullptr, g_d20_invalidates, nullptr, 0},
-{ "d21", nullptr, 8, FPU_OFFSET(42), eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d21, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_d21 }, nullptr, g_d21_invalidates, nullptr, 0},
-{ "d22", nullptr, 8, FPU_OFFSET(44), eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d22, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_d22 }, nullptr, g_d22_invalidates, nullptr, 0},
-{ "d23", nullptr, 8, FPU_OFFSET(46), eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d23, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_d23 }, nullptr, g_d23_invalidates, nullptr, 0},
-{ "d24", nullptr, 8, FPU_OFFSET(48), eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d24, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_d24 }, nullptr, g_d24_invalidates, nullptr, 0},
-{ "d25", nullptr, 8, FPU_OFFSET(50), eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d25, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_d25 }, nullptr, g_d25_invalidates, nullptr, 0},
-{ "d26", nullptr, 8, FPU_OFFSET(52), eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d26, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_d26 }, nullptr, g_d26_invalidates, nullptr, 0},
-{ "d27", nullptr, 8, FPU_OFFSET(54), eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d27, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_d27 }, nullptr, g_d27_invalidates, nullptr, 0},
-{ "d28", nullptr, 8, FPU_OFFSET(56), eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d28, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_d28 }, nullptr, g_d28_invalidates, nullptr, 0},
-{ "d29", nullptr, 8, FPU_OFFSET(58), eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d29, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_d29 }, nullptr, g_d29_invalidates, nullptr, 0},
-{ "d30", nullptr, 8, FPU_OFFSET(60), eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d30, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_d30 }, nullptr, g_d30_invalidates, nullptr, 0},
-{ "d31", nullptr, 8, FPU_OFFSET(62), eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d31, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_d31 }, nullptr, g_d31_invalidates, nullptr, 0},
-
-{ "q0", nullptr, 16, FPU_OFFSET(0), eEncodingVector, eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q0, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_q0 }, g_q0_contains, nullptr, nullptr, 0},
-{ "q1", nullptr, 16, FPU_OFFSET(4), eEncodingVector, eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q1, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_q1 }, g_q1_contains, nullptr, nullptr, 0},
-{ "q2", nullptr, 16, FPU_OFFSET(8), eEncodingVector, eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q2, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_q2 }, g_q2_contains, nullptr, nullptr, 0},
-{ "q3", nullptr, 16, FPU_OFFSET(12), eEncodingVector, eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q3, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_q3 }, g_q3_contains, nullptr, nullptr, 0},
-{ "q4", nullptr, 16, FPU_OFFSET(16), eEncodingVector, eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q4, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_q4 }, g_q4_contains, nullptr, nullptr, 0},
-{ "q5", nullptr, 16, FPU_OFFSET(20), eEncodingVector, eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q5, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_q5 }, g_q5_contains, nullptr, nullptr, 0},
-{ "q6", nullptr, 16, FPU_OFFSET(24), eEncodingVector, eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q6, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_q6 }, g_q6_contains, nullptr, nullptr, 0},
-{ "q7", nullptr, 16, FPU_OFFSET(28), eEncodingVector, eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q7, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_q7 }, g_q7_contains, nullptr, nullptr, 0},
-{ "q8", nullptr, 16, FPU_OFFSET(32), eEncodingVector, eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q8, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_q8 }, g_q8_contains, nullptr, nullptr, 0},
-{ "q9", nullptr, 16, FPU_OFFSET(36), eEncodingVector, eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q9, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_q9 }, g_q9_contains, nullptr, nullptr, 0},
-{ "q10", nullptr, 16, FPU_OFFSET(40), eEncodingVector, eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q10, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_q10 }, g_q10_contains, nullptr, nullptr, 0},
-{ "q11", nullptr, 16, FPU_OFFSET(44), eEncodingVector, eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q11, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_q11 }, g_q11_contains, nullptr, nullptr, 0},
-{ "q12", nullptr, 16, FPU_OFFSET(48), eEncodingVector, eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q12, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_q12 }, g_q12_contains, nullptr, nullptr, 0},
-{ "q13", nullptr, 16, FPU_OFFSET(52), eEncodingVector, eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q13, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_q13 }, g_q13_contains, nullptr, nullptr, 0},
-{ "q14", nullptr, 16, FPU_OFFSET(56), eEncodingVector, eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q14, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_q14 }, g_q14_contains, nullptr, nullptr, 0},
-{ "q15", nullptr, 16, FPU_OFFSET(60), eEncodingVector, eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q15, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_q15 }, g_q15_contains, nullptr, nullptr, 0},
-
-{ "exception", nullptr, 4, EXC_OFFSET(0), eEncodingUint, eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, exc_exception }, nullptr, nullptr, nullptr, 0},
-{ "fsr", nullptr, 4, EXC_OFFSET(1), eEncodingUint, eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, exc_fsr }, nullptr, nullptr, nullptr, 0},
-{ "far", nullptr, 4, EXC_OFFSET(2), eEncodingUint, eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, exc_far }, nullptr, nullptr, nullptr, 0},
-
-{ DEFINE_DBG (bvr, 0) },
-{ DEFINE_DBG (bvr, 1) },
-{ DEFINE_DBG (bvr, 2) },
-{ DEFINE_DBG (bvr, 3) },
-{ DEFINE_DBG (bvr, 4) },
-{ DEFINE_DBG (bvr, 5) },
-{ DEFINE_DBG (bvr, 6) },
-{ DEFINE_DBG (bvr, 7) },
-{ DEFINE_DBG (bvr, 8) },
-{ DEFINE_DBG (bvr, 9) },
-{ DEFINE_DBG (bvr, 10) },
-{ DEFINE_DBG (bvr, 11) },
-{ DEFINE_DBG (bvr, 12) },
-{ DEFINE_DBG (bvr, 13) },
-{ DEFINE_DBG (bvr, 14) },
-{ DEFINE_DBG (bvr, 15) },
-
-{ DEFINE_DBG (bcr, 0) },
-{ DEFINE_DBG (bcr, 1) },
-{ DEFINE_DBG (bcr, 2) },
-{ DEFINE_DBG (bcr, 3) },
-{ DEFINE_DBG (bcr, 4) },
-{ DEFINE_DBG (bcr, 5) },
-{ DEFINE_DBG (bcr, 6) },
-{ DEFINE_DBG (bcr, 7) },
-{ DEFINE_DBG (bcr, 8) },
-{ DEFINE_DBG (bcr, 9) },
-{ DEFINE_DBG (bcr, 10) },
-{ DEFINE_DBG (bcr, 11) },
-{ DEFINE_DBG (bcr, 12) },
-{ DEFINE_DBG (bcr, 13) },
-{ DEFINE_DBG (bcr, 14) },
-{ DEFINE_DBG (bcr, 15) },
-
-{ DEFINE_DBG (wvr, 0) },
-{ DEFINE_DBG (wvr, 1) },
-{ DEFINE_DBG (wvr, 2) },
-{ DEFINE_DBG (wvr, 3) },
-{ DEFINE_DBG (wvr, 4) },
-{ DEFINE_DBG (wvr, 5) },
-{ DEFINE_DBG (wvr, 6) },
-{ DEFINE_DBG (wvr, 7) },
-{ DEFINE_DBG (wvr, 8) },
-{ DEFINE_DBG (wvr, 9) },
-{ DEFINE_DBG (wvr, 10) },
-{ DEFINE_DBG (wvr, 11) },
-{ DEFINE_DBG (wvr, 12) },
-{ DEFINE_DBG (wvr, 13) },
-{ DEFINE_DBG (wvr, 14) },
-{ DEFINE_DBG (wvr, 15) },
-
-{ DEFINE_DBG (wcr, 0) },
-{ DEFINE_DBG (wcr, 1) },
-{ DEFINE_DBG (wcr, 2) },
-{ DEFINE_DBG (wcr, 3) },
-{ DEFINE_DBG (wcr, 4) },
-{ DEFINE_DBG (wcr, 5) },
-{ DEFINE_DBG (wcr, 6) },
-{ DEFINE_DBG (wcr, 7) },
-{ DEFINE_DBG (wcr, 8) },
-{ DEFINE_DBG (wcr, 9) },
-{ DEFINE_DBG (wcr, 10) },
-{ DEFINE_DBG (wcr, 11) },
-{ DEFINE_DBG (wcr, 12) },
-{ DEFINE_DBG (wcr, 13) },
-{ DEFINE_DBG (wcr, 14) },
-{ DEFINE_DBG (wcr, 15) }
-};
+ // NAME ALT SZ OFFSET ENCODING FORMAT
+ // EH_FRAME DWARF GENERIC
+ // PROCESS PLUGIN LLDB NATIVE VALUE REGS INVALIDATE REGS
+ // =========== ======= == ============== ================
+ // ==================== =================== ===================
+ // ========================== =================== =============
+ // ============== =================
+ {"r0",
+ nullptr,
+ 4,
+ GPR_OFFSET(0),
+ eEncodingUint,
+ eFormatHex,
+ {ehframe_r0, dwarf_r0, LLDB_REGNUM_GENERIC_ARG1, LLDB_INVALID_REGNUM,
+ gpr_r0},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {"r1",
+ nullptr,
+ 4,
+ GPR_OFFSET(1),
+ eEncodingUint,
+ eFormatHex,
+ {ehframe_r1, dwarf_r1, LLDB_REGNUM_GENERIC_ARG2, LLDB_INVALID_REGNUM,
+ gpr_r1},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {"r2",
+ nullptr,
+ 4,
+ GPR_OFFSET(2),
+ eEncodingUint,
+ eFormatHex,
+ {ehframe_r2, dwarf_r2, LLDB_REGNUM_GENERIC_ARG3, LLDB_INVALID_REGNUM,
+ gpr_r2},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {"r3",
+ nullptr,
+ 4,
+ GPR_OFFSET(3),
+ eEncodingUint,
+ eFormatHex,
+ {ehframe_r3, dwarf_r3, LLDB_REGNUM_GENERIC_ARG4, LLDB_INVALID_REGNUM,
+ gpr_r3},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {"r4",
+ nullptr,
+ 4,
+ GPR_OFFSET(4),
+ eEncodingUint,
+ eFormatHex,
+ {ehframe_r4, dwarf_r4, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_r4},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {"r5",
+ nullptr,
+ 4,
+ GPR_OFFSET(5),
+ eEncodingUint,
+ eFormatHex,
+ {ehframe_r5, dwarf_r5, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_r5},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {"r6",
+ nullptr,
+ 4,
+ GPR_OFFSET(6),
+ eEncodingUint,
+ eFormatHex,
+ {ehframe_r6, dwarf_r6, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_r6},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {"r7",
+ nullptr,
+ 4,
+ GPR_OFFSET(7),
+ eEncodingUint,
+ eFormatHex,
+ {ehframe_r7, dwarf_r7, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_r7},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {"r8",
+ nullptr,
+ 4,
+ GPR_OFFSET(8),
+ eEncodingUint,
+ eFormatHex,
+ {ehframe_r8, dwarf_r8, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_r8},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {"r9",
+ nullptr,
+ 4,
+ GPR_OFFSET(9),
+ eEncodingUint,
+ eFormatHex,
+ {ehframe_r9, dwarf_r9, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_r9},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {"r10",
+ nullptr,
+ 4,
+ GPR_OFFSET(10),
+ eEncodingUint,
+ eFormatHex,
+ {ehframe_r10, dwarf_r10, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ gpr_r10},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {"r11",
+ nullptr,
+ 4,
+ GPR_OFFSET(11),
+ eEncodingUint,
+ eFormatHex,
+ {ehframe_r11, dwarf_r11, LLDB_REGNUM_GENERIC_FP, LLDB_INVALID_REGNUM,
+ gpr_r11},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {"r12",
+ nullptr,
+ 4,
+ GPR_OFFSET(12),
+ eEncodingUint,
+ eFormatHex,
+ {ehframe_r12, dwarf_r12, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ gpr_r12},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {"sp",
+ "r13",
+ 4,
+ GPR_OFFSET(13),
+ eEncodingUint,
+ eFormatHex,
+ {ehframe_sp, dwarf_sp, LLDB_REGNUM_GENERIC_SP, LLDB_INVALID_REGNUM,
+ gpr_sp},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {"lr",
+ "r14",
+ 4,
+ GPR_OFFSET(14),
+ eEncodingUint,
+ eFormatHex,
+ {ehframe_lr, dwarf_lr, LLDB_REGNUM_GENERIC_RA, LLDB_INVALID_REGNUM,
+ gpr_lr},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {"pc",
+ "r15",
+ 4,
+ GPR_OFFSET(15),
+ eEncodingUint,
+ eFormatHex,
+ {ehframe_pc, dwarf_pc, LLDB_REGNUM_GENERIC_PC, LLDB_INVALID_REGNUM,
+ gpr_pc},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {"cpsr",
+ "psr",
+ 4,
+ GPR_OFFSET(16),
+ eEncodingUint,
+ eFormatHex,
+ {ehframe_cpsr, dwarf_cpsr, LLDB_REGNUM_GENERIC_FLAGS, LLDB_INVALID_REGNUM,
+ gpr_cpsr},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+
+ {"s0",
+ nullptr,
+ 4,
+ FPU_OFFSET(0),
+ eEncodingIEEE754,
+ eFormatFloat,
+ {LLDB_INVALID_REGNUM, dwarf_s0, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ fpu_s0},
+ nullptr,
+ g_s0_invalidates,
+ nullptr,
+ 0},
+ {"s1",
+ nullptr,
+ 4,
+ FPU_OFFSET(1),
+ eEncodingIEEE754,
+ eFormatFloat,
+ {LLDB_INVALID_REGNUM, dwarf_s1, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ fpu_s1},
+ nullptr,
+ g_s1_invalidates,
+ nullptr,
+ 0},
+ {"s2",
+ nullptr,
+ 4,
+ FPU_OFFSET(2),
+ eEncodingIEEE754,
+ eFormatFloat,
+ {LLDB_INVALID_REGNUM, dwarf_s2, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ fpu_s2},
+ nullptr,
+ g_s2_invalidates,
+ nullptr,
+ 0},
+ {"s3",
+ nullptr,
+ 4,
+ FPU_OFFSET(3),
+ eEncodingIEEE754,
+ eFormatFloat,
+ {LLDB_INVALID_REGNUM, dwarf_s3, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ fpu_s3},
+ nullptr,
+ g_s3_invalidates,
+ nullptr,
+ 0},
+ {"s4",
+ nullptr,
+ 4,
+ FPU_OFFSET(4),
+ eEncodingIEEE754,
+ eFormatFloat,
+ {LLDB_INVALID_REGNUM, dwarf_s4, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ fpu_s4},
+ nullptr,
+ g_s4_invalidates,
+ nullptr,
+ 0},
+ {"s5",
+ nullptr,
+ 4,
+ FPU_OFFSET(5),
+ eEncodingIEEE754,
+ eFormatFloat,
+ {LLDB_INVALID_REGNUM, dwarf_s5, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ fpu_s5},
+ nullptr,
+ g_s5_invalidates,
+ nullptr,
+ 0},
+ {"s6",
+ nullptr,
+ 4,
+ FPU_OFFSET(6),
+ eEncodingIEEE754,
+ eFormatFloat,
+ {LLDB_INVALID_REGNUM, dwarf_s6, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ fpu_s6},
+ nullptr,
+ g_s6_invalidates,
+ nullptr,
+ 0},
+ {"s7",
+ nullptr,
+ 4,
+ FPU_OFFSET(7),
+ eEncodingIEEE754,
+ eFormatFloat,
+ {LLDB_INVALID_REGNUM, dwarf_s7, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ fpu_s7},
+ nullptr,
+ g_s7_invalidates,
+ nullptr,
+ 0},
+ {"s8",
+ nullptr,
+ 4,
+ FPU_OFFSET(8),
+ eEncodingIEEE754,
+ eFormatFloat,
+ {LLDB_INVALID_REGNUM, dwarf_s8, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ fpu_s8},
+ nullptr,
+ g_s8_invalidates,
+ nullptr,
+ 0},
+ {"s9",
+ nullptr,
+ 4,
+ FPU_OFFSET(9),
+ eEncodingIEEE754,
+ eFormatFloat,
+ {LLDB_INVALID_REGNUM, dwarf_s9, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ fpu_s9},
+ nullptr,
+ g_s9_invalidates,
+ nullptr,
+ 0},
+ {"s10",
+ nullptr,
+ 4,
+ FPU_OFFSET(10),
+ eEncodingIEEE754,
+ eFormatFloat,
+ {LLDB_INVALID_REGNUM, dwarf_s10, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ fpu_s10},
+ nullptr,
+ g_s10_invalidates,
+ nullptr,
+ 0},
+ {"s11",
+ nullptr,
+ 4,
+ FPU_OFFSET(11),
+ eEncodingIEEE754,
+ eFormatFloat,
+ {LLDB_INVALID_REGNUM, dwarf_s11, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ fpu_s11},
+ nullptr,
+ g_s11_invalidates,
+ nullptr,
+ 0},
+ {"s12",
+ nullptr,
+ 4,
+ FPU_OFFSET(12),
+ eEncodingIEEE754,
+ eFormatFloat,
+ {LLDB_INVALID_REGNUM, dwarf_s12, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ fpu_s12},
+ nullptr,
+ g_s12_invalidates,
+ nullptr,
+ 0},
+ {"s13",
+ nullptr,
+ 4,
+ FPU_OFFSET(13),
+ eEncodingIEEE754,
+ eFormatFloat,
+ {LLDB_INVALID_REGNUM, dwarf_s13, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ fpu_s13},
+ nullptr,
+ g_s13_invalidates,
+ nullptr,
+ 0},
+ {"s14",
+ nullptr,
+ 4,
+ FPU_OFFSET(14),
+ eEncodingIEEE754,
+ eFormatFloat,
+ {LLDB_INVALID_REGNUM, dwarf_s14, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ fpu_s14},
+ nullptr,
+ g_s14_invalidates,
+ nullptr,
+ 0},
+ {"s15",
+ nullptr,
+ 4,
+ FPU_OFFSET(15),
+ eEncodingIEEE754,
+ eFormatFloat,
+ {LLDB_INVALID_REGNUM, dwarf_s15, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ fpu_s15},
+ nullptr,
+ g_s15_invalidates,
+ nullptr,
+ 0},
+ {"s16",
+ nullptr,
+ 4,
+ FPU_OFFSET(16),
+ eEncodingIEEE754,
+ eFormatFloat,
+ {LLDB_INVALID_REGNUM, dwarf_s16, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ fpu_s16},
+ nullptr,
+ g_s16_invalidates,
+ nullptr,
+ 0},
+ {"s17",
+ nullptr,
+ 4,
+ FPU_OFFSET(17),
+ eEncodingIEEE754,
+ eFormatFloat,
+ {LLDB_INVALID_REGNUM, dwarf_s17, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ fpu_s17},
+ nullptr,
+ g_s17_invalidates,
+ nullptr,
+ 0},
+ {"s18",
+ nullptr,
+ 4,
+ FPU_OFFSET(18),
+ eEncodingIEEE754,
+ eFormatFloat,
+ {LLDB_INVALID_REGNUM, dwarf_s18, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ fpu_s18},
+ nullptr,
+ g_s18_invalidates,
+ nullptr,
+ 0},
+ {"s19",
+ nullptr,
+ 4,
+ FPU_OFFSET(19),
+ eEncodingIEEE754,
+ eFormatFloat,
+ {LLDB_INVALID_REGNUM, dwarf_s19, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ fpu_s19},
+ nullptr,
+ g_s19_invalidates,
+ nullptr,
+ 0},
+ {"s20",
+ nullptr,
+ 4,
+ FPU_OFFSET(20),
+ eEncodingIEEE754,
+ eFormatFloat,
+ {LLDB_INVALID_REGNUM, dwarf_s20, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ fpu_s20},
+ nullptr,
+ g_s20_invalidates,
+ nullptr,
+ 0},
+ {"s21",
+ nullptr,
+ 4,
+ FPU_OFFSET(21),
+ eEncodingIEEE754,
+ eFormatFloat,
+ {LLDB_INVALID_REGNUM, dwarf_s21, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ fpu_s21},
+ nullptr,
+ g_s21_invalidates,
+ nullptr,
+ 0},
+ {"s22",
+ nullptr,
+ 4,
+ FPU_OFFSET(22),
+ eEncodingIEEE754,
+ eFormatFloat,
+ {LLDB_INVALID_REGNUM, dwarf_s22, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ fpu_s22},
+ nullptr,
+ g_s22_invalidates,
+ nullptr,
+ 0},
+ {"s23",
+ nullptr,
+ 4,
+ FPU_OFFSET(23),
+ eEncodingIEEE754,
+ eFormatFloat,
+ {LLDB_INVALID_REGNUM, dwarf_s23, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ fpu_s23},
+ nullptr,
+ g_s23_invalidates,
+ nullptr,
+ 0},
+ {"s24",
+ nullptr,
+ 4,
+ FPU_OFFSET(24),
+ eEncodingIEEE754,
+ eFormatFloat,
+ {LLDB_INVALID_REGNUM, dwarf_s24, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ fpu_s24},
+ nullptr,
+ g_s24_invalidates,
+ nullptr,
+ 0},
+ {"s25",
+ nullptr,
+ 4,
+ FPU_OFFSET(25),
+ eEncodingIEEE754,
+ eFormatFloat,
+ {LLDB_INVALID_REGNUM, dwarf_s25, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ fpu_s25},
+ nullptr,
+ g_s25_invalidates,
+ nullptr,
+ 0},
+ {"s26",
+ nullptr,
+ 4,
+ FPU_OFFSET(26),
+ eEncodingIEEE754,
+ eFormatFloat,
+ {LLDB_INVALID_REGNUM, dwarf_s26, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ fpu_s26},
+ nullptr,
+ g_s26_invalidates,
+ nullptr,
+ 0},
+ {"s27",
+ nullptr,
+ 4,
+ FPU_OFFSET(27),
+ eEncodingIEEE754,
+ eFormatFloat,
+ {LLDB_INVALID_REGNUM, dwarf_s27, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ fpu_s27},
+ nullptr,
+ g_s27_invalidates,
+ nullptr,
+ 0},
+ {"s28",
+ nullptr,
+ 4,
+ FPU_OFFSET(28),
+ eEncodingIEEE754,
+ eFormatFloat,
+ {LLDB_INVALID_REGNUM, dwarf_s28, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ fpu_s28},
+ nullptr,
+ g_s28_invalidates,
+ nullptr,
+ 0},
+ {"s29",
+ nullptr,
+ 4,
+ FPU_OFFSET(29),
+ eEncodingIEEE754,
+ eFormatFloat,
+ {LLDB_INVALID_REGNUM, dwarf_s29, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ fpu_s29},
+ nullptr,
+ g_s29_invalidates,
+ nullptr,
+ 0},
+ {"s30",
+ nullptr,
+ 4,
+ FPU_OFFSET(30),
+ eEncodingIEEE754,
+ eFormatFloat,
+ {LLDB_INVALID_REGNUM, dwarf_s30, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ fpu_s30},
+ nullptr,
+ g_s30_invalidates,
+ nullptr,
+ 0},
+ {"s31",
+ nullptr,
+ 4,
+ FPU_OFFSET(31),
+ eEncodingIEEE754,
+ eFormatFloat,
+ {LLDB_INVALID_REGNUM, dwarf_s31, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ fpu_s31},
+ nullptr,
+ g_s31_invalidates,
+ nullptr,
+ 0},
+ {"fpscr",
+ nullptr,
+ 4,
+ FPSCR_OFFSET,
+ eEncodingUint,
+ eFormatHex,
+ {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, fpu_fpscr},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+
+ {"d0",
+ nullptr,
+ 8,
+ FPU_OFFSET(0),
+ eEncodingIEEE754,
+ eFormatFloat,
+ {LLDB_INVALID_REGNUM, dwarf_d0, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ fpu_d0},
+ g_d0_contains,
+ g_d0_invalidates,
+ nullptr,
+ 0},
+ {"d1",
+ nullptr,
+ 8,
+ FPU_OFFSET(2),
+ eEncodingIEEE754,
+ eFormatFloat,
+ {LLDB_INVALID_REGNUM, dwarf_d1, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ fpu_d1},
+ g_d1_contains,
+ g_d1_invalidates,
+ nullptr,
+ 0},
+ {"d2",
+ nullptr,
+ 8,
+ FPU_OFFSET(4),
+ eEncodingIEEE754,
+ eFormatFloat,
+ {LLDB_INVALID_REGNUM, dwarf_d2, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ fpu_d2},
+ g_d2_contains,
+ g_d2_invalidates,
+ nullptr,
+ 0},
+ {"d3",
+ nullptr,
+ 8,
+ FPU_OFFSET(6),
+ eEncodingIEEE754,
+ eFormatFloat,
+ {LLDB_INVALID_REGNUM, dwarf_d3, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ fpu_d3},
+ g_d3_contains,
+ g_d3_invalidates,
+ nullptr,
+ 0},
+ {"d4",
+ nullptr,
+ 8,
+ FPU_OFFSET(8),
+ eEncodingIEEE754,
+ eFormatFloat,
+ {LLDB_INVALID_REGNUM, dwarf_d4, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ fpu_d4},
+ g_d4_contains,
+ g_d4_invalidates,
+ nullptr,
+ 0},
+ {"d5",
+ nullptr,
+ 8,
+ FPU_OFFSET(10),
+ eEncodingIEEE754,
+ eFormatFloat,
+ {LLDB_INVALID_REGNUM, dwarf_d5, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ fpu_d5},
+ g_d5_contains,
+ g_d5_invalidates,
+ nullptr,
+ 0},
+ {"d6",
+ nullptr,
+ 8,
+ FPU_OFFSET(12),
+ eEncodingIEEE754,
+ eFormatFloat,
+ {LLDB_INVALID_REGNUM, dwarf_d6, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ fpu_d6},
+ g_d6_contains,
+ g_d6_invalidates,
+ nullptr,
+ 0},
+ {"d7",
+ nullptr,
+ 8,
+ FPU_OFFSET(14),
+ eEncodingIEEE754,
+ eFormatFloat,
+ {LLDB_INVALID_REGNUM, dwarf_d7, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ fpu_d7},
+ g_d7_contains,
+ g_d7_invalidates,
+ nullptr,
+ 0},
+ {"d8",
+ nullptr,
+ 8,
+ FPU_OFFSET(16),
+ eEncodingIEEE754,
+ eFormatFloat,
+ {LLDB_INVALID_REGNUM, dwarf_d8, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ fpu_d8},
+ g_d8_contains,
+ g_d8_invalidates,
+ nullptr,
+ 0},
+ {"d9",
+ nullptr,
+ 8,
+ FPU_OFFSET(18),
+ eEncodingIEEE754,
+ eFormatFloat,
+ {LLDB_INVALID_REGNUM, dwarf_d9, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ fpu_d9},
+ g_d9_contains,
+ g_d9_invalidates,
+ nullptr,
+ 0},
+ {"d10",
+ nullptr,
+ 8,
+ FPU_OFFSET(20),
+ eEncodingIEEE754,
+ eFormatFloat,
+ {LLDB_INVALID_REGNUM, dwarf_d10, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ fpu_d10},
+ g_d10_contains,
+ g_d10_invalidates,
+ nullptr,
+ 0},
+ {"d11",
+ nullptr,
+ 8,
+ FPU_OFFSET(22),
+ eEncodingIEEE754,
+ eFormatFloat,
+ {LLDB_INVALID_REGNUM, dwarf_d11, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ fpu_d11},
+ g_d11_contains,
+ g_d11_invalidates,
+ nullptr,
+ 0},
+ {"d12",
+ nullptr,
+ 8,
+ FPU_OFFSET(24),
+ eEncodingIEEE754,
+ eFormatFloat,
+ {LLDB_INVALID_REGNUM, dwarf_d12, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ fpu_d12},
+ g_d12_contains,
+ g_d12_invalidates,
+ nullptr,
+ 0},
+ {"d13",
+ nullptr,
+ 8,
+ FPU_OFFSET(26),
+ eEncodingIEEE754,
+ eFormatFloat,
+ {LLDB_INVALID_REGNUM, dwarf_d13, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ fpu_d13},
+ g_d13_contains,
+ g_d13_invalidates,
+ nullptr,
+ 0},
+ {"d14",
+ nullptr,
+ 8,
+ FPU_OFFSET(28),
+ eEncodingIEEE754,
+ eFormatFloat,
+ {LLDB_INVALID_REGNUM, dwarf_d14, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ fpu_d14},
+ g_d14_contains,
+ g_d14_invalidates,
+ nullptr,
+ 0},
+ {"d15",
+ nullptr,
+ 8,
+ FPU_OFFSET(30),
+ eEncodingIEEE754,
+ eFormatFloat,
+ {LLDB_INVALID_REGNUM, dwarf_d15, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ fpu_d15},
+ g_d15_contains,
+ g_d15_invalidates,
+ nullptr,
+ 0},
+ {"d16",
+ nullptr,
+ 8,
+ FPU_OFFSET(32),
+ eEncodingIEEE754,
+ eFormatFloat,
+ {LLDB_INVALID_REGNUM, dwarf_d16, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ fpu_d16},
+ nullptr,
+ g_d16_invalidates,
+ nullptr,
+ 0},
+ {"d17",
+ nullptr,
+ 8,
+ FPU_OFFSET(34),
+ eEncodingIEEE754,
+ eFormatFloat,
+ {LLDB_INVALID_REGNUM, dwarf_d17, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ fpu_d17},
+ nullptr,
+ g_d17_invalidates,
+ nullptr,
+ 0},
+ {"d18",
+ nullptr,
+ 8,
+ FPU_OFFSET(36),
+ eEncodingIEEE754,
+ eFormatFloat,
+ {LLDB_INVALID_REGNUM, dwarf_d18, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ fpu_d18},
+ nullptr,
+ g_d18_invalidates,
+ nullptr,
+ 0},
+ {"d19",
+ nullptr,
+ 8,
+ FPU_OFFSET(38),
+ eEncodingIEEE754,
+ eFormatFloat,
+ {LLDB_INVALID_REGNUM, dwarf_d19, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ fpu_d19},
+ nullptr,
+ g_d19_invalidates,
+ nullptr,
+ 0},
+ {"d20",
+ nullptr,
+ 8,
+ FPU_OFFSET(40),
+ eEncodingIEEE754,
+ eFormatFloat,
+ {LLDB_INVALID_REGNUM, dwarf_d20, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ fpu_d20},
+ nullptr,
+ g_d20_invalidates,
+ nullptr,
+ 0},
+ {"d21",
+ nullptr,
+ 8,
+ FPU_OFFSET(42),
+ eEncodingIEEE754,
+ eFormatFloat,
+ {LLDB_INVALID_REGNUM, dwarf_d21, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ fpu_d21},
+ nullptr,
+ g_d21_invalidates,
+ nullptr,
+ 0},
+ {"d22",
+ nullptr,
+ 8,
+ FPU_OFFSET(44),
+ eEncodingIEEE754,
+ eFormatFloat,
+ {LLDB_INVALID_REGNUM, dwarf_d22, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ fpu_d22},
+ nullptr,
+ g_d22_invalidates,
+ nullptr,
+ 0},
+ {"d23",
+ nullptr,
+ 8,
+ FPU_OFFSET(46),
+ eEncodingIEEE754,
+ eFormatFloat,
+ {LLDB_INVALID_REGNUM, dwarf_d23, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ fpu_d23},
+ nullptr,
+ g_d23_invalidates,
+ nullptr,
+ 0},
+ {"d24",
+ nullptr,
+ 8,
+ FPU_OFFSET(48),
+ eEncodingIEEE754,
+ eFormatFloat,
+ {LLDB_INVALID_REGNUM, dwarf_d24, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ fpu_d24},
+ nullptr,
+ g_d24_invalidates,
+ nullptr,
+ 0},
+ {"d25",
+ nullptr,
+ 8,
+ FPU_OFFSET(50),
+ eEncodingIEEE754,
+ eFormatFloat,
+ {LLDB_INVALID_REGNUM, dwarf_d25, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ fpu_d25},
+ nullptr,
+ g_d25_invalidates,
+ nullptr,
+ 0},
+ {"d26",
+ nullptr,
+ 8,
+ FPU_OFFSET(52),
+ eEncodingIEEE754,
+ eFormatFloat,
+ {LLDB_INVALID_REGNUM, dwarf_d26, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ fpu_d26},
+ nullptr,
+ g_d26_invalidates,
+ nullptr,
+ 0},
+ {"d27",
+ nullptr,
+ 8,
+ FPU_OFFSET(54),
+ eEncodingIEEE754,
+ eFormatFloat,
+ {LLDB_INVALID_REGNUM, dwarf_d27, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ fpu_d27},
+ nullptr,
+ g_d27_invalidates,
+ nullptr,
+ 0},
+ {"d28",
+ nullptr,
+ 8,
+ FPU_OFFSET(56),
+ eEncodingIEEE754,
+ eFormatFloat,
+ {LLDB_INVALID_REGNUM, dwarf_d28, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ fpu_d28},
+ nullptr,
+ g_d28_invalidates,
+ nullptr,
+ 0},
+ {"d29",
+ nullptr,
+ 8,
+ FPU_OFFSET(58),
+ eEncodingIEEE754,
+ eFormatFloat,
+ {LLDB_INVALID_REGNUM, dwarf_d29, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ fpu_d29},
+ nullptr,
+ g_d29_invalidates,
+ nullptr,
+ 0},
+ {"d30",
+ nullptr,
+ 8,
+ FPU_OFFSET(60),
+ eEncodingIEEE754,
+ eFormatFloat,
+ {LLDB_INVALID_REGNUM, dwarf_d30, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ fpu_d30},
+ nullptr,
+ g_d30_invalidates,
+ nullptr,
+ 0},
+ {"d31",
+ nullptr,
+ 8,
+ FPU_OFFSET(62),
+ eEncodingIEEE754,
+ eFormatFloat,
+ {LLDB_INVALID_REGNUM, dwarf_d31, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ fpu_d31},
+ nullptr,
+ g_d31_invalidates,
+ nullptr,
+ 0},
+
+ {"q0",
+ nullptr,
+ 16,
+ FPU_OFFSET(0),
+ eEncodingVector,
+ eFormatVectorOfUInt8,
+ {LLDB_INVALID_REGNUM, dwarf_q0, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ fpu_q0},
+ g_q0_contains,
+ nullptr,
+ nullptr,
+ 0},
+ {"q1",
+ nullptr,
+ 16,
+ FPU_OFFSET(4),
+ eEncodingVector,
+ eFormatVectorOfUInt8,
+ {LLDB_INVALID_REGNUM, dwarf_q1, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ fpu_q1},
+ g_q1_contains,
+ nullptr,
+ nullptr,
+ 0},
+ {"q2",
+ nullptr,
+ 16,
+ FPU_OFFSET(8),
+ eEncodingVector,
+ eFormatVectorOfUInt8,
+ {LLDB_INVALID_REGNUM, dwarf_q2, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ fpu_q2},
+ g_q2_contains,
+ nullptr,
+ nullptr,
+ 0},
+ {"q3",
+ nullptr,
+ 16,
+ FPU_OFFSET(12),
+ eEncodingVector,
+ eFormatVectorOfUInt8,
+ {LLDB_INVALID_REGNUM, dwarf_q3, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ fpu_q3},
+ g_q3_contains,
+ nullptr,
+ nullptr,
+ 0},
+ {"q4",
+ nullptr,
+ 16,
+ FPU_OFFSET(16),
+ eEncodingVector,
+ eFormatVectorOfUInt8,
+ {LLDB_INVALID_REGNUM, dwarf_q4, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ fpu_q4},
+ g_q4_contains,
+ nullptr,
+ nullptr,
+ 0},
+ {"q5",
+ nullptr,
+ 16,
+ FPU_OFFSET(20),
+ eEncodingVector,
+ eFormatVectorOfUInt8,
+ {LLDB_INVALID_REGNUM, dwarf_q5, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ fpu_q5},
+ g_q5_contains,
+ nullptr,
+ nullptr,
+ 0},
+ {"q6",
+ nullptr,
+ 16,
+ FPU_OFFSET(24),
+ eEncodingVector,
+ eFormatVectorOfUInt8,
+ {LLDB_INVALID_REGNUM, dwarf_q6, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ fpu_q6},
+ g_q6_contains,
+ nullptr,
+ nullptr,
+ 0},
+ {"q7",
+ nullptr,
+ 16,
+ FPU_OFFSET(28),
+ eEncodingVector,
+ eFormatVectorOfUInt8,
+ {LLDB_INVALID_REGNUM, dwarf_q7, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ fpu_q7},
+ g_q7_contains,
+ nullptr,
+ nullptr,
+ 0},
+ {"q8",
+ nullptr,
+ 16,
+ FPU_OFFSET(32),
+ eEncodingVector,
+ eFormatVectorOfUInt8,
+ {LLDB_INVALID_REGNUM, dwarf_q8, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ fpu_q8},
+ g_q8_contains,
+ nullptr,
+ nullptr,
+ 0},
+ {"q9",
+ nullptr,
+ 16,
+ FPU_OFFSET(36),
+ eEncodingVector,
+ eFormatVectorOfUInt8,
+ {LLDB_INVALID_REGNUM, dwarf_q9, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ fpu_q9},
+ g_q9_contains,
+ nullptr,
+ nullptr,
+ 0},
+ {"q10",
+ nullptr,
+ 16,
+ FPU_OFFSET(40),
+ eEncodingVector,
+ eFormatVectorOfUInt8,
+ {LLDB_INVALID_REGNUM, dwarf_q10, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ fpu_q10},
+ g_q10_contains,
+ nullptr,
+ nullptr,
+ 0},
+ {"q11",
+ nullptr,
+ 16,
+ FPU_OFFSET(44),
+ eEncodingVector,
+ eFormatVectorOfUInt8,
+ {LLDB_INVALID_REGNUM, dwarf_q11, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ fpu_q11},
+ g_q11_contains,
+ nullptr,
+ nullptr,
+ 0},
+ {"q12",
+ nullptr,
+ 16,
+ FPU_OFFSET(48),
+ eEncodingVector,
+ eFormatVectorOfUInt8,
+ {LLDB_INVALID_REGNUM, dwarf_q12, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ fpu_q12},
+ g_q12_contains,
+ nullptr,
+ nullptr,
+ 0},
+ {"q13",
+ nullptr,
+ 16,
+ FPU_OFFSET(52),
+ eEncodingVector,
+ eFormatVectorOfUInt8,
+ {LLDB_INVALID_REGNUM, dwarf_q13, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ fpu_q13},
+ g_q13_contains,
+ nullptr,
+ nullptr,
+ 0},
+ {"q14",
+ nullptr,
+ 16,
+ FPU_OFFSET(56),
+ eEncodingVector,
+ eFormatVectorOfUInt8,
+ {LLDB_INVALID_REGNUM, dwarf_q14, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ fpu_q14},
+ g_q14_contains,
+ nullptr,
+ nullptr,
+ 0},
+ {"q15",
+ nullptr,
+ 16,
+ FPU_OFFSET(60),
+ eEncodingVector,
+ eFormatVectorOfUInt8,
+ {LLDB_INVALID_REGNUM, dwarf_q15, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ fpu_q15},
+ g_q15_contains,
+ nullptr,
+ nullptr,
+ 0},
+
+ {"exception",
+ nullptr,
+ 4,
+ EXC_OFFSET(0),
+ eEncodingUint,
+ eFormatHex,
+ {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, exc_exception},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {"fsr",
+ nullptr,
+ 4,
+ EXC_OFFSET(1),
+ eEncodingUint,
+ eFormatHex,
+ {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, exc_fsr},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {"far",
+ nullptr,
+ 4,
+ EXC_OFFSET(2),
+ eEncodingUint,
+ eFormatHex,
+ {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, exc_far},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+
+ {DEFINE_DBG(bvr, 0)},
+ {DEFINE_DBG(bvr, 1)},
+ {DEFINE_DBG(bvr, 2)},
+ {DEFINE_DBG(bvr, 3)},
+ {DEFINE_DBG(bvr, 4)},
+ {DEFINE_DBG(bvr, 5)},
+ {DEFINE_DBG(bvr, 6)},
+ {DEFINE_DBG(bvr, 7)},
+ {DEFINE_DBG(bvr, 8)},
+ {DEFINE_DBG(bvr, 9)},
+ {DEFINE_DBG(bvr, 10)},
+ {DEFINE_DBG(bvr, 11)},
+ {DEFINE_DBG(bvr, 12)},
+ {DEFINE_DBG(bvr, 13)},
+ {DEFINE_DBG(bvr, 14)},
+ {DEFINE_DBG(bvr, 15)},
+
+ {DEFINE_DBG(bcr, 0)},
+ {DEFINE_DBG(bcr, 1)},
+ {DEFINE_DBG(bcr, 2)},
+ {DEFINE_DBG(bcr, 3)},
+ {DEFINE_DBG(bcr, 4)},
+ {DEFINE_DBG(bcr, 5)},
+ {DEFINE_DBG(bcr, 6)},
+ {DEFINE_DBG(bcr, 7)},
+ {DEFINE_DBG(bcr, 8)},
+ {DEFINE_DBG(bcr, 9)},
+ {DEFINE_DBG(bcr, 10)},
+ {DEFINE_DBG(bcr, 11)},
+ {DEFINE_DBG(bcr, 12)},
+ {DEFINE_DBG(bcr, 13)},
+ {DEFINE_DBG(bcr, 14)},
+ {DEFINE_DBG(bcr, 15)},
+
+ {DEFINE_DBG(wvr, 0)},
+ {DEFINE_DBG(wvr, 1)},
+ {DEFINE_DBG(wvr, 2)},
+ {DEFINE_DBG(wvr, 3)},
+ {DEFINE_DBG(wvr, 4)},
+ {DEFINE_DBG(wvr, 5)},
+ {DEFINE_DBG(wvr, 6)},
+ {DEFINE_DBG(wvr, 7)},
+ {DEFINE_DBG(wvr, 8)},
+ {DEFINE_DBG(wvr, 9)},
+ {DEFINE_DBG(wvr, 10)},
+ {DEFINE_DBG(wvr, 11)},
+ {DEFINE_DBG(wvr, 12)},
+ {DEFINE_DBG(wvr, 13)},
+ {DEFINE_DBG(wvr, 14)},
+ {DEFINE_DBG(wvr, 15)},
+
+ {DEFINE_DBG(wcr, 0)},
+ {DEFINE_DBG(wcr, 1)},
+ {DEFINE_DBG(wcr, 2)},
+ {DEFINE_DBG(wcr, 3)},
+ {DEFINE_DBG(wcr, 4)},
+ {DEFINE_DBG(wcr, 5)},
+ {DEFINE_DBG(wcr, 6)},
+ {DEFINE_DBG(wcr, 7)},
+ {DEFINE_DBG(wcr, 8)},
+ {DEFINE_DBG(wcr, 9)},
+ {DEFINE_DBG(wcr, 10)},
+ {DEFINE_DBG(wcr, 11)},
+ {DEFINE_DBG(wcr, 12)},
+ {DEFINE_DBG(wcr, 13)},
+ {DEFINE_DBG(wcr, 14)},
+ {DEFINE_DBG(wcr, 15)}};
#endif // DECLARE_REGISTER_INFOS_ARM_STRUCT
Modified: lldb/trunk/source/Plugins/Process/Utility/RegisterInfos_arm64.h
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/source/Plugins/Process/Utility/RegisterInfos_arm64.h?rev=280751&r1=280750&r2=280751&view=diff
==============================================================================
--- lldb/trunk/source/Plugins/Process/Utility/RegisterInfos_arm64.h (original)
+++ lldb/trunk/source/Plugins/Process/Utility/RegisterInfos_arm64.h Tue Sep 6 15:57:50 2016
@@ -15,9 +15,9 @@
// C++ Includes
// Other libraries and framework includes
// Project includes
-#include "lldb/lldb-private.h"
#include "lldb/lldb-defines.h"
#include "lldb/lldb-enumerations.h"
+#include "lldb/lldb-private.h"
#include "Utility/ARM64_DWARF_Registers.h"
#include "Utility/ARM64_ehframe_Registers.h"
@@ -50,302 +50,1091 @@
#error DEFINE_DBG must be defined before including this header file
#endif
-enum
-{
- gpr_x0 = 0,
- gpr_x1,
- gpr_x2,
- gpr_x3,
- gpr_x4,
- gpr_x5,
- gpr_x6,
- gpr_x7,
- gpr_x8,
- gpr_x9,
- gpr_x10,
- gpr_x11,
- gpr_x12,
- gpr_x13,
- gpr_x14,
- gpr_x15,
- gpr_x16,
- gpr_x17,
- gpr_x18,
- gpr_x19,
- gpr_x20,
- gpr_x21,
- gpr_x22,
- gpr_x23,
- gpr_x24,
- gpr_x25,
- gpr_x26,
- gpr_x27,
- gpr_x28,
- gpr_x29 = 29, gpr_fp = gpr_x29,
- gpr_x30 = 30, gpr_lr = gpr_x30, gpr_ra = gpr_x30,
- gpr_x31 = 31, gpr_sp = gpr_x31,
- gpr_pc = 32,
- gpr_cpsr,
-
- fpu_v0,
- fpu_v1,
- fpu_v2,
- fpu_v3,
- fpu_v4,
- fpu_v5,
- fpu_v6,
- fpu_v7,
- fpu_v8,
- fpu_v9,
- fpu_v10,
- fpu_v11,
- fpu_v12,
- fpu_v13,
- fpu_v14,
- fpu_v15,
- fpu_v16,
- fpu_v17,
- fpu_v18,
- fpu_v19,
- fpu_v20,
- fpu_v21,
- fpu_v22,
- fpu_v23,
- fpu_v24,
- fpu_v25,
- fpu_v26,
- fpu_v27,
- fpu_v28,
- fpu_v29,
- fpu_v30,
- fpu_v31,
-
- fpu_fpsr,
- fpu_fpcr,
-
- exc_far,
- exc_esr,
- exc_exception,
-
- dbg_bvr0,
- dbg_bvr1,
- dbg_bvr2,
- dbg_bvr3,
- dbg_bvr4,
- dbg_bvr5,
- dbg_bvr6,
- dbg_bvr7,
- dbg_bvr8,
- dbg_bvr9,
- dbg_bvr10,
- dbg_bvr11,
- dbg_bvr12,
- dbg_bvr13,
- dbg_bvr14,
- dbg_bvr15,
-
- dbg_bcr0,
- dbg_bcr1,
- dbg_bcr2,
- dbg_bcr3,
- dbg_bcr4,
- dbg_bcr5,
- dbg_bcr6,
- dbg_bcr7,
- dbg_bcr8,
- dbg_bcr9,
- dbg_bcr10,
- dbg_bcr11,
- dbg_bcr12,
- dbg_bcr13,
- dbg_bcr14,
- dbg_bcr15,
-
- dbg_wvr0,
- dbg_wvr1,
- dbg_wvr2,
- dbg_wvr3,
- dbg_wvr4,
- dbg_wvr5,
- dbg_wvr6,
- dbg_wvr7,
- dbg_wvr8,
- dbg_wvr9,
- dbg_wvr10,
- dbg_wvr11,
- dbg_wvr12,
- dbg_wvr13,
- dbg_wvr14,
- dbg_wvr15,
-
- dbg_wcr0,
- dbg_wcr1,
- dbg_wcr2,
- dbg_wcr3,
- dbg_wcr4,
- dbg_wcr5,
- dbg_wcr6,
- dbg_wcr7,
- dbg_wcr8,
- dbg_wcr9,
- dbg_wcr10,
- dbg_wcr11,
- dbg_wcr12,
- dbg_wcr13,
- dbg_wcr14,
- dbg_wcr15,
+enum {
+ gpr_x0 = 0,
+ gpr_x1,
+ gpr_x2,
+ gpr_x3,
+ gpr_x4,
+ gpr_x5,
+ gpr_x6,
+ gpr_x7,
+ gpr_x8,
+ gpr_x9,
+ gpr_x10,
+ gpr_x11,
+ gpr_x12,
+ gpr_x13,
+ gpr_x14,
+ gpr_x15,
+ gpr_x16,
+ gpr_x17,
+ gpr_x18,
+ gpr_x19,
+ gpr_x20,
+ gpr_x21,
+ gpr_x22,
+ gpr_x23,
+ gpr_x24,
+ gpr_x25,
+ gpr_x26,
+ gpr_x27,
+ gpr_x28,
+ gpr_x29 = 29,
+ gpr_fp = gpr_x29,
+ gpr_x30 = 30,
+ gpr_lr = gpr_x30,
+ gpr_ra = gpr_x30,
+ gpr_x31 = 31,
+ gpr_sp = gpr_x31,
+ gpr_pc = 32,
+ gpr_cpsr,
+
+ fpu_v0,
+ fpu_v1,
+ fpu_v2,
+ fpu_v3,
+ fpu_v4,
+ fpu_v5,
+ fpu_v6,
+ fpu_v7,
+ fpu_v8,
+ fpu_v9,
+ fpu_v10,
+ fpu_v11,
+ fpu_v12,
+ fpu_v13,
+ fpu_v14,
+ fpu_v15,
+ fpu_v16,
+ fpu_v17,
+ fpu_v18,
+ fpu_v19,
+ fpu_v20,
+ fpu_v21,
+ fpu_v22,
+ fpu_v23,
+ fpu_v24,
+ fpu_v25,
+ fpu_v26,
+ fpu_v27,
+ fpu_v28,
+ fpu_v29,
+ fpu_v30,
+ fpu_v31,
+
+ fpu_fpsr,
+ fpu_fpcr,
+
+ exc_far,
+ exc_esr,
+ exc_exception,
+
+ dbg_bvr0,
+ dbg_bvr1,
+ dbg_bvr2,
+ dbg_bvr3,
+ dbg_bvr4,
+ dbg_bvr5,
+ dbg_bvr6,
+ dbg_bvr7,
+ dbg_bvr8,
+ dbg_bvr9,
+ dbg_bvr10,
+ dbg_bvr11,
+ dbg_bvr12,
+ dbg_bvr13,
+ dbg_bvr14,
+ dbg_bvr15,
+
+ dbg_bcr0,
+ dbg_bcr1,
+ dbg_bcr2,
+ dbg_bcr3,
+ dbg_bcr4,
+ dbg_bcr5,
+ dbg_bcr6,
+ dbg_bcr7,
+ dbg_bcr8,
+ dbg_bcr9,
+ dbg_bcr10,
+ dbg_bcr11,
+ dbg_bcr12,
+ dbg_bcr13,
+ dbg_bcr14,
+ dbg_bcr15,
+
+ dbg_wvr0,
+ dbg_wvr1,
+ dbg_wvr2,
+ dbg_wvr3,
+ dbg_wvr4,
+ dbg_wvr5,
+ dbg_wvr6,
+ dbg_wvr7,
+ dbg_wvr8,
+ dbg_wvr9,
+ dbg_wvr10,
+ dbg_wvr11,
+ dbg_wvr12,
+ dbg_wvr13,
+ dbg_wvr14,
+ dbg_wvr15,
+
+ dbg_wcr0,
+ dbg_wcr1,
+ dbg_wcr2,
+ dbg_wcr3,
+ dbg_wcr4,
+ dbg_wcr5,
+ dbg_wcr6,
+ dbg_wcr7,
+ dbg_wcr8,
+ dbg_wcr9,
+ dbg_wcr10,
+ dbg_wcr11,
+ dbg_wcr12,
+ dbg_wcr13,
+ dbg_wcr14,
+ dbg_wcr15,
- k_num_registers
+ k_num_registers
};
static lldb_private::RegisterInfo g_register_infos_arm64[] = {
-// General purpose registers
-// NAME ALT SZ OFFSET ENCODING FORMAT EH_FRAME DWARF GENERIC PROCESS PLUGIN LLDB NATIVE VALUE REGS INVALIDATE REGS
-// ====== ======= == ============= ============= ============ =============== =============== ========================= ===================== ============= ========== ===============
-{ "x0", nullptr, 8, GPR_OFFSET(0), lldb::eEncodingUint, lldb::eFormatHex, { arm64_ehframe::x0, arm64_dwarf::x0, LLDB_REGNUM_GENERIC_ARG1, LLDB_INVALID_REGNUM, gpr_x0 }, nullptr, nullptr, nullptr, 0},
-{ "x1", nullptr, 8, GPR_OFFSET(1), lldb::eEncodingUint, lldb::eFormatHex, { arm64_ehframe::x1, arm64_dwarf::x1, LLDB_REGNUM_GENERIC_ARG2, LLDB_INVALID_REGNUM, gpr_x1 }, nullptr, nullptr, nullptr, 0},
-{ "x2", nullptr, 8, GPR_OFFSET(2), lldb::eEncodingUint, lldb::eFormatHex, { arm64_ehframe::x2, arm64_dwarf::x2, LLDB_REGNUM_GENERIC_ARG3, LLDB_INVALID_REGNUM, gpr_x2 }, nullptr, nullptr, nullptr, 0},
-{ "x3", nullptr, 8, GPR_OFFSET(3), lldb::eEncodingUint, lldb::eFormatHex, { arm64_ehframe::x3, arm64_dwarf::x3, LLDB_REGNUM_GENERIC_ARG4, LLDB_INVALID_REGNUM, gpr_x3 }, nullptr, nullptr, nullptr, 0},
-{ "x4", nullptr, 8, GPR_OFFSET(4), lldb::eEncodingUint, lldb::eFormatHex, { arm64_ehframe::x4, arm64_dwarf::x4, LLDB_REGNUM_GENERIC_ARG5, LLDB_INVALID_REGNUM, gpr_x4 }, nullptr, nullptr, nullptr, 0},
-{ "x5", nullptr, 8, GPR_OFFSET(5), lldb::eEncodingUint, lldb::eFormatHex, { arm64_ehframe::x5, arm64_dwarf::x5, LLDB_REGNUM_GENERIC_ARG6, LLDB_INVALID_REGNUM, gpr_x5 }, nullptr, nullptr, nullptr, 0},
-{ "x6", nullptr, 8, GPR_OFFSET(6), lldb::eEncodingUint, lldb::eFormatHex, { arm64_ehframe::x6, arm64_dwarf::x6, LLDB_REGNUM_GENERIC_ARG7, LLDB_INVALID_REGNUM, gpr_x6 }, nullptr, nullptr, nullptr, 0},
-{ "x7", nullptr, 8, GPR_OFFSET(7), lldb::eEncodingUint, lldb::eFormatHex, { arm64_ehframe::x7, arm64_dwarf::x7, LLDB_REGNUM_GENERIC_ARG8, LLDB_INVALID_REGNUM, gpr_x7 }, nullptr, nullptr, nullptr, 0},
-{ "x8", nullptr, 8, GPR_OFFSET(8), lldb::eEncodingUint, lldb::eFormatHex, { arm64_ehframe::x8, arm64_dwarf::x8, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_x8 }, nullptr, nullptr, nullptr, 0},
-{ "x9", nullptr, 8, GPR_OFFSET(9), lldb::eEncodingUint, lldb::eFormatHex, { arm64_ehframe::x9, arm64_dwarf::x9, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_x9 }, nullptr, nullptr, nullptr, 0},
-{ "x10", nullptr, 8, GPR_OFFSET(10), lldb::eEncodingUint, lldb::eFormatHex, { arm64_ehframe::x10, arm64_dwarf::x10, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_x10 }, nullptr, nullptr, nullptr, 0},
-{ "x11", nullptr, 8, GPR_OFFSET(11), lldb::eEncodingUint, lldb::eFormatHex, { arm64_ehframe::x11, arm64_dwarf::x11, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_x11 }, nullptr, nullptr, nullptr, 0},
-{ "x12", nullptr, 8, GPR_OFFSET(12), lldb::eEncodingUint, lldb::eFormatHex, { arm64_ehframe::x12, arm64_dwarf::x12, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_x12 }, nullptr, nullptr, nullptr, 0},
-{ "x13", nullptr, 8, GPR_OFFSET(13), lldb::eEncodingUint, lldb::eFormatHex, { arm64_ehframe::x13, arm64_dwarf::x13, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_x13 }, nullptr, nullptr, nullptr, 0},
-{ "x14", nullptr, 8, GPR_OFFSET(14), lldb::eEncodingUint, lldb::eFormatHex, { arm64_ehframe::x14, arm64_dwarf::x14, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_x14 }, nullptr, nullptr, nullptr, 0},
-{ "x15", nullptr, 8, GPR_OFFSET(15), lldb::eEncodingUint, lldb::eFormatHex, { arm64_ehframe::x15, arm64_dwarf::x15, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_x15 }, nullptr, nullptr, nullptr, 0},
-{ "x16", nullptr, 8, GPR_OFFSET(16), lldb::eEncodingUint, lldb::eFormatHex, { arm64_ehframe::x16, arm64_dwarf::x16, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_x16 }, nullptr, nullptr, nullptr, 0},
-{ "x17", nullptr, 8, GPR_OFFSET(17), lldb::eEncodingUint, lldb::eFormatHex, { arm64_ehframe::x17, arm64_dwarf::x17, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_x17 }, nullptr, nullptr, nullptr, 0},
-{ "x18", nullptr, 8, GPR_OFFSET(18), lldb::eEncodingUint, lldb::eFormatHex, { arm64_ehframe::x18, arm64_dwarf::x18, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_x18 }, nullptr, nullptr, nullptr, 0},
-{ "x19", nullptr, 8, GPR_OFFSET(19), lldb::eEncodingUint, lldb::eFormatHex, { arm64_ehframe::x19, arm64_dwarf::x19, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_x19 }, nullptr, nullptr, nullptr, 0},
-{ "x20", nullptr, 8, GPR_OFFSET(20), lldb::eEncodingUint, lldb::eFormatHex, { arm64_ehframe::x20, arm64_dwarf::x20, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_x20 }, nullptr, nullptr, nullptr, 0},
-{ "x21", nullptr, 8, GPR_OFFSET(21), lldb::eEncodingUint, lldb::eFormatHex, { arm64_ehframe::x21, arm64_dwarf::x21, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_x21 }, nullptr, nullptr, nullptr, 0},
-{ "x22", nullptr, 8, GPR_OFFSET(22), lldb::eEncodingUint, lldb::eFormatHex, { arm64_ehframe::x22, arm64_dwarf::x22, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_x22 }, nullptr, nullptr, nullptr, 0},
-{ "x23", nullptr, 8, GPR_OFFSET(23), lldb::eEncodingUint, lldb::eFormatHex, { arm64_ehframe::x23, arm64_dwarf::x23, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_x23 }, nullptr, nullptr, nullptr, 0},
-{ "x24", nullptr, 8, GPR_OFFSET(24), lldb::eEncodingUint, lldb::eFormatHex, { arm64_ehframe::x24, arm64_dwarf::x24, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_x24 }, nullptr, nullptr, nullptr, 0},
-{ "x25", nullptr, 8, GPR_OFFSET(25), lldb::eEncodingUint, lldb::eFormatHex, { arm64_ehframe::x25, arm64_dwarf::x25, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_x25 }, nullptr, nullptr, nullptr, 0},
-{ "x26", nullptr, 8, GPR_OFFSET(26), lldb::eEncodingUint, lldb::eFormatHex, { arm64_ehframe::x26, arm64_dwarf::x26, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_x26 }, nullptr, nullptr, nullptr, 0},
-{ "x27", nullptr, 8, GPR_OFFSET(27), lldb::eEncodingUint, lldb::eFormatHex, { arm64_ehframe::x27, arm64_dwarf::x27, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_x27 }, nullptr, nullptr, nullptr, 0},
-{ "x28", nullptr, 8, GPR_OFFSET(28), lldb::eEncodingUint, lldb::eFormatHex, { arm64_ehframe::x28, arm64_dwarf::x28, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_x28 }, nullptr, nullptr, nullptr, 0},
-
-{ "fp", "x29", 8, GPR_OFFSET(29), lldb::eEncodingUint, lldb::eFormatHex, { arm64_ehframe::fp, arm64_dwarf::fp, LLDB_REGNUM_GENERIC_FP, LLDB_INVALID_REGNUM, gpr_fp }, nullptr, nullptr, nullptr, 0},
-{ "lr", "x30", 8, GPR_OFFSET(30), lldb::eEncodingUint, lldb::eFormatHex, { arm64_ehframe::lr, arm64_dwarf::lr, LLDB_REGNUM_GENERIC_RA, LLDB_INVALID_REGNUM, gpr_lr }, nullptr, nullptr, nullptr, 0},
-{ "sp", "x31", 8, GPR_OFFSET(31), lldb::eEncodingUint, lldb::eFormatHex, { arm64_ehframe::sp, arm64_dwarf::sp, LLDB_REGNUM_GENERIC_SP, LLDB_INVALID_REGNUM, gpr_sp }, nullptr, nullptr, nullptr, 0},
-{ "pc", nullptr, 8, GPR_OFFSET(32), lldb::eEncodingUint, lldb::eFormatHex, { arm64_ehframe::pc, arm64_dwarf::pc, LLDB_REGNUM_GENERIC_PC, LLDB_INVALID_REGNUM, gpr_pc }, nullptr, nullptr, nullptr, 0},
-
-{ "cpsr", nullptr, 4, GPR_OFFSET_NAME(cpsr), lldb::eEncodingUint, lldb::eFormatHex, { arm64_ehframe::cpsr, arm64_dwarf::cpsr, LLDB_REGNUM_GENERIC_FLAGS, LLDB_INVALID_REGNUM, gpr_cpsr }, nullptr, nullptr, nullptr, 0},
-
-{ "v0", nullptr, 16, FPU_OFFSET(0), lldb::eEncodingVector, lldb::eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, arm64_dwarf::v0, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_v0 }, nullptr, nullptr, nullptr, 0},
-{ "v1", nullptr, 16, FPU_OFFSET(1), lldb::eEncodingVector, lldb::eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, arm64_dwarf::v1, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_v1 }, nullptr, nullptr, nullptr, 0},
-{ "v2", nullptr, 16, FPU_OFFSET(2), lldb::eEncodingVector, lldb::eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, arm64_dwarf::v2, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_v2 }, nullptr, nullptr, nullptr, 0},
-{ "v3", nullptr, 16, FPU_OFFSET(3), lldb::eEncodingVector, lldb::eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, arm64_dwarf::v3, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_v3 }, nullptr, nullptr, nullptr, 0},
-{ "v4", nullptr, 16, FPU_OFFSET(4), lldb::eEncodingVector, lldb::eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, arm64_dwarf::v4, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_v4 }, nullptr, nullptr, nullptr, 0},
-{ "v5", nullptr, 16, FPU_OFFSET(5), lldb::eEncodingVector, lldb::eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, arm64_dwarf::v5, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_v5 }, nullptr, nullptr, nullptr, 0},
-{ "v6", nullptr, 16, FPU_OFFSET(6), lldb::eEncodingVector, lldb::eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, arm64_dwarf::v6, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_v6 }, nullptr, nullptr, nullptr, 0},
-{ "v7", nullptr, 16, FPU_OFFSET(7), lldb::eEncodingVector, lldb::eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, arm64_dwarf::v7, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_v7 }, nullptr, nullptr, nullptr, 0},
-{ "v8", nullptr, 16, FPU_OFFSET(8), lldb::eEncodingVector, lldb::eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, arm64_dwarf::v8, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_v8 }, nullptr, nullptr, nullptr, 0},
-{ "v9", nullptr, 16, FPU_OFFSET(9), lldb::eEncodingVector, lldb::eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, arm64_dwarf::v9, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_v9 }, nullptr, nullptr, nullptr, 0},
-{ "v10", nullptr, 16, FPU_OFFSET(10), lldb::eEncodingVector, lldb::eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, arm64_dwarf::v10, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_v10 }, nullptr, nullptr, nullptr, 0},
-{ "v11", nullptr, 16, FPU_OFFSET(11), lldb::eEncodingVector, lldb::eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, arm64_dwarf::v11, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_v11 }, nullptr, nullptr, nullptr, 0},
-{ "v12", nullptr, 16, FPU_OFFSET(12), lldb::eEncodingVector, lldb::eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, arm64_dwarf::v12, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_v12 }, nullptr, nullptr, nullptr, 0},
-{ "v13", nullptr, 16, FPU_OFFSET(13), lldb::eEncodingVector, lldb::eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, arm64_dwarf::v13, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_v13 }, nullptr, nullptr, nullptr, 0},
-{ "v14", nullptr, 16, FPU_OFFSET(14), lldb::eEncodingVector, lldb::eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, arm64_dwarf::v14, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_v14 }, nullptr, nullptr, nullptr, 0},
-{ "v15", nullptr, 16, FPU_OFFSET(15), lldb::eEncodingVector, lldb::eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, arm64_dwarf::v15, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_v15 }, nullptr, nullptr, nullptr, 0},
-{ "v16", nullptr, 16, FPU_OFFSET(16), lldb::eEncodingVector, lldb::eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, arm64_dwarf::v16, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_v16 }, nullptr, nullptr, nullptr, 0},
-{ "v17", nullptr, 16, FPU_OFFSET(17), lldb::eEncodingVector, lldb::eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, arm64_dwarf::v17, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_v17 }, nullptr, nullptr, nullptr, 0},
-{ "v18", nullptr, 16, FPU_OFFSET(18), lldb::eEncodingVector, lldb::eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, arm64_dwarf::v18, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_v18 }, nullptr, nullptr, nullptr, 0},
-{ "v19", nullptr, 16, FPU_OFFSET(19), lldb::eEncodingVector, lldb::eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, arm64_dwarf::v19, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_v19 }, nullptr, nullptr, nullptr, 0},
-{ "v20", nullptr, 16, FPU_OFFSET(20), lldb::eEncodingVector, lldb::eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, arm64_dwarf::v20, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_v20 }, nullptr, nullptr, nullptr, 0},
-{ "v21", nullptr, 16, FPU_OFFSET(21), lldb::eEncodingVector, lldb::eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, arm64_dwarf::v21, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_v21 }, nullptr, nullptr, nullptr, 0},
-{ "v22", nullptr, 16, FPU_OFFSET(22), lldb::eEncodingVector, lldb::eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, arm64_dwarf::v22, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_v22 }, nullptr, nullptr, nullptr, 0},
-{ "v23", nullptr, 16, FPU_OFFSET(23), lldb::eEncodingVector, lldb::eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, arm64_dwarf::v23, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_v23 }, nullptr, nullptr, nullptr, 0},
-{ "v24", nullptr, 16, FPU_OFFSET(24), lldb::eEncodingVector, lldb::eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, arm64_dwarf::v24, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_v24 }, nullptr, nullptr, nullptr, 0},
-{ "v25", nullptr, 16, FPU_OFFSET(25), lldb::eEncodingVector, lldb::eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, arm64_dwarf::v25, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_v25 }, nullptr, nullptr, nullptr, 0},
-{ "v26", nullptr, 16, FPU_OFFSET(26), lldb::eEncodingVector, lldb::eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, arm64_dwarf::v26, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_v26 }, nullptr, nullptr, nullptr, 0},
-{ "v27", nullptr, 16, FPU_OFFSET(27), lldb::eEncodingVector, lldb::eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, arm64_dwarf::v27, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_v27 }, nullptr, nullptr, nullptr, 0},
-{ "v28", nullptr, 16, FPU_OFFSET(28), lldb::eEncodingVector, lldb::eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, arm64_dwarf::v28, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_v28 }, nullptr, nullptr, nullptr, 0},
-{ "v29", nullptr, 16, FPU_OFFSET(29), lldb::eEncodingVector, lldb::eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, arm64_dwarf::v29, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_v29 }, nullptr, nullptr, nullptr, 0},
-{ "v30", nullptr, 16, FPU_OFFSET(30), lldb::eEncodingVector, lldb::eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, arm64_dwarf::v30, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_v30 }, nullptr, nullptr, nullptr, 0},
-{ "v31", nullptr, 16, FPU_OFFSET(31), lldb::eEncodingVector, lldb::eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, arm64_dwarf::v31, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_v31 }, nullptr, nullptr, nullptr, 0},
-
-{ "fpsr", nullptr, 4, FPU_OFFSET_NAME(fpsr), lldb::eEncodingUint, lldb::eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_fpsr }, nullptr, nullptr, nullptr, 0},
-{ "fpcr", nullptr, 4, FPU_OFFSET_NAME(fpcr), lldb::eEncodingUint, lldb::eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_fpcr }, nullptr, nullptr, nullptr, 0},
-
-{ "far", nullptr, 8, EXC_OFFSET_NAME(far), lldb::eEncodingUint, lldb::eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, exc_far }, nullptr, nullptr, nullptr, 0},
-{ "esr", nullptr, 4, EXC_OFFSET_NAME(esr), lldb::eEncodingUint, lldb::eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, exc_esr }, nullptr, nullptr, nullptr, 0},
-{ "exception",nullptr, 4, EXC_OFFSET_NAME(exception), lldb::eEncodingUint, lldb::eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, exc_exception }, nullptr, nullptr, nullptr, 0},
-
-{ DEFINE_DBG (bvr, 0) },
-{ DEFINE_DBG (bvr, 1) },
-{ DEFINE_DBG (bvr, 2) },
-{ DEFINE_DBG (bvr, 3) },
-{ DEFINE_DBG (bvr, 4) },
-{ DEFINE_DBG (bvr, 5) },
-{ DEFINE_DBG (bvr, 6) },
-{ DEFINE_DBG (bvr, 7) },
-{ DEFINE_DBG (bvr, 8) },
-{ DEFINE_DBG (bvr, 9) },
-{ DEFINE_DBG (bvr, 10) },
-{ DEFINE_DBG (bvr, 11) },
-{ DEFINE_DBG (bvr, 12) },
-{ DEFINE_DBG (bvr, 13) },
-{ DEFINE_DBG (bvr, 14) },
-{ DEFINE_DBG (bvr, 15) },
-
-{ DEFINE_DBG (bcr, 0) },
-{ DEFINE_DBG (bcr, 1) },
-{ DEFINE_DBG (bcr, 2) },
-{ DEFINE_DBG (bcr, 3) },
-{ DEFINE_DBG (bcr, 4) },
-{ DEFINE_DBG (bcr, 5) },
-{ DEFINE_DBG (bcr, 6) },
-{ DEFINE_DBG (bcr, 7) },
-{ DEFINE_DBG (bcr, 8) },
-{ DEFINE_DBG (bcr, 9) },
-{ DEFINE_DBG (bcr, 10) },
-{ DEFINE_DBG (bcr, 11) },
-{ DEFINE_DBG (bcr, 12) },
-{ DEFINE_DBG (bcr, 13) },
-{ DEFINE_DBG (bcr, 14) },
-{ DEFINE_DBG (bcr, 15) },
-
-{ DEFINE_DBG (wvr, 0) },
-{ DEFINE_DBG (wvr, 1) },
-{ DEFINE_DBG (wvr, 2) },
-{ DEFINE_DBG (wvr, 3) },
-{ DEFINE_DBG (wvr, 4) },
-{ DEFINE_DBG (wvr, 5) },
-{ DEFINE_DBG (wvr, 6) },
-{ DEFINE_DBG (wvr, 7) },
-{ DEFINE_DBG (wvr, 8) },
-{ DEFINE_DBG (wvr, 9) },
-{ DEFINE_DBG (wvr, 10) },
-{ DEFINE_DBG (wvr, 11) },
-{ DEFINE_DBG (wvr, 12) },
-{ DEFINE_DBG (wvr, 13) },
-{ DEFINE_DBG (wvr, 14) },
-{ DEFINE_DBG (wvr, 15) },
-
-{ DEFINE_DBG (wcr, 0) },
-{ DEFINE_DBG (wcr, 1) },
-{ DEFINE_DBG (wcr, 2) },
-{ DEFINE_DBG (wcr, 3) },
-{ DEFINE_DBG (wcr, 4) },
-{ DEFINE_DBG (wcr, 5) },
-{ DEFINE_DBG (wcr, 6) },
-{ DEFINE_DBG (wcr, 7) },
-{ DEFINE_DBG (wcr, 8) },
-{ DEFINE_DBG (wcr, 9) },
-{ DEFINE_DBG (wcr, 10) },
-{ DEFINE_DBG (wcr, 11) },
-{ DEFINE_DBG (wcr, 12) },
-{ DEFINE_DBG (wcr, 13) },
-{ DEFINE_DBG (wcr, 14) },
-{ DEFINE_DBG (wcr, 15) }
-};
+ // General purpose registers
+ // NAME ALT SZ OFFSET ENCODING
+ // FORMAT EH_FRAME DWARF
+ // GENERIC PROCESS PLUGIN LLDB NATIVE VALUE
+ // REGS INVALIDATE REGS
+ // ====== ======= == ============= =============
+ // ============ =============== ===============
+ // ========================= ===================== =============
+ // ========== ===============
+ {"x0",
+ nullptr,
+ 8,
+ GPR_OFFSET(0),
+ lldb::eEncodingUint,
+ lldb::eFormatHex,
+ {arm64_ehframe::x0, arm64_dwarf::x0, LLDB_REGNUM_GENERIC_ARG1,
+ LLDB_INVALID_REGNUM, gpr_x0},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {"x1",
+ nullptr,
+ 8,
+ GPR_OFFSET(1),
+ lldb::eEncodingUint,
+ lldb::eFormatHex,
+ {arm64_ehframe::x1, arm64_dwarf::x1, LLDB_REGNUM_GENERIC_ARG2,
+ LLDB_INVALID_REGNUM, gpr_x1},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {"x2",
+ nullptr,
+ 8,
+ GPR_OFFSET(2),
+ lldb::eEncodingUint,
+ lldb::eFormatHex,
+ {arm64_ehframe::x2, arm64_dwarf::x2, LLDB_REGNUM_GENERIC_ARG3,
+ LLDB_INVALID_REGNUM, gpr_x2},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {"x3",
+ nullptr,
+ 8,
+ GPR_OFFSET(3),
+ lldb::eEncodingUint,
+ lldb::eFormatHex,
+ {arm64_ehframe::x3, arm64_dwarf::x3, LLDB_REGNUM_GENERIC_ARG4,
+ LLDB_INVALID_REGNUM, gpr_x3},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {"x4",
+ nullptr,
+ 8,
+ GPR_OFFSET(4),
+ lldb::eEncodingUint,
+ lldb::eFormatHex,
+ {arm64_ehframe::x4, arm64_dwarf::x4, LLDB_REGNUM_GENERIC_ARG5,
+ LLDB_INVALID_REGNUM, gpr_x4},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {"x5",
+ nullptr,
+ 8,
+ GPR_OFFSET(5),
+ lldb::eEncodingUint,
+ lldb::eFormatHex,
+ {arm64_ehframe::x5, arm64_dwarf::x5, LLDB_REGNUM_GENERIC_ARG6,
+ LLDB_INVALID_REGNUM, gpr_x5},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {"x6",
+ nullptr,
+ 8,
+ GPR_OFFSET(6),
+ lldb::eEncodingUint,
+ lldb::eFormatHex,
+ {arm64_ehframe::x6, arm64_dwarf::x6, LLDB_REGNUM_GENERIC_ARG7,
+ LLDB_INVALID_REGNUM, gpr_x6},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {"x7",
+ nullptr,
+ 8,
+ GPR_OFFSET(7),
+ lldb::eEncodingUint,
+ lldb::eFormatHex,
+ {arm64_ehframe::x7, arm64_dwarf::x7, LLDB_REGNUM_GENERIC_ARG8,
+ LLDB_INVALID_REGNUM, gpr_x7},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {"x8",
+ nullptr,
+ 8,
+ GPR_OFFSET(8),
+ lldb::eEncodingUint,
+ lldb::eFormatHex,
+ {arm64_ehframe::x8, arm64_dwarf::x8, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, gpr_x8},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {"x9",
+ nullptr,
+ 8,
+ GPR_OFFSET(9),
+ lldb::eEncodingUint,
+ lldb::eFormatHex,
+ {arm64_ehframe::x9, arm64_dwarf::x9, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, gpr_x9},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {"x10",
+ nullptr,
+ 8,
+ GPR_OFFSET(10),
+ lldb::eEncodingUint,
+ lldb::eFormatHex,
+ {arm64_ehframe::x10, arm64_dwarf::x10, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, gpr_x10},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {"x11",
+ nullptr,
+ 8,
+ GPR_OFFSET(11),
+ lldb::eEncodingUint,
+ lldb::eFormatHex,
+ {arm64_ehframe::x11, arm64_dwarf::x11, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, gpr_x11},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {"x12",
+ nullptr,
+ 8,
+ GPR_OFFSET(12),
+ lldb::eEncodingUint,
+ lldb::eFormatHex,
+ {arm64_ehframe::x12, arm64_dwarf::x12, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, gpr_x12},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {"x13",
+ nullptr,
+ 8,
+ GPR_OFFSET(13),
+ lldb::eEncodingUint,
+ lldb::eFormatHex,
+ {arm64_ehframe::x13, arm64_dwarf::x13, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, gpr_x13},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {"x14",
+ nullptr,
+ 8,
+ GPR_OFFSET(14),
+ lldb::eEncodingUint,
+ lldb::eFormatHex,
+ {arm64_ehframe::x14, arm64_dwarf::x14, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, gpr_x14},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {"x15",
+ nullptr,
+ 8,
+ GPR_OFFSET(15),
+ lldb::eEncodingUint,
+ lldb::eFormatHex,
+ {arm64_ehframe::x15, arm64_dwarf::x15, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, gpr_x15},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {"x16",
+ nullptr,
+ 8,
+ GPR_OFFSET(16),
+ lldb::eEncodingUint,
+ lldb::eFormatHex,
+ {arm64_ehframe::x16, arm64_dwarf::x16, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, gpr_x16},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {"x17",
+ nullptr,
+ 8,
+ GPR_OFFSET(17),
+ lldb::eEncodingUint,
+ lldb::eFormatHex,
+ {arm64_ehframe::x17, arm64_dwarf::x17, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, gpr_x17},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {"x18",
+ nullptr,
+ 8,
+ GPR_OFFSET(18),
+ lldb::eEncodingUint,
+ lldb::eFormatHex,
+ {arm64_ehframe::x18, arm64_dwarf::x18, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, gpr_x18},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {"x19",
+ nullptr,
+ 8,
+ GPR_OFFSET(19),
+ lldb::eEncodingUint,
+ lldb::eFormatHex,
+ {arm64_ehframe::x19, arm64_dwarf::x19, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, gpr_x19},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {"x20",
+ nullptr,
+ 8,
+ GPR_OFFSET(20),
+ lldb::eEncodingUint,
+ lldb::eFormatHex,
+ {arm64_ehframe::x20, arm64_dwarf::x20, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, gpr_x20},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {"x21",
+ nullptr,
+ 8,
+ GPR_OFFSET(21),
+ lldb::eEncodingUint,
+ lldb::eFormatHex,
+ {arm64_ehframe::x21, arm64_dwarf::x21, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, gpr_x21},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {"x22",
+ nullptr,
+ 8,
+ GPR_OFFSET(22),
+ lldb::eEncodingUint,
+ lldb::eFormatHex,
+ {arm64_ehframe::x22, arm64_dwarf::x22, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, gpr_x22},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {"x23",
+ nullptr,
+ 8,
+ GPR_OFFSET(23),
+ lldb::eEncodingUint,
+ lldb::eFormatHex,
+ {arm64_ehframe::x23, arm64_dwarf::x23, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, gpr_x23},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {"x24",
+ nullptr,
+ 8,
+ GPR_OFFSET(24),
+ lldb::eEncodingUint,
+ lldb::eFormatHex,
+ {arm64_ehframe::x24, arm64_dwarf::x24, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, gpr_x24},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {"x25",
+ nullptr,
+ 8,
+ GPR_OFFSET(25),
+ lldb::eEncodingUint,
+ lldb::eFormatHex,
+ {arm64_ehframe::x25, arm64_dwarf::x25, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, gpr_x25},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {"x26",
+ nullptr,
+ 8,
+ GPR_OFFSET(26),
+ lldb::eEncodingUint,
+ lldb::eFormatHex,
+ {arm64_ehframe::x26, arm64_dwarf::x26, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, gpr_x26},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {"x27",
+ nullptr,
+ 8,
+ GPR_OFFSET(27),
+ lldb::eEncodingUint,
+ lldb::eFormatHex,
+ {arm64_ehframe::x27, arm64_dwarf::x27, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, gpr_x27},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {"x28",
+ nullptr,
+ 8,
+ GPR_OFFSET(28),
+ lldb::eEncodingUint,
+ lldb::eFormatHex,
+ {arm64_ehframe::x28, arm64_dwarf::x28, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, gpr_x28},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+
+ {"fp",
+ "x29",
+ 8,
+ GPR_OFFSET(29),
+ lldb::eEncodingUint,
+ lldb::eFormatHex,
+ {arm64_ehframe::fp, arm64_dwarf::fp, LLDB_REGNUM_GENERIC_FP,
+ LLDB_INVALID_REGNUM, gpr_fp},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {"lr",
+ "x30",
+ 8,
+ GPR_OFFSET(30),
+ lldb::eEncodingUint,
+ lldb::eFormatHex,
+ {arm64_ehframe::lr, arm64_dwarf::lr, LLDB_REGNUM_GENERIC_RA,
+ LLDB_INVALID_REGNUM, gpr_lr},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {"sp",
+ "x31",
+ 8,
+ GPR_OFFSET(31),
+ lldb::eEncodingUint,
+ lldb::eFormatHex,
+ {arm64_ehframe::sp, arm64_dwarf::sp, LLDB_REGNUM_GENERIC_SP,
+ LLDB_INVALID_REGNUM, gpr_sp},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {"pc",
+ nullptr,
+ 8,
+ GPR_OFFSET(32),
+ lldb::eEncodingUint,
+ lldb::eFormatHex,
+ {arm64_ehframe::pc, arm64_dwarf::pc, LLDB_REGNUM_GENERIC_PC,
+ LLDB_INVALID_REGNUM, gpr_pc},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+
+ {"cpsr",
+ nullptr,
+ 4,
+ GPR_OFFSET_NAME(cpsr),
+ lldb::eEncodingUint,
+ lldb::eFormatHex,
+ {arm64_ehframe::cpsr, arm64_dwarf::cpsr, LLDB_REGNUM_GENERIC_FLAGS,
+ LLDB_INVALID_REGNUM, gpr_cpsr},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+
+ {"v0",
+ nullptr,
+ 16,
+ FPU_OFFSET(0),
+ lldb::eEncodingVector,
+ lldb::eFormatVectorOfUInt8,
+ {LLDB_INVALID_REGNUM, arm64_dwarf::v0, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, fpu_v0},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {"v1",
+ nullptr,
+ 16,
+ FPU_OFFSET(1),
+ lldb::eEncodingVector,
+ lldb::eFormatVectorOfUInt8,
+ {LLDB_INVALID_REGNUM, arm64_dwarf::v1, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, fpu_v1},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {"v2",
+ nullptr,
+ 16,
+ FPU_OFFSET(2),
+ lldb::eEncodingVector,
+ lldb::eFormatVectorOfUInt8,
+ {LLDB_INVALID_REGNUM, arm64_dwarf::v2, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, fpu_v2},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {"v3",
+ nullptr,
+ 16,
+ FPU_OFFSET(3),
+ lldb::eEncodingVector,
+ lldb::eFormatVectorOfUInt8,
+ {LLDB_INVALID_REGNUM, arm64_dwarf::v3, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, fpu_v3},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {"v4",
+ nullptr,
+ 16,
+ FPU_OFFSET(4),
+ lldb::eEncodingVector,
+ lldb::eFormatVectorOfUInt8,
+ {LLDB_INVALID_REGNUM, arm64_dwarf::v4, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, fpu_v4},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {"v5",
+ nullptr,
+ 16,
+ FPU_OFFSET(5),
+ lldb::eEncodingVector,
+ lldb::eFormatVectorOfUInt8,
+ {LLDB_INVALID_REGNUM, arm64_dwarf::v5, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, fpu_v5},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {"v6",
+ nullptr,
+ 16,
+ FPU_OFFSET(6),
+ lldb::eEncodingVector,
+ lldb::eFormatVectorOfUInt8,
+ {LLDB_INVALID_REGNUM, arm64_dwarf::v6, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, fpu_v6},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {"v7",
+ nullptr,
+ 16,
+ FPU_OFFSET(7),
+ lldb::eEncodingVector,
+ lldb::eFormatVectorOfUInt8,
+ {LLDB_INVALID_REGNUM, arm64_dwarf::v7, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, fpu_v7},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {"v8",
+ nullptr,
+ 16,
+ FPU_OFFSET(8),
+ lldb::eEncodingVector,
+ lldb::eFormatVectorOfUInt8,
+ {LLDB_INVALID_REGNUM, arm64_dwarf::v8, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, fpu_v8},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {"v9",
+ nullptr,
+ 16,
+ FPU_OFFSET(9),
+ lldb::eEncodingVector,
+ lldb::eFormatVectorOfUInt8,
+ {LLDB_INVALID_REGNUM, arm64_dwarf::v9, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, fpu_v9},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {"v10",
+ nullptr,
+ 16,
+ FPU_OFFSET(10),
+ lldb::eEncodingVector,
+ lldb::eFormatVectorOfUInt8,
+ {LLDB_INVALID_REGNUM, arm64_dwarf::v10, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, fpu_v10},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {"v11",
+ nullptr,
+ 16,
+ FPU_OFFSET(11),
+ lldb::eEncodingVector,
+ lldb::eFormatVectorOfUInt8,
+ {LLDB_INVALID_REGNUM, arm64_dwarf::v11, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, fpu_v11},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {"v12",
+ nullptr,
+ 16,
+ FPU_OFFSET(12),
+ lldb::eEncodingVector,
+ lldb::eFormatVectorOfUInt8,
+ {LLDB_INVALID_REGNUM, arm64_dwarf::v12, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, fpu_v12},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {"v13",
+ nullptr,
+ 16,
+ FPU_OFFSET(13),
+ lldb::eEncodingVector,
+ lldb::eFormatVectorOfUInt8,
+ {LLDB_INVALID_REGNUM, arm64_dwarf::v13, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, fpu_v13},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {"v14",
+ nullptr,
+ 16,
+ FPU_OFFSET(14),
+ lldb::eEncodingVector,
+ lldb::eFormatVectorOfUInt8,
+ {LLDB_INVALID_REGNUM, arm64_dwarf::v14, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, fpu_v14},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {"v15",
+ nullptr,
+ 16,
+ FPU_OFFSET(15),
+ lldb::eEncodingVector,
+ lldb::eFormatVectorOfUInt8,
+ {LLDB_INVALID_REGNUM, arm64_dwarf::v15, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, fpu_v15},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {"v16",
+ nullptr,
+ 16,
+ FPU_OFFSET(16),
+ lldb::eEncodingVector,
+ lldb::eFormatVectorOfUInt8,
+ {LLDB_INVALID_REGNUM, arm64_dwarf::v16, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, fpu_v16},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {"v17",
+ nullptr,
+ 16,
+ FPU_OFFSET(17),
+ lldb::eEncodingVector,
+ lldb::eFormatVectorOfUInt8,
+ {LLDB_INVALID_REGNUM, arm64_dwarf::v17, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, fpu_v17},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {"v18",
+ nullptr,
+ 16,
+ FPU_OFFSET(18),
+ lldb::eEncodingVector,
+ lldb::eFormatVectorOfUInt8,
+ {LLDB_INVALID_REGNUM, arm64_dwarf::v18, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, fpu_v18},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {"v19",
+ nullptr,
+ 16,
+ FPU_OFFSET(19),
+ lldb::eEncodingVector,
+ lldb::eFormatVectorOfUInt8,
+ {LLDB_INVALID_REGNUM, arm64_dwarf::v19, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, fpu_v19},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {"v20",
+ nullptr,
+ 16,
+ FPU_OFFSET(20),
+ lldb::eEncodingVector,
+ lldb::eFormatVectorOfUInt8,
+ {LLDB_INVALID_REGNUM, arm64_dwarf::v20, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, fpu_v20},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {"v21",
+ nullptr,
+ 16,
+ FPU_OFFSET(21),
+ lldb::eEncodingVector,
+ lldb::eFormatVectorOfUInt8,
+ {LLDB_INVALID_REGNUM, arm64_dwarf::v21, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, fpu_v21},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {"v22",
+ nullptr,
+ 16,
+ FPU_OFFSET(22),
+ lldb::eEncodingVector,
+ lldb::eFormatVectorOfUInt8,
+ {LLDB_INVALID_REGNUM, arm64_dwarf::v22, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, fpu_v22},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {"v23",
+ nullptr,
+ 16,
+ FPU_OFFSET(23),
+ lldb::eEncodingVector,
+ lldb::eFormatVectorOfUInt8,
+ {LLDB_INVALID_REGNUM, arm64_dwarf::v23, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, fpu_v23},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {"v24",
+ nullptr,
+ 16,
+ FPU_OFFSET(24),
+ lldb::eEncodingVector,
+ lldb::eFormatVectorOfUInt8,
+ {LLDB_INVALID_REGNUM, arm64_dwarf::v24, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, fpu_v24},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {"v25",
+ nullptr,
+ 16,
+ FPU_OFFSET(25),
+ lldb::eEncodingVector,
+ lldb::eFormatVectorOfUInt8,
+ {LLDB_INVALID_REGNUM, arm64_dwarf::v25, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, fpu_v25},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {"v26",
+ nullptr,
+ 16,
+ FPU_OFFSET(26),
+ lldb::eEncodingVector,
+ lldb::eFormatVectorOfUInt8,
+ {LLDB_INVALID_REGNUM, arm64_dwarf::v26, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, fpu_v26},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {"v27",
+ nullptr,
+ 16,
+ FPU_OFFSET(27),
+ lldb::eEncodingVector,
+ lldb::eFormatVectorOfUInt8,
+ {LLDB_INVALID_REGNUM, arm64_dwarf::v27, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, fpu_v27},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {"v28",
+ nullptr,
+ 16,
+ FPU_OFFSET(28),
+ lldb::eEncodingVector,
+ lldb::eFormatVectorOfUInt8,
+ {LLDB_INVALID_REGNUM, arm64_dwarf::v28, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, fpu_v28},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {"v29",
+ nullptr,
+ 16,
+ FPU_OFFSET(29),
+ lldb::eEncodingVector,
+ lldb::eFormatVectorOfUInt8,
+ {LLDB_INVALID_REGNUM, arm64_dwarf::v29, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, fpu_v29},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {"v30",
+ nullptr,
+ 16,
+ FPU_OFFSET(30),
+ lldb::eEncodingVector,
+ lldb::eFormatVectorOfUInt8,
+ {LLDB_INVALID_REGNUM, arm64_dwarf::v30, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, fpu_v30},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {"v31",
+ nullptr,
+ 16,
+ FPU_OFFSET(31),
+ lldb::eEncodingVector,
+ lldb::eFormatVectorOfUInt8,
+ {LLDB_INVALID_REGNUM, arm64_dwarf::v31, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, fpu_v31},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+
+ {"fpsr",
+ nullptr,
+ 4,
+ FPU_OFFSET_NAME(fpsr),
+ lldb::eEncodingUint,
+ lldb::eFormatHex,
+ {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, fpu_fpsr},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {"fpcr",
+ nullptr,
+ 4,
+ FPU_OFFSET_NAME(fpcr),
+ lldb::eEncodingUint,
+ lldb::eFormatHex,
+ {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, fpu_fpcr},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+
+ {"far",
+ nullptr,
+ 8,
+ EXC_OFFSET_NAME(far),
+ lldb::eEncodingUint,
+ lldb::eFormatHex,
+ {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, exc_far},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {"esr",
+ nullptr,
+ 4,
+ EXC_OFFSET_NAME(esr),
+ lldb::eEncodingUint,
+ lldb::eFormatHex,
+ {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, exc_esr},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {"exception",
+ nullptr,
+ 4,
+ EXC_OFFSET_NAME(exception),
+ lldb::eEncodingUint,
+ lldb::eFormatHex,
+ {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, exc_exception},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+
+ {DEFINE_DBG(bvr, 0)},
+ {DEFINE_DBG(bvr, 1)},
+ {DEFINE_DBG(bvr, 2)},
+ {DEFINE_DBG(bvr, 3)},
+ {DEFINE_DBG(bvr, 4)},
+ {DEFINE_DBG(bvr, 5)},
+ {DEFINE_DBG(bvr, 6)},
+ {DEFINE_DBG(bvr, 7)},
+ {DEFINE_DBG(bvr, 8)},
+ {DEFINE_DBG(bvr, 9)},
+ {DEFINE_DBG(bvr, 10)},
+ {DEFINE_DBG(bvr, 11)},
+ {DEFINE_DBG(bvr, 12)},
+ {DEFINE_DBG(bvr, 13)},
+ {DEFINE_DBG(bvr, 14)},
+ {DEFINE_DBG(bvr, 15)},
+
+ {DEFINE_DBG(bcr, 0)},
+ {DEFINE_DBG(bcr, 1)},
+ {DEFINE_DBG(bcr, 2)},
+ {DEFINE_DBG(bcr, 3)},
+ {DEFINE_DBG(bcr, 4)},
+ {DEFINE_DBG(bcr, 5)},
+ {DEFINE_DBG(bcr, 6)},
+ {DEFINE_DBG(bcr, 7)},
+ {DEFINE_DBG(bcr, 8)},
+ {DEFINE_DBG(bcr, 9)},
+ {DEFINE_DBG(bcr, 10)},
+ {DEFINE_DBG(bcr, 11)},
+ {DEFINE_DBG(bcr, 12)},
+ {DEFINE_DBG(bcr, 13)},
+ {DEFINE_DBG(bcr, 14)},
+ {DEFINE_DBG(bcr, 15)},
+
+ {DEFINE_DBG(wvr, 0)},
+ {DEFINE_DBG(wvr, 1)},
+ {DEFINE_DBG(wvr, 2)},
+ {DEFINE_DBG(wvr, 3)},
+ {DEFINE_DBG(wvr, 4)},
+ {DEFINE_DBG(wvr, 5)},
+ {DEFINE_DBG(wvr, 6)},
+ {DEFINE_DBG(wvr, 7)},
+ {DEFINE_DBG(wvr, 8)},
+ {DEFINE_DBG(wvr, 9)},
+ {DEFINE_DBG(wvr, 10)},
+ {DEFINE_DBG(wvr, 11)},
+ {DEFINE_DBG(wvr, 12)},
+ {DEFINE_DBG(wvr, 13)},
+ {DEFINE_DBG(wvr, 14)},
+ {DEFINE_DBG(wvr, 15)},
+
+ {DEFINE_DBG(wcr, 0)},
+ {DEFINE_DBG(wcr, 1)},
+ {DEFINE_DBG(wcr, 2)},
+ {DEFINE_DBG(wcr, 3)},
+ {DEFINE_DBG(wcr, 4)},
+ {DEFINE_DBG(wcr, 5)},
+ {DEFINE_DBG(wcr, 6)},
+ {DEFINE_DBG(wcr, 7)},
+ {DEFINE_DBG(wcr, 8)},
+ {DEFINE_DBG(wcr, 9)},
+ {DEFINE_DBG(wcr, 10)},
+ {DEFINE_DBG(wcr, 11)},
+ {DEFINE_DBG(wcr, 12)},
+ {DEFINE_DBG(wcr, 13)},
+ {DEFINE_DBG(wcr, 14)},
+ {DEFINE_DBG(wcr, 15)}};
#endif // DECLARE_REGISTER_INFOS_ARM64_STRUCT
Modified: lldb/trunk/source/Plugins/Process/Utility/RegisterInfos_i386.h
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/source/Plugins/Process/Utility/RegisterInfos_i386.h?rev=280751&r1=280750&r2=280751&view=diff
==============================================================================
--- lldb/trunk/source/Plugins/Process/Utility/RegisterInfos_i386.h (original)
+++ lldb/trunk/source/Plugins/Process/Utility/RegisterInfos_i386.h Tue Sep 6 15:57:50 2016
@@ -19,29 +19,28 @@
#ifdef DECLARE_REGISTER_INFOS_I386_STRUCT
// Computes the offset of the given GPR in the user data area.
-#define GPR_OFFSET(regname) \
- (LLVM_EXTENSION offsetof(GPR, regname))
+#define GPR_OFFSET(regname) (LLVM_EXTENSION offsetof(GPR, regname))
// Computes the offset of the given FPR in the extended data area.
-#define FPR_OFFSET(regname) \
- (LLVM_EXTENSION offsetof(UserArea, i387) + \
- LLVM_EXTENSION offsetof(FPR_i386, regname))
+#define FPR_OFFSET(regname) \
+ (LLVM_EXTENSION offsetof(UserArea, i387) + \
+ LLVM_EXTENSION offsetof(FPR_i386, regname))
// Computes the offset of the YMM register assembled from register halves.
// Based on DNBArchImplI386.cpp from debugserver
-#define YMM_OFFSET(reg_index) \
- (LLVM_EXTENSION offsetof(UserArea, i387) + \
- LLVM_EXTENSION offsetof(FPR, xstate) + \
- LLVM_EXTENSION offsetof(FXSAVE, xmm[7]) + \
- sizeof(XMMReg) + (32 * reg_index))
+#define YMM_OFFSET(reg_index) \
+ (LLVM_EXTENSION offsetof(UserArea, i387) + \
+ LLVM_EXTENSION offsetof(FPR, xstate) + \
+ LLVM_EXTENSION offsetof(FXSAVE, xmm[7]) + sizeof(XMMReg) + \
+ (32 * reg_index))
// Number of bytes needed to represent a FPR.
#if !defined(FPR_SIZE)
-#define FPR_SIZE(reg) sizeof(((FXSAVE*)NULL)->reg)
+#define FPR_SIZE(reg) sizeof(((FXSAVE *)NULL)->reg)
#endif
// Number of bytes needed to represent the i'th FP register.
-#define FP_SIZE sizeof(((MMSReg*)NULL)->bytes)
+#define FP_SIZE sizeof(((MMSReg *)NULL)->bytes)
// Number of bytes needed to represent an XMM register.
#define XMM_SIZE sizeof(XMMReg)
@@ -50,157 +49,200 @@
#define YMM_SIZE sizeof(YMMReg)
// Note that the size and offset will be updated by platform-specific classes.
-#define DEFINE_GPR(reg, alt, kind1, kind2, kind3, kind4) \
- { #reg, alt, sizeof(((GPR*)NULL)->reg), GPR_OFFSET(reg), eEncodingUint, \
- eFormatHex, { kind1, kind2, kind3, kind4, lldb_##reg##_i386 }, NULL, NULL, NULL, 0}
-
-#define DEFINE_FPR(name, reg, kind1, kind2, kind3, kind4) \
- { #name, NULL, FPR_SIZE(reg), FPR_OFFSET(reg), eEncodingUint, \
- eFormatHex, { kind1, kind2, kind3, kind4, lldb_##name##_i386 }, NULL, NULL, NULL, 0}
+#define DEFINE_GPR(reg, alt, kind1, kind2, kind3, kind4) \
+ { \
+ #reg, alt, sizeof(((GPR *) NULL)->reg), \
+ GPR_OFFSET(reg), eEncodingUint, eFormatHex, \
+ {kind1, kind2, kind3, kind4, \
+ lldb_##reg##_i386 }, \
+ NULL, NULL, NULL, 0 \
+ }
+
+#define DEFINE_FPR(name, reg, kind1, kind2, kind3, kind4) \
+ { \
+ #name, NULL, FPR_SIZE(reg), FPR_OFFSET(reg), eEncodingUint, eFormatHex, \
+ {kind1, kind2, kind3, kind4, \
+ lldb_##name##_i386 }, \
+ NULL, NULL, NULL, 0 \
+ }
// RegisterKind: EHFrame, DWARF, Generic, Process Plugin, LLDB
-#define DEFINE_FP_ST(reg, i) \
- { #reg#i, NULL, FP_SIZE, LLVM_EXTENSION FPR_OFFSET(stmm[i]), \
- eEncodingVector, eFormatVectorOfUInt8, \
- { ehframe_st##i##_i386, dwarf_st##i##_i386, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, lldb_st##i##_i386 }, \
- NULL, NULL, NULL, 0}
-
-#define DEFINE_FP_MM(reg, i) \
- { #reg#i, NULL, sizeof(uint64_t), LLVM_EXTENSION FPR_OFFSET(stmm[i]), \
- eEncodingUint, eFormatHex, \
- { ehframe_mm##i##_i386, dwarf_mm##i##_i386, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, lldb_mm##i##_i386 }, \
- NULL, NULL, NULL, 0}
-
-#define DEFINE_XMM(reg, i) \
- { #reg#i, NULL, XMM_SIZE, LLVM_EXTENSION FPR_OFFSET(reg[i]), \
- eEncodingVector, eFormatVectorOfUInt8, \
- { ehframe_##reg##i##_i386, dwarf_##reg##i##_i386, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, lldb_##reg##i##_i386}, \
- NULL, NULL, NULL, 0}
-
-// I believe the YMM registers use dwarf_xmm_%_i386 register numbers and then differentiate based on register size.
-#define DEFINE_YMM(reg, i) \
- { #reg#i, NULL, YMM_SIZE, LLVM_EXTENSION YMM_OFFSET(i), \
- eEncodingVector, eFormatVectorOfUInt8, \
- { LLDB_INVALID_REGNUM, dwarf_xmm##i##_i386, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, lldb_##reg##i##_i386 }, \
- NULL, NULL, NULL, 0}
-
-#define DEFINE_DR(reg, i) \
- { #reg#i, NULL, DR_SIZE, DR_OFFSET(i), eEncodingUint, eFormatHex, \
- { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \
- LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM }, NULL, NULL, NULL, 0}
-
-#define DEFINE_GPR_PSEUDO_16(reg16, reg32) \
- { #reg16, NULL, 2, GPR_OFFSET(reg32), eEncodingUint, \
- eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, lldb_##reg16##_i386 }, RegisterContextPOSIX_x86::g_contained_##reg32, RegisterContextPOSIX_x86::g_invalidate_##reg32, NULL, 0}
-#define DEFINE_GPR_PSEUDO_8H(reg8, reg32) \
- { #reg8, NULL, 1, GPR_OFFSET(reg32)+1, eEncodingUint, \
- eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, lldb_##reg8##_i386 }, RegisterContextPOSIX_x86::g_contained_##reg32, RegisterContextPOSIX_x86::g_invalidate_##reg32, NULL, 0}
-#define DEFINE_GPR_PSEUDO_8L(reg8, reg32) \
- { #reg8, NULL, 1, GPR_OFFSET(reg32), eEncodingUint, \
- eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, lldb_##reg8##_i386 }, RegisterContextPOSIX_x86::g_contained_##reg32, RegisterContextPOSIX_x86::g_invalidate_##reg32, NULL, 0}
-
-static RegisterInfo
-g_register_infos_i386[] =
-{
+#define DEFINE_FP_ST(reg, i) \
+ { \
+ #reg #i, NULL, FP_SIZE, \
+ LLVM_EXTENSION FPR_OFFSET( \
+ stmm[i]), eEncodingVector, eFormatVectorOfUInt8, \
+ {ehframe_st##i##_i386, dwarf_st##i##_i386, LLDB_INVALID_REGNUM, \
+ LLDB_INVALID_REGNUM, lldb_st##i##_i386 }, \
+ NULL, NULL, NULL, 0 \
+ }
+
+#define DEFINE_FP_MM(reg, i) \
+ { \
+ #reg #i, NULL, sizeof(uint64_t), \
+ LLVM_EXTENSION FPR_OFFSET( \
+ stmm[i]), eEncodingUint, eFormatHex, \
+ {ehframe_mm##i##_i386, dwarf_mm##i##_i386, \
+ LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \
+ lldb_mm##i##_i386 }, \
+ NULL, NULL, NULL, 0 \
+ }
+
+#define DEFINE_XMM(reg, i) \
+ { \
+ #reg #i, NULL, XMM_SIZE, \
+ LLVM_EXTENSION FPR_OFFSET( \
+ reg[i]), eEncodingVector, eFormatVectorOfUInt8, \
+ {ehframe_##reg##i##_i386, dwarf_##reg##i##_i386, \
+ LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, lldb_##reg##i##_i386 }, \
+ NULL, NULL, NULL, 0 \
+ }
+
+// I believe the YMM registers use dwarf_xmm_%_i386 register numbers and then
+// differentiate based on register size.
+#define DEFINE_YMM(reg, i) \
+ { \
+ #reg #i, NULL, YMM_SIZE, \
+ LLVM_EXTENSION YMM_OFFSET(i), eEncodingVector, eFormatVectorOfUInt8, \
+ {LLDB_INVALID_REGNUM, dwarf_xmm##i##_i386, \
+ LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \
+ lldb_##reg##i##_i386 }, \
+ NULL, NULL, NULL, 0 \
+ }
+
+#define DEFINE_DR(reg, i) \
+ { \
+ #reg #i, NULL, DR_SIZE, \
+ DR_OFFSET(i), eEncodingUint, eFormatHex, \
+ {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \
+ LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \
+ LLDB_INVALID_REGNUM }, \
+ NULL, NULL, NULL, 0 \
+ }
+
+#define DEFINE_GPR_PSEUDO_16(reg16, reg32) \
+ { \
+ #reg16, NULL, 2, \
+ GPR_OFFSET(reg32), eEncodingUint, eFormatHex, \
+ {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \
+ LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \
+ lldb_##reg16##_i386 }, \
+ RegisterContextPOSIX_x86::g_contained_##reg32, \
+ RegisterContextPOSIX_x86::g_invalidate_##reg32, NULL, 0 \
+ }
+#define DEFINE_GPR_PSEUDO_8H(reg8, reg32) \
+ { \
+ #reg8, NULL, 1, \
+ GPR_OFFSET(reg32) + 1, eEncodingUint, eFormatHex, \
+ {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \
+ LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \
+ lldb_##reg8##_i386 }, \
+ RegisterContextPOSIX_x86::g_contained_##reg32, \
+ RegisterContextPOSIX_x86::g_invalidate_##reg32, NULL, 0 \
+ }
+#define DEFINE_GPR_PSEUDO_8L(reg8, reg32) \
+ { \
+ #reg8, NULL, 1, \
+ GPR_OFFSET(reg32), eEncodingUint, eFormatHex, \
+ {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \
+ LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \
+ lldb_##reg8##_i386 }, \
+ RegisterContextPOSIX_x86::g_contained_##reg32, \
+ RegisterContextPOSIX_x86::g_invalidate_##reg32, NULL, 0 \
+ }
+
+static RegisterInfo g_register_infos_i386[] = {
// General purpose registers.
- DEFINE_GPR(eax, nullptr, ehframe_eax_i386, dwarf_eax_i386, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
- DEFINE_GPR(ebx, nullptr, ehframe_ebx_i386, dwarf_ebx_i386, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
- DEFINE_GPR(ecx, nullptr, ehframe_ecx_i386, dwarf_ecx_i386, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
- DEFINE_GPR(edx, nullptr, ehframe_edx_i386, dwarf_edx_i386, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
- DEFINE_GPR(edi, nullptr, ehframe_edi_i386, dwarf_edi_i386, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
- DEFINE_GPR(esi, nullptr, ehframe_esi_i386, dwarf_esi_i386, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
- DEFINE_GPR(ebp, "fp", ehframe_ebp_i386, dwarf_ebp_i386, LLDB_REGNUM_GENERIC_FP, LLDB_INVALID_REGNUM),
- DEFINE_GPR(esp, "sp", ehframe_esp_i386, dwarf_esp_i386, LLDB_REGNUM_GENERIC_SP, LLDB_INVALID_REGNUM),
- DEFINE_GPR(eip, "pc", ehframe_eip_i386, dwarf_eip_i386, LLDB_REGNUM_GENERIC_PC, LLDB_INVALID_REGNUM),
- DEFINE_GPR(eflags, "flags", ehframe_eflags_i386, dwarf_eflags_i386, LLDB_REGNUM_GENERIC_FLAGS, LLDB_INVALID_REGNUM),
- DEFINE_GPR(cs, nullptr, LLDB_INVALID_REGNUM, dwarf_cs_i386, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
- DEFINE_GPR(fs, nullptr, LLDB_INVALID_REGNUM, dwarf_fs_i386, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
- DEFINE_GPR(gs, nullptr, LLDB_INVALID_REGNUM, dwarf_gs_i386, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
- DEFINE_GPR(ss, nullptr, LLDB_INVALID_REGNUM, dwarf_ss_i386, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
- DEFINE_GPR(ds, nullptr, LLDB_INVALID_REGNUM, dwarf_ds_i386, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
- DEFINE_GPR(es, nullptr, LLDB_INVALID_REGNUM, dwarf_es_i386, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
-
- DEFINE_GPR_PSEUDO_16(ax, eax),
- DEFINE_GPR_PSEUDO_16(bx, ebx),
- DEFINE_GPR_PSEUDO_16(cx, ecx),
- DEFINE_GPR_PSEUDO_16(dx, edx),
- DEFINE_GPR_PSEUDO_16(di, edi),
- DEFINE_GPR_PSEUDO_16(si, esi),
- DEFINE_GPR_PSEUDO_16(bp, ebp),
- DEFINE_GPR_PSEUDO_16(sp, esp),
- DEFINE_GPR_PSEUDO_8H(ah, eax),
- DEFINE_GPR_PSEUDO_8H(bh, ebx),
- DEFINE_GPR_PSEUDO_8H(ch, ecx),
- DEFINE_GPR_PSEUDO_8H(dh, edx),
- DEFINE_GPR_PSEUDO_8L(al, eax),
- DEFINE_GPR_PSEUDO_8L(bl, ebx),
- DEFINE_GPR_PSEUDO_8L(cl, ecx),
- DEFINE_GPR_PSEUDO_8L(dl, edx),
+ DEFINE_GPR(eax, nullptr, ehframe_eax_i386, dwarf_eax_i386,
+ LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
+ DEFINE_GPR(ebx, nullptr, ehframe_ebx_i386, dwarf_ebx_i386,
+ LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
+ DEFINE_GPR(ecx, nullptr, ehframe_ecx_i386, dwarf_ecx_i386,
+ LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
+ DEFINE_GPR(edx, nullptr, ehframe_edx_i386, dwarf_edx_i386,
+ LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
+ DEFINE_GPR(edi, nullptr, ehframe_edi_i386, dwarf_edi_i386,
+ LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
+ DEFINE_GPR(esi, nullptr, ehframe_esi_i386, dwarf_esi_i386,
+ LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
+ DEFINE_GPR(ebp, "fp", ehframe_ebp_i386, dwarf_ebp_i386,
+ LLDB_REGNUM_GENERIC_FP, LLDB_INVALID_REGNUM),
+ DEFINE_GPR(esp, "sp", ehframe_esp_i386, dwarf_esp_i386,
+ LLDB_REGNUM_GENERIC_SP, LLDB_INVALID_REGNUM),
+ DEFINE_GPR(eip, "pc", ehframe_eip_i386, dwarf_eip_i386,
+ LLDB_REGNUM_GENERIC_PC, LLDB_INVALID_REGNUM),
+ DEFINE_GPR(eflags, "flags", ehframe_eflags_i386, dwarf_eflags_i386,
+ LLDB_REGNUM_GENERIC_FLAGS, LLDB_INVALID_REGNUM),
+ DEFINE_GPR(cs, nullptr, LLDB_INVALID_REGNUM, dwarf_cs_i386,
+ LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
+ DEFINE_GPR(fs, nullptr, LLDB_INVALID_REGNUM, dwarf_fs_i386,
+ LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
+ DEFINE_GPR(gs, nullptr, LLDB_INVALID_REGNUM, dwarf_gs_i386,
+ LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
+ DEFINE_GPR(ss, nullptr, LLDB_INVALID_REGNUM, dwarf_ss_i386,
+ LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
+ DEFINE_GPR(ds, nullptr, LLDB_INVALID_REGNUM, dwarf_ds_i386,
+ LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
+ DEFINE_GPR(es, nullptr, LLDB_INVALID_REGNUM, dwarf_es_i386,
+ LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
+
+ DEFINE_GPR_PSEUDO_16(ax, eax), DEFINE_GPR_PSEUDO_16(bx, ebx),
+ DEFINE_GPR_PSEUDO_16(cx, ecx), DEFINE_GPR_PSEUDO_16(dx, edx),
+ DEFINE_GPR_PSEUDO_16(di, edi), DEFINE_GPR_PSEUDO_16(si, esi),
+ DEFINE_GPR_PSEUDO_16(bp, ebp), DEFINE_GPR_PSEUDO_16(sp, esp),
+ DEFINE_GPR_PSEUDO_8H(ah, eax), DEFINE_GPR_PSEUDO_8H(bh, ebx),
+ DEFINE_GPR_PSEUDO_8H(ch, ecx), DEFINE_GPR_PSEUDO_8H(dh, edx),
+ DEFINE_GPR_PSEUDO_8L(al, eax), DEFINE_GPR_PSEUDO_8L(bl, ebx),
+ DEFINE_GPR_PSEUDO_8L(cl, ecx), DEFINE_GPR_PSEUDO_8L(dl, edx),
// i387 Floating point registers.
- DEFINE_FPR(fctrl, fctrl, LLDB_INVALID_REGNUM, dwarf_fctrl_i386, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
- DEFINE_FPR(fstat, fstat, LLDB_INVALID_REGNUM, dwarf_fstat_i386, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
- DEFINE_FPR(ftag, ftag, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
- DEFINE_FPR(fop, fop, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
- DEFINE_FPR(fiseg, ptr.i386_.fiseg, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
- DEFINE_FPR(fioff, ptr.i386_.fioff, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
- DEFINE_FPR(foseg, ptr.i386_.foseg, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
- DEFINE_FPR(fooff, ptr.i386_.fooff, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
- DEFINE_FPR(mxcsr, mxcsr, LLDB_INVALID_REGNUM, dwarf_mxcsr_i386, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
- DEFINE_FPR(mxcsrmask, mxcsrmask, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
+ DEFINE_FPR(fctrl, fctrl, LLDB_INVALID_REGNUM, dwarf_fctrl_i386,
+ LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
+ DEFINE_FPR(fstat, fstat, LLDB_INVALID_REGNUM, dwarf_fstat_i386,
+ LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
+ DEFINE_FPR(ftag, ftag, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
+ DEFINE_FPR(fop, fop, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
+ DEFINE_FPR(fiseg, ptr.i386_.fiseg, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
+ DEFINE_FPR(fioff, ptr.i386_.fioff, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
+ DEFINE_FPR(foseg, ptr.i386_.foseg, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
+ DEFINE_FPR(fooff, ptr.i386_.fooff, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
+ DEFINE_FPR(mxcsr, mxcsr, LLDB_INVALID_REGNUM, dwarf_mxcsr_i386,
+ LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
+ DEFINE_FPR(mxcsrmask, mxcsrmask, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
// FP registers.
- DEFINE_FP_ST(st, 0),
- DEFINE_FP_ST(st, 1),
- DEFINE_FP_ST(st, 2),
- DEFINE_FP_ST(st, 3),
- DEFINE_FP_ST(st, 4),
- DEFINE_FP_ST(st, 5),
- DEFINE_FP_ST(st, 6),
- DEFINE_FP_ST(st, 7),
- DEFINE_FP_MM(mm, 0),
- DEFINE_FP_MM(mm, 1),
- DEFINE_FP_MM(mm, 2),
- DEFINE_FP_MM(mm, 3),
- DEFINE_FP_MM(mm, 4),
- DEFINE_FP_MM(mm, 5),
- DEFINE_FP_MM(mm, 6),
+ DEFINE_FP_ST(st, 0), DEFINE_FP_ST(st, 1), DEFINE_FP_ST(st, 2),
+ DEFINE_FP_ST(st, 3), DEFINE_FP_ST(st, 4), DEFINE_FP_ST(st, 5),
+ DEFINE_FP_ST(st, 6), DEFINE_FP_ST(st, 7), DEFINE_FP_MM(mm, 0),
+ DEFINE_FP_MM(mm, 1), DEFINE_FP_MM(mm, 2), DEFINE_FP_MM(mm, 3),
+ DEFINE_FP_MM(mm, 4), DEFINE_FP_MM(mm, 5), DEFINE_FP_MM(mm, 6),
DEFINE_FP_MM(mm, 7),
// XMM registers
- DEFINE_XMM(xmm, 0),
- DEFINE_XMM(xmm, 1),
- DEFINE_XMM(xmm, 2),
- DEFINE_XMM(xmm, 3),
- DEFINE_XMM(xmm, 4),
- DEFINE_XMM(xmm, 5),
- DEFINE_XMM(xmm, 6),
- DEFINE_XMM(xmm, 7),
+ DEFINE_XMM(xmm, 0), DEFINE_XMM(xmm, 1), DEFINE_XMM(xmm, 2),
+ DEFINE_XMM(xmm, 3), DEFINE_XMM(xmm, 4), DEFINE_XMM(xmm, 5),
+ DEFINE_XMM(xmm, 6), DEFINE_XMM(xmm, 7),
// Copy of YMM registers assembled from xmm and ymmh
- DEFINE_YMM(ymm, 0),
- DEFINE_YMM(ymm, 1),
- DEFINE_YMM(ymm, 2),
- DEFINE_YMM(ymm, 3),
- DEFINE_YMM(ymm, 4),
- DEFINE_YMM(ymm, 5),
- DEFINE_YMM(ymm, 6),
- DEFINE_YMM(ymm, 7),
+ DEFINE_YMM(ymm, 0), DEFINE_YMM(ymm, 1), DEFINE_YMM(ymm, 2),
+ DEFINE_YMM(ymm, 3), DEFINE_YMM(ymm, 4), DEFINE_YMM(ymm, 5),
+ DEFINE_YMM(ymm, 6), DEFINE_YMM(ymm, 7),
// Debug registers for lldb internal use
- DEFINE_DR(dr, 0),
- DEFINE_DR(dr, 1),
- DEFINE_DR(dr, 2),
- DEFINE_DR(dr, 3),
- DEFINE_DR(dr, 4),
- DEFINE_DR(dr, 5),
- DEFINE_DR(dr, 6),
- DEFINE_DR(dr, 7)
-};
+ DEFINE_DR(dr, 0), DEFINE_DR(dr, 1), DEFINE_DR(dr, 2), DEFINE_DR(dr, 3),
+ DEFINE_DR(dr, 4), DEFINE_DR(dr, 5), DEFINE_DR(dr, 6), DEFINE_DR(dr, 7)};
-static_assert((sizeof(g_register_infos_i386) / sizeof(g_register_infos_i386[0])) == k_num_registers_i386,
- "g_register_infos_x86_64 has wrong number of register infos");
+static_assert((sizeof(g_register_infos_i386) /
+ sizeof(g_register_infos_i386[0])) == k_num_registers_i386,
+ "g_register_infos_x86_64 has wrong number of register infos");
#undef GPR_OFFSET
#undef FPR_OFFSET
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