[Lldb-commits] [PATCH] D24255: Fix for rL280668, Intel(R) Memory Protection Extensions (Intel(R) MPX) support.

[Valentina Giusti via lldb-commits]

valentinagiusti added a comment.

Hi, inline there are my other replies.


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Comment at: packages/Python/lldbsuite/test/functionalities/register/intel_xtended_registers/Makefile:5
@@ +4,3 @@
+
+ifeq "$(ARCH)" "i386"
+	CXXFLAGS += -mmpx -fcheck-pointer-bounds -fuse-ld=bfd -m32
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labath wrote:
> This should not be necessary. Makefile.rules already correctly appends -m32 when needed. Maybe CFLAGS_EXTRAS would work instead (?)
Unfortunately it doesn't append -m32 to all the instances when also a linker is needed in the build process. In fact, in the test logs it shows that only the first call of the g++ command has such a flag, and therefore the inferior code build ends with an error.
If there is a better way to do the same with CFLAGS_EXTRAS please let me know!


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Comment at: packages/Python/lldbsuite/test/functionalities/register/register_command/TestRegisters.py:297
@@ -294,4 +296,3 @@
             for registerSet in registerSets:
-                if 'advanced vector extensions' in registerSet.GetName().lower():
-                    has_avx = True
-                    break
+                if registerSet.GetName():
+                    if 'advanced vector extensions' in registerSet.GetName().lower():
----------------
labath wrote:
> Do we want to allow a register set with no name? It looks like the root of the problem is elsewhere.
These lines of code are just to detect if there are AVX or MPX register sets, so I don't think there is the need to do anything about nameless sets here. If you don't like this solution, I think an alternative is to just check if there are the register names that belong to one set or the other, it just takes a bit longer - or I could just look for the first register in the set.


https://reviews.llvm.org/D24255