[Lldb-commits] [PATCH] D14634: [LLDB][MIPS] Fix TestDisassembleBreakpoint.py for MIPS

Nitesh Jain via lldb-commits lldb-commits at lists.llvm.org
Thu Nov 12 22:07:44 PST 2015


nitesh.jain created this revision.
nitesh.jain added reviewers: clayborg, ovyalov, jaydeep.
nitesh.jain added subscribers: bhushan, sagar, mohit.bhakkad, lldb-commits.
nitesh.jain set the repository for this revision to rL LLVM.

The "break" is opcode for breakpoint instruction.

Repository:
  rL LLVM

http://reviews.llvm.org/D14634

Files:
  packages/Python/lldbsuite/test/functionalities/disassembly/TestDisassembleBreakpoint.py

Index: packages/Python/lldbsuite/test/functionalities/disassembly/TestDisassembleBreakpoint.py
===================================================================
--- packages/Python/lldbsuite/test/functionalities/disassembly/TestDisassembleBreakpoint.py
+++ packages/Python/lldbsuite/test/functionalities/disassembly/TestDisassembleBreakpoint.py
@@ -32,12 +32,16 @@
         disassembly = self.res.GetOutput()
 
         # ARCH, if not specified, defaults to x86_64.
-        if self.getArchitecture() in ["", 'x86_64', 'i386', 'i686']:
+        arch = self.getArchitecture()
+        if arch in ["", 'x86_64', 'i386', 'i686']:
             breakpoint_opcodes = ["int3"]
             instructions = [' mov', ' addl ', 'ret']
-        elif self.getArchitecture() in ["arm", "aarch64"]:
+        elif arch in ["arm", "aarch64"]:
             breakpoint_opcodes = ["brk", "udf"]
             instructions = [' add ', ' ldr ', ' str ']
+        elif re.match("mips" , arch):
+            breakpoint_opcodes = ["break"]
+            instructions = ['lw', 'sw', 'jr']
         else:
             # TODO please add your arch here
             self.fail('unimplemented for arch = "{arch}"'.format(arch=self.getArchitecture()))


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